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authorEric Anholt2017-11-08 13:04:31 -0600
committerEric Anholt2017-11-10 14:10:09 -0600
commite38de517991a20d7a2abdffc1bc4fd702e8f673c (patch)
treec3b4a1c0801968711a9168b21a79a3b05f48327f /include
parent931f01964a2f2a75e8563feccc70ac2eb0296d99 (diff)
downloadexternal-libgbm-e38de517991a20d7a2abdffc1bc4fd702e8f673c.tar.gz
external-libgbm-e38de517991a20d7a2abdffc1bc4fd702e8f673c.tar.xz
external-libgbm-e38de517991a20d7a2abdffc1bc4fd702e8f673c.zip
headers: Sync vc4 header from drm-next.
This updates the header with the contents from drm-next d65d31388a23 ("Merge tag 'drm-misc-next-fixes-2017-11-07' of git://anongit.freedesktop.org/drm/drm-misc into drm-next") Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/drm/vc4_drm.h47
1 files changed, 44 insertions, 3 deletions
diff --git a/include/drm/vc4_drm.h b/include/drm/vc4_drm.h
index 6ac4c5c0..3415a4b7 100644
--- a/include/drm/vc4_drm.h
+++ b/include/drm/vc4_drm.h
@@ -21,8 +21,8 @@
21 * IN THE SOFTWARE. 21 * IN THE SOFTWARE.
22 */ 22 */
23 23
24#ifndef _UAPI_VC4_DRM_H_ 24#ifndef _VC4_DRM_H_
25#define _UAPI_VC4_DRM_H_ 25#define _VC4_DRM_H_
26 26
27#include "drm.h" 27#include "drm.h"
28 28
@@ -40,6 +40,8 @@ extern "C" {
40#define DRM_VC4_GET_PARAM 0x07 40#define DRM_VC4_GET_PARAM 0x07
41#define DRM_VC4_SET_TILING 0x08 41#define DRM_VC4_SET_TILING 0x08
42#define DRM_VC4_GET_TILING 0x09 42#define DRM_VC4_GET_TILING 0x09
43#define DRM_VC4_LABEL_BO 0x0a
44#define DRM_VC4_GEM_MADVISE 0x0b
43 45
44#define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl) 46#define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl)
45#define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno) 47#define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno)
@@ -51,6 +53,8 @@ extern "C" {
51#define DRM_IOCTL_VC4_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_PARAM, struct drm_vc4_get_param) 53#define DRM_IOCTL_VC4_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_PARAM, struct drm_vc4_get_param)
52#define DRM_IOCTL_VC4_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SET_TILING, struct drm_vc4_set_tiling) 54#define DRM_IOCTL_VC4_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SET_TILING, struct drm_vc4_set_tiling)
53#define DRM_IOCTL_VC4_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_TILING, struct drm_vc4_get_tiling) 55#define DRM_IOCTL_VC4_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_TILING, struct drm_vc4_get_tiling)
56#define DRM_IOCTL_VC4_LABEL_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_LABEL_BO, struct drm_vc4_label_bo)
57#define DRM_IOCTL_VC4_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GEM_MADVISE, struct drm_vc4_gem_madvise)
54 58
55struct drm_vc4_submit_rcl_surface { 59struct drm_vc4_submit_rcl_surface {
56 __u32 hindex; /* Handle index, or ~0 if not present. */ 60 __u32 hindex; /* Handle index, or ~0 if not present. */
@@ -153,6 +157,16 @@ struct drm_vc4_submit_cl {
153 __u32 pad:24; 157 __u32 pad:24;
154 158
155#define VC4_SUBMIT_CL_USE_CLEAR_COLOR (1 << 0) 159#define VC4_SUBMIT_CL_USE_CLEAR_COLOR (1 << 0)
160/* By default, the kernel gets to choose the order that the tiles are
161 * rendered in. If this is set, then the tiles will be rendered in a
162 * raster order, with the right-to-left vs left-to-right and
163 * top-to-bottom vs bottom-to-top dictated by
164 * VC4_SUBMIT_CL_RCL_ORDER_INCREASING_*. This allows overlapping
165 * blits to be implemented using the 3D engine.
166 */
167#define VC4_SUBMIT_CL_FIXED_RCL_ORDER (1 << 1)
168#define VC4_SUBMIT_CL_RCL_ORDER_INCREASING_X (1 << 2)
169#define VC4_SUBMIT_CL_RCL_ORDER_INCREASING_Y (1 << 3)
156 __u32 flags; 170 __u32 flags;
157 171
158 /* Returned value of the seqno of this render job (for the 172 /* Returned value of the seqno of this render job (for the
@@ -292,6 +306,8 @@ struct drm_vc4_get_hang_state {
292#define DRM_VC4_PARAM_SUPPORTS_BRANCHES 3 306#define DRM_VC4_PARAM_SUPPORTS_BRANCHES 3
293#define DRM_VC4_PARAM_SUPPORTS_ETC1 4 307#define DRM_VC4_PARAM_SUPPORTS_ETC1 4
294#define DRM_VC4_PARAM_SUPPORTS_THREADED_FS 5 308#define DRM_VC4_PARAM_SUPPORTS_THREADED_FS 5
309#define DRM_VC4_PARAM_SUPPORTS_FIXED_RCL_ORDER 6
310#define DRM_VC4_PARAM_SUPPORTS_MADVISE 7
295 311
296struct drm_vc4_get_param { 312struct drm_vc4_get_param {
297 __u32 param; 313 __u32 param;
@@ -311,8 +327,33 @@ struct drm_vc4_set_tiling {
311 __u64 modifier; 327 __u64 modifier;
312}; 328};
313 329
330/**
331 * struct drm_vc4_label_bo - Attach a name to a BO for debug purposes.
332 */
333struct drm_vc4_label_bo {
334 __u32 handle;
335 __u32 len;
336 __u64 name;
337};
338
339/*
340 * States prefixed with '__' are internal states and cannot be passed to the
341 * DRM_IOCTL_VC4_GEM_MADVISE ioctl.
342 */
343#define VC4_MADV_WILLNEED 0
344#define VC4_MADV_DONTNEED 1
345#define __VC4_MADV_PURGED 2
346#define __VC4_MADV_NOTSUPP 3
347
348struct drm_vc4_gem_madvise {
349 __u32 handle;
350 __u32 madv;
351 __u32 retained;
352 __u32 pad;
353};
354
314#if defined(__cplusplus) 355#if defined(__cplusplus)
315} 356}
316#endif 357#endif
317 358
318#endif /* _UAPI_VC4_DRM_H_ */ 359#endif /* _VC4_DRM_H_ */