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authorBen Skeggs2015-10-29 18:27:13 -0500
committerBen Skeggs2015-12-21 21:21:05 -0600
commitd1ec093e4c5b08c3825fe07e287aa3d023e9c9ae (patch)
tree95a925dd6c1876fd9b0ba942ed83be31904badc1 /nouveau
parent0cfb6a39864c3ebc7802107a8e4ddac67195d4cd (diff)
downloadexternal-libgbm-d1ec093e4c5b08c3825fe07e287aa3d023e9c9ae.tar.gz
external-libgbm-d1ec093e4c5b08c3825fe07e287aa3d023e9c9ae.tar.xz
external-libgbm-d1ec093e4c5b08c3825fe07e287aa3d023e9c9ae.zip
nouveau: import and install a selection of nvif headers from the kernel
This commit also modifies the install path of the main libdrm_nouveau header to be under a nouveau/ subdirectory. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Tested-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Diffstat (limited to 'nouveau')
-rw-r--r--nouveau/Makefile.am11
-rw-r--r--nouveau/libdrm_nouveau.pc.in2
-rw-r--r--nouveau/nvif/cl0080.h45
-rw-r--r--nouveau/nvif/cl9097.h44
-rw-r--r--nouveau/nvif/class.h141
-rw-r--r--nouveau/nvif/if0002.h38
-rw-r--r--nouveau/nvif/if0003.h33
-rw-r--r--nouveau/nvif/ioctl.h132
-rw-r--r--nouveau/nvif/unpack.h28
9 files changed, 472 insertions, 2 deletions
diff --git a/nouveau/Makefile.am b/nouveau/Makefile.am
index 25ea6dc1..76cdecad 100644
--- a/nouveau/Makefile.am
+++ b/nouveau/Makefile.am
@@ -14,9 +14,18 @@ libdrm_nouveau_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@
14 14
15libdrm_nouveau_la_SOURCES = $(LIBDRM_NOUVEAU_FILES) 15libdrm_nouveau_la_SOURCES = $(LIBDRM_NOUVEAU_FILES)
16 16
17libdrm_nouveauincludedir = ${includedir}/libdrm 17libdrm_nouveauincludedir = ${includedir}/libdrm/nouveau
18libdrm_nouveauinclude_HEADERS = $(LIBDRM_NOUVEAU_H_FILES) 18libdrm_nouveauinclude_HEADERS = $(LIBDRM_NOUVEAU_H_FILES)
19 19
20libdrm_nouveaunvifincludedir = ${includedir}/libdrm/nouveau/nvif
21libdrm_nouveaunvifinclude_HEADERS = nvif/class.h \
22 nvif/cl0080.h \
23 nvif/cl9097.h \
24 nvif/if0002.h \
25 nvif/if0003.h \
26 nvif/ioctl.h \
27 nvif/unpack.h
28
20pkgconfigdir = @pkgconfigdir@ 29pkgconfigdir = @pkgconfigdir@
21pkgconfig_DATA = libdrm_nouveau.pc 30pkgconfig_DATA = libdrm_nouveau.pc
22 31
diff --git a/nouveau/libdrm_nouveau.pc.in b/nouveau/libdrm_nouveau.pc.in
index 9abfd811..7d0622e9 100644
--- a/nouveau/libdrm_nouveau.pc.in
+++ b/nouveau/libdrm_nouveau.pc.in
@@ -7,5 +7,5 @@ Name: libdrm_nouveau
7Description: Userspace interface to nouveau kernel DRM services 7Description: Userspace interface to nouveau kernel DRM services
8Version: @PACKAGE_VERSION@ 8Version: @PACKAGE_VERSION@
9Libs: -L${libdir} -ldrm_nouveau 9Libs: -L${libdir} -ldrm_nouveau
10Cflags: -I${includedir} -I${includedir}/libdrm 10Cflags: -I${includedir} -I${includedir}/libdrm -I${includedir}/libdrm/nouveau
11Requires.private: libdrm 11Requires.private: libdrm
diff --git a/nouveau/nvif/cl0080.h b/nouveau/nvif/cl0080.h
new file mode 100644
index 00000000..331620a5
--- /dev/null
+++ b/nouveau/nvif/cl0080.h
@@ -0,0 +1,45 @@
1#ifndef __NVIF_CL0080_H__
2#define __NVIF_CL0080_H__
3
4struct nv_device_v0 {
5 __u8 version;
6 __u8 pad01[7];
7 __u64 device; /* device identifier, ~0 for client default */
8};
9
10#define NV_DEVICE_V0_INFO 0x00
11#define NV_DEVICE_V0_TIME 0x01
12
13struct nv_device_info_v0 {
14 __u8 version;
15#define NV_DEVICE_INFO_V0_IGP 0x00
16#define NV_DEVICE_INFO_V0_PCI 0x01
17#define NV_DEVICE_INFO_V0_AGP 0x02
18#define NV_DEVICE_INFO_V0_PCIE 0x03
19#define NV_DEVICE_INFO_V0_SOC 0x04
20 __u8 platform;
21 __u16 chipset; /* from NV_PMC_BOOT_0 */
22 __u8 revision; /* from NV_PMC_BOOT_0 */
23#define NV_DEVICE_INFO_V0_TNT 0x01
24#define NV_DEVICE_INFO_V0_CELSIUS 0x02
25#define NV_DEVICE_INFO_V0_KELVIN 0x03
26#define NV_DEVICE_INFO_V0_RANKINE 0x04
27#define NV_DEVICE_INFO_V0_CURIE 0x05
28#define NV_DEVICE_INFO_V0_TESLA 0x06
29#define NV_DEVICE_INFO_V0_FERMI 0x07
30#define NV_DEVICE_INFO_V0_KEPLER 0x08
31#define NV_DEVICE_INFO_V0_MAXWELL 0x09
32 __u8 family;
33 __u8 pad06[2];
34 __u64 ram_size;
35 __u64 ram_user;
36 char chip[16];
37 char name[64];
38};
39
40struct nv_device_time_v0 {
41 __u8 version;
42 __u8 pad01[7];
43 __u64 time;
44};
45#endif
diff --git a/nouveau/nvif/cl9097.h b/nouveau/nvif/cl9097.h
new file mode 100644
index 00000000..4057676d
--- /dev/null
+++ b/nouveau/nvif/cl9097.h
@@ -0,0 +1,44 @@
1#ifndef __NVIF_CL9097_H__
2#define __NVIF_CL9097_H__
3
4#define FERMI_A_ZBC_COLOR 0x00
5#define FERMI_A_ZBC_DEPTH 0x01
6
7struct fermi_a_zbc_color_v0 {
8 __u8 version;
9#define FERMI_A_ZBC_COLOR_V0_FMT_ZERO 0x01
10#define FERMI_A_ZBC_COLOR_V0_FMT_UNORM_ONE 0x02
11#define FERMI_A_ZBC_COLOR_V0_FMT_RF32_GF32_BF32_AF32 0x04
12#define FERMI_A_ZBC_COLOR_V0_FMT_R16_G16_B16_A16 0x08
13#define FERMI_A_ZBC_COLOR_V0_FMT_RN16_GN16_BN16_AN16 0x0c
14#define FERMI_A_ZBC_COLOR_V0_FMT_RS16_GS16_BS16_AS16 0x10
15#define FERMI_A_ZBC_COLOR_V0_FMT_RU16_GU16_BU16_AU16 0x14
16#define FERMI_A_ZBC_COLOR_V0_FMT_RF16_GF16_BF16_AF16 0x16
17#define FERMI_A_ZBC_COLOR_V0_FMT_A8R8G8B8 0x18
18#define FERMI_A_ZBC_COLOR_V0_FMT_A8RL8GL8BL8 0x1c
19#define FERMI_A_ZBC_COLOR_V0_FMT_A2B10G10R10 0x20
20#define FERMI_A_ZBC_COLOR_V0_FMT_AU2BU10GU10RU10 0x24
21#define FERMI_A_ZBC_COLOR_V0_FMT_A8B8G8R8 0x28
22#define FERMI_A_ZBC_COLOR_V0_FMT_A8BL8GL8RL8 0x2c
23#define FERMI_A_ZBC_COLOR_V0_FMT_AN8BN8GN8RN8 0x30
24#define FERMI_A_ZBC_COLOR_V0_FMT_AS8BS8GS8RS8 0x34
25#define FERMI_A_ZBC_COLOR_V0_FMT_AU8BU8GU8RU8 0x38
26#define FERMI_A_ZBC_COLOR_V0_FMT_A2R10G10B10 0x3c
27#define FERMI_A_ZBC_COLOR_V0_FMT_BF10GF11RF11 0x40
28 __u8 format;
29 __u8 index;
30 __u8 pad03[5];
31 __u32 ds[4];
32 __u32 l2[4];
33};
34
35struct fermi_a_zbc_depth_v0 {
36 __u8 version;
37#define FERMI_A_ZBC_DEPTH_V0_FMT_FP32 0x01
38 __u8 format;
39 __u8 index;
40 __u8 pad03[5];
41 __u32 ds;
42 __u32 l2;
43};
44#endif
diff --git a/nouveau/nvif/class.h b/nouveau/nvif/class.h
new file mode 100644
index 00000000..4179cd65
--- /dev/null
+++ b/nouveau/nvif/class.h
@@ -0,0 +1,141 @@
1#ifndef __NVIF_CLASS_H__
2#define __NVIF_CLASS_H__
3
4/* these class numbers are made up by us, and not nvidia-assigned */
5#define NVIF_CLASS_CONTROL /* if0001.h */ -1
6#define NVIF_CLASS_PERFMON /* if0002.h */ -2
7#define NVIF_CLASS_PERFDOM /* if0003.h */ -3
8#define NVIF_CLASS_SW_NV04 /* if0004.h */ -4
9#define NVIF_CLASS_SW_NV10 /* if0005.h */ -5
10#define NVIF_CLASS_SW_NV50 /* if0005.h */ -6
11#define NVIF_CLASS_SW_GF100 /* if0005.h */ -7
12
13/* the below match nvidia-assigned (either in hw, or sw) class numbers */
14#define NV_DEVICE /* cl0080.h */ 0x00000080
15
16#define NV_DMA_FROM_MEMORY /* cl0002.h */ 0x00000002
17#define NV_DMA_TO_MEMORY /* cl0002.h */ 0x00000003
18#define NV_DMA_IN_MEMORY /* cl0002.h */ 0x0000003d
19
20#define FERMI_TWOD_A 0x0000902d
21
22#define FERMI_MEMORY_TO_MEMORY_FORMAT_A 0x00009039
23
24#define KEPLER_INLINE_TO_MEMORY_A 0x0000a040
25#define KEPLER_INLINE_TO_MEMORY_B 0x0000a140
26
27#define NV04_DISP /* cl0046.h */ 0x00000046
28
29#define NV03_CHANNEL_DMA /* cl506b.h */ 0x0000006b
30#define NV10_CHANNEL_DMA /* cl506b.h */ 0x0000006e
31#define NV17_CHANNEL_DMA /* cl506b.h */ 0x0000176e
32#define NV40_CHANNEL_DMA /* cl506b.h */ 0x0000406e
33#define NV50_CHANNEL_DMA /* cl506e.h */ 0x0000506e
34#define G82_CHANNEL_DMA /* cl826e.h */ 0x0000826e
35
36#define NV50_CHANNEL_GPFIFO /* cl506f.h */ 0x0000506f
37#define G82_CHANNEL_GPFIFO /* cl826f.h */ 0x0000826f
38#define FERMI_CHANNEL_GPFIFO /* cl906f.h */ 0x0000906f
39#define KEPLER_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000a06f
40#define MAXWELL_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000b06f
41
42#define NV50_DISP /* cl5070.h */ 0x00005070
43#define G82_DISP /* cl5070.h */ 0x00008270
44#define GT200_DISP /* cl5070.h */ 0x00008370
45#define GT214_DISP /* cl5070.h */ 0x00008570
46#define GT206_DISP /* cl5070.h */ 0x00008870
47#define GF110_DISP /* cl5070.h */ 0x00009070
48#define GK104_DISP /* cl5070.h */ 0x00009170
49#define GK110_DISP /* cl5070.h */ 0x00009270
50#define GM107_DISP /* cl5070.h */ 0x00009470
51#define GM204_DISP /* cl5070.h */ 0x00009570
52
53#define NV31_MPEG 0x00003174
54#define G82_MPEG 0x00008274
55
56#define NV74_VP2 0x00007476
57
58#define NV50_DISP_CURSOR /* cl507a.h */ 0x0000507a
59#define G82_DISP_CURSOR /* cl507a.h */ 0x0000827a
60#define GT214_DISP_CURSOR /* cl507a.h */ 0x0000857a
61#define GF110_DISP_CURSOR /* cl507a.h */ 0x0000907a
62#define GK104_DISP_CURSOR /* cl507a.h */ 0x0000917a
63
64#define NV50_DISP_OVERLAY /* cl507b.h */ 0x0000507b
65#define G82_DISP_OVERLAY /* cl507b.h */ 0x0000827b
66#define GT214_DISP_OVERLAY /* cl507b.h */ 0x0000857b
67#define GF110_DISP_OVERLAY /* cl507b.h */ 0x0000907b
68#define GK104_DISP_OVERLAY /* cl507b.h */ 0x0000917b
69
70#define NV50_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000507c
71#define G82_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000827c
72#define GT200_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000837c
73#define GT214_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000857c
74#define GF110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000907c
75#define GK104_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000917c
76#define GK110_DISP_BASE_CHANNEL_DMA /* cl507c.h */ 0x0000927c
77
78#define NV50_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000507d
79#define G82_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000827d
80#define GT200_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000837d
81#define GT214_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000857d
82#define GT206_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000887d
83#define GF110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000907d
84#define GK104_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000917d
85#define GK110_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000927d
86#define GM107_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000947d
87#define GM204_DISP_CORE_CHANNEL_DMA /* cl507d.h */ 0x0000957d
88
89#define NV50_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000507e
90#define G82_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000827e
91#define GT200_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000837e
92#define GT214_DISP_OVERLAY_CHANNEL_DMA /* cl507e.h */ 0x0000857e
93#define GF110_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000907e
94#define GK104_DISP_OVERLAY_CONTROL_DMA /* cl507e.h */ 0x0000917e
95
96#define FERMI_A /* cl9097.h */ 0x00009097
97#define FERMI_B /* cl9097.h */ 0x00009197
98#define FERMI_C /* cl9097.h */ 0x00009297
99
100#define KEPLER_A /* cl9097.h */ 0x0000a097
101#define KEPLER_B /* cl9097.h */ 0x0000a197
102#define KEPLER_C /* cl9097.h */ 0x0000a297
103
104#define MAXWELL_A /* cl9097.h */ 0x0000b097
105#define MAXWELL_B /* cl9097.h */ 0x0000b197
106
107#define NV74_BSP 0x000074b0
108
109#define GT212_MSVLD 0x000085b1
110#define IGT21A_MSVLD 0x000086b1
111#define G98_MSVLD 0x000088b1
112#define GF100_MSVLD 0x000090b1
113#define GK104_MSVLD 0x000095b1
114
115#define GT212_MSPDEC 0x000085b2
116#define G98_MSPDEC 0x000088b2
117#define GF100_MSPDEC 0x000090b2
118#define GK104_MSPDEC 0x000095b2
119
120#define GT212_MSPPP 0x000085b3
121#define G98_MSPPP 0x000088b3
122#define GF100_MSPPP 0x000090b3
123
124#define G98_SEC 0x000088b4
125
126#define GT212_DMA 0x000085b5
127#define FERMI_DMA 0x000090b5
128#define KEPLER_DMA_COPY_A 0x0000a0b5
129#define MAXWELL_DMA_COPY_A 0x0000b0b5
130
131#define FERMI_DECOMPRESS 0x000090b8
132
133#define FERMI_COMPUTE_A 0x000090c0
134#define FERMI_COMPUTE_B 0x000091c0
135#define KEPLER_COMPUTE_A 0x0000a0c0
136#define KEPLER_COMPUTE_B 0x0000a1c0
137#define MAXWELL_COMPUTE_A 0x0000b0c0
138#define MAXWELL_COMPUTE_B 0x0000b1c0
139
140#define NV74_CIPHER 0x000074c1
141#endif
diff --git a/nouveau/nvif/if0002.h b/nouveau/nvif/if0002.h
new file mode 100644
index 00000000..c04c91d0
--- /dev/null
+++ b/nouveau/nvif/if0002.h
@@ -0,0 +1,38 @@
1#ifndef __NVIF_IF0002_H__
2#define __NVIF_IF0002_H__
3
4#define NVIF_PERFMON_V0_QUERY_DOMAIN 0x00
5#define NVIF_PERFMON_V0_QUERY_SIGNAL 0x01
6#define NVIF_PERFMON_V0_QUERY_SOURCE 0x02
7
8struct nvif_perfmon_query_domain_v0 {
9 __u8 version;
10 __u8 id;
11 __u8 counter_nr;
12 __u8 iter;
13 __u16 signal_nr;
14 __u8 pad05[2];
15 char name[64];
16};
17
18struct nvif_perfmon_query_signal_v0 {
19 __u8 version;
20 __u8 domain;
21 __u16 iter;
22 __u8 signal;
23 __u8 source_nr;
24 __u8 pad05[2];
25 char name[64];
26};
27
28struct nvif_perfmon_query_source_v0 {
29 __u8 version;
30 __u8 domain;
31 __u8 signal;
32 __u8 iter;
33 __u8 pad04[4];
34 __u32 source;
35 __u32 mask;
36 char name[64];
37};
38#endif
diff --git a/nouveau/nvif/if0003.h b/nouveau/nvif/if0003.h
new file mode 100644
index 00000000..0cd03efb
--- /dev/null
+++ b/nouveau/nvif/if0003.h
@@ -0,0 +1,33 @@
1#ifndef __NVIF_IF0003_H__
2#define __NVIF_IF0003_H__
3
4struct nvif_perfdom_v0 {
5 __u8 version;
6 __u8 domain;
7 __u8 mode;
8 __u8 pad03[1];
9 struct {
10 __u8 signal[4];
11 __u64 source[4][8];
12 __u16 logic_op;
13 } ctr[4];
14};
15
16#define NVIF_PERFDOM_V0_INIT 0x00
17#define NVIF_PERFDOM_V0_SAMPLE 0x01
18#define NVIF_PERFDOM_V0_READ 0x02
19
20struct nvif_perfdom_init {
21};
22
23struct nvif_perfdom_sample {
24};
25
26struct nvif_perfdom_read_v0 {
27 __u8 version;
28 __u8 pad01[7];
29 __u32 ctr[4];
30 __u32 clk;
31 __u8 pad04[4];
32};
33#endif
diff --git a/nouveau/nvif/ioctl.h b/nouveau/nvif/ioctl.h
new file mode 100644
index 00000000..c5f5eb83
--- /dev/null
+++ b/nouveau/nvif/ioctl.h
@@ -0,0 +1,132 @@
1#ifndef __NVIF_IOCTL_H__
2#define __NVIF_IOCTL_H__
3
4#define NVIF_VERSION_LATEST 0x0000000000000000ULL
5
6struct nvif_ioctl_v0 {
7 __u8 version;
8#define NVIF_IOCTL_V0_NOP 0x00
9#define NVIF_IOCTL_V0_SCLASS 0x01
10#define NVIF_IOCTL_V0_NEW 0x02
11#define NVIF_IOCTL_V0_DEL 0x03
12#define NVIF_IOCTL_V0_MTHD 0x04
13#define NVIF_IOCTL_V0_RD 0x05
14#define NVIF_IOCTL_V0_WR 0x06
15#define NVIF_IOCTL_V0_MAP 0x07
16#define NVIF_IOCTL_V0_UNMAP 0x08
17#define NVIF_IOCTL_V0_NTFY_NEW 0x09
18#define NVIF_IOCTL_V0_NTFY_DEL 0x0a
19#define NVIF_IOCTL_V0_NTFY_GET 0x0b
20#define NVIF_IOCTL_V0_NTFY_PUT 0x0c
21 __u8 type;
22 __u8 pad02[4];
23#define NVIF_IOCTL_V0_OWNER_NVIF 0x00
24#define NVIF_IOCTL_V0_OWNER_ANY 0xff
25 __u8 owner;
26#define NVIF_IOCTL_V0_ROUTE_NVIF 0x00
27#define NVIF_IOCTL_V0_ROUTE_HIDDEN 0xff
28 __u8 route;
29 __u64 token;
30 __u64 object;
31 __u8 data[]; /* ioctl data (below) */
32};
33
34struct nvif_ioctl_nop_v0 {
35 __u64 version;
36};
37
38struct nvif_ioctl_sclass_v0 {
39 /* nvif_ioctl ... */
40 __u8 version;
41 __u8 count;
42 __u8 pad02[6];
43 struct nvif_ioctl_sclass_oclass_v0 {
44 __s32 oclass;
45 __s16 minver;
46 __s16 maxver;
47 } oclass[];
48};
49
50struct nvif_ioctl_new_v0 {
51 /* nvif_ioctl ... */
52 __u8 version;
53 __u8 pad01[6];
54 __u8 route;
55 __u64 token;
56 __u64 object;
57 __u32 handle;
58 __s32 oclass;
59 __u8 data[]; /* class data (class.h) */
60};
61
62struct nvif_ioctl_del {
63};
64
65struct nvif_ioctl_rd_v0 {
66 /* nvif_ioctl ... */
67 __u8 version;
68 __u8 size;
69 __u8 pad02[2];
70 __u32 data;
71 __u64 addr;
72};
73
74struct nvif_ioctl_wr_v0 {
75 /* nvif_ioctl ... */
76 __u8 version;
77 __u8 size;
78 __u8 pad02[2];
79 __u32 data;
80 __u64 addr;
81};
82
83struct nvif_ioctl_map_v0 {
84 /* nvif_ioctl ... */
85 __u8 version;
86 __u8 pad01[3];
87 __u32 length;
88 __u64 handle;
89};
90
91struct nvif_ioctl_unmap {
92};
93
94struct nvif_ioctl_ntfy_new_v0 {
95 /* nvif_ioctl ... */
96 __u8 version;
97 __u8 event;
98 __u8 index;
99 __u8 pad03[5];
100 __u8 data[]; /* event request data (event.h) */
101};
102
103struct nvif_ioctl_ntfy_del_v0 {
104 /* nvif_ioctl ... */
105 __u8 version;
106 __u8 index;
107 __u8 pad02[6];
108};
109
110struct nvif_ioctl_ntfy_get_v0 {
111 /* nvif_ioctl ... */
112 __u8 version;
113 __u8 index;
114 __u8 pad02[6];
115};
116
117struct nvif_ioctl_ntfy_put_v0 {
118 /* nvif_ioctl ... */
119 __u8 version;
120 __u8 index;
121 __u8 pad02[6];
122};
123
124struct nvif_ioctl_mthd_v0 {
125 /* nvif_ioctl ... */
126 __u8 version;
127 __u8 method;
128 __u8 pad02[6];
129 __u8 data[]; /* method data (class.h) */
130};
131
132#endif
diff --git a/nouveau/nvif/unpack.h b/nouveau/nvif/unpack.h
new file mode 100644
index 00000000..751bcf49
--- /dev/null
+++ b/nouveau/nvif/unpack.h
@@ -0,0 +1,28 @@
1#ifndef __NVIF_UNPACK_H__
2#define __NVIF_UNPACK_H__
3
4#define nvif_unvers(r,d,s,m) ({ \
5 void **_data = (d); __u32 *_size = (s); int _ret = (r); \
6 if (_ret == -ENOSYS && *_size == sizeof(m)) { \
7 *_data = NULL; \
8 *_size = _ret = 0; \
9 } \
10 _ret; \
11})
12
13#define nvif_unpack(r,d,s,m,vl,vh,x) ({ \
14 void **_data = (d); __u32 *_size = (s); \
15 int _ret = (r), _vl = (vl), _vh = (vh); \
16 if (_ret == -ENOSYS && *_size >= sizeof(m) && \
17 (m).version >= _vl && (m).version <= _vh) { \
18 *_data = (__u8 *)*_data + sizeof(m); \
19 *_size = *_size - sizeof(m); \
20 if (_ret = 0, !(x)) { \
21 _ret = *_size ? -E2BIG : 0; \
22 *_data = NULL; \
23 *_size = 0; \
24 } \
25 } \
26 _ret; \
27})
28#endif