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authorAndrey Grodzovsky2017-11-24 14:50:51 -0600
committerAndrey Grodzovsky2017-11-29 09:31:00 -0600
commit1a129004a82d557695fad1a7b9c37fe18b00c79f (patch)
treebf11a8230dd6c3add3dbdea7a9ba92e67e3ffd22 /tests
parent0ab36dafaf818c35a258dac0c75b779ab2ae792b (diff)
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amdgpu: Switch amdgpu CS tests enabling to the new way.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian K├Ânig <christian.koenig@amd.com>
Diffstat (limited to 'tests')
-rw-r--r--tests/amdgpu/amdgpu_test.c2
-rw-r--r--tests/amdgpu/amdgpu_test.h5
-rw-r--r--tests/amdgpu/cs_tests.c64
3 files changed, 38 insertions, 33 deletions
diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c
index ee64152e..e611276d 100644
--- a/tests/amdgpu/amdgpu_test.c
+++ b/tests/amdgpu/amdgpu_test.c
@@ -146,7 +146,7 @@ static Suites_Active_Status suites_active_stat[] = {
146 }, 146 },
147 { 147 {
148 .pName = CS_TESTS_STR, 148 .pName = CS_TESTS_STR,
149 .pActive = always_active, 149 .pActive = suite_cs_tests_enable,
150 }, 150 },
151 { 151 {
152 .pName = VCE_TESTS_STR, 152 .pName = VCE_TESTS_STR,
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h
index 414fcb81..3238e05f 100644
--- a/tests/amdgpu/amdgpu_test.h
+++ b/tests/amdgpu/amdgpu_test.h
@@ -85,6 +85,11 @@ int suite_cs_tests_init();
85int suite_cs_tests_clean(); 85int suite_cs_tests_clean();
86 86
87/** 87/**
88 * Decide if the suite is enabled by default or not.
89 */
90CU_BOOL suite_cs_tests_enable(void);
91
92/**
88 * Tests in cs test suite 93 * Tests in cs test suite
89 */ 94 */
90extern CU_TestInfo cs_tests[]; 95extern CU_TestInfo cs_tests[];
diff --git a/tests/amdgpu/cs_tests.c b/tests/amdgpu/cs_tests.c
index 3b2f17db..4880b74f 100644
--- a/tests/amdgpu/cs_tests.c
+++ b/tests/amdgpu/cs_tests.c
@@ -66,6 +66,26 @@ CU_TestInfo cs_tests[] = {
66 CU_TEST_INFO_NULL, 66 CU_TEST_INFO_NULL,
67}; 67};
68 68
69CU_BOOL suite_cs_tests_enable(void)
70{
71 if (amdgpu_device_initialize(drm_amdgpu[0], &major_version,
72 &minor_version, &device_handle))
73 return CU_FALSE;
74
75 family_id = device_handle->info.family_id;
76
77 if (amdgpu_device_deinitialize(device_handle))
78 return CU_FALSE;
79
80
81 if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) {
82 printf("\n\nThe ASIC NOT support UVD, suite disabled\n");
83 return CU_FALSE;
84 }
85
86 return CU_TRUE;
87}
88
69int suite_cs_tests_init(void) 89int suite_cs_tests_init(void)
70{ 90{
71 amdgpu_bo_handle ib_result_handle; 91 amdgpu_bo_handle ib_result_handle;
@@ -90,11 +110,6 @@ int suite_cs_tests_init(void)
90 chip_rev = device_handle->info.chip_rev; 110 chip_rev = device_handle->info.chip_rev;
91 chip_id = device_handle->info.chip_external_rev; 111 chip_id = device_handle->info.chip_external_rev;
92 112
93 if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) {
94 printf("\n\nThe ASIC NOT support UVD, all sub-tests will pass\n");
95 return CUE_SUCCESS;
96 }
97
98 r = amdgpu_cs_ctx_create(device_handle, &context_handle); 113 r = amdgpu_cs_ctx_create(device_handle, &context_handle);
99 if (r) 114 if (r)
100 return CUE_SINIT_FAILED; 115 return CUE_SINIT_FAILED;
@@ -119,24 +134,18 @@ int suite_cs_tests_clean(void)
119{ 134{
120 int r; 135 int r;
121 136
122 if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI) { 137 r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
123 r = amdgpu_device_deinitialize(device_handle); 138 ib_mc_address, IB_SIZE);
124 if (r) 139 if (r)
125 return CUE_SCLEAN_FAILED; 140 return CUE_SCLEAN_FAILED;
126 } else { 141
127 r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle, 142 r = amdgpu_cs_ctx_free(context_handle);
128 ib_mc_address, IB_SIZE); 143 if (r)
129 if (r) 144 return CUE_SCLEAN_FAILED;
130 return CUE_SCLEAN_FAILED; 145
131 146 r = amdgpu_device_deinitialize(device_handle);
132 r = amdgpu_cs_ctx_free(context_handle); 147 if (r)
133 if (r) 148 return CUE_SCLEAN_FAILED;
134 return CUE_SCLEAN_FAILED;
135
136 r = amdgpu_device_deinitialize(device_handle);
137 if (r)
138 return CUE_SCLEAN_FAILED;
139 }
140 149
141 return CUE_SUCCESS; 150 return CUE_SUCCESS;
142} 151}
@@ -203,9 +212,6 @@ static void amdgpu_cs_uvd_create(void)
203 void *msg; 212 void *msg;
204 int i, r; 213 int i, r;
205 214
206 if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI)
207 return;
208
209 req.alloc_size = 4*1024; 215 req.alloc_size = 4*1024;
210 req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT; 216 req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
211 217
@@ -277,9 +283,6 @@ static void amdgpu_cs_uvd_decode(void)
277 uint8_t *ptr; 283 uint8_t *ptr;
278 int i, r; 284 int i, r;
279 285
280 if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI)
281 return;
282
283 req.alloc_size = 4*1024; /* msg */ 286 req.alloc_size = 4*1024; /* msg */
284 req.alloc_size += 4*1024; /* fb */ 287 req.alloc_size += 4*1024; /* fb */
285 if (family_id >= AMDGPU_FAMILY_VI) 288 if (family_id >= AMDGPU_FAMILY_VI)
@@ -419,9 +422,6 @@ static void amdgpu_cs_uvd_destroy(void)
419 void *msg; 422 void *msg;
420 int i, r; 423 int i, r;
421 424
422 if (family_id >= AMDGPU_FAMILY_RV || family_id == AMDGPU_FAMILY_SI)
423 return;
424
425 req.alloc_size = 4*1024; 425 req.alloc_size = 4*1024;
426 req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT; 426 req.preferred_heap = AMDGPU_GEM_DOMAIN_GTT;
427 427