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author | Andrey Grodzovsky | 2017-10-02 13:07:48 -0500 |
---|---|---|
committer | Christian König | 2017-10-04 03:50:02 -0500 |
commit | 670db97dc39a7879f52bad230327edf4374b7516 (patch) | |
tree | 247bcf062f632e6922a0306d6ca3560e413bd111 /tests | |
parent | 736ef0b61cab55378202c5f49d91799cc2b99091 (diff) | |
download | external-libgbm-670db97dc39a7879f52bad230327edf4374b7516.tar.gz external-libgbm-670db97dc39a7879f52bad230327edf4374b7516.tar.xz external-libgbm-670db97dc39a7879f52bad230327edf4374b7516.zip |
amdgpu: Add deadlock detection test suit.
Adding initial tests for locks detection when SW
scheduler FIFO is full.
The test works by submitting a batch of identical commands which make the CP
stall waiting for condition to become true. The condition is later satisfied
form a helper thread. Other events that happen during this time
might create deadlock situations. One such example is GPU reset
triggered by this stall when amdgpu_lockup_timeout != 0.
v2:
Increase the delay from 2 to 100 ms.
Comment out the compute test until it's working.
Typos fix.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Diffstat (limited to 'tests')
-rw-r--r-- | tests/amdgpu/Makefile.am | 6 | ||||
-rw-r--r-- | tests/amdgpu/amdgpu_test.c | 6 | ||||
-rw-r--r-- | tests/amdgpu/amdgpu_test.h | 15 | ||||
-rw-r--r-- | tests/amdgpu/deadlock_tests.c | 245 |
4 files changed, 270 insertions, 2 deletions
diff --git a/tests/amdgpu/Makefile.am b/tests/amdgpu/Makefile.am index 9c02fd60..8700c4d4 100644 --- a/tests/amdgpu/Makefile.am +++ b/tests/amdgpu/Makefile.am | |||
@@ -1,7 +1,8 @@ | |||
1 | AM_CFLAGS = \ | 1 | AM_CFLAGS = \ |
2 | -I $(top_srcdir)/include/drm \ | 2 | -I $(top_srcdir)/include/drm \ |
3 | -I $(top_srcdir)/amdgpu \ | 3 | -I $(top_srcdir)/amdgpu \ |
4 | -I $(top_srcdir) | 4 | -I $(top_srcdir) \ |
5 | -pthread | ||
5 | 6 | ||
6 | LDADD = $(top_builddir)/libdrm.la \ | 7 | LDADD = $(top_builddir)/libdrm.la \ |
7 | $(top_builddir)/amdgpu/libdrm_amdgpu.la \ | 8 | $(top_builddir)/amdgpu/libdrm_amdgpu.la \ |
@@ -29,4 +30,5 @@ amdgpu_test_SOURCES = \ | |||
29 | frame.h \ | 30 | frame.h \ |
30 | uvd_enc_tests.c \ | 31 | uvd_enc_tests.c \ |
31 | vcn_tests.c \ | 32 | vcn_tests.c \ |
32 | uve_ib.h | 33 | uve_ib.h \ |
34 | deadlock_tests.c | ||
diff --git a/tests/amdgpu/amdgpu_test.c b/tests/amdgpu/amdgpu_test.c index cd6b8262..99255038 100644 --- a/tests/amdgpu/amdgpu_test.c +++ b/tests/amdgpu/amdgpu_test.c | |||
@@ -97,6 +97,12 @@ static CU_SuiteInfo suites[] = { | |||
97 | .pCleanupFunc = suite_uvd_enc_tests_clean, | 97 | .pCleanupFunc = suite_uvd_enc_tests_clean, |
98 | .pTests = uvd_enc_tests, | 98 | .pTests = uvd_enc_tests, |
99 | }, | 99 | }, |
100 | { | ||
101 | .pName = "Deadlock Tests", | ||
102 | .pInitFunc = suite_deadlock_tests_init, | ||
103 | .pCleanupFunc = suite_deadlock_tests_clean, | ||
104 | .pTests = deadlock_tests, | ||
105 | }, | ||
100 | CU_SUITE_INFO_NULL, | 106 | CU_SUITE_INFO_NULL, |
101 | }; | 107 | }; |
102 | 108 | ||
diff --git a/tests/amdgpu/amdgpu_test.h b/tests/amdgpu/amdgpu_test.h index d0b61baa..ece93f4c 100644 --- a/tests/amdgpu/amdgpu_test.h +++ b/tests/amdgpu/amdgpu_test.h | |||
@@ -135,6 +135,21 @@ int suite_uvd_enc_tests_clean(); | |||
135 | extern CU_TestInfo uvd_enc_tests[]; | 135 | extern CU_TestInfo uvd_enc_tests[]; |
136 | 136 | ||
137 | /** | 137 | /** |
138 | * Initialize deadlock test suite | ||
139 | */ | ||
140 | int suite_deadlock_tests_init(); | ||
141 | |||
142 | /** | ||
143 | * Deinitialize deadlock test suite | ||
144 | */ | ||
145 | int suite_deadlock_tests_clean(); | ||
146 | |||
147 | /** | ||
148 | * Tests in uvd enc test suite | ||
149 | */ | ||
150 | extern CU_TestInfo deadlock_tests[]; | ||
151 | |||
152 | /** | ||
138 | * Helper functions | 153 | * Helper functions |
139 | */ | 154 | */ |
140 | static inline amdgpu_bo_handle gpu_mem_alloc( | 155 | static inline amdgpu_bo_handle gpu_mem_alloc( |
diff --git a/tests/amdgpu/deadlock_tests.c b/tests/amdgpu/deadlock_tests.c new file mode 100644 index 00000000..e23d903f --- /dev/null +++ b/tests/amdgpu/deadlock_tests.c | |||
@@ -0,0 +1,245 @@ | |||
1 | /* | ||
2 | * Copyright 2017 Advanced Micro Devices, Inc. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | * | ||
22 | */ | ||
23 | |||
24 | #ifdef HAVE_CONFIG_H | ||
25 | #include "config.h" | ||
26 | #endif | ||
27 | |||
28 | #include <stdio.h> | ||
29 | #include <stdlib.h> | ||
30 | #include <unistd.h> | ||
31 | #ifdef HAVE_ALLOCA_H | ||
32 | # include <alloca.h> | ||
33 | #endif | ||
34 | |||
35 | #include "CUnit/Basic.h" | ||
36 | |||
37 | #include "amdgpu_test.h" | ||
38 | #include "amdgpu_drm.h" | ||
39 | |||
40 | #include <pthread.h> | ||
41 | |||
42 | |||
43 | /* | ||
44 | * This defines the delay in MS after which memory location designated for | ||
45 | * compression against reference value is written to, unblocking command | ||
46 | * processor | ||
47 | */ | ||
48 | #define WRITE_MEM_ADDRESS_DELAY_MS 100 | ||
49 | |||
50 | #define PACKET_TYPE3 3 | ||
51 | |||
52 | #define PACKET3(op, n) ((PACKET_TYPE3 << 30) | \ | ||
53 | (((op) & 0xFF) << 8) | \ | ||
54 | ((n) & 0x3FFF) << 16) | ||
55 | |||
56 | #define PACKET3_WAIT_REG_MEM 0x3C | ||
57 | #define WAIT_REG_MEM_FUNCTION(x) ((x) << 0) | ||
58 | /* 0 - always | ||
59 | * 1 - < | ||
60 | * 2 - <= | ||
61 | * 3 - == | ||
62 | * 4 - != | ||
63 | * 5 - >= | ||
64 | * 6 - > | ||
65 | */ | ||
66 | #define WAIT_REG_MEM_MEM_SPACE(x) ((x) << 4) | ||
67 | /* 0 - reg | ||
68 | * 1 - mem | ||
69 | */ | ||
70 | #define WAIT_REG_MEM_OPERATION(x) ((x) << 6) | ||
71 | /* 0 - wait_reg_mem | ||
72 | * 1 - wr_wait_wr_reg | ||
73 | */ | ||
74 | #define WAIT_REG_MEM_ENGINE(x) ((x) << 8) | ||
75 | /* 0 - me | ||
76 | * 1 - pfp | ||
77 | */ | ||
78 | |||
79 | static amdgpu_device_handle device_handle; | ||
80 | static uint32_t major_version; | ||
81 | static uint32_t minor_version; | ||
82 | |||
83 | static pthread_t stress_thread; | ||
84 | static uint32_t *ptr; | ||
85 | |||
86 | static void amdgpu_deadlock_helper(unsigned ip_type); | ||
87 | static void amdgpu_deadlock_gfx(void); | ||
88 | static void amdgpu_deadlock_compute(void); | ||
89 | |||
90 | int suite_deadlock_tests_init(void) | ||
91 | { | ||
92 | struct amdgpu_gpu_info gpu_info = {0}; | ||
93 | int r; | ||
94 | |||
95 | r = amdgpu_device_initialize(drm_amdgpu[0], &major_version, | ||
96 | &minor_version, &device_handle); | ||
97 | |||
98 | if (r) { | ||
99 | if ((r == -EACCES) && (errno == EACCES)) | ||
100 | printf("\n\nError:%s. " | ||
101 | "Hint:Try to run this test program as root.", | ||
102 | strerror(errno)); | ||
103 | return CUE_SINIT_FAILED; | ||
104 | } | ||
105 | |||
106 | return CUE_SUCCESS; | ||
107 | } | ||
108 | |||
109 | int suite_deadlock_tests_clean(void) | ||
110 | { | ||
111 | int r = amdgpu_device_deinitialize(device_handle); | ||
112 | |||
113 | if (r == 0) | ||
114 | return CUE_SUCCESS; | ||
115 | else | ||
116 | return CUE_SCLEAN_FAILED; | ||
117 | } | ||
118 | |||
119 | |||
120 | CU_TestInfo deadlock_tests[] = { | ||
121 | { "gfx ring block test", amdgpu_deadlock_gfx }, | ||
122 | |||
123 | /* | ||
124 | * BUG: Compute ring stalls and never recovers when the address is | ||
125 | * written after the command already submitted | ||
126 | */ | ||
127 | /* { "compute ring block test", amdgpu_deadlock_compute }, */ | ||
128 | |||
129 | CU_TEST_INFO_NULL, | ||
130 | }; | ||
131 | |||
132 | static void *write_mem_address(void *data) | ||
133 | { | ||
134 | int i; | ||
135 | |||
136 | /* useconds_t range is [0, 1,000,000] so use loop for waits > 1s */ | ||
137 | for (i = 0; i < WRITE_MEM_ADDRESS_DELAY_MS; i++) | ||
138 | usleep(1000); | ||
139 | |||
140 | ptr[256] = 0x1; | ||
141 | |||
142 | return 0; | ||
143 | } | ||
144 | |||
145 | static void amdgpu_deadlock_gfx(void) | ||
146 | { | ||
147 | amdgpu_deadlock_helper(AMDGPU_HW_IP_GFX); | ||
148 | } | ||
149 | |||
150 | static void amdgpu_deadlock_compute(void) | ||
151 | { | ||
152 | amdgpu_deadlock_helper(AMDGPU_HW_IP_COMPUTE); | ||
153 | } | ||
154 | |||
155 | static void amdgpu_deadlock_helper(unsigned ip_type) | ||
156 | { | ||
157 | amdgpu_context_handle context_handle; | ||
158 | amdgpu_bo_handle ib_result_handle; | ||
159 | void *ib_result_cpu; | ||
160 | uint64_t ib_result_mc_address; | ||
161 | struct amdgpu_cs_request ibs_request; | ||
162 | struct amdgpu_cs_ib_info ib_info; | ||
163 | struct amdgpu_cs_fence fence_status; | ||
164 | uint32_t expired; | ||
165 | int i, r, instance; | ||
166 | amdgpu_bo_list_handle bo_list; | ||
167 | amdgpu_va_handle va_handle; | ||
168 | |||
169 | r = pthread_create(&stress_thread, NULL, write_mem_address, NULL); | ||
170 | CU_ASSERT_EQUAL(r, 0); | ||
171 | |||
172 | r = amdgpu_cs_ctx_create(device_handle, &context_handle); | ||
173 | CU_ASSERT_EQUAL(r, 0); | ||
174 | |||
175 | r = amdgpu_bo_alloc_and_map(device_handle, 4096, 4096, | ||
176 | AMDGPU_GEM_DOMAIN_GTT, 0, | ||
177 | &ib_result_handle, &ib_result_cpu, | ||
178 | &ib_result_mc_address, &va_handle); | ||
179 | CU_ASSERT_EQUAL(r, 0); | ||
180 | |||
181 | r = amdgpu_get_bo_list(device_handle, ib_result_handle, NULL, | ||
182 | &bo_list); | ||
183 | CU_ASSERT_EQUAL(r, 0); | ||
184 | |||
185 | ptr = ib_result_cpu; | ||
186 | |||
187 | ptr[0] = PACKET3(PACKET3_WAIT_REG_MEM, 5); | ||
188 | ptr[1] = (WAIT_REG_MEM_MEM_SPACE(1) | /* memory */ | ||
189 | WAIT_REG_MEM_FUNCTION(4) | /* != */ | ||
190 | WAIT_REG_MEM_ENGINE(0)); /* me */ | ||
191 | ptr[2] = (ib_result_mc_address + 256*4) & 0xfffffffc; | ||
192 | ptr[3] = ((ib_result_mc_address + 256*4) >> 32) & 0xffffffff; | ||
193 | ptr[4] = 0x00000000; /* reference value */ | ||
194 | ptr[5] = 0xffffffff; /* and mask */ | ||
195 | ptr[6] = 0x00000004; /* poll interval */ | ||
196 | |||
197 | for (i = 7; i < 16; ++i) | ||
198 | ptr[i] = 0xffff1000; | ||
199 | |||
200 | |||
201 | ptr[256] = 0x0; /* the memory we wait on to change */ | ||
202 | |||
203 | |||
204 | |||
205 | memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info)); | ||
206 | ib_info.ib_mc_address = ib_result_mc_address; | ||
207 | ib_info.size = 16; | ||
208 | |||
209 | memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request)); | ||
210 | ibs_request.ip_type = ip_type; | ||
211 | ibs_request.ring = 0; | ||
212 | ibs_request.number_of_ibs = 1; | ||
213 | ibs_request.ibs = &ib_info; | ||
214 | ibs_request.resources = bo_list; | ||
215 | ibs_request.fence_info.handle = NULL; | ||
216 | |||
217 | for (i = 0; i < 200; i++) { | ||
218 | r = amdgpu_cs_submit(context_handle, 0,&ibs_request, 1); | ||
219 | CU_ASSERT_EQUAL(r, 0); | ||
220 | |||
221 | } | ||
222 | |||
223 | memset(&fence_status, 0, sizeof(struct amdgpu_cs_fence)); | ||
224 | fence_status.context = context_handle; | ||
225 | fence_status.ip_type = ip_type; | ||
226 | fence_status.ip_instance = 0; | ||
227 | fence_status.ring = 0; | ||
228 | fence_status.fence = ibs_request.seq_no; | ||
229 | |||
230 | r = amdgpu_cs_query_fence_status(&fence_status, | ||
231 | AMDGPU_TIMEOUT_INFINITE,0, &expired); | ||
232 | CU_ASSERT_EQUAL(r, 0); | ||
233 | |||
234 | r = amdgpu_bo_list_destroy(bo_list); | ||
235 | CU_ASSERT_EQUAL(r, 0); | ||
236 | |||
237 | r = amdgpu_bo_unmap_and_free(ib_result_handle, va_handle, | ||
238 | ib_result_mc_address, 4096); | ||
239 | CU_ASSERT_EQUAL(r, 0); | ||
240 | |||
241 | r = amdgpu_cs_ctx_free(context_handle); | ||
242 | CU_ASSERT_EQUAL(r, 0); | ||
243 | |||
244 | pthread_join(stress_thread, NULL); | ||
245 | } | ||