diff options
-rw-r--r-- | include/drm/i915_drm.h | 17 | ||||
-rw-r--r-- | intel/intel_bufmgr.h | 5 | ||||
-rw-r--r-- | intel/intel_bufmgr_gem.c | 34 |
3 files changed, 0 insertions, 56 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index 2703dede..aa983f34 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h | |||
@@ -198,7 +198,6 @@ typedef struct _drm_i915_sarea { | |||
198 | #define DRM_I915_GEM_SET_CACHEING 0x2f | 198 | #define DRM_I915_GEM_SET_CACHEING 0x2f |
199 | #define DRM_I915_GEM_GET_CACHEING 0x30 | 199 | #define DRM_I915_GEM_GET_CACHEING 0x30 |
200 | #define DRM_I915_REG_READ 0x31 | 200 | #define DRM_I915_REG_READ 0x31 |
201 | #define DRM_I915_GET_RESET_STATS 0x32 | ||
202 | 201 | ||
203 | #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) | 202 | #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) |
204 | #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) | 203 | #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) |
@@ -248,7 +247,6 @@ typedef struct _drm_i915_sarea { | |||
248 | #define DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct drm_i915_gem_context_create) | 247 | #define DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct drm_i915_gem_context_create) |
249 | #define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy) | 248 | #define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy) |
250 | #define DRM_IOCTL_I915_REG_READ DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_REG_READ, struct drm_i915_reg_read) | 249 | #define DRM_IOCTL_I915_REG_READ DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_REG_READ, struct drm_i915_reg_read) |
251 | #define DRM_IOCTL_I915_GET_RESET_STATS DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GET_RESET_STATS, struct drm_i915_reset_stats) | ||
252 | 250 | ||
253 | /* Allow drivers to submit batchbuffers directly to hardware, relying | 251 | /* Allow drivers to submit batchbuffers directly to hardware, relying |
254 | * on the security mechanisms provided by hardware. | 252 | * on the security mechanisms provided by hardware. |
@@ -945,19 +943,4 @@ struct drm_i915_reg_read { | |||
945 | __u64 offset; | 943 | __u64 offset; |
946 | __u64 val; /* Return value */ | 944 | __u64 val; /* Return value */ |
947 | }; | 945 | }; |
948 | |||
949 | struct drm_i915_reset_stats { | ||
950 | __u32 ctx_id; | ||
951 | __u32 flags; | ||
952 | |||
953 | /* For all contexts */ | ||
954 | __u32 reset_count; | ||
955 | |||
956 | /* For this context */ | ||
957 | __u32 batch_active; | ||
958 | __u32 batch_pending; | ||
959 | |||
960 | __u32 pad; | ||
961 | }; | ||
962 | |||
963 | #endif /* _I915_DRM_H_ */ | 946 | #endif /* _I915_DRM_H_ */ |
diff --git a/intel/intel_bufmgr.h b/intel/intel_bufmgr.h index 2eb9742b..15f818e7 100644 --- a/intel/intel_bufmgr.h +++ b/intel/intel_bufmgr.h | |||
@@ -248,11 +248,6 @@ int drm_intel_reg_read(drm_intel_bufmgr *bufmgr, | |||
248 | uint32_t offset, | 248 | uint32_t offset, |
249 | uint64_t *result); | 249 | uint64_t *result); |
250 | 250 | ||
251 | int drm_intel_get_reset_stats(drm_intel_context *ctx, | ||
252 | uint32_t *reset_count, | ||
253 | uint32_t *active, | ||
254 | uint32_t *pending); | ||
255 | |||
256 | /** @{ Compatibility defines to keep old code building despite the symbol rename | 251 | /** @{ Compatibility defines to keep old code building despite the symbol rename |
257 | * from dri_* to drm_intel_* | 252 | * from dri_* to drm_intel_* |
258 | */ | 253 | */ |
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index df6fcec4..029ca5d8 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c | |||
@@ -3021,40 +3021,6 @@ drm_intel_gem_context_destroy(drm_intel_context *ctx) | |||
3021 | } | 3021 | } |
3022 | 3022 | ||
3023 | int | 3023 | int |
3024 | drm_intel_get_reset_stats(drm_intel_context *ctx, | ||
3025 | uint32_t *reset_count, | ||
3026 | uint32_t *active, | ||
3027 | uint32_t *pending) | ||
3028 | { | ||
3029 | drm_intel_bufmgr_gem *bufmgr_gem; | ||
3030 | struct drm_i915_reset_stats stats; | ||
3031 | int ret; | ||
3032 | |||
3033 | if (ctx == NULL) | ||
3034 | return -EINVAL; | ||
3035 | |||
3036 | VG_CLEAR(stats); | ||
3037 | |||
3038 | bufmgr_gem = (drm_intel_bufmgr_gem *)ctx->bufmgr; | ||
3039 | stats.ctx_id = ctx->ctx_id; | ||
3040 | ret = drmIoctl(bufmgr_gem->fd, | ||
3041 | DRM_IOCTL_I915_GET_RESET_STATS, | ||
3042 | &stats); | ||
3043 | if (ret == 0) { | ||
3044 | if (reset_count != NULL) | ||
3045 | *reset_count = stats.reset_count; | ||
3046 | |||
3047 | if (active != NULL) | ||
3048 | *active = stats.batch_active; | ||
3049 | |||
3050 | if (pending != NULL) | ||
3051 | *pending = stats.batch_pending; | ||
3052 | } | ||
3053 | |||
3054 | return ret; | ||
3055 | } | ||
3056 | |||
3057 | int | ||
3058 | drm_intel_reg_read(drm_intel_bufmgr *bufmgr, | 3024 | drm_intel_reg_read(drm_intel_bufmgr *bufmgr, |
3059 | uint32_t offset, | 3025 | uint32_t offset, |
3060 | uint64_t *result) | 3026 | uint64_t *result) |