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Diffstat (limited to 'include/drm/drm.h')
-rw-r--r--include/drm/drm.h92
1 files changed, 91 insertions, 1 deletions
diff --git a/include/drm/drm.h b/include/drm/drm.h
index f6fd5c2c..f0bd91de 100644
--- a/include/drm/drm.h
+++ b/include/drm/drm.h
@@ -641,6 +641,8 @@ struct drm_gem_open {
641#define DRM_CAP_CURSOR_HEIGHT 0x9 641#define DRM_CAP_CURSOR_HEIGHT 0x9
642#define DRM_CAP_ADDFB2_MODIFIERS 0x10 642#define DRM_CAP_ADDFB2_MODIFIERS 0x10
643#define DRM_CAP_PAGE_FLIP_TARGET 0x11 643#define DRM_CAP_PAGE_FLIP_TARGET 0x11
644#define DRM_CAP_CRTC_IN_VBLANK_EVENT 0x12
645#define DRM_CAP_SYNCOBJ 0x13
644 646
645/** DRM_IOCTL_GET_CAP ioctl argument type */ 647/** DRM_IOCTL_GET_CAP ioctl argument type */
646struct drm_get_cap { 648struct drm_get_cap {
@@ -690,6 +692,67 @@ struct drm_prime_handle {
690 __s32 fd; 692 __s32 fd;
691}; 693};
692 694
695struct drm_syncobj_create {
696 __u32 handle;
697#define DRM_SYNCOBJ_CREATE_SIGNALED (1 << 0)
698 __u32 flags;
699};
700
701struct drm_syncobj_destroy {
702 __u32 handle;
703 __u32 pad;
704};
705
706#define DRM_SYNCOBJ_FD_TO_HANDLE_FLAGS_IMPORT_SYNC_FILE (1 << 0)
707#define DRM_SYNCOBJ_HANDLE_TO_FD_FLAGS_EXPORT_SYNC_FILE (1 << 0)
708struct drm_syncobj_handle {
709 __u32 handle;
710 __u32 flags;
711
712 __s32 fd;
713 __u32 pad;
714};
715
716#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL (1 << 0)
717#define DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT (1 << 1)
718struct drm_syncobj_wait {
719 __u64 handles;
720 /* absolute timeout */
721 __s64 timeout_nsec;
722 __u32 count_handles;
723 __u32 flags;
724 __u32 first_signaled; /* only valid when not waiting all */
725 __u32 pad;
726};
727
728struct drm_syncobj_array {
729 __u64 handles;
730 __u32 count_handles;
731 __u32 pad;
732};
733
734/* Query current scanout sequence number */
735struct drm_crtc_get_sequence {
736 __u32 crtc_id; /* requested crtc_id */
737 __u32 active; /* return: crtc output is active */
738 __u64 sequence; /* return: most recent vblank sequence */
739 __s64 sequence_ns; /* return: most recent time of first pixel out */
740};
741
742/* Queue event to be delivered at specified sequence. Time stamp marks
743 * when the first pixel of the refresh cycle leaves the display engine
744 * for the display
745 */
746#define DRM_CRTC_SEQUENCE_RELATIVE 0x00000001 /* sequence is relative to current */
747#define DRM_CRTC_SEQUENCE_NEXT_ON_MISS 0x00000002 /* Use next sequence if we've missed */
748
749struct drm_crtc_queue_sequence {
750 __u32 crtc_id;
751 __u32 flags;
752 __u64 sequence; /* on input, target sequence. on output, actual sequence */
753 __u64 user_data; /* user data passed to event */
754};
755
693#if defined(__cplusplus) 756#if defined(__cplusplus)
694} 757}
695#endif 758#endif
@@ -772,6 +835,9 @@ extern "C" {
772 835
773#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank) 836#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank)
774 837
838#define DRM_IOCTL_CRTC_GET_SEQUENCE DRM_IOWR(0x3b, struct drm_crtc_get_sequence)
839#define DRM_IOCTL_CRTC_QUEUE_SEQUENCE DRM_IOWR(0x3c, struct drm_crtc_queue_sequence)
840
775#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw) 841#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw)
776 842
777#define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res) 843#define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res)
@@ -808,6 +874,19 @@ extern "C" {
808#define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob) 874#define DRM_IOCTL_MODE_CREATEPROPBLOB DRM_IOWR(0xBD, struct drm_mode_create_blob)
809#define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob) 875#define DRM_IOCTL_MODE_DESTROYPROPBLOB DRM_IOWR(0xBE, struct drm_mode_destroy_blob)
810 876
877#define DRM_IOCTL_SYNCOBJ_CREATE DRM_IOWR(0xBF, struct drm_syncobj_create)
878#define DRM_IOCTL_SYNCOBJ_DESTROY DRM_IOWR(0xC0, struct drm_syncobj_destroy)
879#define DRM_IOCTL_SYNCOBJ_HANDLE_TO_FD DRM_IOWR(0xC1, struct drm_syncobj_handle)
880#define DRM_IOCTL_SYNCOBJ_FD_TO_HANDLE DRM_IOWR(0xC2, struct drm_syncobj_handle)
881#define DRM_IOCTL_SYNCOBJ_WAIT DRM_IOWR(0xC3, struct drm_syncobj_wait)
882#define DRM_IOCTL_SYNCOBJ_RESET DRM_IOWR(0xC4, struct drm_syncobj_array)
883#define DRM_IOCTL_SYNCOBJ_SIGNAL DRM_IOWR(0xC5, struct drm_syncobj_array)
884
885#define DRM_IOCTL_MODE_CREATE_LEASE DRM_IOWR(0xC6, struct drm_mode_create_lease)
886#define DRM_IOCTL_MODE_LIST_LESSEES DRM_IOWR(0xC7, struct drm_mode_list_lessees)
887#define DRM_IOCTL_MODE_GET_LEASE DRM_IOWR(0xC8, struct drm_mode_get_lease)
888#define DRM_IOCTL_MODE_REVOKE_LEASE DRM_IOWR(0xC9, struct drm_mode_revoke_lease)
889
811/** 890/**
812 * Device specific ioctls should only be in their respective headers 891 * Device specific ioctls should only be in their respective headers
813 * The device specific ioctl range is from 0x40 to 0x9f. 892 * The device specific ioctl range is from 0x40 to 0x9f.
@@ -838,6 +917,7 @@ struct drm_event {
838 917
839#define DRM_EVENT_VBLANK 0x01 918#define DRM_EVENT_VBLANK 0x01
840#define DRM_EVENT_FLIP_COMPLETE 0x02 919#define DRM_EVENT_FLIP_COMPLETE 0x02
920#define DRM_EVENT_CRTC_SEQUENCE 0x03
841 921
842struct drm_event_vblank { 922struct drm_event_vblank {
843 struct drm_event base; 923 struct drm_event base;
@@ -845,7 +925,17 @@ struct drm_event_vblank {
845 __u32 tv_sec; 925 __u32 tv_sec;
846 __u32 tv_usec; 926 __u32 tv_usec;
847 __u32 sequence; 927 __u32 sequence;
848 __u32 reserved; 928 __u32 crtc_id; /* 0 on older kernels that do not support this */
929};
930
931/* Event delivered at sequence. Time stamp marks when the first pixel
932 * of the refresh cycle leaves the display engine for the display
933 */
934struct drm_event_crtc_sequence {
935 struct drm_event base;
936 __u64 user_data;
937 __s64 time_ns;
938 __u64 sequence;
849}; 939};
850 940
851/* typedef area */ 941/* typedef area */