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authorWei Xu2017-03-28 10:33:25 -0500
committerWei Xu2017-04-07 22:07:26 -0500
commit0f57c6c9cda8e593d6cbdd0fc93ea51084024f2d (patch)
tree965364ee0928882f4c596d3fa3d95f2468f5d888
parent38de5b56ef6db87b9ed5a9d7eb798640554af980 (diff)
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arm64: dts: hisi: add RoCE nodes for the hip07 SoC
Add the infiniband node to support the RoCE function on the hip07 SoC. Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
-rw-r--r--arch/arm64/boot/dts/hisilicon/hip07.dtsi81
1 files changed, 81 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
index 2feb3625a550..bc54b61e52c7 100644
--- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi
@@ -1324,5 +1324,86 @@
1324 status = "disabled"; 1324 status = "disabled";
1325 dma-coherent; 1325 dma-coherent;
1326 }; 1326 };
1327
1328 infiniband@c4000000 {
1329 compatible = "hisilicon,hns-roce-v1";
1330 reg = <0x0 0xc4000000 0x0 0x100000>;
1331 dma-coherent;
1332 eth-handle = <&eth2 &eth3 0 0 &eth0 &eth1>;
1333 dsaf-handle = <&dsaf0>;
1334 node-guid = [00 9A CD 00 00 01 02 03];
1335 #address-cells = <2>;
1336 #size-cells = <2>;
1337 interrupt-parent = <&mbigen_dsa_roce>;
1338 interrupts = <722 1>,
1339 <723 1>,
1340 <724 1>,
1341 <725 1>,
1342 <726 1>,
1343 <727 1>,
1344 <728 1>,
1345 <729 1>,
1346 <730 1>,
1347 <731 1>,
1348 <732 1>,
1349 <733 1>,
1350 <734 1>,
1351 <735 1>,
1352 <736 1>,
1353 <737 1>,
1354 <738 1>,
1355 <739 1>,
1356 <740 1>,
1357 <741 1>,
1358 <742 1>,
1359 <743 1>,
1360 <744 1>,
1361 <745 1>,
1362 <746 1>,
1363 <747 1>,
1364 <748 1>,
1365 <749 1>,
1366 <750 1>,
1367 <751 1>,
1368 <752 1>,
1369 <753 1>,
1370 <785 1>,
1371 <754 4>;
1372
1373 interrupt-names = "hns-roce-comp-0",
1374 "hns-roce-comp-1",
1375 "hns-roce-comp-2",
1376 "hns-roce-comp-3",
1377 "hns-roce-comp-4",
1378 "hns-roce-comp-5",
1379 "hns-roce-comp-6",
1380 "hns-roce-comp-7",
1381 "hns-roce-comp-8",
1382 "hns-roce-comp-9",
1383 "hns-roce-comp-10",
1384 "hns-roce-comp-11",
1385 "hns-roce-comp-12",
1386 "hns-roce-comp-13",
1387 "hns-roce-comp-14",
1388 "hns-roce-comp-15",
1389 "hns-roce-comp-16",
1390 "hns-roce-comp-17",
1391 "hns-roce-comp-18",
1392 "hns-roce-comp-19",
1393 "hns-roce-comp-20",
1394 "hns-roce-comp-21",
1395 "hns-roce-comp-22",
1396 "hns-roce-comp-23",
1397 "hns-roce-comp-24",
1398 "hns-roce-comp-25",
1399 "hns-roce-comp-26",
1400 "hns-roce-comp-27",
1401 "hns-roce-comp-28",
1402 "hns-roce-comp-29",
1403 "hns-roce-comp-30",
1404 "hns-roce-comp-31",
1405 "hns-roce-async",
1406 "hns-roce-common";
1407 };
1327 }; 1408 };
1328}; 1409};