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author | Jun Nie | 2017-03-21 03:52:59 -0500 |
---|---|---|
committer | Shawn Guo | 2017-03-24 03:16:50 -0500 |
commit | 25798d52b87d7c7d775dc7985817592f0ef3dffd (patch) | |
tree | 105c1a9e625e7904e6f6636fa91d7687299d4f5a | |
parent | 6d7e05ab8ff6f6bb91ecfbbd542240c7b6c23502 (diff) | |
download | kernel-25798d52b87d7c7d775dc7985817592f0ef3dffd.tar.gz kernel-25798d52b87d7c7d775dc7985817592f0ef3dffd.tar.xz kernel-25798d52b87d7c7d775dc7985817592f0ef3dffd.zip |
arm64: dts: zte: add mmc devices for zx296718
Add three mmc devices for zx296718 SoC, and enable the SD and eMMMC on
zx296718-evb board.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r-- | arch/arm64/boot/dts/zte/zx296718-evb.dts | 8 | ||||
-rw-r--r-- | arch/arm64/boot/dts/zte/zx296718.dtsi | 66 |
2 files changed, 74 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/zte/zx296718-evb.dts b/arch/arm64/boot/dts/zte/zx296718-evb.dts index e164ff6de5fc..238311b4cf0f 100644 --- a/arch/arm64/boot/dts/zte/zx296718-evb.dts +++ b/arch/arm64/boot/dts/zte/zx296718-evb.dts | |||
@@ -59,6 +59,14 @@ | |||
59 | 59 | ||
60 | }; | 60 | }; |
61 | 61 | ||
62 | &emmc { | ||
63 | status = "okay"; | ||
64 | }; | ||
65 | |||
66 | &sd1 { | ||
67 | status = "okay"; | ||
68 | }; | ||
69 | |||
62 | &uart0 { | 70 | &uart0 { |
63 | status = "okay"; | 71 | status = "okay"; |
64 | }; | 72 | }; |
diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi b/arch/arm64/boot/dts/zte/zx296718.dtsi index 1f256495b902..30d007b6ab6c 100644 --- a/arch/arm64/boot/dts/zte/zx296718.dtsi +++ b/arch/arm64/boot/dts/zte/zx296718.dtsi | |||
@@ -298,6 +298,51 @@ | |||
298 | status = "disabled"; | 298 | status = "disabled"; |
299 | }; | 299 | }; |
300 | 300 | ||
301 | sd0: mmc@1110000 { | ||
302 | compatible = "zte,zx296718-dw-mshc"; | ||
303 | #address-cells = <1>; | ||
304 | #size-cells = <0>; | ||
305 | reg = <0x01110000 0x1000>; | ||
306 | interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; | ||
307 | fifo-depth = <32>; | ||
308 | data-addr = <0x200>; | ||
309 | fifo-watermark-aligned; | ||
310 | bus-width = <4>; | ||
311 | clock-frequency = <50000000>; | ||
312 | clocks = <&topcrm SD0_AHB>, <&topcrm SD0_WCLK>; | ||
313 | clock-names = "biu", "ciu"; | ||
314 | num-slots = <1>; | ||
315 | max-frequency = <50000000>; | ||
316 | cap-sdio-irq; | ||
317 | cap-sd-highspeed; | ||
318 | sd-uhs-sdr12; | ||
319 | sd-uhs-sdr25; | ||
320 | sd-uhs-sdr50; | ||
321 | sd-uhs-sdr104; | ||
322 | sd-uhs-ddr50; | ||
323 | status = "disabled"; | ||
324 | }; | ||
325 | |||
326 | sd1: mmc@1111000 { | ||
327 | compatible = "zte,zx296718-dw-mshc"; | ||
328 | #address-cells = <1>; | ||
329 | #size-cells = <0>; | ||
330 | reg = <0x01111000 0x1000>; | ||
331 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; | ||
332 | fifo-depth = <32>; | ||
333 | data-addr = <0x200>; | ||
334 | fifo-watermark-aligned; | ||
335 | bus-width = <4>; | ||
336 | clock-frequency = <167000000>; | ||
337 | clocks = <&topcrm SD1_AHB>, <&topcrm SD1_WCLK>; | ||
338 | clock-names = "biu", "ciu"; | ||
339 | num-slots = <1>; | ||
340 | max-frequency = <167000000>; | ||
341 | cap-sdio-irq; | ||
342 | cap-sd-highspeed; | ||
343 | status = "disabled"; | ||
344 | }; | ||
345 | |||
301 | dma: dma-controller@1460000 { | 346 | dma: dma-controller@1460000 { |
302 | compatible = "zte,zx296702-dma"; | 347 | compatible = "zte,zx296702-dma"; |
303 | reg = <0x01460000 0x1000>; | 348 | reg = <0x01460000 0x1000>; |
@@ -332,6 +377,27 @@ | |||
332 | reg = <0x1463000 0x1000>; | 377 | reg = <0x1463000 0x1000>; |
333 | }; | 378 | }; |
334 | 379 | ||
380 | emmc: mmc@1470000{ | ||
381 | compatible = "zte,zx296718-dw-mshc"; | ||
382 | reg = <0x01470000 0x1000>; | ||
383 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; | ||
384 | zte,aon-syscon = <&aon_sysctrl>; | ||
385 | bus-width = <8>; | ||
386 | fifo-depth = <128>; | ||
387 | data-addr = <0x200>; | ||
388 | fifo-watermark-aligned; | ||
389 | clock-frequency = <167000000>; | ||
390 | clocks = <&topcrm EMMC_NAND_AHB>, <&topcrm EMMC_WCLK>; | ||
391 | clock-names = "biu", "ciu"; | ||
392 | max-frequency = <167000000>; | ||
393 | cap-mmc-highspeed; | ||
394 | mmc-ddr-1_8v; | ||
395 | mmc-hs200-1_8v; | ||
396 | non-removable; | ||
397 | disable-wp; | ||
398 | status = "disabled"; | ||
399 | }; | ||
400 | |||
335 | audiocrm: clock-controller@1480000 { | 401 | audiocrm: clock-controller@1480000 { |
336 | compatible = "zte,zx296718-audiocrm"; | 402 | compatible = "zte,zx296718-audiocrm"; |
337 | reg = <0x01480000 0x1000>; | 403 | reg = <0x01480000 0x1000>; |