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| author | Antoine Tenart | 2017-03-29 07:44:29 -0500 |
|---|---|---|
| committer | Gregory CLEMENT | 2017-04-12 03:34:07 -0500 |
| commit | 973020fd9498db8637463c92df4fd6d52caab05c (patch) | |
| tree | 5f09d8749ac63f7587160e0f8d826acab7891532 | |
| parent | 910b4c5cb3807aa5ee051d8b656a5dcb435c4964 (diff) | |
| download | kernel-973020fd9498db8637463c92df4fd6d52caab05c.tar.gz kernel-973020fd9498db8637463c92df4fd6d52caab05c.tar.xz kernel-973020fd9498db8637463c92df4fd6d52caab05c.zip | |
arm64: marvell: dts: add crypto engine description for 7k/8k
Add the description of the crypto engine hardware block for the Marvell
Armada 7k and Armada 8k processors; for both the CP110 slave and master.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 15 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | 16 |
2 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi index ad349ad3034c..ac8df5201cd6 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | |||
| @@ -228,6 +228,21 @@ | |||
| 228 | status = "disabled"; | 228 | status = "disabled"; |
| 229 | }; | 229 | }; |
| 230 | 230 | ||
| 231 | cpm_crypto: crypto@800000 { | ||
| 232 | compatible = "inside-secure,safexcel-eip197"; | ||
| 233 | reg = <0x800000 0x200000>; | ||
| 234 | interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING | ||
| 235 | | IRQ_TYPE_LEVEL_HIGH)>, | ||
| 236 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, | ||
| 237 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, | ||
| 238 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, | ||
| 239 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, | ||
| 240 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; | ||
| 241 | interrupt-names = "mem", "ring0", "ring1", | ||
| 242 | "ring2", "ring3", "eip"; | ||
| 243 | clocks = <&cpm_syscon0 1 26>; | ||
| 244 | status = "disabled"; | ||
| 245 | }; | ||
| 231 | }; | 246 | }; |
| 232 | 247 | ||
| 233 | cpm_pcie0: pcie@f2600000 { | 248 | cpm_pcie0: pcie@f2600000 { |
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi index fb9141ab9b37..7740a75a8230 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi | |||
| @@ -217,6 +217,22 @@ | |||
| 217 | clocks = <&cps_syscon0 1 25>; | 217 | clocks = <&cps_syscon0 1 25>; |
| 218 | status = "okay"; | 218 | status = "okay"; |
| 219 | }; | 219 | }; |
| 220 | |||
| 221 | cps_crypto: crypto@800000 { | ||
| 222 | compatible = "inside-secure,safexcel-eip197"; | ||
| 223 | reg = <0x800000 0x200000>; | ||
| 224 | interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING | ||
| 225 | | IRQ_TYPE_LEVEL_HIGH)>, | ||
| 226 | <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>, | ||
| 227 | <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>, | ||
| 228 | <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>, | ||
| 229 | <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>, | ||
| 230 | <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>; | ||
| 231 | interrupt-names = "mem", "ring0", "ring1", | ||
| 232 | "ring2", "ring3", "eip"; | ||
| 233 | clocks = <&cps_syscon0 1 26>; | ||
| 234 | status = "disabled"; | ||
| 235 | }; | ||
| 220 | }; | 236 | }; |
| 221 | 237 | ||
| 222 | cps_pcie0: pcie@f4600000 { | 238 | cps_pcie0: pcie@f4600000 { |