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authorArnd Bergmann2017-04-27 14:43:42 -0500
committerArnd Bergmann2017-04-27 14:43:42 -0500
commitae706bebd6a172a6adf9f63d1a77b8ed49e998a6 (patch)
tree25ba683abcd0760795430c94d695bd1404391e19
parentd0815dfd91e7d877f9a23a4ef46aeec9851115db (diff)
parentf9936c4abf63106e0bcc3d82098dd1cfc3dc5290 (diff)
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Merge tag 'juno-fixes-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into next/dt64
Pull "ARMv8 Juno DT fixes for v4.12" from Sudeep Holla: 1. Couple of fixes to remove device tree warnings introduced with recently added checks in DTC 2. Add information about L1 and L2 caches to Juno device trees as CCSIDR-based cacheinfo probing is now removed * tag 'juno-fixes-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: add information about L1 and L2 caches arm64: dts: juno: fix few unit address format warnings arm64: dts: juno: fix PCI bus dtc warnings
-rw-r--r--arch/arm64/boot/dts/arm/juno-base.dtsi4
-rw-r--r--arch/arm64/boot/dts/arm/juno-motherboard.dtsi12
-rw-r--r--arch/arm64/boot/dts/arm/juno-r1.dts42
-rw-r--r--arch/arm64/boot/dts/arm/juno-r2.dts42
-rw-r--r--arch/arm64/boot/dts/arm/juno.dts42
5 files changed, 134 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index df539e865b90..bfe7d683a42e 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -428,7 +428,7 @@
428 }; 428 };
429 }; 429 };
430 430
431 pcie_ctlr: pcie-controller@40000000 { 431 pcie_ctlr: pcie@40000000 {
432 compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic"; 432 compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic";
433 device_type = "pci"; 433 device_type = "pci";
434 reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */ 434 reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */
@@ -699,7 +699,7 @@
699 <0x00000008 0x80000000 0x1 0x80000000>; 699 <0x00000008 0x80000000 0x1 0x80000000>;
700 }; 700 };
701 701
702 smb@08000000 { 702 smb@8000000 {
703 compatible = "simple-bus"; 703 compatible = "simple-bus";
704 #address-cells = <2>; 704 #address-cells = <2>;
705 #size-cells = <1>; 705 #size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
index 098601657f82..2ac43221ddb6 100644
--- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
@@ -137,7 +137,7 @@
137 #size-cells = <1>; 137 #size-cells = <1>;
138 ranges = <0 3 0 0x200000>; 138 ranges = <0 3 0 0x200000>;
139 139
140 v2m_sysctl: sysctl@020000 { 140 v2m_sysctl: sysctl@20000 {
141 compatible = "arm,sp810", "arm,primecell"; 141 compatible = "arm,sp810", "arm,primecell";
142 reg = <0x020000 0x1000>; 142 reg = <0x020000 0x1000>;
143 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>; 143 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>;
@@ -148,7 +148,7 @@
148 assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>; 148 assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
149 }; 149 };
150 150
151 apbregs@010000 { 151 apbregs@10000 {
152 compatible = "syscon", "simple-mfd"; 152 compatible = "syscon", "simple-mfd";
153 reg = <0x010000 0x1000>; 153 reg = <0x010000 0x1000>;
154 154
@@ -216,7 +216,7 @@
216 }; 216 };
217 }; 217 };
218 218
219 mmci@050000 { 219 mmci@50000 {
220 compatible = "arm,pl180", "arm,primecell"; 220 compatible = "arm,pl180", "arm,primecell";
221 reg = <0x050000 0x1000>; 221 reg = <0x050000 0x1000>;
222 interrupts = <5>; 222 interrupts = <5>;
@@ -228,7 +228,7 @@
228 clock-names = "mclk", "apb_pclk"; 228 clock-names = "mclk", "apb_pclk";
229 }; 229 };
230 230
231 kmi@060000 { 231 kmi@60000 {
232 compatible = "arm,pl050", "arm,primecell"; 232 compatible = "arm,pl050", "arm,primecell";
233 reg = <0x060000 0x1000>; 233 reg = <0x060000 0x1000>;
234 interrupts = <8>; 234 interrupts = <8>;
@@ -236,7 +236,7 @@
236 clock-names = "KMIREFCLK", "apb_pclk"; 236 clock-names = "KMIREFCLK", "apb_pclk";
237 }; 237 };
238 238
239 kmi@070000 { 239 kmi@70000 {
240 compatible = "arm,pl050", "arm,primecell"; 240 compatible = "arm,pl050", "arm,primecell";
241 reg = <0x070000 0x1000>; 241 reg = <0x070000 0x1000>;
242 interrupts = <8>; 242 interrupts = <8>;
@@ -244,7 +244,7 @@
244 clock-names = "KMIREFCLK", "apb_pclk"; 244 clock-names = "KMIREFCLK", "apb_pclk";
245 }; 245 };
246 246
247 wdt@0f0000 { 247 wdt@f0000 {
248 compatible = "arm,sp805", "arm,primecell"; 248 compatible = "arm,sp805", "arm,primecell";
249 reg = <0x0f0000 0x10000>; 249 reg = <0x0f0000 0x10000>;
250 interrupts = <7>; 250 interrupts = <7>;
diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts
index 0033c59a64b5..0e8943ab94d7 100644
--- a/arch/arm64/boot/dts/arm/juno-r1.dts
+++ b/arch/arm64/boot/dts/arm/juno-r1.dts
@@ -89,6 +89,12 @@
89 reg = <0x0 0x0>; 89 reg = <0x0 0x0>;
90 device_type = "cpu"; 90 device_type = "cpu";
91 enable-method = "psci"; 91 enable-method = "psci";
92 i-cache-size = <0xc000>;
93 i-cache-line-size = <64>;
94 i-cache-sets = <256>;
95 d-cache-size = <0x8000>;
96 d-cache-line-size = <64>;
97 d-cache-sets = <256>;
92 next-level-cache = <&A57_L2>; 98 next-level-cache = <&A57_L2>;
93 clocks = <&scpi_dvfs 0>; 99 clocks = <&scpi_dvfs 0>;
94 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 100 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -100,6 +106,12 @@
100 reg = <0x0 0x1>; 106 reg = <0x0 0x1>;
101 device_type = "cpu"; 107 device_type = "cpu";
102 enable-method = "psci"; 108 enable-method = "psci";
109 i-cache-size = <0xc000>;
110 i-cache-line-size = <64>;
111 i-cache-sets = <256>;
112 d-cache-size = <0x8000>;
113 d-cache-line-size = <64>;
114 d-cache-sets = <256>;
103 next-level-cache = <&A57_L2>; 115 next-level-cache = <&A57_L2>;
104 clocks = <&scpi_dvfs 0>; 116 clocks = <&scpi_dvfs 0>;
105 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 117 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -111,6 +123,12 @@
111 reg = <0x0 0x100>; 123 reg = <0x0 0x100>;
112 device_type = "cpu"; 124 device_type = "cpu";
113 enable-method = "psci"; 125 enable-method = "psci";
126 i-cache-size = <0x8000>;
127 i-cache-line-size = <64>;
128 i-cache-sets = <256>;
129 d-cache-size = <0x8000>;
130 d-cache-line-size = <64>;
131 d-cache-sets = <128>;
114 next-level-cache = <&A53_L2>; 132 next-level-cache = <&A53_L2>;
115 clocks = <&scpi_dvfs 1>; 133 clocks = <&scpi_dvfs 1>;
116 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 134 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -122,6 +140,12 @@
122 reg = <0x0 0x101>; 140 reg = <0x0 0x101>;
123 device_type = "cpu"; 141 device_type = "cpu";
124 enable-method = "psci"; 142 enable-method = "psci";
143 i-cache-size = <0x8000>;
144 i-cache-line-size = <64>;
145 i-cache-sets = <256>;
146 d-cache-size = <0x8000>;
147 d-cache-line-size = <64>;
148 d-cache-sets = <128>;
125 next-level-cache = <&A53_L2>; 149 next-level-cache = <&A53_L2>;
126 clocks = <&scpi_dvfs 1>; 150 clocks = <&scpi_dvfs 1>;
127 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 151 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -133,6 +157,12 @@
133 reg = <0x0 0x102>; 157 reg = <0x0 0x102>;
134 device_type = "cpu"; 158 device_type = "cpu";
135 enable-method = "psci"; 159 enable-method = "psci";
160 i-cache-size = <0x8000>;
161 i-cache-line-size = <64>;
162 i-cache-sets = <256>;
163 d-cache-size = <0x8000>;
164 d-cache-line-size = <64>;
165 d-cache-sets = <128>;
136 next-level-cache = <&A53_L2>; 166 next-level-cache = <&A53_L2>;
137 clocks = <&scpi_dvfs 1>; 167 clocks = <&scpi_dvfs 1>;
138 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 168 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -144,6 +174,12 @@
144 reg = <0x0 0x103>; 174 reg = <0x0 0x103>;
145 device_type = "cpu"; 175 device_type = "cpu";
146 enable-method = "psci"; 176 enable-method = "psci";
177 i-cache-size = <0x8000>;
178 i-cache-line-size = <64>;
179 i-cache-sets = <256>;
180 d-cache-size = <0x8000>;
181 d-cache-line-size = <64>;
182 d-cache-sets = <128>;
147 next-level-cache = <&A53_L2>; 183 next-level-cache = <&A53_L2>;
148 clocks = <&scpi_dvfs 1>; 184 clocks = <&scpi_dvfs 1>;
149 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 185 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -152,10 +188,16 @@
152 188
153 A57_L2: l2-cache0 { 189 A57_L2: l2-cache0 {
154 compatible = "cache"; 190 compatible = "cache";
191 cache-size = <0x200000>;
192 cache-line-size = <64>;
193 cache-sets = <2048>;
155 }; 194 };
156 195
157 A53_L2: l2-cache1 { 196 A53_L2: l2-cache1 {
158 compatible = "cache"; 197 compatible = "cache";
198 cache-size = <0x100000>;
199 cache-line-size = <64>;
200 cache-sets = <1024>;
159 }; 201 };
160 }; 202 };
161 203
diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts
index 218d0e4736a8..405e2fba025b 100644
--- a/arch/arm64/boot/dts/arm/juno-r2.dts
+++ b/arch/arm64/boot/dts/arm/juno-r2.dts
@@ -89,6 +89,12 @@
89 reg = <0x0 0x0>; 89 reg = <0x0 0x0>;
90 device_type = "cpu"; 90 device_type = "cpu";
91 enable-method = "psci"; 91 enable-method = "psci";
92 i-cache-size = <0xc000>;
93 i-cache-line-size = <64>;
94 i-cache-sets = <256>;
95 d-cache-size = <0x8000>;
96 d-cache-line-size = <64>;
97 d-cache-sets = <256>;
92 next-level-cache = <&A72_L2>; 98 next-level-cache = <&A72_L2>;
93 clocks = <&scpi_dvfs 0>; 99 clocks = <&scpi_dvfs 0>;
94 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 100 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -100,6 +106,12 @@
100 reg = <0x0 0x1>; 106 reg = <0x0 0x1>;
101 device_type = "cpu"; 107 device_type = "cpu";
102 enable-method = "psci"; 108 enable-method = "psci";
109 i-cache-size = <0xc000>;
110 i-cache-line-size = <64>;
111 i-cache-sets = <256>;
112 d-cache-size = <0x8000>;
113 d-cache-line-size = <64>;
114 d-cache-sets = <256>;
103 next-level-cache = <&A72_L2>; 115 next-level-cache = <&A72_L2>;
104 clocks = <&scpi_dvfs 0>; 116 clocks = <&scpi_dvfs 0>;
105 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 117 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -111,6 +123,12 @@
111 reg = <0x0 0x100>; 123 reg = <0x0 0x100>;
112 device_type = "cpu"; 124 device_type = "cpu";
113 enable-method = "psci"; 125 enable-method = "psci";
126 i-cache-size = <0x8000>;
127 i-cache-line-size = <64>;
128 i-cache-sets = <256>;
129 d-cache-size = <0x8000>;
130 d-cache-line-size = <64>;
131 d-cache-sets = <128>;
114 next-level-cache = <&A53_L2>; 132 next-level-cache = <&A53_L2>;
115 clocks = <&scpi_dvfs 1>; 133 clocks = <&scpi_dvfs 1>;
116 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 134 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -122,6 +140,12 @@
122 reg = <0x0 0x101>; 140 reg = <0x0 0x101>;
123 device_type = "cpu"; 141 device_type = "cpu";
124 enable-method = "psci"; 142 enable-method = "psci";
143 i-cache-size = <0x8000>;
144 i-cache-line-size = <64>;
145 i-cache-sets = <256>;
146 d-cache-size = <0x8000>;
147 d-cache-line-size = <64>;
148 d-cache-sets = <128>;
125 next-level-cache = <&A53_L2>; 149 next-level-cache = <&A53_L2>;
126 clocks = <&scpi_dvfs 1>; 150 clocks = <&scpi_dvfs 1>;
127 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 151 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -133,6 +157,12 @@
133 reg = <0x0 0x102>; 157 reg = <0x0 0x102>;
134 device_type = "cpu"; 158 device_type = "cpu";
135 enable-method = "psci"; 159 enable-method = "psci";
160 i-cache-size = <0x8000>;
161 i-cache-line-size = <64>;
162 i-cache-sets = <256>;
163 d-cache-size = <0x8000>;
164 d-cache-line-size = <64>;
165 d-cache-sets = <128>;
136 next-level-cache = <&A53_L2>; 166 next-level-cache = <&A53_L2>;
137 clocks = <&scpi_dvfs 1>; 167 clocks = <&scpi_dvfs 1>;
138 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 168 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -144,6 +174,12 @@
144 reg = <0x0 0x103>; 174 reg = <0x0 0x103>;
145 device_type = "cpu"; 175 device_type = "cpu";
146 enable-method = "psci"; 176 enable-method = "psci";
177 i-cache-size = <0x8000>;
178 i-cache-line-size = <64>;
179 i-cache-sets = <256>;
180 d-cache-size = <0x8000>;
181 d-cache-line-size = <64>;
182 d-cache-sets = <128>;
147 next-level-cache = <&A53_L2>; 183 next-level-cache = <&A53_L2>;
148 clocks = <&scpi_dvfs 1>; 184 clocks = <&scpi_dvfs 1>;
149 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 185 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -152,10 +188,16 @@
152 188
153 A72_L2: l2-cache0 { 189 A72_L2: l2-cache0 {
154 compatible = "cache"; 190 compatible = "cache";
191 cache-size = <0x200000>;
192 cache-line-size = <64>;
193 cache-sets = <2048>;
155 }; 194 };
156 195
157 A53_L2: l2-cache1 { 196 A53_L2: l2-cache1 {
158 compatible = "cache"; 197 compatible = "cache";
198 cache-size = <0x100000>;
199 cache-line-size = <64>;
200 cache-sets = <1024>;
159 }; 201 };
160 }; 202 };
161 203
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index bb2820ef3d5b..0220494c9b80 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -88,6 +88,12 @@
88 reg = <0x0 0x0>; 88 reg = <0x0 0x0>;
89 device_type = "cpu"; 89 device_type = "cpu";
90 enable-method = "psci"; 90 enable-method = "psci";
91 i-cache-size = <0xc000>;
92 i-cache-line-size = <64>;
93 i-cache-sets = <256>;
94 d-cache-size = <0x8000>;
95 d-cache-line-size = <64>;
96 d-cache-sets = <256>;
91 next-level-cache = <&A57_L2>; 97 next-level-cache = <&A57_L2>;
92 clocks = <&scpi_dvfs 0>; 98 clocks = <&scpi_dvfs 0>;
93 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 99 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -99,6 +105,12 @@
99 reg = <0x0 0x1>; 105 reg = <0x0 0x1>;
100 device_type = "cpu"; 106 device_type = "cpu";
101 enable-method = "psci"; 107 enable-method = "psci";
108 i-cache-size = <0xc000>;
109 i-cache-line-size = <64>;
110 i-cache-sets = <256>;
111 d-cache-size = <0x8000>;
112 d-cache-line-size = <64>;
113 d-cache-sets = <256>;
102 next-level-cache = <&A57_L2>; 114 next-level-cache = <&A57_L2>;
103 clocks = <&scpi_dvfs 0>; 115 clocks = <&scpi_dvfs 0>;
104 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 116 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -110,6 +122,12 @@
110 reg = <0x0 0x100>; 122 reg = <0x0 0x100>;
111 device_type = "cpu"; 123 device_type = "cpu";
112 enable-method = "psci"; 124 enable-method = "psci";
125 i-cache-size = <0x8000>;
126 i-cache-line-size = <64>;
127 i-cache-sets = <256>;
128 d-cache-size = <0x8000>;
129 d-cache-line-size = <64>;
130 d-cache-sets = <128>;
113 next-level-cache = <&A53_L2>; 131 next-level-cache = <&A53_L2>;
114 clocks = <&scpi_dvfs 1>; 132 clocks = <&scpi_dvfs 1>;
115 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 133 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -121,6 +139,12 @@
121 reg = <0x0 0x101>; 139 reg = <0x0 0x101>;
122 device_type = "cpu"; 140 device_type = "cpu";
123 enable-method = "psci"; 141 enable-method = "psci";
142 i-cache-size = <0x8000>;
143 i-cache-line-size = <64>;
144 i-cache-sets = <256>;
145 d-cache-size = <0x8000>;
146 d-cache-line-size = <64>;
147 d-cache-sets = <128>;
124 next-level-cache = <&A53_L2>; 148 next-level-cache = <&A53_L2>;
125 clocks = <&scpi_dvfs 1>; 149 clocks = <&scpi_dvfs 1>;
126 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 150 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -132,6 +156,12 @@
132 reg = <0x0 0x102>; 156 reg = <0x0 0x102>;
133 device_type = "cpu"; 157 device_type = "cpu";
134 enable-method = "psci"; 158 enable-method = "psci";
159 i-cache-size = <0x8000>;
160 i-cache-line-size = <64>;
161 i-cache-sets = <256>;
162 d-cache-size = <0x8000>;
163 d-cache-line-size = <64>;
164 d-cache-sets = <128>;
135 next-level-cache = <&A53_L2>; 165 next-level-cache = <&A53_L2>;
136 clocks = <&scpi_dvfs 1>; 166 clocks = <&scpi_dvfs 1>;
137 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 167 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -143,6 +173,12 @@
143 reg = <0x0 0x103>; 173 reg = <0x0 0x103>;
144 device_type = "cpu"; 174 device_type = "cpu";
145 enable-method = "psci"; 175 enable-method = "psci";
176 i-cache-size = <0x8000>;
177 i-cache-line-size = <64>;
178 i-cache-sets = <256>;
179 d-cache-size = <0x8000>;
180 d-cache-line-size = <64>;
181 d-cache-sets = <128>;
146 next-level-cache = <&A53_L2>; 182 next-level-cache = <&A53_L2>;
147 clocks = <&scpi_dvfs 1>; 183 clocks = <&scpi_dvfs 1>;
148 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 184 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -151,10 +187,16 @@
151 187
152 A57_L2: l2-cache0 { 188 A57_L2: l2-cache0 {
153 compatible = "cache"; 189 compatible = "cache";
190 cache-size = <0x200000>;
191 cache-line-size = <64>;
192 cache-sets = <2048>;
154 }; 193 };
155 194
156 A53_L2: l2-cache1 { 195 A53_L2: l2-cache1 {
157 compatible = "cache"; 196 compatible = "cache";
197 cache-size = <0x100000>;
198 cache-line-size = <64>;
199 cache-sets = <1024>;
158 }; 200 };
159 }; 201 };
160 202