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authorLinus Torvalds2017-05-09 12:07:33 -0500
committerLinus Torvalds2017-05-09 12:07:33 -0500
commitc6778ff813d2ca3e3c8733c87dc8b6831a64578b (patch)
treecc0a79f229fdcd723a7597500dcda06e6a4d9deb
parent0ff4c01b279a590a2826ade9321ad8c7ca5a1b6c (diff)
parent3c0e3abd5ee59acbcbd5d8fc624eaf63f6e7b53c (diff)
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Merge tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM 64-bit DT updates from Olof Johansson: "Device-tree updates for arm64 platforms. Just as with 32-bit, a bunch of smaller changes, but also some new platforms that are worth mentioning: - Rockchip RK3399 platforms for Chromebooks, including Samsung Chromebook Plus (Kevin) - Orange Pi PC2 (Allwinner H5) - Freescale LS2088A and LS1088A SoCs - Expanded support for Nvidia Tegra186 (and Jetson TX2)" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (180 commits) arm64: dts: Add basic DT to support Spreadtrum's SP9860G arm64: dts: exynos: Use - instead of @ for DT OPP entries arm64: dts: exynos: Add support for s6e3hf2 panel device on TM2e board arm64: dts: juno: add information about L1 and L2 caches arm64: dts: juno: fix few unit address format warnings arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB arm64: marvell: dts: add crypto engine description for 7k/8k arm64: dts: marvell: add sdhci support for Armada 7K/8K arm64: dts: marvell: add eMMC support for Armada 37xx arm64: dts: hisi: add pinctrl dtsi file for HiKey960 development board arm64: dts: hisi: add drive strength levels of the pins for Hi3660 SoC arm64: dts: hisi: enable the NIC and SAS for the hip07-d05 board arm64: dts: hisi: add SAS nodes for the hip07 SoC arm64: dts: hisi: add RoCE nodes for the hip07 SoC arm64: dts: hisi: add network related nodes for the hip07 SoC arm64: dts: hisi: add mbigen nodes for the hip07 SoC arm64: dts: rockchip: fix the memory size of PX5 Evaluation board arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board dt-bindings: arm: hisilicon: add bindings for hi3798cv200 SoC and Poplar board ...
-rw-r--r--Documentation/devicetree/bindings/arm/amlogic.txt3
-rw-r--r--Documentation/devicetree/bindings/arm/cavium-thunder2.txt8
-rw-r--r--Documentation/devicetree/bindings/arm/cpus.txt1
-rw-r--r--Documentation/devicetree/bindings/arm/fsl.txt23
-rw-r--r--Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt8
-rw-r--r--Documentation/devicetree/bindings/arm/rockchip.txt24
-rw-r--r--Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt3
-rw-r--r--Documentation/devicetree/bindings/clock/qoriq-clock.txt1
-rw-r--r--Documentation/devicetree/bindings/soc/rockchip/grf.txt1
-rw-r--r--Documentation/devicetree/bindings/vendor-prefixes.txt2
-rw-r--r--arch/arm/boot/dts/meson8.dtsi2
-rw-r--r--arch/arm/boot/dts/meson8b.dtsi2
-rw-r--r--arch/arm/boot/dts/sunxi-h3-h5.dtsi45
-rw-r--r--arch/arm64/boot/dts/allwinner/Makefile1
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi29
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts188
-rw-r--r--arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi124
l---------arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi1
-rw-r--r--arch/arm64/boot/dts/amlogic/Makefile2
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi39
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gx.dtsi80
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts40
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts80
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts25
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts11
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi29
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi21
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts26
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts26
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi172
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi43
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts42
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi1
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts164
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts114
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts23
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts21
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi173
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi1
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxl.dtsi194
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts25
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts42
-rw-r--r--arch/arm64/boot/dts/amlogic/meson-gxm.dtsi3
-rw-r--r--arch/arm64/boot/dts/arm/juno-base.dtsi4
-rw-r--r--arch/arm64/boot/dts/arm/juno-motherboard.dtsi12
-rw-r--r--arch/arm64/boot/dts/arm/juno-r1.dts42
-rw-r--r--arch/arm64/boot/dts/arm/juno-r2.dts42
-rw-r--r--arch/arm64/boot/dts/arm/juno.dts42
-rw-r--r--arch/arm64/boot/dts/broadcom/Makefile1
-rw-r--r--arch/arm64/boot/dts/broadcom/ns2-svk.dts38
-rw-r--r--arch/arm64/boot/dts/broadcom/ns2-xmc.dts20
-rw-r--r--arch/arm64/boot/dts/broadcom/ns2.dtsi24
-rw-r--r--arch/arm64/boot/dts/cavium/Makefile1
-rw-r--r--arch/arm64/boot/dts/cavium/thunder2-99xx.dts (renamed from arch/arm64/boot/dts/broadcom/vulcan-eval.dts)9
-rw-r--r--arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi (renamed from arch/arm64/boot/dts/broadcom/vulcan.dtsi)15
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi48
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433.dtsi50
-rw-r--r--arch/arm64/boot/dts/freescale/Makefile4
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts4
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts4
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts4
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi182
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi4
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi4
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts123
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts107
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi275
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts155
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts110
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi863
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts64
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2088a-rdb.dts64
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi165
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi196
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi151
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi737
-rw-r--r--arch/arm64/boot/dts/hisilicon/Makefile1
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts1
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts162
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi411
-rw-r--r--arch/arm64/boot/dts/hisilicon/hi6220.dtsi3
-rw-r--r--arch/arm64/boot/dts/hisilicon/hikey960-pinctrl.dtsi407
-rw-r--r--arch/arm64/boot/dts/hisilicon/hip07-d05.dts20
-rw-r--r--arch/arm64/boot/dts/hisilicon/hip07.dtsi479
-rw-r--r--arch/arm64/boot/dts/marvell/armada-3720-db.dts50
-rw-r--r--arch/arm64/boot/dts/marvell/armada-37xx.dtsi18
-rw-r--r--arch/arm64/boot/dts/marvell/armada-7040-db.dts43
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8020.dtsi10
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-db.dts32
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040.dtsi9
-rw-r--r--arch/arm64/boot/dts/marvell/armada-ap806.dtsi11
-rw-r--r--arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi70
-rw-r--r--arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi60
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra132.dtsi2
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts91
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi319
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra186.dtsi59
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra210.dtsi19
-rw-r--r--arch/arm64/boot/dts/qcom/apq8016-sbc.dtsi11
-rw-r--r--arch/arm64/boot/dts/qcom/msm8916.dtsi26
-rw-r--r--arch/arm64/boot/dts/qcom/msm8996.dtsi46
-rw-r--r--arch/arm64/boot/dts/qcom/pm8994.dtsi7
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts29
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts39
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795.dtsi181
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-m3ulcb.dts1
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts32
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7796.dtsi311
-rw-r--r--arch/arm64/boot/dts/rockchip/Makefile2
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328-evb.dts57
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328.dtsi1264
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3368-px5-evb.dts2
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3368.dtsi94
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-gru-kevin.dts306
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi1103
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi145
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399.dtsi147
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts10
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi13
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts10
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi4
-rw-r--r--arch/arm64/boot/dts/sprd/Makefile3
-rw-r--r--arch/arm64/boot/dts/sprd/sc9860.dtsi569
-rw-r--r--arch/arm64/boot/dts/sprd/sp9860g-1h10.dts56
-rw-r--r--arch/arm64/boot/dts/sprd/whale2.dtsi71
-rw-r--r--arch/arm64/boot/dts/zte/zx296718-evb.dts28
-rw-r--r--arch/arm64/boot/dts/zte/zx296718.dtsi126
-rw-r--r--drivers/clk/meson/gxbb.h21
-rw-r--r--include/dt-bindings/clock/gxbb-clkc.h11
-rw-r--r--include/dt-bindings/pinctrl/hisi.h15
130 files changed, 11043 insertions, 1401 deletions
diff --git a/Documentation/devicetree/bindings/arm/amlogic.txt b/Documentation/devicetree/bindings/arm/amlogic.txt
index c246cd2730d9..bfd5b558477d 100644
--- a/Documentation/devicetree/bindings/arm/amlogic.txt
+++ b/Documentation/devicetree/bindings/arm/amlogic.txt
@@ -43,8 +43,11 @@ Board compatible values:
43 - "wetek,hub" (Meson gxbb) 43 - "wetek,hub" (Meson gxbb)
44 - "wetek,play2" (Meson gxbb) 44 - "wetek,play2" (Meson gxbb)
45 - "amlogic,p212" (Meson gxl s905x) 45 - "amlogic,p212" (Meson gxl s905x)
46 - "khadas,vim" (Meson gxl s905x)
47
46 - "amlogic,p230" (Meson gxl s905d) 48 - "amlogic,p230" (Meson gxl s905d)
47 - "amlogic,p231" (Meson gxl s905d) 49 - "amlogic,p231" (Meson gxl s905d)
50 - "hwacom,amazetv" (Meson gxl s905x)
48 - "amlogic,q200" (Meson gxm s912) 51 - "amlogic,q200" (Meson gxm s912)
49 - "amlogic,q201" (Meson gxm s912) 52 - "amlogic,q201" (Meson gxm s912)
50 - "nexbox,a95x" (Meson gxbb or Meson gxl s905x) 53 - "nexbox,a95x" (Meson gxbb or Meson gxl s905x)
diff --git a/Documentation/devicetree/bindings/arm/cavium-thunder2.txt b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
new file mode 100644
index 000000000000..dc5dd65cbce7
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/cavium-thunder2.txt
@@ -0,0 +1,8 @@
1Cavium ThunderX2 CN99XX platform tree bindings
2----------------------------------------------
3
4Boards with Cavium ThunderX2 CN99XX SoC shall have the root property:
5 compatible = "cavium,thunderx2-cn9900", "brcm,vulcan-soc";
6
7These SoC uses the "cavium,thunder2" core which will be compatible
8with "brcm,vulcan".
diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt
index 698ad1f097fa..1030f5f50207 100644
--- a/Documentation/devicetree/bindings/arm/cpus.txt
+++ b/Documentation/devicetree/bindings/arm/cpus.txt
@@ -170,6 +170,7 @@ nodes to be present and contain the properties described below.
170 "brcm,brahma-b15" 170 "brcm,brahma-b15"
171 "brcm,vulcan" 171 "brcm,vulcan"
172 "cavium,thunder" 172 "cavium,thunder"
173 "cavium,thunder2"
173 "faraday,fa526" 174 "faraday,fa526"
174 "intel,sa110" 175 "intel,sa110"
175 "intel,sa1100" 176 "intel,sa1100"
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index c9c567ae227f..cdb9dd705754 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -179,6 +179,18 @@ LS1046A ARMv8 based RDB Board
179Required root node properties: 179Required root node properties:
180 - compatible = "fsl,ls1046a-rdb", "fsl,ls1046a"; 180 - compatible = "fsl,ls1046a-rdb", "fsl,ls1046a";
181 181
182LS1088A SoC
183Required root node properties:
184 - compatible = "fsl,ls1088a";
185
186LS1088A ARMv8 based QDS Board
187Required root node properties:
188 - compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
189
190LS1088A ARMv8 based RDB Board
191Required root node properties:
192 - compatible = "fsl,ls1088a-rdb", "fsl,ls1088a";
193
182LS2080A SoC 194LS2080A SoC
183Required root node properties: 195Required root node properties:
184 - compatible = "fsl,ls2080a"; 196 - compatible = "fsl,ls2080a";
@@ -195,3 +207,14 @@ LS2080A ARMv8 based RDB Board
195Required root node properties: 207Required root node properties:
196 - compatible = "fsl,ls2080a-rdb", "fsl,ls2080a"; 208 - compatible = "fsl,ls2080a-rdb", "fsl,ls2080a";
197 209
210LS2088A SoC
211Required root node properties:
212 - compatible = "fsl,ls2088a";
213
214LS2088A ARMv8 based QDS Board
215Required root node properties:
216 - compatible = "fsl,ls2088a-qds", "fsl,ls2088a";
217
218LS2088A ARMv8 based RDB Board
219Required root node properties:
220 - compatible = "fsl,ls2088a-rdb", "fsl,ls2088a";
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
index f1c1e21a8110..2e732152064b 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
+++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt
@@ -4,6 +4,14 @@ Hi3660 SoC
4Required root node properties: 4Required root node properties:
5 - compatible = "hisilicon,hi3660"; 5 - compatible = "hisilicon,hi3660";
6 6
7Hi3798cv200 SoC
8Required root node properties:
9 - compatible = "hisilicon,hi3798cv200";
10
11Hi3798cv200 Poplar Board
12Required root node properties:
13 - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
14
7Hi4511 Board 15Hi4511 Board
8Required root node properties: 16Required root node properties:
9 - compatible = "hisilicon,hi3620-hi4511"; 17 - compatible = "hisilicon,hi3620-hi4511";
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
index 6b8d50a0ee78..c965d99e86c2 100644
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
@@ -59,6 +59,17 @@ Rockchip platforms device tree bindings
59 - compatible = "google,veyron-brain-rev0", "google,veyron-brain", 59 - compatible = "google,veyron-brain-rev0", "google,veyron-brain",
60 "google,veyron", "rockchip,rk3288"; 60 "google,veyron", "rockchip,rk3288";
61 61
62- Google Gru (dev-board):
63 Required root node properties:
64 - compatible = "google,gru-rev15", "google,gru-rev14",
65 "google,gru-rev13", "google,gru-rev12",
66 "google,gru-rev11", "google,gru-rev10",
67 "google,gru-rev9", "google,gru-rev8",
68 "google,gru-rev7", "google,gru-rev6",
69 "google,gru-rev5", "google,gru-rev4",
70 "google,gru-rev3", "google,gru-rev2",
71 "google,gru", "rockchip,rk3399";
72
62- Google Jaq (Haier Chromebook 11 and more): 73- Google Jaq (Haier Chromebook 11 and more):
63 Required root node properties: 74 Required root node properties:
64 - compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4", 75 - compatible = "google,veyron-jaq-rev5", "google,veyron-jaq-rev4",
@@ -73,6 +84,15 @@ Rockchip platforms device tree bindings
73 "google,veyron-jerry-rev3", "google,veyron-jerry", 84 "google,veyron-jerry-rev3", "google,veyron-jerry",
74 "google,veyron", "rockchip,rk3288"; 85 "google,veyron", "rockchip,rk3288";
75 86
87- Google Kevin (Samsung Chromebook Plus):
88 Required root node properties:
89 - compatible = "google,kevin-rev15", "google,kevin-rev14",
90 "google,kevin-rev13", "google,kevin-rev12",
91 "google,kevin-rev11", "google,kevin-rev10",
92 "google,kevin-rev9", "google,kevin-rev8",
93 "google,kevin-rev7", "google,kevin-rev6",
94 "google,kevin", "google,gru", "rockchip,rk3399";
95
76- Google Mickey (Asus Chromebit CS10): 96- Google Mickey (Asus Chromebit CS10):
77 Required root node properties: 97 Required root node properties:
78 - compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7", 98 - compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7",
@@ -141,6 +161,10 @@ Rockchip platforms device tree bindings
141 Required root node properties: 161 Required root node properties:
142 - compatible = "rockchip,rk3288-fennec", "rockchip,rk3288"; 162 - compatible = "rockchip,rk3288-fennec", "rockchip,rk3288";
143 163
164- Rockchip RK3328 evb:
165 Required root node properties:
166 - compatible = "rockchip,rk3328-evb", "rockchip,rk3328";
167
144- Rockchip RK3399 evb: 168- Rockchip RK3399 evb:
145 Required root node properties: 169 Required root node properties:
146 - compatible = "rockchip,rk3399-evb", "rockchip,rk3399"; 170 - compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
diff --git a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
index ce06435d28ed..a09d627b5508 100644
--- a/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
+++ b/Documentation/devicetree/bindings/clock/amlogic,gxbb-clkc.txt
@@ -5,7 +5,8 @@ controllers within the SoC.
5 5
6Required Properties: 6Required Properties:
7 7
8- compatible: should be "amlogic,gxbb-clkc" 8- compatible: should be "amlogic,gxbb-clkc" for GXBB SoC,
9 or "amlogic,gxl-clkc" for GXL and GXM SoC.
9- reg: physical base address of the clock controller and length of memory 10- reg: physical base address of the clock controller and length of memory
10 mapped region. 11 mapped region.
11 12
diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
index aa3526f229a7..6ed469c66b32 100644
--- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
+++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
@@ -35,6 +35,7 @@ Required properties:
35 * "fsl,ls1021a-clockgen" 35 * "fsl,ls1021a-clockgen"
36 * "fsl,ls1043a-clockgen" 36 * "fsl,ls1043a-clockgen"
37 * "fsl,ls1046a-clockgen" 37 * "fsl,ls1046a-clockgen"
38 * "fsl,ls1088a-clockgen"
38 * "fsl,ls2080a-clockgen" 39 * "fsl,ls2080a-clockgen"
39 Chassis-version clock strings include: 40 Chassis-version clock strings include:
40 * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks 41 * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks
diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
index 13ec0992de0f..cc9f05d3cbc1 100644
--- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt
+++ b/Documentation/devicetree/bindings/soc/rockchip/grf.txt
@@ -18,6 +18,7 @@ Required Properties:
18 - "rockchip,rk3188-grf", "syscon": for rk3188 18 - "rockchip,rk3188-grf", "syscon": for rk3188
19 - "rockchip,rk3228-grf", "syscon": for rk3228 19 - "rockchip,rk3228-grf", "syscon": for rk3228
20 - "rockchip,rk3288-grf", "syscon": for rk3288 20 - "rockchip,rk3288-grf", "syscon": for rk3288
21 - "rockchip,rk3328-grf", "syscon": for rk3328
21 - "rockchip,rk3368-grf", "syscon": for rk3368 22 - "rockchip,rk3368-grf", "syscon": for rk3368
22 - "rockchip,rk3399-grf", "syscon": for rk3399 23 - "rockchip,rk3399-grf", "syscon": for rk3399
23- compatible: PMUGRF should be one of the following: 24- compatible: PMUGRF should be one of the following:
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index ee558477e164..f9fe94535b46 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -139,6 +139,7 @@ holt Holt Integrated Circuits, Inc.
139honeywell Honeywell 139honeywell Honeywell
140hp Hewlett Packard 140hp Hewlett Packard
141holtek Holtek Semiconductor, Inc. 141holtek Holtek Semiconductor, Inc.
142hwacom HwaCom Systems Inc.
142i2se I2SE GmbH 143i2se I2SE GmbH
143ibm International Business Machines (IBM) 144ibm International Business Machines (IBM)
144idt Integrated Device Technologies, Inc. 145idt Integrated Device Technologies, Inc.
@@ -162,6 +163,7 @@ jedec JEDEC Solid State Technology Association
162karo Ka-Ro electronics GmbH 163karo Ka-Ro electronics GmbH
163keithkoep Keith & Koep GmbH 164keithkoep Keith & Koep GmbH
164keymile Keymile GmbH 165keymile Keymile GmbH
166khadas Khadas
165kinetic Kinetic Technologies 167kinetic Kinetic Technologies
166kosagi Sutajio Ko-Usagi PTE Ltd. 168kosagi Sutajio Ko-Usagi PTE Ltd.
167kyo Kyocera Corporation 169kyo Kyocera Corporation
diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi
index 45619f6162c5..ebc763eab195 100644
--- a/arch/arm/boot/dts/meson8.dtsi
+++ b/arch/arm/boot/dts/meson8.dtsi
@@ -106,6 +106,7 @@
106 reg-names = "mux", "pull", "pull-enable", "gpio"; 106 reg-names = "mux", "pull", "pull-enable", "gpio";
107 gpio-controller; 107 gpio-controller;
108 #gpio-cells = <2>; 108 #gpio-cells = <2>;
109 gpio-ranges = <&pinctrl_cbus 0 0 120>;
109 }; 110 };
110 111
111 spi_nor_pins: nor { 112 spi_nor_pins: nor {
@@ -148,6 +149,7 @@
148 reg-names = "mux", "pull", "gpio"; 149 reg-names = "mux", "pull", "gpio";
149 gpio-controller; 150 gpio-controller;
150 #gpio-cells = <2>; 151 #gpio-cells = <2>;
152 gpio-ranges = <&pinctrl_aobus 0 120 16>;
151 }; 153 };
152 154
153 uart_ao_a_pins: uart_ao_a { 155 uart_ao_a_pins: uart_ao_a {
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi
index 41fd53671859..828aa49c678c 100644
--- a/arch/arm/boot/dts/meson8b.dtsi
+++ b/arch/arm/boot/dts/meson8b.dtsi
@@ -198,6 +198,7 @@
198 reg-names = "mux", "pull", "pull-enable", "gpio"; 198 reg-names = "mux", "pull", "pull-enable", "gpio";
199 gpio-controller; 199 gpio-controller;
200 #gpio-cells = <2>; 200 #gpio-cells = <2>;
201 gpio-ranges = <&pinctrl_cbus 0 0 130>;
201 }; 202 };
202 }; 203 };
203 204
@@ -215,6 +216,7 @@
215 reg-names = "mux", "pull", "gpio"; 216 reg-names = "mux", "pull", "gpio";
216 gpio-controller; 217 gpio-controller;
217 #gpio-cells = <2>; 218 #gpio-cells = <2>;
219 gpio-ranges = <&pinctrl_aobus 0 130 16>;
218 }; 220 };
219 221
220 uart_ao_a_pins: uart_ao_a { 222 uart_ao_a_pins: uart_ao_a {
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 6640ebfa6419..1aeeacb3a884 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -68,31 +68,12 @@
68 clock-output-names = "osc32k"; 68 clock-output-names = "osc32k";
69 }; 69 };
70 70
71 apb0: apb0_clk { 71 iosc: internal-osc-clk {
72 compatible = "fixed-factor-clock";
73 #clock-cells = <0>; 72 #clock-cells = <0>;
74 clock-div = <1>; 73 compatible = "fixed-clock";
75 clock-mult = <1>; 74 clock-frequency = <16000000>;
76 clocks = <&osc24M>; 75 clock-accuracy = <300000000>;
77 clock-output-names = "apb0"; 76 clock-output-names = "iosc";
78 };
79
80 apb0_gates: clk@01f01428 {
81 compatible = "allwinner,sun8i-h3-apb0-gates-clk",
82 "allwinner,sun4i-a10-gates-clk";
83 reg = <0x01f01428 0x4>;
84 #clock-cells = <1>;
85 clocks = <&apb0>;
86 clock-indices = <0>, <1>;
87 clock-output-names = "apb0_pio", "apb0_ir";
88 };
89
90 ir_clk: ir_clk@01f01454 {
91 compatible = "allwinner,sun4i-a10-mod0-clk";
92 reg = <0x01f01454 0x4>;
93 #clock-cells = <0>;
94 clocks = <&osc32k>, <&osc24M>;
95 clock-output-names = "ir";
96 }; 77 };
97 }; 78 };
98 79
@@ -576,9 +557,12 @@
576 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 557 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
577 }; 558 };
578 559
579 apb0_reset: reset@01f014b0 { 560 r_ccu: clock@1f01400 {
580 reg = <0x01f014b0 0x4>; 561 compatible = "allwinner,sun50i-a64-r-ccu";
581 compatible = "allwinner,sun6i-a31-clock-reset"; 562 reg = <0x01f01400 0x100>;
563 clocks = <&osc24M>, <&osc32k>, <&iosc>;
564 clock-names = "hosc", "losc", "iosc";
565 #clock-cells = <1>;
582 #reset-cells = <1>; 566 #reset-cells = <1>;
583 }; 567 };
584 568
@@ -589,9 +573,9 @@
589 573
590 ir: ir@01f02000 { 574 ir: ir@01f02000 {
591 compatible = "allwinner,sun5i-a13-ir"; 575 compatible = "allwinner,sun5i-a13-ir";
592 clocks = <&apb0_gates 1>, <&ir_clk>; 576 clocks = <&r_ccu 4>, <&r_ccu 11>;
593 clock-names = "apb", "ir"; 577 clock-names = "apb", "ir";
594 resets = <&apb0_reset 1>; 578 resets = <&r_ccu 0>;
595 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 579 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
596 reg = <0x01f02000 0x40>; 580 reg = <0x01f02000 0x40>;
597 status = "disabled"; 581 status = "disabled";
@@ -601,9 +585,8 @@
601 compatible = "allwinner,sun8i-h3-r-pinctrl"; 585 compatible = "allwinner,sun8i-h3-r-pinctrl";
602 reg = <0x01f02c00 0x400>; 586 reg = <0x01f02c00 0x400>;
603 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 587 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
604 clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>; 588 clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>;
605 clock-names = "apb", "hosc", "losc"; 589 clock-names = "apb", "hosc", "losc";
606 resets = <&apb0_reset 0>;
607 gpio-controller; 590 gpio-controller;
608 #gpio-cells = <3>; 591 #gpio-cells = <3>;
609 interrupt-controller; 592 interrupt-controller;
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index bc6f342be59f..244e8b7565f9 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -1,5 +1,6 @@
1dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-bananapi-m64.dtb 1dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-bananapi-m64.dtb
2dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb 2dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
3dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
3 4
4always := $(dtb-y) 5always := $(dtb-y)
5subdir-y := $(dts-dirs) 6subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0565779e66fa..c7f669f5884f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -98,6 +98,14 @@
98 clock-output-names = "osc32k"; 98 clock-output-names = "osc32k";
99 }; 99 };
100 100
101 iosc: internal-osc-clk {
102 #clock-cells = <0>;
103 compatible = "fixed-clock";
104 clock-frequency = <16000000>;
105 clock-accuracy = <300000000>;
106 clock-output-names = "iosc";
107 };
108
101 psci { 109 psci {
102 compatible = "arm,psci-0.2"; 110 compatible = "arm,psci-0.2";
103 method = "smc"; 111 method = "smc";
@@ -394,5 +402,26 @@
394 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 402 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
395 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 403 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
396 }; 404 };
405
406 r_ccu: clock@1f01400 {
407 compatible = "allwinner,sun50i-a64-r-ccu";
408 reg = <0x01f01400 0x100>;
409 clocks = <&osc24M>, <&osc32k>, <&iosc>;
410 clock-names = "hosc", "losc", "iosc";
411 #clock-cells = <1>;
412 #reset-cells = <1>;
413 };
414
415 r_pio: pinctrl@01f02c00 {
416 compatible = "allwinner,sun50i-a64-r-pinctrl";
417 reg = <0x01f02c00 0x400>;
418 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
419 clocks = <&r_ccu 3>, <&osc24M>, <&osc32k>;
420 clock-names = "apb", "hosc", "losc";
421 gpio-controller;
422 #gpio-cells = <3>;
423 interrupt-controller;
424 #interrupt-cells = <3>;
425 };
397 }; 426 };
398}; 427};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
new file mode 100644
index 000000000000..dfecc17dcc92
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -0,0 +1,188 @@
1/*
2 * Copyright (C) 2016 ARM Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44#include "sun50i-h5.dtsi"
45
46#include <dt-bindings/gpio/gpio.h>
47#include <dt-bindings/input/input.h>
48#include <dt-bindings/pinctrl/sun4i-a10.h>
49
50/ {
51 model = "Xunlong Orange Pi PC 2";
52 compatible = "xunlong,orangepi-pc2", "allwinner,sun50i-h5";
53
54 reg_vcc3v3: vcc3v3 {
55 compatible = "regulator-fixed";
56 regulator-name = "vcc3v3";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
59 };
60
61 aliases {
62 serial0 = &uart0;
63 };
64
65 chosen {
66 stdout-path = "serial0:115200n8";
67 };
68
69 leds {
70 compatible = "gpio-leds";
71
72 pwr {
73 label = "orangepi:green:pwr";
74 gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
75 default-state = "on";
76 };
77
78 status {
79 label = "orangepi:red:status";
80 gpios = <&pio 0 20 GPIO_ACTIVE_HIGH>;
81 };
82 };
83
84 r-gpio-keys {
85 compatible = "gpio-keys";
86
87 sw4 {
88 label = "sw4";
89 linux,code = <BTN_0>;
90 gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
91 };
92 };
93
94 reg_usb0_vbus: usb0-vbus {
95 compatible = "regulator-fixed";
96 regulator-name = "usb0-vbus";
97 regulator-min-microvolt = <5000000>;
98 regulator-max-microvolt = <5000000>;
99 enable-active-high;
100 gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
101 status = "okay";
102 };
103};
104
105&codec {
106 allwinner,audio-routing =
107 "Line Out", "LINEOUT",
108 "MIC1", "Mic",
109 "Mic", "MBIAS";
110 status = "okay";
111};
112
113&ehci0 {
114 status = "okay";
115};
116
117&ehci1 {
118 status = "okay";
119};
120
121&ehci2 {
122 status = "okay";
123};
124
125&ehci3 {
126 status = "okay";
127};
128
129&ir {
130 pinctrl-names = "default";
131 pinctrl-0 = <&ir_pins_a>;
132 status = "okay";
133};
134
135&mmc0 {
136 pinctrl-names = "default";
137 pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
138 vmmc-supply = <&reg_vcc3v3>;
139 bus-width = <4>;
140 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
141 status = "okay";
142};
143
144&ohci0 {
145 status = "okay";
146};
147
148&ohci1 {
149 status = "okay";
150};
151
152&ohci2 {
153 status = "okay";
154};
155
156&ohci3 {
157 status = "okay";
158};
159
160&uart0 {
161 pinctrl-names = "default";
162 pinctrl-0 = <&uart0_pins_a>;
163 status = "okay";
164};
165
166&uart1 {
167 pinctrl-names = "default";
168 pinctrl-0 = <&uart1_pins>;
169 status = "disabled";
170};
171
172&uart2 {
173 pinctrl-names = "default";
174 pinctrl-0 = <&uart2_pins>;
175 status = "disabled";
176};
177
178&usb_otg {
179 dr_mode = "otg";
180 status = "okay";
181};
182
183&usbphy {
184 /* USB Type-A ports' VBUS is always on */
185 usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
186 usb0_vbus-supply = <&reg_usb0_vbus>;
187 status = "okay";
188};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
new file mode 100644
index 000000000000..4d314a253fd9
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -0,0 +1,124 @@
1/*
2 * Copyright (C) 2016 ARM Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#include "sunxi-h3-h5.dtsi"
44
45/ {
46 cpus {
47 #address-cells = <1>;
48 #size-cells = <0>;
49
50 cpu@0 {
51 compatible = "arm,cortex-a53", "arm,armv8";
52 device_type = "cpu";
53 reg = <0>;
54 enable-method = "psci";
55 };
56
57 cpu@1 {
58 compatible = "arm,cortex-a53", "arm,armv8";
59 device_type = "cpu";
60 reg = <1>;
61 enable-method = "psci";
62 };
63
64 cpu@2 {
65 compatible = "arm,cortex-a53", "arm,armv8";
66 device_type = "cpu";
67 reg = <2>;
68 enable-method = "psci";
69 };
70
71 cpu@3 {
72 compatible = "arm,cortex-a53", "arm,armv8";
73 device_type = "cpu";
74 reg = <3>;
75 enable-method = "psci";
76 };
77 };
78
79 psci {
80 compatible = "arm,psci-0.2";
81 method = "smc";
82 };
83
84 timer {
85 compatible = "arm,armv8-timer";
86 interrupts = <GIC_PPI 13
87 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
88 <GIC_PPI 14
89 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
90 <GIC_PPI 11
91 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
92 <GIC_PPI 10
93 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
94 };
95};
96
97&ccu {
98 compatible = "allwinner,sun50i-h5-ccu";
99};
100
101&mmc0 {
102 compatible = "allwinner,sun50i-h5-mmc",
103 "allwinner,sun50i-a64-mmc";
104 clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
105 clock-names = "ahb", "mmc";
106};
107
108&mmc1 {
109 compatible = "allwinner,sun50i-h5-mmc",
110 "allwinner,sun50i-a64-mmc";
111 clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
112 clock-names = "ahb", "mmc";
113};
114
115&mmc2 {
116 compatible = "allwinner,sun50i-h5-emmc",
117 "allwinner,sun50i-a64-emmc";
118 clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
119 clock-names = "ahb", "mmc";
120};
121
122&pio {
123 compatible = "allwinner,sun50i-h5-pinctrl";
124};
diff --git a/arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi b/arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi
new file mode 120000
index 000000000000..036f01dc2b9b
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sunxi-h3-h5.dtsi
@@ -0,0 +1 @@
../../../../arm/boot/dts/sunxi-h3-h5.dtsi \ No newline at end of file
diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile
index 3f94bce33b7f..b9ad2db7398b 100644
--- a/arch/arm64/boot/dts/amlogic/Makefile
+++ b/arch/arm64/boot/dts/amlogic/Makefile
@@ -7,9 +7,11 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-meta.dtb
7dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-telos.dtb 7dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-vega-s95-telos.dtb
8dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-hub.dtb 8dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-hub.dtb
9dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-play2.dtb 9dtb-$(CONFIG_ARCH_MESON) += meson-gxbb-wetek-play2.dtb
10dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-khadas-vim.dtb
10dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb 11dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-p212.dtb
11dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb 12dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p230.dtb
12dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb 13dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905d-p231.dtb
14dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-hwacom-amazetv.dtb
13dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb 15dtb-$(CONFIG_ARCH_MESON) += meson-gxl-s905x-nexbox-a95x.dtb
14dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb 16dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q200.dtb
15dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb 17dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
index 7a078bef04cd..a84e27622639 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi
@@ -98,6 +98,27 @@
98 clocks = <&wifi32k>; 98 clocks = <&wifi32k>;
99 clock-names = "ext_clock"; 99 clock-names = "ext_clock";
100 }; 100 };
101
102 cvbs-connector {
103 compatible = "composite-video-connector";
104
105 port {
106 cvbs_connector_in: endpoint {
107 remote-endpoint = <&cvbs_vdac_out>;
108 };
109 };
110 };
111
112 hdmi-connector {
113 compatible = "hdmi-connector";
114 type = "a";
115
116 port {
117 hdmi_connector_in: endpoint {
118 remote-endpoint = <&hdmi_tx_tmds_out>;
119 };
120 };
121 };
101}; 122};
102 123
103/* This UART is brought out to the DB9 connector */ 124/* This UART is brought out to the DB9 connector */
@@ -188,3 +209,21 @@
188&ethmac { 209&ethmac {
189 status = "okay"; 210 status = "okay";
190}; 211};
212
213&cvbs_vdac_port {
214 cvbs_vdac_out: endpoint {
215 remote-endpoint = <&cvbs_connector_in>;
216 };
217};
218
219&hdmi_tx {
220 status = "okay";
221 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
222 pinctrl-names = "default";
223};
224
225&hdmi_tx_tmds_port {
226 hdmi_tx_tmds_out: endpoint {
227 remote-endpoint = <&hdmi_connector_in>;
228 };
229};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
index 620495a43363..436b875060e7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi
@@ -71,6 +71,14 @@
71 reg = <0x0 0x10000000 0x0 0x200000>; 71 reg = <0x0 0x10000000 0x0 0x200000>;
72 no-map; 72 no-map;
73 }; 73 };
74
75 linux,cma {
76 compatible = "shared-dma-pool";
77 reusable;
78 size = <0x0 0xbc00000>;
79 alignment = <0x0 0x400000>;
80 linux,cma-default;
81 };
74 }; 82 };
75 83
76 cpus { 84 cpus {
@@ -233,7 +241,7 @@
233 }; 241 };
234 242
235 i2c_A: i2c@8500 { 243 i2c_A: i2c@8500 {
236 compatible = "amlogic,meson-gxbb-i2c"; 244 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
237 reg = <0x0 0x08500 0x0 0x20>; 245 reg = <0x0 0x08500 0x0 0x20>;
238 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>; 246 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
239 #address-cells = <1>; 247 #address-cells = <1>;
@@ -279,7 +287,7 @@
279 }; 287 };
280 288
281 i2c_B: i2c@87c0 { 289 i2c_B: i2c@87c0 {
282 compatible = "amlogic,meson-gxbb-i2c"; 290 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
283 reg = <0x0 0x087c0 0x0 0x20>; 291 reg = <0x0 0x087c0 0x0 0x20>;
284 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>; 292 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
285 #address-cells = <1>; 293 #address-cells = <1>;
@@ -288,7 +296,7 @@
288 }; 296 };
289 297
290 i2c_C: i2c@87e0 { 298 i2c_C: i2c@87e0 {
291 compatible = "amlogic,meson-gxbb-i2c"; 299 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
292 reg = <0x0 0x087e0 0x0 0x20>; 300 reg = <0x0 0x087e0 0x0 0x20>;
293 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>; 301 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
294 #address-cells = <1>; 302 #address-cells = <1>;
@@ -296,6 +304,14 @@
296 status = "disabled"; 304 status = "disabled";
297 }; 305 };
298 306
307 spifc: spi@8c80 {
308 compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc";
309 reg = <0x0 0x08c80 0x0 0x80>;
310 #address-cells = <1>;
311 #size-cells = <0>;
312 status = "disabled";
313 };
314
299 watchdog@98d0 { 315 watchdog@98d0 {
300 compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt"; 316 compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt";
301 reg = <0x0 0x098d0 0x0 0x10>; 317 reg = <0x0 0x098d0 0x0 0x10>;
@@ -317,7 +333,7 @@
317 }; 333 };
318 334
319 sram: sram@c8000000 { 335 sram: sram@c8000000 {
320 compatible = "amlogic,meson-gxbb-sram", "mmio-sram"; 336 compatible = "amlogic,meson-gx-sram", "amlogic,meson-gxbb-sram", "mmio-sram";
321 reg = <0x0 0xc8000000 0x0 0x14000>; 337 reg = <0x0 0xc8000000 0x0 0x14000>;
322 338
323 #address-cells = <1>; 339 #address-cells = <1>;
@@ -325,12 +341,12 @@
325 ranges = <0 0x0 0xc8000000 0x14000>; 341 ranges = <0 0x0 0xc8000000 0x14000>;
326 342
327 cpu_scp_lpri: scp-shmem@0 { 343 cpu_scp_lpri: scp-shmem@0 {
328 compatible = "amlogic,meson-gxbb-scp-shmem"; 344 compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
329 reg = <0x13000 0x400>; 345 reg = <0x13000 0x400>;
330 }; 346 };
331 347
332 cpu_scp_hpri: scp-shmem@200 { 348 cpu_scp_hpri: scp-shmem@200 {
333 compatible = "amlogic,meson-gxbb-scp-shmem"; 349 compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
334 reg = <0x13400 0x400>; 350 reg = <0x13400 0x400>;
335 }; 351 };
336 }; 352 };
@@ -342,6 +358,13 @@
342 #size-cells = <2>; 358 #size-cells = <2>;
343 ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>; 359 ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
344 360
361 clkc_AO: clock-controller@040 {
362 compatible = "amlogic,gx-aoclkc", "amlogic,gxbb-aoclkc";
363 reg = <0x0 0x00040 0x0 0x4>;
364 #clock-cells = <1>;
365 #reset-cells = <1>;
366 };
367
345 uart_AO: serial@4c0 { 368 uart_AO: serial@4c0 {
346 compatible = "amlogic,meson-uart"; 369 compatible = "amlogic,meson-uart";
347 reg = <0x0 0x004c0 0x0 0x14>; 370 reg = <0x0 0x004c0 0x0 0x14>;
@@ -358,6 +381,15 @@
358 status = "disabled"; 381 status = "disabled";
359 }; 382 };
360 383
384 i2c_AO: i2c@500 {
385 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
386 reg = <0x0 0x500 0x0 0x20>;
387 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
388 #address-cells = <1>;
389 #size-cells = <0>;
390 status = "disabled";
391 };
392
361 pwm_AO_ab: pwm@550 { 393 pwm_AO_ab: pwm@550 {
362 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm"; 394 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
363 reg = <0x0 0x00550 0x0 0x10>; 395 reg = <0x0 0x00550 0x0 0x10>;
@@ -366,7 +398,7 @@
366 }; 398 };
367 399
368 ir: ir@580 { 400 ir: ir@580 {
369 compatible = "amlogic,meson-gxbb-ir"; 401 compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
370 reg = <0x0 0x00580 0x0 0x40>; 402 reg = <0x0 0x00580 0x0 0x40>;
371 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>; 403 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
372 status = "disabled"; 404 status = "disabled";
@@ -386,7 +418,6 @@
386 }; 418 };
387 }; 419 };
388 420
389
390 hiubus: hiubus@c883c000 { 421 hiubus: hiubus@c883c000 {
391 compatible = "simple-bus"; 422 compatible = "simple-bus";
392 reg = <0x0 0xc883c000 0x0 0x2000>; 423 reg = <0x0 0xc883c000 0x0 0x2000>;
@@ -410,7 +441,6 @@
410 0x0 0xc8834540 0x0 0x4>; 441 0x0 0xc8834540 0x0 0x4>;
411 interrupts = <0 8 1>; 442 interrupts = <0 8 1>;
412 interrupt-names = "macirq"; 443 interrupt-names = "macirq";
413 phy-mode = "rgmii";
414 status = "disabled"; 444 status = "disabled";
415 }; 445 };
416 446
@@ -457,6 +487,38 @@
457 cvbs_vdac_port: port@0 { 487 cvbs_vdac_port: port@0 {
458 reg = <0>; 488 reg = <0>;
459 }; 489 };
490
491 /* HDMI-TX output port */
492 hdmi_tx_port: port@1 {
493 reg = <1>;
494
495 hdmi_tx_out: endpoint {
496 remote-endpoint = <&hdmi_tx_in>;
497 };
498 };
499 };
500
501 hdmi_tx: hdmi-tx@c883a000 {
502 compatible = "amlogic,meson-gx-dw-hdmi";
503 reg = <0x0 0xc883a000 0x0 0x1c>;
504 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
505 #address-cells = <1>;
506 #size-cells = <0>;
507 status = "disabled";
508
509 /* VPU VENC Input */
510 hdmi_tx_venc_port: port@0 {
511 reg = <0>;
512
513 hdmi_tx_in: endpoint {
514 remote-endpoint = <&hdmi_tx_out>;
515 };
516 };
517
518 /* TMDS Output */
519 hdmi_tx_tmds_port: port@1 {
520 reg = <1>;
521 };
460 }; 522 };
461 }; 523 };
462}; 524};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
index 4cbd626a9e88..87198eafb04b 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts
@@ -152,6 +152,17 @@
152 }; 152 };
153 }; 153 };
154 }; 154 };
155
156 hdmi-connector {
157 compatible = "hdmi-connector";
158 type = "a";
159
160 port {
161 hdmi_connector_in: endpoint {
162 remote-endpoint = <&hdmi_tx_tmds_out>;
163 };
164 };
165 };
155}; 166};
156 167
157&uart_AO { 168&uart_AO {
@@ -164,7 +175,24 @@
164 status = "okay"; 175 status = "okay";
165 pinctrl-0 = <&eth_rmii_pins>; 176 pinctrl-0 = <&eth_rmii_pins>;
166 pinctrl-names = "default"; 177 pinctrl-names = "default";
178
179 phy-handle = <&eth_phy0>;
167 phy-mode = "rmii"; 180 phy-mode = "rmii";
181
182 snps,reset-gpio = <&gpio GPIOZ_14 0>;
183 snps,reset-delays-us = <0 10000 1000000>;
184 snps,reset-active-low;
185
186 mdio {
187 compatible = "snps,dwmac-mdio";
188 #address-cells = <1>;
189 #size-cells = <0>;
190
191 eth_phy0: ethernet-phy@0 {
192 /* IC Plus IP101GR (0x02430c54) */
193 reg = <0>;
194 };
195 };
168}; 196};
169 197
170&ir { 198&ir {
@@ -245,3 +273,15 @@
245 remote-endpoint = <&cvbs_connector_in>; 273 remote-endpoint = <&cvbs_connector_in>;
246 }; 274 };
247}; 275};
276
277&hdmi_tx {
278 status = "okay";
279 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
280 pinctrl-names = "default";
281};
282
283&hdmi_tx_tmds_port {
284 hdmi_tx_tmds_out: endpoint {
285 remote-endpoint = <&hdmi_connector_in>;
286 };
287};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
index c59403adb387..54a9c6a6b392 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts
@@ -96,7 +96,7 @@
96 regulator-min-microvolt = <3300000>; 96 regulator-min-microvolt = <3300000>;
97 regulator-max-microvolt = <3300000>; 97 regulator-max-microvolt = <3300000>;
98 98
99 gpio = <&gpio_ao GPIOAO_12 GPIO_ACTIVE_HIGH>; 99 gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
100 enable-active-high; 100 enable-active-high;
101 }; 101 };
102 102
@@ -152,6 +152,13 @@
152 pinctrl-0 = <&eth_rgmii_pins>; 152 pinctrl-0 = <&eth_rgmii_pins>;
153 pinctrl-names = "default"; 153 pinctrl-names = "default";
154 phy-handle = <&eth_phy0>; 154 phy-handle = <&eth_phy0>;
155 phy-mode = "rgmii";
156
157 snps,reset-gpio = <&gpio GPIOZ_14 0>;
158 snps,reset-delays-us = <0 10000 1000000>;
159 snps,reset-active-low;
160
161 amlogic,tx-delay-ns = <2>;
155 162
156 mdio { 163 mdio {
157 compatible = "snps,dwmac-mdio"; 164 compatible = "snps,dwmac-mdio";
@@ -165,6 +172,57 @@
165 }; 172 };
166}; 173};
167 174
175&pinctrl_aobus {
176 gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
177 "USB HUB nRESET", "USB OTG Power En",
178 "J7 Header Pin2", "IR In", "J7 Header Pin4",
179 "J7 Header Pin6", "J7 Header Pin5", "J7 Header Pin7",
180 "HDMI CEC", "SYS LED";
181};
182
183&pinctrl_periphs {
184 gpio-line-names = /* Bank GPIOZ */
185 "Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
186 "Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
187 "Eth RX D3", "Eth RGMII TX Clk", "Eth TX En",
188 "Eth TX D0", "Eth TX D1", "Eth TX D2", "Eth TX D3",
189 "Eth PHY nRESET", "Eth PHY Intc",
190 /* Bank GPIOH */
191 "HDMI HPD", "HDMI DDC SDA", "HDMI DDC SCL", "",
192 /* Bank BOOT */
193 "eMMC D0", "eMMC D1", "eMMC D2", "eMMC D3", "eMMC D4",
194 "eMMC D5", "eMMC D6", "eMMC D7", "eMMC Clk",
195 "eMMC Reset", "eMMC CMD",
196 "", "", "", "", "", "", "",
197 /* Bank CARD */
198 "SDCard D1", "SDCard D0", "SDCard CLK", "SDCard CMD",
199 "SDCard D3", "SDCard D2", "SDCard Det",
200 /* Bank GPIODV */
201 "", "", "", "", "", "", "", "", "", "", "", "", "",
202 "", "", "", "", "", "", "", "", "", "", "",
203 "I2C A SDA", "I2C A SCK", "I2C B SDA", "I2C B SCK",
204 "PWM D", "PWM B",
205 /* Bank GPIOY */
206 "Revision Bit0", "Revision Bit1", "",
207 "J2 Header Pin35", "", "", "", "J2 Header Pin36",
208 "J2 Header Pin31", "", "", "", "TF VDD En",
209 "J2 Header Pin32", "J2 Header Pin26", "", "",
210 /* Bank GPIOX */
211 "J2 Header Pin29", "J2 Header Pin24",
212 "J2 Header Pin23", "J2 Header Pin22",
213 "J2 Header Pin21", "J2 Header Pin18",
214 "J2 Header Pin33", "J2 Header Pin19",
215 "J2 Header Pin16", "J2 Header Pin15",
216 "J2 Header Pin12", "J2 Header Pin13",
217 "J2 Header Pin8", "J2 Header Pin10",
218 "", "", "", "", "",
219 "J2 Header Pin11", "", "J2 Header Pin7",
220 /* Bank GPIOCLK */
221 "", "", "", "",
222 /* GPIO_TEST_N */
223 "";
224};
225
168&ir { 226&ir {
169 status = "okay"; 227 status = "okay";
170 pinctrl-0 = <&remote_input_ao_pins>; 228 pinctrl-0 = <&remote_input_ao_pins>;
@@ -177,6 +235,21 @@
177 pinctrl-names = "default"; 235 pinctrl-names = "default";
178}; 236};
179 237
238&gpio_ao {
239 /*
240 * WARNING: The USB Hub on the Odroid-C2 needs a reset signal
241 * to be turned high in order to be detected by the USB Controller
242 * This signal should be handled by a USB specific power sequence
243 * in order to reset the Hub when USB bus is powered down.
244 */
245 usb-hub {
246 gpio-hog;
247 gpios = <GPIOAO_4 GPIO_ACTIVE_HIGH>;
248 output-high;
249 line-name = "usb-hub-reset";
250 };
251};
252
180&usb0_phy { 253&usb0_phy {
181 status = "okay"; 254 status = "okay";
182 phy-supply = <&usb_otg_pwr>; 255 phy-supply = <&usb_otg_pwr>;
@@ -194,6 +267,11 @@
194 status = "okay"; 267 status = "okay";
195}; 268};
196 269
270&saradc {
271 status = "okay";
272 vref-supply = <&vcc1v8>;
273};
274
197/* SD */ 275/* SD */
198&sd_emmc_b { 276&sd_emmc_b {
199 status = "okay"; 277 status = "okay";
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
index fc0e86cb4cde..2054a474e0a9 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p200.dts
@@ -96,6 +96,31 @@
96 }; 96 };
97}; 97};
98 98
99&ethmac {
100 status = "okay";
101 pinctrl-0 = <&eth_rgmii_pins>;
102 pinctrl-names = "default";
103 phy-handle = <&eth_phy0>;
104 phy-mode = "rgmii";
105
106 amlogic,tx-delay-ns = <2>;
107
108 snps,reset-gpio = <&gpio GPIOZ_14 0>;
109 snps,reset-delays-us = <0 10000 1000000>;
110 snps,reset-active-low;
111
112 mdio {
113 compatible = "snps,dwmac-mdio";
114 #address-cells = <1>;
115 #size-cells = <0>;
116
117 eth_phy0: ethernet-phy@3 {
118 /* Micrel KSZ9031 (0x00221620) */
119 reg = <3>;
120 };
121 };
122};
123
99&i2c_B { 124&i2c_B {
100 status = "okay"; 125 status = "okay";
101 pinctrl-0 = <&i2c_b_pins>; 126 pinctrl-0 = <&i2c_b_pins>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
index 39bb037a3e47..ae3194663d64 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p201.dts
@@ -50,3 +50,14 @@
50 compatible = "amlogic,p201", "amlogic,meson-gxbb"; 50 compatible = "amlogic,p201", "amlogic,meson-gxbb";
51 model = "Amlogic Meson GXBB P201 Development Board"; 51 model = "Amlogic Meson GXBB P201 Development Board";
52}; 52};
53
54&ethmac {
55 status = "okay";
56 pinctrl-0 = <&eth_rmii_pins>;
57 pinctrl-names = "default";
58 phy-mode = "rmii";
59
60 snps,reset-gpio = <&gpio GPIOZ_14 0>;
61 snps,reset-delays-us = <0 10000 1000000>;
62 snps,reset-active-low;
63};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
index 4a96e0f6f926..3c6c0b7f4187 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi
@@ -135,6 +135,17 @@
135 }; 135 };
136 }; 136 };
137 }; 137 };
138
139 hdmi-connector {
140 compatible = "hdmi-connector";
141 type = "a";
142
143 port {
144 hdmi_connector_in: endpoint {
145 remote-endpoint = <&hdmi_tx_tmds_out>;
146 };
147 };
148 };
138}; 149};
139 150
140/* This UART is brought out to the DB9 connector */ 151/* This UART is brought out to the DB9 connector */
@@ -144,12 +155,6 @@
144 pinctrl-names = "default"; 155 pinctrl-names = "default";
145}; 156};
146 157
147&ethmac {
148 status = "okay";
149 pinctrl-0 = <&eth_rgmii_pins>;
150 pinctrl-names = "default";
151};
152
153&ir { 158&ir {
154 status = "okay"; 159 status = "okay";
155 pinctrl-0 = <&remote_input_ao_pins>; 160 pinctrl-0 = <&remote_input_ao_pins>;
@@ -250,3 +255,15 @@
250 remote-endpoint = <&cvbs_connector_in>; 255 remote-endpoint = <&cvbs_connector_in>;
251 }; 256 };
252}; 257};
258
259&hdmi_tx {
260 status = "okay";
261 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
262 pinctrl-names = "default";
263};
264
265&hdmi_tx_tmds_port {
266 hdmi_tx_tmds_out: endpoint {
267 remote-endpoint = <&hdmi_connector_in>;
268 };
269};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
index 86709929fd20..aefa66dff72d 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-vega-s95.dtsi
@@ -115,7 +115,6 @@
115 status = "okay"; 115 status = "okay";
116 pinctrl-0 = <&uart_ao_a_pins>; 116 pinctrl-0 = <&uart_ao_a_pins>;
117 pinctrl-names = "default"; 117 pinctrl-names = "default";
118
119}; 118};
120 119
121&ir { 120&ir {
@@ -128,6 +127,26 @@
128 status = "okay"; 127 status = "okay";
129 pinctrl-0 = <&eth_rgmii_pins>; 128 pinctrl-0 = <&eth_rgmii_pins>;
130 pinctrl-names = "default"; 129 pinctrl-names = "default";
130
131 phy-handle = <&eth_phy0>;
132 phy-mode = "rgmii";
133
134 amlogic,tx-delay-ns = <2>;
135
136 snps,reset-gpio = <&gpio GPIOZ_14 0>;
137 snps,reset-delays-us = <0 10000 1000000>;
138 snps,reset-active-low;
139
140 mdio {
141 compatible = "snps,dwmac-mdio";
142 #address-cells = <1>;
143 #size-cells = <0>;
144
145 eth_phy0: ethernet-phy@0 {
146 /* Realtek RTL8211F (0x001cc916) */
147 reg = <0>;
148 };
149 };
131}; 150};
132 151
133&usb0_phy { 152&usb0_phy {
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
index 56f855901262..f057fb48fee5 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-hub.dts
@@ -64,3 +64,29 @@
64 status = "disabled"; 64 status = "disabled";
65 }; 65 };
66}; 66};
67
68&ethmac {
69 status = "okay";
70 pinctrl-0 = <&eth_rgmii_pins>;
71 pinctrl-names = "default";
72
73 phy-handle = <&eth_phy0>;
74 phy-mode = "rgmii";
75
76 amlogic,tx-delay-ns = <2>;
77
78 snps,reset-gpio = <&gpio GPIOZ_14 0>;
79 snps,reset-delays-us = <0 10000 1000000>;
80 snps,reset-active-low;
81
82 mdio {
83 compatible = "snps,dwmac-mdio";
84 #address-cells = <1>;
85 #size-cells = <0>;
86
87 eth_phy0: ethernet-phy@0 {
88 /* Realtek RTL8211F (0x001cc916) */
89 reg = <0>;
90 };
91 };
92};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
index ea79fdd2c248..743acb5f5d06 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-wetek-play2.dts
@@ -87,6 +87,32 @@
87 }; 87 };
88}; 88};
89 89
90&ethmac {
91 status = "okay";
92 pinctrl-0 = <&eth_rgmii_pins>;
93 pinctrl-names = "default";
94
95 phy-handle = <&eth_phy0>;
96 phy-mode = "rgmii";
97
98 amlogic,tx-delay-ns = <2>;
99
100 snps,reset-gpio = <&gpio GPIOZ_14 0>;
101 snps,reset-delays-us = <0 10000 1000000>;
102 snps,reset-active-low;
103
104 mdio {
105 compatible = "snps,dwmac-mdio";
106 #address-cells = <1>;
107 #size-cells = <0>;
108
109 eth_phy0: ethernet-phy@0 {
110 /* Realtek RTL8211F (0x001cc916) */
111 reg = <0>;
112 };
113 };
114};
115
90&i2c_A { 116&i2c_A {
91 status = "okay"; 117 status = "okay";
92 pinctrl-0 = <&i2c_a_pins>; 118 pinctrl-0 = <&i2c_a_pins>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index a375cb21cc8b..86105a69690a 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -97,17 +97,6 @@
97 }; 97 };
98}; 98};
99 99
100&cbus {
101 spifc: spi@8c80 {
102 compatible = "amlogic,meson-gxbb-spifc";
103 reg = <0x0 0x08c80 0x0 0x80>;
104 #address-cells = <1>;
105 #size-cells = <0>;
106 clocks = <&clkc CLKID_SPI>;
107 status = "disabled";
108 };
109};
110
111&ethmac { 100&ethmac {
112 clocks = <&clkc CLKID_ETH>, 101 clocks = <&clkc CLKID_ETH>,
113 <&clkc CLKID_FCLK_DIV2>, 102 <&clkc CLKID_FCLK_DIV2>,
@@ -129,6 +118,7 @@
129 reg-names = "mux", "pull", "gpio"; 118 reg-names = "mux", "pull", "gpio";
130 gpio-controller; 119 gpio-controller;
131 #gpio-cells = <2>; 120 #gpio-cells = <2>;
121 gpio-ranges = <&pinctrl_aobus 0 0 14>;
132 }; 122 };
133 123
134 uart_ao_a_pins: uart_ao_a { 124 uart_ao_a_pins: uart_ao_a {
@@ -203,30 +193,62 @@
203 function = "pwm_ao_b"; 193 function = "pwm_ao_b";
204 }; 194 };
205 }; 195 };
206 };
207 196
208 clkc_AO: clock-controller@040 { 197 i2s_am_clk_pins: i2s_am_clk {
209 compatible = "amlogic,gxbb-aoclkc"; 198 mux {
210 reg = <0x0 0x00040 0x0 0x4>; 199 groups = "i2s_am_clk";
211 #clock-cells = <1>; 200 function = "i2s_out_ao";
212 #reset-cells = <1>; 201 };
213 }; 202 };
214 203
215 pwm_ab_AO: pwm@550 { 204 i2s_out_ao_clk_pins: i2s_out_ao_clk {
216 compatible = "amlogic,meson-gxbb-pwm"; 205 mux {
217 reg = <0x0 0x0550 0x0 0x10>; 206 groups = "i2s_out_ao_clk";
218 #pwm-cells = <3>; 207 function = "i2s_out_ao";
219 status = "disabled"; 208 };
220 }; 209 };
221 210
222 i2c_AO: i2c@500 { 211 i2s_out_lr_clk_pins: i2s_out_lr_clk {
223 compatible = "amlogic,meson-gxbb-i2c"; 212 mux {
224 reg = <0x0 0x500 0x0 0x20>; 213 groups = "i2s_out_lr_clk";
225 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>; 214 function = "i2s_out_ao";
226 clocks = <&clkc CLKID_AO_I2C>; 215 };
227 #address-cells = <1>; 216 };
228 #size-cells = <0>; 217
229 status = "disabled"; 218 i2s_out_ch01_ao_pins: i2s_out_ch01_ao {
219 mux {
220 groups = "i2s_out_ch01_ao";
221 function = "i2s_out_ao";
222 };
223 };
224
225 i2s_out_ch23_ao_pins: i2s_out_ch23_ao {
226 mux {
227 groups = "i2s_out_ch23_ao";
228 function = "i2s_out_ao";
229 };
230 };
231
232 i2s_out_ch45_ao_pins: i2s_out_ch45_ao {
233 mux {
234 groups = "i2s_out_ch45_ao";
235 function = "i2s_out_ao";
236 };
237 };
238
239 spdif_out_ao_6_pins: spdif_out_ao_6 {
240 mux {
241 groups = "spdif_out_ao_6";
242 function = "spdif_out_ao";
243 };
244 };
245
246 spdif_out_ao_13_pins: spdif_out_ao_13 {
247 mux {
248 groups = "spdif_out_ao_13";
249 function = "spdif_out_ao";
250 };
251 };
230 }; 252 };
231}; 253};
232 254
@@ -245,6 +267,7 @@
245 reg-names = "mux", "pull", "pull-enable", "gpio"; 267 reg-names = "mux", "pull", "pull-enable", "gpio";
246 gpio-controller; 268 gpio-controller;
247 #gpio-cells = <2>; 269 #gpio-cells = <2>;
270 gpio-ranges = <&pinctrl_periphs 0 14 120>;
248 }; 271 };
249 272
250 emmc_pins: emmc { 273 emmc_pins: emmc {
@@ -467,6 +490,34 @@
467 function = "hdmi_i2c"; 490 function = "hdmi_i2c";
468 }; 491 };
469 }; 492 };
493
494 i2sout_ch23_y_pins: i2sout_ch23_y {
495 mux {
496 groups = "i2sout_ch23_y";
497 function = "i2s_out";
498 };
499 };
500
501 i2sout_ch45_y_pins: i2sout_ch45_y {
502 mux {
503 groups = "i2sout_ch45_y";
504 function = "i2s_out";
505 };
506 };
507
508 i2sout_ch67_y_pins: i2sout_ch67_y {
509 mux {
510 groups = "i2sout_ch67_y";
511 function = "i2s_out";
512 };
513 };
514
515 spdif_out_y_pins: spdif_out_y {
516 mux {
517 groups = "spdif_out_y";
518 function = "spdif_out";
519 };
520 };
470 }; 521 };
471}; 522};
472 523
@@ -478,10 +529,51 @@
478 }; 529 };
479}; 530};
480 531
532&apb {
533 mali: gpu@c0000 {
534 compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
535 reg = <0x0 0xc0000 0x0 0x40000>;
536 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
537 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
538 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
539 <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
540 <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
541 <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
542 <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
543 <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
544 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
545 <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
546 interrupt-names = "gp", "gpmmu", "pp", "pmu",
547 "pp0", "ppmmu0", "pp1", "ppmmu1",
548 "pp2", "ppmmu2";
549 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
550 clock-names = "bus", "core";
551
552 /*
553 * Mali clocking is provided by two identical clock paths
554 * MALI_0 and MALI_1 muxed to a single clock by a glitch
555 * free mux to safely change frequency while running.
556 */
557 assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
558 <&clkc CLKID_MALI_0>,
559 <&clkc CLKID_MALI>; /* Glitch free mux */
560 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
561 <0>, /* Do Nothing */
562 <&clkc CLKID_MALI_0>;
563 assigned-clock-rates = <0>, /* Do Nothing */
564 <666666666>,
565 <0>; /* Do Nothing */
566 };
567};
568
481&i2c_A { 569&i2c_A {
482 clocks = <&clkc CLKID_I2C>; 570 clocks = <&clkc CLKID_I2C>;
483}; 571};
484 572
573&i2c_AO {
574 clocks = <&clkc CLKID_AO_I2C>;
575};
576
485&i2c_B { 577&i2c_B {
486 clocks = <&clkc CLKID_I2C>; 578 clocks = <&clkc CLKID_I2C>;
487}; 579};
@@ -521,6 +613,10 @@
521 clock-names = "core", "clkin0", "clkin1"; 613 clock-names = "core", "clkin0", "clkin1";
522}; 614};
523 615
616&spifc {
617 clocks = <&clkc CLKID_SPI>;
618};
619
524&vpu { 620&vpu {
525 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu"; 621 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
526}; 622};
@@ -529,3 +625,15 @@
529 clocks = <&clkc CLKID_RNG0>; 625 clocks = <&clkc CLKID_RNG0>;
530 clock-names = "core"; 626 clock-names = "core";
531}; 627};
628
629&hdmi_tx {
630 compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
631 resets = <&reset RESET_HDMITX_CAPB3>,
632 <&reset RESET_HDMI_SYSTEM_RESET>,
633 <&reset RESET_HDMI_TX>;
634 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
635 clocks = <&clkc CLKID_HDMI_PCLK>,
636 <&clkc CLKID_CLK81>,
637 <&clkc CLKID_GCLK_VENCI_INT0>;
638 clock-names = "isfr", "iahb", "venci";
639};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi
new file mode 100644
index 000000000000..f06cc234693b
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi
@@ -0,0 +1,43 @@
1/*
2 * Copyright (c) 2017 BayLibre SAS
3 * Author: Neil Armstrong <narmstrong@baylibre.com>
4 *
5 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 */
7
8&apb {
9 mali: gpu@c0000 {
10 compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
11 reg = <0x0 0xc0000 0x0 0x40000>;
12 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
13 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
14 <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
15 <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
16 <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
17 <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
18 <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
19 <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
20 <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
21 <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
22 interrupt-names = "gp", "gpmmu", "pp", "pmu",
23 "pp0", "ppmmu0", "pp1", "ppmmu1",
24 "pp2", "ppmmu2";
25 clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
26 clock-names = "bus", "core";
27
28 /*
29 * Mali clocking is provided by two identical clock paths
30 * MALI_0 and MALI_1 muxed to a single clock by a glitch
31 * free mux to safely change frequency while running.
32 */
33 assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
34 <&clkc CLKID_MALI_0>,
35 <&clkc CLKID_MALI>; /* Glitch free mux */
36 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
37 <0>, /* Do Nothing */
38 <&clkc CLKID_MALI_0>;
39 assigned-clock-rates = <0>, /* Do Nothing */
40 <666666666>,
41 <0>; /* Do Nothing */
42 };
43};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
index f66939cacd37..f9fbfdad8dde 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts
@@ -43,12 +43,47 @@
43 43
44/dts-v1/; 44/dts-v1/;
45 45
46#include <dt-bindings/input/input.h>
47
46#include "meson-gxl-s905d.dtsi" 48#include "meson-gxl-s905d.dtsi"
47#include "meson-gx-p23x-q20x.dtsi" 49#include "meson-gx-p23x-q20x.dtsi"
48 50
49/ { 51/ {
50 compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl"; 52 compatible = "amlogic,p230", "amlogic,s905d", "amlogic,meson-gxl";
51 model = "Amlogic Meson GXL (S905D) P230 Development Board"; 53 model = "Amlogic Meson GXL (S905D) P230 Development Board";
54
55 adc-keys {
56 compatible = "adc-keys";
57 io-channels = <&saradc 0>;
58 io-channel-names = "buttons";
59 keyup-threshold-microvolt = <1710000>;
60
61 button-function {
62 label = "Update";
63 linux,code = <KEY_VENDOR>;
64 press-threshold-microvolt = <10000>;
65 };
66 };
67
68 gpio-keys-polled {
69 compatible = "gpio-keys-polled";
70 #address-cells = <1>;
71 #size-cells = <0>;
72 poll-interval = <100>;
73
74 button@0 {
75 label = "power";
76 linux,code = <KEY_POWER>;
77 gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
78 };
79 };
80
81 vddio_ao18: regulator-vddio_ao18 {
82 compatible = "regulator-fixed";
83 regulator-name = "VDDIO_AO18";
84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <1800000>;
86 };
52}; 87};
53 88
54/* P230 has exclusive choice between internal or external PHY */ 89/* P230 has exclusive choice between internal or external PHY */
@@ -59,6 +94,8 @@
59 /* Select external PHY by default */ 94 /* Select external PHY by default */
60 phy-handle = <&external_phy>; 95 phy-handle = <&external_phy>;
61 96
97 amlogic,tx-delay-ns = <2>;
98
62 /* External PHY reset is shared with internal PHY Led signals */ 99 /* External PHY reset is shared with internal PHY Led signals */
63 snps,reset-gpio = <&gpio GPIOZ_14 0>; 100 snps,reset-gpio = <&gpio GPIOZ_14 0>;
64 snps,reset-delays-us = <0 10000 1000000>; 101 snps,reset-delays-us = <0 10000 1000000>;
@@ -75,3 +112,8 @@
75 max-speed = <1000>; 112 max-speed = <1000>;
76 }; 113 };
77}; 114};
115
116&saradc {
117 status = "okay";
118 vref-supply = <&vddio_ao18>;
119};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi
index 615308e55576..5a90e30c1006 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d.dtsi
@@ -42,6 +42,7 @@
42 */ 42 */
43 43
44#include "meson-gxl.dtsi" 44#include "meson-gxl.dtsi"
45#include "meson-gxl-mali.dtsi"
45 46
46/ { 47/ {
47 compatible = "amlogic,s905d", "amlogic,meson-gxl"; 48 compatible = "amlogic,s905d", "amlogic,meson-gxl";
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
new file mode 100644
index 000000000000..2a5804ce7f4b
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts
@@ -0,0 +1,164 @@
1/*
2 * Copyright (c) 2017 Carlo Caione
3 * Copyright (c) 2016 BayLibre, Inc.
4 * Author: Neil Armstrong <narmstrong@kernel.org>
5 *
6 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 */
8
9/dts-v1/;
10
11#include "meson-gxl-s905x.dtsi"
12
13/ {
14 compatible = "hwacom,amazetv", "amlogic,s905x", "amlogic,meson-gxl";
15 model = "Hwacom AmazeTV (S905X)";
16
17 aliases {
18 serial0 = &uart_AO;
19 };
20
21 chosen {
22 stdout-path = "serial0:115200n8";
23 };
24
25 memory@0 {
26 device_type = "memory";
27 reg = <0x0 0x0 0x0 0x80000000>;
28 };
29
30 vddio_card: gpio-regulator {
31 compatible = "regulator-gpio";
32
33 regulator-name = "VDDIO_CARD";
34 regulator-min-microvolt = <1800000>;
35 regulator-max-microvolt = <3300000>;
36
37 gpios = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
38 gpios-states = <1>;
39
40 /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */
41 states = <1800000 0
42 3300000 1>;
43 };
44
45 vddio_boot: regulator-vddio_boot {
46 compatible = "regulator-fixed";
47 regulator-name = "VDDIO_BOOT";
48 regulator-min-microvolt = <1800000>;
49 regulator-max-microvolt = <1800000>;
50 };
51
52 vddao_3v3: regulator-vddao_3v3 {
53 compatible = "regulator-fixed";
54 regulator-name = "VDDAO_3V3";
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
57 };
58
59 vcc_3v3: regulator-vcc_3v3 {
60 compatible = "regulator-fixed";
61 regulator-name = "VCC_3V3";
62 regulator-min-microvolt = <3300000>;
63 regulator-max-microvolt = <3300000>;
64 };
65
66 emmc_pwrseq: emmc-pwrseq {
67 compatible = "mmc-pwrseq-emmc";
68 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
69 };
70
71 wifi32k: wifi32k {
72 compatible = "pwm-clock";
73 #clock-cells = <0>;
74 clock-frequency = <32768>;
75 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
76 };
77
78 sdio_pwrseq: sdio-pwrseq {
79 compatible = "mmc-pwrseq-simple";
80 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
81 clocks = <&wifi32k>;
82 clock-names = "ext_clock";
83 };
84
85 cvbs-connector {
86 compatible = "composite-video-connector";
87
88 port {
89 cvbs_connector_in: endpoint {
90 remote-endpoint = <&cvbs_vdac_out>;
91 };
92 };
93 };
94};
95
96&cvbs_vdac_port {
97 cvbs_vdac_out: endpoint {
98 remote-endpoint = <&cvbs_connector_in>;
99 };
100};
101
102&ethmac {
103 status = "okay";
104 phy-mode = "rmii";
105 phy-handle = <&internal_phy>;
106};
107
108&ir {
109 status = "okay";
110 pinctrl-0 = <&remote_input_ao_pins>;
111 pinctrl-names = "default";
112};
113
114&pwm_ef {
115 status = "okay";
116 pinctrl-0 = <&pwm_e_pins>;
117 pinctrl-names = "default";
118 clocks = <&clkc CLKID_FCLK_DIV4>;
119 clock-names = "clkin0";
120};
121
122/* SD card */
123&sd_emmc_b {
124 status = "okay";
125 pinctrl-0 = <&sdcard_pins>;
126 pinctrl-names = "default";
127
128 bus-width = <4>;
129 cap-sd-highspeed;
130 max-frequency = <100000000>;
131 disable-wp;
132
133 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
134 cd-inverted;
135
136 vmmc-supply = <&vddao_3v3>;
137 vqmmc-supply = <&vddio_card>;
138};
139
140/* eMMC */
141&sd_emmc_c {
142 status = "okay";
143 pinctrl-0 = <&emmc_pins>;
144 pinctrl-names = "default";
145
146 bus-width = <8>;
147 cap-sd-highspeed;
148 cap-mmc-highspeed;
149 max-frequency = <100000000>;
150 non-removable;
151 disable-wp;
152 mmc-ddr-1_8v;
153 mmc-hs200-1_8v;
154
155 mmc-pwrseq = <&emmc_pwrseq>;
156 vmmc-supply = <&vcc_3v3>;
157 vqmmc-supply = <&vddio_boot>;
158};
159
160&uart_AO {
161 status = "okay";
162 pinctrl-0 = <&uart_ao_a_pins>;
163 pinctrl-names = "default";
164};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
new file mode 100644
index 000000000000..3c8b0b51ef27
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-khadas-vim.dts
@@ -0,0 +1,114 @@
1/*
2 * Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
3 *
4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/input/input.h>
10
11#include "meson-gxl-s905x-p212.dtsi"
12
13/ {
14 compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl";
15 model = "Khadas VIM";
16
17 adc-keys {
18 compatible = "adc-keys";
19 io-channels = <&saradc 0>;
20 io-channel-names = "buttons";
21 keyup-threshold-microvolt = <1710000>;
22
23 button-function {
24 label = "Function";
25 linux,code = <KEY_FN>;
26 press-threshold-microvolt = <10000>;
27 };
28 };
29
30 aliases {
31 serial2 = &uart_AO_B;
32 };
33
34 gpio-keys-polled {
35 compatible = "gpio-keys-polled";
36 #address-cells = <1>;
37 #size-cells = <0>;
38 poll-interval = <100>;
39
40 button@0 {
41 label = "power";
42 linux,code = <KEY_POWER>;
43 gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
44 };
45 };
46
47 pwmleds {
48 compatible = "pwm-leds";
49
50 power {
51 label = "vim:red:power";
52 pwms = <&pwm_AO_ab 1 7812500 0>;
53 max-brightness = <255>;
54 linux,default-trigger = "default-on";
55 };
56 };
57};
58
59&i2c_A {
60 status = "okay";
61 pinctrl-0 = <&i2c_a_pins>;
62 pinctrl-names = "default";
63};
64
65&i2c_B {
66 status = "okay";
67 pinctrl-0 = <&i2c_b_pins>;
68 pinctrl-names = "default";
69
70 rtc: rtc@51 {
71 /* has to be enabled manually when a battery is connected: */
72 status = "disabled";
73 compatible = "haoyu,hym8563";
74 reg = <0x51>;
75 #clock-cells = <0>;
76 clock-frequency = <32768>;
77 clock-output-names = "xin32k";
78 };
79};
80
81&ir {
82 linux,rc-map-name = "rc-geekbox";
83};
84
85&pwm_AO_ab {
86 status = "okay";
87 pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
88 pinctrl-names = "default";
89 clocks = <&clkc CLKID_FCLK_DIV4>;
90 clock-names = "clkin0";
91};
92
93&pwm_ef {
94 pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
95};
96
97&sd_emmc_a {
98 brcmf: bcrmf@1 {
99 reg = <1>;
100 compatible = "brcm,bcm4329-fmac";
101 };
102};
103
104/* This is brought out on the Linux_RX (18) and Linux_TX (19) pins: */
105&uart_AO {
106 status = "okay";
107};
108
109/* This is brought out on the UART_RX_AO_B (15) and UART_TX_AO_B (16) pins: */
110&uart_AO_B {
111 status = "okay";
112 pinctrl-0 = <&uart_ao_b_pins>;
113 pinctrl-names = "default";
114};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
index cea4a3eded9b..8873c058fad2 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts
@@ -127,6 +127,17 @@
127 }; 127 };
128 }; 128 };
129 }; 129 };
130
131 hdmi-connector {
132 compatible = "hdmi-connector";
133 type = "a";
134
135 port {
136 hdmi_connector_in: endpoint {
137 remote-endpoint = <&hdmi_tx_tmds_out>;
138 };
139 };
140 };
130}; 141};
131 142
132&uart_AO { 143&uart_AO {
@@ -219,3 +230,15 @@
219 remote-endpoint = <&cvbs_connector_in>; 230 remote-endpoint = <&cvbs_connector_in>;
220 }; 231 };
221}; 232};
233
234&hdmi_tx {
235 status = "okay";
236 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
237 pinctrl-names = "default";
238};
239
240&hdmi_tx_tmds_port {
241 hdmi_tx_tmds_out: endpoint {
242 remote-endpoint = <&hdmi_connector_in>;
243 };
244};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
index 9639f012b02b..db31e093f40e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dts
@@ -43,23 +43,26 @@
43 43
44/dts-v1/; 44/dts-v1/;
45 45
46#include "meson-gxl-s905x.dtsi" 46#include "meson-gxl-s905x-p212.dtsi"
47 47
48/ { 48/ {
49 compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl"; 49 compatible = "amlogic,p212", "amlogic,s905x", "amlogic,meson-gxl";
50 model = "Amlogic Meson GXL (S905X) P212 Development Board"; 50 model = "Amlogic Meson GXL (S905X) P212 Development Board";
51 51
52 aliases { 52 cvbs-connector {
53 serial0 = &uart_AO; 53 compatible = "composite-video-connector";
54 };
55 54
56 chosen { 55 port {
57 stdout-path = "serial0:115200n8"; 56 cvbs_connector_in: endpoint {
57 remote-endpoint = <&cvbs_vdac_out>;
58 };
59 };
58 }; 60 };
61};
59 62
60 memory@0 { 63&cvbs_vdac_port {
61 device_type = "memory"; 64 cvbs_vdac_out: endpoint {
62 reg = <0x0 0x0 0x0 0x80000000>; 65 remote-endpoint = <&cvbs_connector_in>;
63 }; 66 };
64}; 67};
65 68
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
new file mode 100644
index 000000000000..f3eea8e89d12
--- /dev/null
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x-p212.dtsi
@@ -0,0 +1,173 @@
1/*
2 * Copyright (c) 2016 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
3 * Based on meson-gx-p23x-q20x.dtsi:
4 * - Copyright (c) 2016 Endless Computers, Inc.
5 * Author: Carlo Caione <carlo@endlessm.com>
6 * - Copyright (c) 2016 BayLibre, SAS.
7 * Author: Neil Armstrong <narmstrong@baylibre.com>
8 *
9 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 */
11
12/* Common DTSI for devices which are based on the P212 reference board. */
13
14#include "meson-gxl-s905x.dtsi"
15
16/ {
17 aliases {
18 serial0 = &uart_AO;
19 serial1 = &uart_A;
20 };
21
22 chosen {
23 stdout-path = "serial0:115200n8";
24 };
25
26 memory@0 {
27 device_type = "memory";
28 reg = <0x0 0x0 0x0 0x80000000>;
29 };
30
31 vddio_boot: regulator-vddio_boot {
32 compatible = "regulator-fixed";
33 regulator-name = "VDDIO_BOOT";
34 regulator-min-microvolt = <1800000>;
35 regulator-max-microvolt = <1800000>;
36 };
37
38 vddao_3v3: regulator-vddao_3v3 {
39 compatible = "regulator-fixed";
40 regulator-name = "VDDAO_3V3";
41 regulator-min-microvolt = <3300000>;
42 regulator-max-microvolt = <3300000>;
43 };
44
45 vddio_ao18: regulator-vddio_ao18 {
46 compatible = "regulator-fixed";
47 regulator-name = "VDDIO_AO18";
48 regulator-min-microvolt = <1800000>;
49 regulator-max-microvolt = <1800000>;
50 };
51
52 vcc_3v3: regulator-vcc_3v3 {
53 compatible = "regulator-fixed";
54 regulator-name = "VCC_3V3";
55 regulator-min-microvolt = <3300000>;
56 regulator-max-microvolt = <3300000>;
57 };
58
59 emmc_pwrseq: emmc-pwrseq {
60 compatible = "mmc-pwrseq-emmc";
61 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
62 };
63
64 wifi32k: wifi32k {
65 compatible = "pwm-clock";
66 #clock-cells = <0>;
67 clock-frequency = <32768>;
68 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
69 };
70
71 sdio_pwrseq: sdio-pwrseq {
72 compatible = "mmc-pwrseq-simple";
73 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
74 clocks = <&wifi32k>;
75 clock-names = "ext_clock";
76 };
77};
78
79&ethmac {
80 status = "okay";
81};
82
83&ir {
84 status = "okay";
85 pinctrl-0 = <&remote_input_ao_pins>;
86 pinctrl-names = "default";
87};
88
89&saradc {
90 status = "okay";
91 vref-supply = <&vddio_ao18>;
92};
93
94/* Wireless SDIO Module */
95&sd_emmc_a {
96 status = "okay";
97 pinctrl-0 = <&sdio_pins>;
98 pinctrl-names = "default";
99 #address-cells = <1>;
100 #size-cells = <0>;
101
102 bus-width = <4>;
103 cap-sd-highspeed;
104 max-frequency = <100000000>;
105
106 non-removable;
107 disable-wp;
108
109 mmc-pwrseq = <&sdio_pwrseq>;
110
111 vmmc-supply = <&vddao_3v3>;
112 vqmmc-supply = <&vddio_boot>;
113};
114
115/* SD card */
116&sd_emmc_b {
117 status = "okay";
118 pinctrl-0 = <&sdcard_pins>;
119 pinctrl-names = "default";
120
121 bus-width = <4>;
122 cap-sd-highspeed;
123 max-frequency = <100000000>;
124 disable-wp;
125
126 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
127 cd-inverted;
128
129 vmmc-supply = <&vddao_3v3>;
130 vqmmc-supply = <&vddio_boot>;
131};
132
133/* eMMC */
134&sd_emmc_c {
135 status = "okay";
136 pinctrl-0 = <&emmc_pins>;
137 pinctrl-names = "default";
138
139 bus-width = <8>;
140 cap-sd-highspeed;
141 cap-mmc-highspeed;
142 max-frequency = <200000000>;
143 non-removable;
144 disable-wp;
145 mmc-ddr-1_8v;
146 mmc-hs200-1_8v;
147
148 mmc-pwrseq = <&emmc_pwrseq>;
149 vmmc-supply = <&vcc_3v3>;
150 vqmmc-supply = <&vddio_boot>;
151};
152
153&pwm_ef {
154 status = "okay";
155 pinctrl-0 = <&pwm_e_pins>;
156 pinctrl-names = "default";
157 clocks = <&clkc CLKID_FCLK_DIV4>;
158 clock-names = "clkin0";
159};
160
161/* This is connected to the Bluetooth module: */
162&uart_A {
163 status = "okay";
164 pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
165 pinctrl-names = "default";
166 uart-has-rtscts;
167};
168
169&uart_AO {
170 status = "okay";
171 pinctrl-0 = <&uart_ao_a_pins>;
172 pinctrl-names = "default";
173};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi
index 08237ee1e362..0f78d836edaf 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905x.dtsi
@@ -42,6 +42,7 @@
42 */ 42 */
43 43
44#include "meson-gxl.dtsi" 44#include "meson-gxl.dtsi"
45#include "meson-gxl-mali.dtsi"
45 46
46/ { 47/ {
47 compatible = "amlogic,s905x", "amlogic,meson-gxl"; 48 compatible = "amlogic,s905x", "amlogic,meson-gxl";
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
index fe11b5fc61f7..d8e096dff10a 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
@@ -44,6 +44,7 @@
44#include "meson-gx.dtsi" 44#include "meson-gx.dtsi"
45#include <dt-bindings/clock/gxbb-clkc.h> 45#include <dt-bindings/clock/gxbb-clkc.h>
46#include <dt-bindings/gpio/meson-gxl-gpio.h> 46#include <dt-bindings/gpio/meson-gxl-gpio.h>
47#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
47 48
48/ { 49/ {
49 compatible = "amlogic,meson-gxl"; 50 compatible = "amlogic,meson-gxl";
@@ -79,6 +80,7 @@
79 reg-names = "mux", "pull", "gpio"; 80 reg-names = "mux", "pull", "gpio";
80 gpio-controller; 81 gpio-controller;
81 #gpio-cells = <2>; 82 #gpio-cells = <2>;
83 gpio-ranges = <&pinctrl_aobus 0 0 14>;
82 }; 84 };
83 85
84 uart_ao_a_pins: uart_ao_a { 86 uart_ao_a_pins: uart_ao_a {
@@ -103,6 +105,13 @@
103 }; 105 };
104 }; 106 };
105 107
108 uart_ao_b_0_1_pins: uart_ao_b_0_1 {
109 mux {
110 groups = "uart_tx_ao_b_0", "uart_rx_ao_b_1";
111 function = "uart_ao_b";
112 };
113 };
114
106 uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts { 115 uart_ao_b_cts_rts_pins: uart_ao_b_cts_rts {
107 mux { 116 mux {
108 groups = "uart_cts_ao_b", 117 groups = "uart_cts_ao_b",
@@ -118,12 +127,69 @@
118 }; 127 };
119 }; 128 };
120 129
130 i2c_ao_pins: i2c_ao {
131 mux {
132 groups = "i2c_sck_ao",
133 "i2c_sda_ao";
134 function = "i2c_ao";
135 };
136 };
137
138 pwm_ao_a_3_pins: pwm_ao_a_3 {
139 mux {
140 groups = "pwm_ao_a_3";
141 function = "pwm_ao_a";
142 };
143 };
144
145 pwm_ao_a_8_pins: pwm_ao_a_8 {
146 mux {
147 groups = "pwm_ao_a_8";
148 function = "pwm_ao_a";
149 };
150 };
151
121 pwm_ao_b_pins: pwm_ao_b { 152 pwm_ao_b_pins: pwm_ao_b {
122 mux { 153 mux {
123 groups = "pwm_ao_b"; 154 groups = "pwm_ao_b";
124 function = "pwm_ao_b"; 155 function = "pwm_ao_b";
125 }; 156 };
126 }; 157 };
158
159 pwm_ao_b_6_pins: pwm_ao_b_6 {
160 mux {
161 groups = "pwm_ao_b_6";
162 function = "pwm_ao_b";
163 };
164 };
165
166 i2s_out_ch23_ao_pins: i2s_out_ch23_ao {
167 mux {
168 groups = "i2s_out_ch23_ao";
169 function = "i2s_out_ao";
170 };
171 };
172
173 i2s_out_ch45_ao_pins: i2s_out_ch45_ao {
174 mux {
175 groups = "i2s_out_ch45_ao";
176 function = "i2s_out_ao";
177 };
178 };
179
180 spdif_out_ao_6_pins: spdif_out_ao_6 {
181 mux {
182 groups = "spdif_out_ao_6";
183 function = "spdif_out_ao";
184 };
185 };
186
187 spdif_out_ao_9_pins: spdif_out_ao_9 {
188 mux {
189 groups = "spdif_out_ao_9";
190 function = "spdif_out_ao";
191 };
192 };
127 }; 193 };
128}; 194};
129 195
@@ -142,6 +208,7 @@
142 reg-names = "mux", "pull", "pull-enable", "gpio"; 208 reg-names = "mux", "pull", "pull-enable", "gpio";
143 gpio-controller; 209 gpio-controller;
144 #gpio-cells = <2>; 210 #gpio-cells = <2>;
211 gpio-ranges = <&pinctrl_periphs 0 14 101>;
145 }; 212 };
146 213
147 emmc_pins: emmc { 214 emmc_pins: emmc {
@@ -154,6 +221,16 @@
154 }; 221 };
155 }; 222 };
156 223
224 nor_pins: nor {
225 mux {
226 groups = "nor_d",
227 "nor_q",
228 "nor_c",
229 "nor_cs";
230 function = "nor";
231 };
232 };
233
157 sdcard_pins: sdcard { 234 sdcard_pins: sdcard {
158 mux { 235 mux {
159 groups = "sdcard_d0", 236 groups = "sdcard_d0",
@@ -277,6 +354,34 @@
277 }; 354 };
278 }; 355 };
279 356
357 pwm_a_pins: pwm_a {
358 mux {
359 groups = "pwm_a";
360 function = "pwm_a";
361 };
362 };
363
364 pwm_b_pins: pwm_b {
365 mux {
366 groups = "pwm_b";
367 function = "pwm_b";
368 };
369 };
370
371 pwm_c_pins: pwm_c {
372 mux {
373 groups = "pwm_c";
374 function = "pwm_c";
375 };
376 };
377
378 pwm_d_pins: pwm_d {
379 mux {
380 groups = "pwm_d";
381 function = "pwm_d";
382 };
383 };
384
280 pwm_e_pins: pwm_e { 385 pwm_e_pins: pwm_e {
281 mux { 386 mux {
282 groups = "pwm_e"; 387 groups = "pwm_e";
@@ -284,6 +389,20 @@
284 }; 389 };
285 }; 390 };
286 391
392 pwm_f_clk_pins: pwm_f_clk {
393 mux {
394 groups = "pwm_f_clk";
395 function = "pwm_f";
396 };
397 };
398
399 pwm_f_x_pins: pwm_f_x {
400 mux {
401 groups = "pwm_f_x";
402 function = "pwm_f";
403 };
404 };
405
287 hdmi_hpd_pins: hdmi_hpd { 406 hdmi_hpd_pins: hdmi_hpd {
288 mux { 407 mux {
289 groups = "hdmi_hpd"; 408 groups = "hdmi_hpd";
@@ -297,6 +416,61 @@
297 function = "hdmi_i2c"; 416 function = "hdmi_i2c";
298 }; 417 };
299 }; 418 };
419
420 i2s_am_clk_pins: i2s_am_clk {
421 mux {
422 groups = "i2s_am_clk";
423 function = "i2s_out";
424 };
425 };
426
427 i2s_out_ao_clk_pins: i2s_out_ao_clk {
428 mux {
429 groups = "i2s_out_ao_clk";
430 function = "i2s_out";
431 };
432 };
433
434 i2s_out_lr_clk_pins: i2s_out_lr_clk {
435 mux {
436 groups = "i2s_out_lr_clk";
437 function = "i2s_out";
438 };
439 };
440
441 i2s_out_ch01_pins: i2s_out_ch01 {
442 mux {
443 groups = "i2s_out_ch01";
444 function = "i2s_out";
445 };
446 };
447 i2sout_ch23_z_pins: i2sout_ch23_z {
448 mux {
449 groups = "i2sout_ch23_z";
450 function = "i2s_out";
451 };
452 };
453
454 i2sout_ch45_z_pins: i2sout_ch45_z {
455 mux {
456 groups = "i2sout_ch45_z";
457 function = "i2s_out";
458 };
459 };
460
461 i2sout_ch67_z_pins: i2sout_ch67_z {
462 mux {
463 groups = "i2sout_ch67_z";
464 function = "i2s_out";
465 };
466 };
467
468 spdif_out_h_pins: spdif_out_ao_h {
469 mux {
470 groups = "spdif_out_h";
471 function = "spdif_out";
472 };
473 };
300 }; 474 };
301 475
302 eth-phy-mux { 476 eth-phy-mux {
@@ -339,6 +513,10 @@
339 clocks = <&clkc CLKID_I2C>; 513 clocks = <&clkc CLKID_I2C>;
340}; 514};
341 515
516&i2c_AO {
517 clocks = <&clkc CLKID_AO_I2C>;
518};
519
342&i2c_B { 520&i2c_B {
343 clocks = <&clkc CLKID_I2C>; 521 clocks = <&clkc CLKID_I2C>;
344}; 522};
@@ -378,6 +556,22 @@
378 clock-names = "core", "clkin0", "clkin1"; 556 clock-names = "core", "clkin0", "clkin1";
379}; 557};
380 558
559&spifc {
560 clocks = <&clkc CLKID_SPI>;
561};
562
381&vpu { 563&vpu {
382 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu"; 564 compatible = "amlogic,meson-gxl-vpu", "amlogic,meson-gx-vpu";
383}; 565};
566
567&hdmi_tx {
568 compatible = "amlogic,meson-gxl-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
569 resets = <&reset RESET_HDMITX_CAPB3>,
570 <&reset RESET_HDMI_SYSTEM_RESET>,
571 <&reset RESET_HDMI_TX>;
572 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
573 clocks = <&clkc CLKID_HDMI_PCLK>,
574 <&clkc CLKID_CLK81>,
575 <&clkc CLKID_GCLK_VENCI_INT0>;
576 clock-names = "isfr", "iahb", "venci";
577};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
index 5a337d339df1..11b0bf46a95c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts
@@ -100,6 +100,17 @@
100 }; 100 };
101 }; 101 };
102 }; 102 };
103
104 hdmi-connector {
105 compatible = "hdmi-connector";
106 type = "a";
107
108 port {
109 hdmi_connector_in: endpoint {
110 remote-endpoint = <&hdmi_tx_tmds_out>;
111 };
112 };
113 };
103}; 114};
104 115
105/* This UART is brought out to the DB9 connector */ 116/* This UART is brought out to the DB9 connector */
@@ -162,6 +173,8 @@
162 /* Select external PHY by default */ 173 /* Select external PHY by default */
163 phy-handle = <&external_phy>; 174 phy-handle = <&external_phy>;
164 175
176 amlogic,tx-delay-ns = <2>;
177
165 snps,reset-gpio = <&gpio GPIOZ_14 0>; 178 snps,reset-gpio = <&gpio GPIOZ_14 0>;
166 snps,reset-delays-us = <0 10000 1000000>; 179 snps,reset-delays-us = <0 10000 1000000>;
167 snps,reset-active-low; 180 snps,reset-active-low;
@@ -183,3 +196,15 @@
183 remote-endpoint = <&cvbs_connector_in>; 196 remote-endpoint = <&cvbs_connector_in>;
184 }; 197 };
185}; 198};
199
200&hdmi_tx {
201 status = "okay";
202 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
203 pinctrl-names = "default";
204};
205
206&hdmi_tx_tmds_port {
207 hdmi_tx_tmds_out: endpoint {
208 remote-endpoint = <&hdmi_connector_in>;
209 };
210};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
index 5dbc66088355..b65776b01911 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm-q200.dts
@@ -43,12 +43,47 @@
43 43
44/dts-v1/; 44/dts-v1/;
45 45
46#include <dt-bindings/input/input.h>
47
46#include "meson-gxm.dtsi" 48#include "meson-gxm.dtsi"
47#include "meson-gx-p23x-q20x.dtsi" 49#include "meson-gx-p23x-q20x.dtsi"
48 50
49/ { 51/ {
50 compatible = "amlogic,q200", "amlogic,s912", "amlogic,meson-gxm"; 52 compatible = "amlogic,q200", "amlogic,s912", "amlogic,meson-gxm";
51 model = "Amlogic Meson GXM (S912) Q200 Development Board"; 53 model = "Amlogic Meson GXM (S912) Q200 Development Board";
54
55 adc-keys {
56 compatible = "adc-keys";
57 io-channels = <&saradc 0>;
58 io-channel-names = "buttons";
59 keyup-threshold-microvolt = <1710000>;
60
61 button-function {
62 label = "Update";
63 linux,code = <KEY_VENDOR>;
64 press-threshold-microvolt = <10000>;
65 };
66 };
67
68 gpio-keys-polled {
69 compatible = "gpio-keys-polled";
70 #address-cells = <1>;
71 #size-cells = <0>;
72 poll-interval = <100>;
73
74 button@0 {
75 label = "power";
76 linux,code = <KEY_POWER>;
77 gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
78 };
79 };
80
81 vddio_ao18: regulator-vddio_ao18 {
82 compatible = "regulator-fixed";
83 regulator-name = "VDDIO_AO18";
84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <1800000>;
86 };
52}; 87};
53 88
54/* Q200 has exclusive choice between internal or external PHY */ 89/* Q200 has exclusive choice between internal or external PHY */
@@ -59,6 +94,8 @@
59 /* Select external PHY by default */ 94 /* Select external PHY by default */
60 phy-handle = <&external_phy>; 95 phy-handle = <&external_phy>;
61 96
97 amlogic,tx-delay-ns = <2>;
98
62 /* External PHY reset is shared with internal PHY Led signals */ 99 /* External PHY reset is shared with internal PHY Led signals */
63 snps,reset-gpio = <&gpio GPIOZ_14 0>; 100 snps,reset-gpio = <&gpio GPIOZ_14 0>;
64 snps,reset-delays-us = <0 10000 1000000>; 101 snps,reset-delays-us = <0 10000 1000000>;
@@ -75,3 +112,8 @@
75 max-speed = <1000>; 112 max-speed = <1000>;
76 }; 113 };
77}; 114};
115
116&saradc {
117 status = "okay";
118 vref-supply = <&vddio_ao18>;
119};
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
index ddea7305c644..fe451cce93e7 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi
@@ -130,3 +130,6 @@
130 compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu"; 130 compatible = "amlogic,meson-gxm-vpu", "amlogic,meson-gx-vpu";
131}; 131};
132 132
133&hdmi_tx {
134 compatible = "amlogic,meson-gxm-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
135};
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi
index df539e865b90..bfe7d683a42e 100644
--- a/arch/arm64/boot/dts/arm/juno-base.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-base.dtsi
@@ -428,7 +428,7 @@
428 }; 428 };
429 }; 429 };
430 430
431 pcie_ctlr: pcie-controller@40000000 { 431 pcie_ctlr: pcie@40000000 {
432 compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic"; 432 compatible = "arm,juno-r1-pcie", "plda,xpressrich3-axi", "pci-host-ecam-generic";
433 device_type = "pci"; 433 device_type = "pci";
434 reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */ 434 reg = <0 0x40000000 0 0x10000000>; /* ECAM config space */
@@ -699,7 +699,7 @@
699 <0x00000008 0x80000000 0x1 0x80000000>; 699 <0x00000008 0x80000000 0x1 0x80000000>;
700 }; 700 };
701 701
702 smb@08000000 { 702 smb@8000000 {
703 compatible = "simple-bus"; 703 compatible = "simple-bus";
704 #address-cells = <2>; 704 #address-cells = <2>;
705 #size-cells = <1>; 705 #size-cells = <1>;
diff --git a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
index 098601657f82..2ac43221ddb6 100644
--- a/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
+++ b/arch/arm64/boot/dts/arm/juno-motherboard.dtsi
@@ -137,7 +137,7 @@
137 #size-cells = <1>; 137 #size-cells = <1>;
138 ranges = <0 3 0 0x200000>; 138 ranges = <0 3 0 0x200000>;
139 139
140 v2m_sysctl: sysctl@020000 { 140 v2m_sysctl: sysctl@20000 {
141 compatible = "arm,sp810", "arm,primecell"; 141 compatible = "arm,sp810", "arm,primecell";
142 reg = <0x020000 0x1000>; 142 reg = <0x020000 0x1000>;
143 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>; 143 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>;
@@ -148,7 +148,7 @@
148 assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>; 148 assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
149 }; 149 };
150 150
151 apbregs@010000 { 151 apbregs@10000 {
152 compatible = "syscon", "simple-mfd"; 152 compatible = "syscon", "simple-mfd";
153 reg = <0x010000 0x1000>; 153 reg = <0x010000 0x1000>;
154 154
@@ -216,7 +216,7 @@
216 }; 216 };
217 }; 217 };
218 218
219 mmci@050000 { 219 mmci@50000 {
220 compatible = "arm,pl180", "arm,primecell"; 220 compatible = "arm,pl180", "arm,primecell";
221 reg = <0x050000 0x1000>; 221 reg = <0x050000 0x1000>;
222 interrupts = <5>; 222 interrupts = <5>;
@@ -228,7 +228,7 @@
228 clock-names = "mclk", "apb_pclk"; 228 clock-names = "mclk", "apb_pclk";
229 }; 229 };
230 230
231 kmi@060000 { 231 kmi@60000 {
232 compatible = "arm,pl050", "arm,primecell"; 232 compatible = "arm,pl050", "arm,primecell";
233 reg = <0x060000 0x1000>; 233 reg = <0x060000 0x1000>;
234 interrupts = <8>; 234 interrupts = <8>;
@@ -236,7 +236,7 @@
236 clock-names = "KMIREFCLK", "apb_pclk"; 236 clock-names = "KMIREFCLK", "apb_pclk";
237 }; 237 };
238 238
239 kmi@070000 { 239 kmi@70000 {
240 compatible = "arm,pl050", "arm,primecell"; 240 compatible = "arm,pl050", "arm,primecell";
241 reg = <0x070000 0x1000>; 241 reg = <0x070000 0x1000>;
242 interrupts = <8>; 242 interrupts = <8>;
@@ -244,7 +244,7 @@
244 clock-names = "KMIREFCLK", "apb_pclk"; 244 clock-names = "KMIREFCLK", "apb_pclk";
245 }; 245 };
246 246
247 wdt@0f0000 { 247 wdt@f0000 {
248 compatible = "arm,sp805", "arm,primecell"; 248 compatible = "arm,sp805", "arm,primecell";
249 reg = <0x0f0000 0x10000>; 249 reg = <0x0f0000 0x10000>;
250 interrupts = <7>; 250 interrupts = <7>;
diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/arm/juno-r1.dts
index 0033c59a64b5..0e8943ab94d7 100644
--- a/arch/arm64/boot/dts/arm/juno-r1.dts
+++ b/arch/arm64/boot/dts/arm/juno-r1.dts
@@ -89,6 +89,12 @@
89 reg = <0x0 0x0>; 89 reg = <0x0 0x0>;
90 device_type = "cpu"; 90 device_type = "cpu";
91 enable-method = "psci"; 91 enable-method = "psci";
92 i-cache-size = <0xc000>;
93 i-cache-line-size = <64>;
94 i-cache-sets = <256>;
95 d-cache-size = <0x8000>;
96 d-cache-line-size = <64>;
97 d-cache-sets = <256>;
92 next-level-cache = <&A57_L2>; 98 next-level-cache = <&A57_L2>;
93 clocks = <&scpi_dvfs 0>; 99 clocks = <&scpi_dvfs 0>;
94 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 100 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -100,6 +106,12 @@
100 reg = <0x0 0x1>; 106 reg = <0x0 0x1>;
101 device_type = "cpu"; 107 device_type = "cpu";
102 enable-method = "psci"; 108 enable-method = "psci";
109 i-cache-size = <0xc000>;
110 i-cache-line-size = <64>;
111 i-cache-sets = <256>;
112 d-cache-size = <0x8000>;
113 d-cache-line-size = <64>;
114 d-cache-sets = <256>;
103 next-level-cache = <&A57_L2>; 115 next-level-cache = <&A57_L2>;
104 clocks = <&scpi_dvfs 0>; 116 clocks = <&scpi_dvfs 0>;
105 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 117 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -111,6 +123,12 @@
111 reg = <0x0 0x100>; 123 reg = <0x0 0x100>;
112 device_type = "cpu"; 124 device_type = "cpu";
113 enable-method = "psci"; 125 enable-method = "psci";
126 i-cache-size = <0x8000>;
127 i-cache-line-size = <64>;
128 i-cache-sets = <256>;
129 d-cache-size = <0x8000>;
130 d-cache-line-size = <64>;
131 d-cache-sets = <128>;
114 next-level-cache = <&A53_L2>; 132 next-level-cache = <&A53_L2>;
115 clocks = <&scpi_dvfs 1>; 133 clocks = <&scpi_dvfs 1>;
116 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 134 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -122,6 +140,12 @@
122 reg = <0x0 0x101>; 140 reg = <0x0 0x101>;
123 device_type = "cpu"; 141 device_type = "cpu";
124 enable-method = "psci"; 142 enable-method = "psci";
143 i-cache-size = <0x8000>;
144 i-cache-line-size = <64>;
145 i-cache-sets = <256>;
146 d-cache-size = <0x8000>;
147 d-cache-line-size = <64>;
148 d-cache-sets = <128>;
125 next-level-cache = <&A53_L2>; 149 next-level-cache = <&A53_L2>;
126 clocks = <&scpi_dvfs 1>; 150 clocks = <&scpi_dvfs 1>;
127 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 151 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -133,6 +157,12 @@
133 reg = <0x0 0x102>; 157 reg = <0x0 0x102>;
134 device_type = "cpu"; 158 device_type = "cpu";
135 enable-method = "psci"; 159 enable-method = "psci";
160 i-cache-size = <0x8000>;
161 i-cache-line-size = <64>;
162 i-cache-sets = <256>;
163 d-cache-size = <0x8000>;
164 d-cache-line-size = <64>;
165 d-cache-sets = <128>;
136 next-level-cache = <&A53_L2>; 166 next-level-cache = <&A53_L2>;
137 clocks = <&scpi_dvfs 1>; 167 clocks = <&scpi_dvfs 1>;
138 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 168 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -144,6 +174,12 @@
144 reg = <0x0 0x103>; 174 reg = <0x0 0x103>;
145 device_type = "cpu"; 175 device_type = "cpu";
146 enable-method = "psci"; 176 enable-method = "psci";
177 i-cache-size = <0x8000>;
178 i-cache-line-size = <64>;
179 i-cache-sets = <256>;
180 d-cache-size = <0x8000>;
181 d-cache-line-size = <64>;
182 d-cache-sets = <128>;
147 next-level-cache = <&A53_L2>; 183 next-level-cache = <&A53_L2>;
148 clocks = <&scpi_dvfs 1>; 184 clocks = <&scpi_dvfs 1>;
149 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 185 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -152,10 +188,16 @@
152 188
153 A57_L2: l2-cache0 { 189 A57_L2: l2-cache0 {
154 compatible = "cache"; 190 compatible = "cache";
191 cache-size = <0x200000>;
192 cache-line-size = <64>;
193 cache-sets = <2048>;
155 }; 194 };
156 195
157 A53_L2: l2-cache1 { 196 A53_L2: l2-cache1 {
158 compatible = "cache"; 197 compatible = "cache";
198 cache-size = <0x100000>;
199 cache-line-size = <64>;
200 cache-sets = <1024>;
159 }; 201 };
160 }; 202 };
161 203
diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts
index 218d0e4736a8..405e2fba025b 100644
--- a/arch/arm64/boot/dts/arm/juno-r2.dts
+++ b/arch/arm64/boot/dts/arm/juno-r2.dts
@@ -89,6 +89,12 @@
89 reg = <0x0 0x0>; 89 reg = <0x0 0x0>;
90 device_type = "cpu"; 90 device_type = "cpu";
91 enable-method = "psci"; 91 enable-method = "psci";
92 i-cache-size = <0xc000>;
93 i-cache-line-size = <64>;
94 i-cache-sets = <256>;
95 d-cache-size = <0x8000>;
96 d-cache-line-size = <64>;
97 d-cache-sets = <256>;
92 next-level-cache = <&A72_L2>; 98 next-level-cache = <&A72_L2>;
93 clocks = <&scpi_dvfs 0>; 99 clocks = <&scpi_dvfs 0>;
94 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 100 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -100,6 +106,12 @@
100 reg = <0x0 0x1>; 106 reg = <0x0 0x1>;
101 device_type = "cpu"; 107 device_type = "cpu";
102 enable-method = "psci"; 108 enable-method = "psci";
109 i-cache-size = <0xc000>;
110 i-cache-line-size = <64>;
111 i-cache-sets = <256>;
112 d-cache-size = <0x8000>;
113 d-cache-line-size = <64>;
114 d-cache-sets = <256>;
103 next-level-cache = <&A72_L2>; 115 next-level-cache = <&A72_L2>;
104 clocks = <&scpi_dvfs 0>; 116 clocks = <&scpi_dvfs 0>;
105 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 117 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -111,6 +123,12 @@
111 reg = <0x0 0x100>; 123 reg = <0x0 0x100>;
112 device_type = "cpu"; 124 device_type = "cpu";
113 enable-method = "psci"; 125 enable-method = "psci";
126 i-cache-size = <0x8000>;
127 i-cache-line-size = <64>;
128 i-cache-sets = <256>;
129 d-cache-size = <0x8000>;
130 d-cache-line-size = <64>;
131 d-cache-sets = <128>;
114 next-level-cache = <&A53_L2>; 132 next-level-cache = <&A53_L2>;
115 clocks = <&scpi_dvfs 1>; 133 clocks = <&scpi_dvfs 1>;
116 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 134 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -122,6 +140,12 @@
122 reg = <0x0 0x101>; 140 reg = <0x0 0x101>;
123 device_type = "cpu"; 141 device_type = "cpu";
124 enable-method = "psci"; 142 enable-method = "psci";
143 i-cache-size = <0x8000>;
144 i-cache-line-size = <64>;
145 i-cache-sets = <256>;
146 d-cache-size = <0x8000>;
147 d-cache-line-size = <64>;
148 d-cache-sets = <128>;
125 next-level-cache = <&A53_L2>; 149 next-level-cache = <&A53_L2>;
126 clocks = <&scpi_dvfs 1>; 150 clocks = <&scpi_dvfs 1>;
127 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 151 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -133,6 +157,12 @@
133 reg = <0x0 0x102>; 157 reg = <0x0 0x102>;
134 device_type = "cpu"; 158 device_type = "cpu";
135 enable-method = "psci"; 159 enable-method = "psci";
160 i-cache-size = <0x8000>;
161 i-cache-line-size = <64>;
162 i-cache-sets = <256>;
163 d-cache-size = <0x8000>;
164 d-cache-line-size = <64>;
165 d-cache-sets = <128>;
136 next-level-cache = <&A53_L2>; 166 next-level-cache = <&A53_L2>;
137 clocks = <&scpi_dvfs 1>; 167 clocks = <&scpi_dvfs 1>;
138 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 168 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -144,6 +174,12 @@
144 reg = <0x0 0x103>; 174 reg = <0x0 0x103>;
145 device_type = "cpu"; 175 device_type = "cpu";
146 enable-method = "psci"; 176 enable-method = "psci";
177 i-cache-size = <0x8000>;
178 i-cache-line-size = <64>;
179 i-cache-sets = <256>;
180 d-cache-size = <0x8000>;
181 d-cache-line-size = <64>;
182 d-cache-sets = <128>;
147 next-level-cache = <&A53_L2>; 183 next-level-cache = <&A53_L2>;
148 clocks = <&scpi_dvfs 1>; 184 clocks = <&scpi_dvfs 1>;
149 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 185 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -152,10 +188,16 @@
152 188
153 A72_L2: l2-cache0 { 189 A72_L2: l2-cache0 {
154 compatible = "cache"; 190 compatible = "cache";
191 cache-size = <0x200000>;
192 cache-line-size = <64>;
193 cache-sets = <2048>;
155 }; 194 };
156 195
157 A53_L2: l2-cache1 { 196 A53_L2: l2-cache1 {
158 compatible = "cache"; 197 compatible = "cache";
198 cache-size = <0x100000>;
199 cache-line-size = <64>;
200 cache-sets = <1024>;
159 }; 201 };
160 }; 202 };
161 203
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index bb2820ef3d5b..0220494c9b80 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -88,6 +88,12 @@
88 reg = <0x0 0x0>; 88 reg = <0x0 0x0>;
89 device_type = "cpu"; 89 device_type = "cpu";
90 enable-method = "psci"; 90 enable-method = "psci";
91 i-cache-size = <0xc000>;
92 i-cache-line-size = <64>;
93 i-cache-sets = <256>;
94 d-cache-size = <0x8000>;
95 d-cache-line-size = <64>;
96 d-cache-sets = <256>;
91 next-level-cache = <&A57_L2>; 97 next-level-cache = <&A57_L2>;
92 clocks = <&scpi_dvfs 0>; 98 clocks = <&scpi_dvfs 0>;
93 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 99 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -99,6 +105,12 @@
99 reg = <0x0 0x1>; 105 reg = <0x0 0x1>;
100 device_type = "cpu"; 106 device_type = "cpu";
101 enable-method = "psci"; 107 enable-method = "psci";
108 i-cache-size = <0xc000>;
109 i-cache-line-size = <64>;
110 i-cache-sets = <256>;
111 d-cache-size = <0x8000>;
112 d-cache-line-size = <64>;
113 d-cache-sets = <256>;
102 next-level-cache = <&A57_L2>; 114 next-level-cache = <&A57_L2>;
103 clocks = <&scpi_dvfs 0>; 115 clocks = <&scpi_dvfs 0>;
104 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 116 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -110,6 +122,12 @@
110 reg = <0x0 0x100>; 122 reg = <0x0 0x100>;
111 device_type = "cpu"; 123 device_type = "cpu";
112 enable-method = "psci"; 124 enable-method = "psci";
125 i-cache-size = <0x8000>;
126 i-cache-line-size = <64>;
127 i-cache-sets = <256>;
128 d-cache-size = <0x8000>;
129 d-cache-line-size = <64>;
130 d-cache-sets = <128>;
113 next-level-cache = <&A53_L2>; 131 next-level-cache = <&A53_L2>;
114 clocks = <&scpi_dvfs 1>; 132 clocks = <&scpi_dvfs 1>;
115 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 133 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -121,6 +139,12 @@
121 reg = <0x0 0x101>; 139 reg = <0x0 0x101>;
122 device_type = "cpu"; 140 device_type = "cpu";
123 enable-method = "psci"; 141 enable-method = "psci";
142 i-cache-size = <0x8000>;
143 i-cache-line-size = <64>;
144 i-cache-sets = <256>;
145 d-cache-size = <0x8000>;
146 d-cache-line-size = <64>;
147 d-cache-sets = <128>;
124 next-level-cache = <&A53_L2>; 148 next-level-cache = <&A53_L2>;
125 clocks = <&scpi_dvfs 1>; 149 clocks = <&scpi_dvfs 1>;
126 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 150 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -132,6 +156,12 @@
132 reg = <0x0 0x102>; 156 reg = <0x0 0x102>;
133 device_type = "cpu"; 157 device_type = "cpu";
134 enable-method = "psci"; 158 enable-method = "psci";
159 i-cache-size = <0x8000>;
160 i-cache-line-size = <64>;
161 i-cache-sets = <256>;
162 d-cache-size = <0x8000>;
163 d-cache-line-size = <64>;
164 d-cache-sets = <128>;
135 next-level-cache = <&A53_L2>; 165 next-level-cache = <&A53_L2>;
136 clocks = <&scpi_dvfs 1>; 166 clocks = <&scpi_dvfs 1>;
137 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 167 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -143,6 +173,12 @@
143 reg = <0x0 0x103>; 173 reg = <0x0 0x103>;
144 device_type = "cpu"; 174 device_type = "cpu";
145 enable-method = "psci"; 175 enable-method = "psci";
176 i-cache-size = <0x8000>;
177 i-cache-line-size = <64>;
178 i-cache-sets = <256>;
179 d-cache-size = <0x8000>;
180 d-cache-line-size = <64>;
181 d-cache-sets = <128>;
146 next-level-cache = <&A53_L2>; 182 next-level-cache = <&A53_L2>;
147 clocks = <&scpi_dvfs 1>; 183 clocks = <&scpi_dvfs 1>;
148 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; 184 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
@@ -151,10 +187,16 @@
151 187
152 A57_L2: l2-cache0 { 188 A57_L2: l2-cache0 {
153 compatible = "cache"; 189 compatible = "cache";
190 cache-size = <0x200000>;
191 cache-line-size = <64>;
192 cache-sets = <2048>;
154 }; 193 };
155 194
156 A53_L2: l2-cache1 { 195 A53_L2: l2-cache1 {
157 compatible = "cache"; 196 compatible = "cache";
197 cache-size = <0x100000>;
198 cache-line-size = <64>;
199 cache-sets = <1024>;
158 }; 200 };
159 }; 201 };
160 202
diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile
index f1caece9d3a7..bfa8f8e4c5af 100644
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -1,6 +1,5 @@
1dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb 1dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb
2dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb ns2-xmc.dtb 2dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb ns2-xmc.dtb
3dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb
4 3
5always := $(dtb-y) 4always := $(dtb-y)
6subdir-y := $(dts-dirs) 5subdir-y := $(dts-dirs)
diff --git a/arch/arm64/boot/dts/broadcom/ns2-svk.dts b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
index 5ae08161649e..ec19fbf928a1 100644
--- a/arch/arm64/boot/dts/broadcom/ns2-svk.dts
+++ b/arch/arm64/boot/dts/broadcom/ns2-svk.dts
@@ -57,55 +57,55 @@
57}; 57};
58 58
59&enet { 59&enet {
60 status = "ok"; 60 status = "okay";
61}; 61};
62 62
63&pci_phy0 { 63&pci_phy0 {
64 status = "ok"; 64 status = "okay";
65}; 65};
66 66
67&pci_phy1 { 67&pci_phy1 {
68 status = "ok"; 68 status = "okay";
69}; 69};
70 70
71&pcie0 { 71&pcie0 {
72 status = "ok"; 72 status = "okay";
73}; 73};
74 74
75&pcie4 { 75&pcie4 {
76 status = "ok"; 76 status = "okay";
77}; 77};
78 78
79&pcie8 { 79&pcie8 {
80 status = "ok"; 80 status = "okay";
81}; 81};
82 82
83&i2c0 { 83&i2c0 {
84 status = "ok"; 84 status = "okay";
85}; 85};
86 86
87&i2c1 { 87&i2c1 {
88 status = "ok"; 88 status = "okay";
89}; 89};
90 90
91&uart0 { 91&uart0 {
92 status = "ok"; 92 status = "okay";
93}; 93};
94 94
95&uart1 { 95&uart1 {
96 status = "ok"; 96 status = "okay";
97}; 97};
98 98
99&uart2 { 99&uart2 {
100 status = "ok"; 100 status = "okay";
101}; 101};
102 102
103&uart3 { 103&uart3 {
104 status = "ok"; 104 status = "okay";
105}; 105};
106 106
107&ssp0 { 107&ssp0 {
108 status = "ok"; 108 status = "okay";
109 109
110 slic@0 { 110 slic@0 {
111 compatible = "silabs,si3226x"; 111 compatible = "silabs,si3226x";
@@ -126,7 +126,7 @@
126}; 126};
127 127
128&ssp1 { 128&ssp1 {
129 status = "ok"; 129 status = "okay";
130 130
131 at25@0 { 131 at25@0 {
132 compatible = "atmel,at25"; 132 compatible = "atmel,at25";
@@ -150,23 +150,23 @@
150}; 150};
151 151
152&sata_phy0 { 152&sata_phy0 {
153 status = "ok"; 153 status = "okay";
154}; 154};
155 155
156&sata_phy1 { 156&sata_phy1 {
157 status = "ok"; 157 status = "okay";
158}; 158};
159 159
160&sata { 160&sata {
161 status = "ok"; 161 status = "okay";
162}; 162};
163 163
164&sdio0 { 164&sdio0 {
165 status = "ok"; 165 status = "okay";
166}; 166};
167 167
168&sdio1 { 168&sdio1 {
169 status = "ok"; 169 status = "okay";
170}; 170};
171 171
172&nand { 172&nand {
diff --git a/arch/arm64/boot/dts/broadcom/ns2-xmc.dts b/arch/arm64/boot/dts/broadcom/ns2-xmc.dts
index 99a2723cccd2..ab4ae1a32fab 100644
--- a/arch/arm64/boot/dts/broadcom/ns2-xmc.dts
+++ b/arch/arm64/boot/dts/broadcom/ns2-xmc.dts
@@ -54,15 +54,15 @@
54}; 54};
55 55
56&enet { 56&enet {
57 status = "ok"; 57 status = "okay";
58}; 58};
59 59
60&i2c0 { 60&i2c0 {
61 status = "ok"; 61 status = "okay";
62}; 62};
63 63
64&i2c1 { 64&i2c1 {
65 status = "ok"; 65 status = "okay";
66}; 66};
67 67
68&mdio_mux_iproc { 68&mdio_mux_iproc {
@@ -122,27 +122,27 @@
122}; 122};
123 123
124&pci_phy0 { 124&pci_phy0 {
125 status = "ok"; 125 status = "okay";
126}; 126};
127 127
128&pcie0 { 128&pcie0 {
129 status = "ok"; 129 status = "okay";
130}; 130};
131 131
132&pcie8 { 132