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authorGeert Uytterhoeven2017-03-16 09:07:23 -0500
committerSimon Horman2017-03-21 03:18:07 -0500
commitdcccc13210eff0e5be2b36548198952c5683f3db (patch)
tree05b9e1bb47990347043158fd51cc8f42724f73b6
parente9f0089b2d8a3d450b8ec02eccfb92b950110fbe (diff)
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arm64: dts: r8a7795: Add reset control properties
Add properties to describe the reset topology for on-SoC devices: - Add the "#reset-cells" property to the CPG/MSSR device node, - Add resets and reset-names properties to the various device nodes. This allows to reset SoC devices using the Reset Controller API. Note that all resets added match the corresponding module clocks. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm64/boot/dts/renesas/r8a7795.dtsi93
1 files changed, 93 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index e58175084b57..e99d6443b3e4 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -204,6 +204,7 @@
204 clocks = <&cpg CPG_MOD 408>; 204 clocks = <&cpg CPG_MOD 408>;
205 clock-names = "clk"; 205 clock-names = "clk";
206 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 206 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
207 resets = <&cpg 408>;
207 }; 208 };
208 209
209 wdt0: watchdog@e6020000 { 210 wdt0: watchdog@e6020000 {
@@ -211,6 +212,7 @@
211 reg = <0 0xe6020000 0 0x0c>; 212 reg = <0 0xe6020000 0 0x0c>;
212 clocks = <&cpg CPG_MOD 402>; 213 clocks = <&cpg CPG_MOD 402>;
213 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 214 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
215 resets = <&cpg 402>;
214 status = "disabled"; 216 status = "disabled";
215 }; 217 };
216 218
@@ -226,6 +228,7 @@
226 interrupt-controller; 228 interrupt-controller;
227 clocks = <&cpg CPG_MOD 912>; 229 clocks = <&cpg CPG_MOD 912>;
228 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 230 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
231 resets = <&cpg 912>;
229 }; 232 };
230 233
231 gpio1: gpio@e6051000 { 234 gpio1: gpio@e6051000 {
@@ -240,6 +243,7 @@
240 interrupt-controller; 243 interrupt-controller;
241 clocks = <&cpg CPG_MOD 911>; 244 clocks = <&cpg CPG_MOD 911>;
242 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 245 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
246 resets = <&cpg 911>;
243 }; 247 };
244 248
245 gpio2: gpio@e6052000 { 249 gpio2: gpio@e6052000 {
@@ -254,6 +258,7 @@
254 interrupt-controller; 258 interrupt-controller;
255 clocks = <&cpg CPG_MOD 910>; 259 clocks = <&cpg CPG_MOD 910>;
256 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 260 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
261 resets = <&cpg 910>;
257 }; 262 };
258 263
259 gpio3: gpio@e6053000 { 264 gpio3: gpio@e6053000 {
@@ -268,6 +273,7 @@
268 interrupt-controller; 273 interrupt-controller;
269 clocks = <&cpg CPG_MOD 909>; 274 clocks = <&cpg CPG_MOD 909>;
270 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 275 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
276 resets = <&cpg 909>;
271 }; 277 };
272 278
273 gpio4: gpio@e6054000 { 279 gpio4: gpio@e6054000 {
@@ -282,6 +288,7 @@
282 interrupt-controller; 288 interrupt-controller;
283 clocks = <&cpg CPG_MOD 908>; 289 clocks = <&cpg CPG_MOD 908>;
284 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 290 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
291 resets = <&cpg 908>;
285 }; 292 };
286 293
287 gpio5: gpio@e6055000 { 294 gpio5: gpio@e6055000 {
@@ -296,6 +303,7 @@
296 interrupt-controller; 303 interrupt-controller;
297 clocks = <&cpg CPG_MOD 907>; 304 clocks = <&cpg CPG_MOD 907>;
298 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 305 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
306 resets = <&cpg 907>;
299 }; 307 };
300 308
301 gpio6: gpio@e6055400 { 309 gpio6: gpio@e6055400 {
@@ -310,6 +318,7 @@
310 interrupt-controller; 318 interrupt-controller;
311 clocks = <&cpg CPG_MOD 906>; 319 clocks = <&cpg CPG_MOD 906>;
312 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 320 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
321 resets = <&cpg 906>;
313 }; 322 };
314 323
315 gpio7: gpio@e6055800 { 324 gpio7: gpio@e6055800 {
@@ -324,6 +333,7 @@
324 interrupt-controller; 333 interrupt-controller;
325 clocks = <&cpg CPG_MOD 905>; 334 clocks = <&cpg CPG_MOD 905>;
326 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 335 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
336 resets = <&cpg 905>;
327 }; 337 };
328 338
329 pmu_a57 { 339 pmu_a57 {
@@ -369,6 +379,7 @@
369 clock-names = "extal", "extalr"; 379 clock-names = "extal", "extalr";
370 #clock-cells = <2>; 380 #clock-cells = <2>;
371 #power-domain-cells = <0>; 381 #power-domain-cells = <0>;
382 #reset-cells = <1>;
372 }; 383 };
373 384
374 rst: reset-controller@e6160000 { 385 rst: reset-controller@e6160000 {
@@ -405,6 +416,7 @@
405 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 416 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
406 clocks = <&cpg CPG_MOD 407>; 417 clocks = <&cpg CPG_MOD 407>;
407 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 418 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
419 resets = <&cpg 407>;
408 }; 420 };
409 421
410 dmac0: dma-controller@e6700000 { 422 dmac0: dma-controller@e6700000 {
@@ -436,6 +448,7 @@
436 clocks = <&cpg CPG_MOD 219>; 448 clocks = <&cpg CPG_MOD 219>;
437 clock-names = "fck"; 449 clock-names = "fck";
438 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 450 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
451 resets = <&cpg 219>;
439 #dma-cells = <1>; 452 #dma-cells = <1>;
440 dma-channels = <16>; 453 dma-channels = <16>;
441 }; 454 };
@@ -469,6 +482,7 @@
469 clocks = <&cpg CPG_MOD 218>; 482 clocks = <&cpg CPG_MOD 218>;
470 clock-names = "fck"; 483 clock-names = "fck";
471 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 484 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
485 resets = <&cpg 218>;
472 #dma-cells = <1>; 486 #dma-cells = <1>;
473 dma-channels = <16>; 487 dma-channels = <16>;
474 }; 488 };
@@ -502,6 +516,7 @@
502 clocks = <&cpg CPG_MOD 217>; 516 clocks = <&cpg CPG_MOD 217>;
503 clock-names = "fck"; 517 clock-names = "fck";
504 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 518 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
519 resets = <&cpg 217>;
505 #dma-cells = <1>; 520 #dma-cells = <1>;
506 dma-channels = <16>; 521 dma-channels = <16>;
507 }; 522 };
@@ -535,6 +550,7 @@
535 clocks = <&cpg CPG_MOD 502>; 550 clocks = <&cpg CPG_MOD 502>;
536 clock-names = "fck"; 551 clock-names = "fck";
537 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 552 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
553 resets = <&cpg 502>;
538 #dma-cells = <1>; 554 #dma-cells = <1>;
539 dma-channels = <16>; 555 dma-channels = <16>;
540 }; 556 };
@@ -568,6 +584,7 @@
568 clocks = <&cpg CPG_MOD 501>; 584 clocks = <&cpg CPG_MOD 501>;
569 clock-names = "fck"; 585 clock-names = "fck";
570 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 586 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
587 resets = <&cpg 501>;
571 #dma-cells = <1>; 588 #dma-cells = <1>;
572 dma-channels = <16>; 589 dma-channels = <16>;
573 }; 590 };
@@ -610,6 +627,7 @@
610 "ch24"; 627 "ch24";
611 clocks = <&cpg CPG_MOD 812>; 628 clocks = <&cpg CPG_MOD 812>;
612 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 629 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
630 resets = <&cpg 812>;
613 phy-mode = "rgmii-txid"; 631 phy-mode = "rgmii-txid";
614 #address-cells = <1>; 632 #address-cells = <1>;
615 #size-cells = <0>; 633 #size-cells = <0>;
@@ -628,6 +646,7 @@
628 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 646 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
629 assigned-clock-rates = <40000000>; 647 assigned-clock-rates = <40000000>;
630 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 648 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
649 resets = <&cpg 916>;
631 status = "disabled"; 650 status = "disabled";
632 }; 651 };
633 652
@@ -643,6 +662,7 @@
643 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 662 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
644 assigned-clock-rates = <40000000>; 663 assigned-clock-rates = <40000000>;
645 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 664 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
665 resets = <&cpg 915>;
646 status = "disabled"; 666 status = "disabled";
647 }; 667 };
648 668
@@ -659,6 +679,7 @@
659 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>; 679 assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
660 assigned-clock-rates = <40000000>; 680 assigned-clock-rates = <40000000>;
661 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 681 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
682 resets = <&cpg 914>;
662 status = "disabled"; 683 status = "disabled";
663 684
664 channel0 { 685 channel0 {
@@ -683,6 +704,7 @@
683 dmas = <&dmac1 0x31>, <&dmac1 0x30>; 704 dmas = <&dmac1 0x31>, <&dmac1 0x30>;
684 dma-names = "tx", "rx"; 705 dma-names = "tx", "rx";
685 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 706 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
707 resets = <&cpg 520>;
686 status = "disabled"; 708 status = "disabled";
687 }; 709 };
688 710
@@ -699,6 +721,7 @@
699 dmas = <&dmac1 0x33>, <&dmac1 0x32>; 721 dmas = <&dmac1 0x33>, <&dmac1 0x32>;
700 dma-names = "tx", "rx"; 722 dma-names = "tx", "rx";
701 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 723 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
724 resets = <&cpg 519>;
702 status = "disabled"; 725 status = "disabled";
703 }; 726 };
704 727
@@ -715,6 +738,7 @@
715 dmas = <&dmac1 0x35>, <&dmac1 0x34>; 738 dmas = <&dmac1 0x35>, <&dmac1 0x34>;
716 dma-names = "tx", "rx"; 739 dma-names = "tx", "rx";
717 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 740 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
741 resets = <&cpg 518>;
718 status = "disabled"; 742 status = "disabled";
719 }; 743 };
720 744
@@ -731,6 +755,7 @@
731 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 755 dmas = <&dmac0 0x37>, <&dmac0 0x36>;
732 dma-names = "tx", "rx"; 756 dma-names = "tx", "rx";
733 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 757 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
758 resets = <&cpg 517>;
734 status = "disabled"; 759 status = "disabled";
735 }; 760 };
736 761
@@ -747,6 +772,7 @@
747 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 772 dmas = <&dmac0 0x39>, <&dmac0 0x38>;
748 dma-names = "tx", "rx"; 773 dma-names = "tx", "rx";
749 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 774 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
775 resets = <&cpg 516>;
750 status = "disabled"; 776 status = "disabled";
751 }; 777 };
752 778
@@ -762,6 +788,7 @@
762 dmas = <&dmac1 0x51>, <&dmac1 0x50>; 788 dmas = <&dmac1 0x51>, <&dmac1 0x50>;
763 dma-names = "tx", "rx"; 789 dma-names = "tx", "rx";
764 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 790 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
791 resets = <&cpg 207>;
765 status = "disabled"; 792 status = "disabled";
766 }; 793 };
767 794
@@ -777,6 +804,7 @@
777 dmas = <&dmac1 0x53>, <&dmac1 0x52>; 804 dmas = <&dmac1 0x53>, <&dmac1 0x52>;
778 dma-names = "tx", "rx"; 805 dma-names = "tx", "rx";
779 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 806 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
807 resets = <&cpg 206>;
780 status = "disabled"; 808 status = "disabled";
781 }; 809 };
782 810
@@ -792,6 +820,7 @@
792 dmas = <&dmac1 0x13>, <&dmac1 0x12>; 820 dmas = <&dmac1 0x13>, <&dmac1 0x12>;
793 dma-names = "tx", "rx"; 821 dma-names = "tx", "rx";
794 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 822 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
823 resets = <&cpg 310>;
795 status = "disabled"; 824 status = "disabled";
796 }; 825 };
797 826
@@ -807,6 +836,7 @@
807 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 836 dmas = <&dmac0 0x57>, <&dmac0 0x56>;
808 dma-names = "tx", "rx"; 837 dma-names = "tx", "rx";
809 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 838 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
839 resets = <&cpg 204>;
810 status = "disabled"; 840 status = "disabled";
811 }; 841 };
812 842
@@ -822,6 +852,7 @@
822 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 852 dmas = <&dmac0 0x59>, <&dmac0 0x58>;
823 dma-names = "tx", "rx"; 853 dma-names = "tx", "rx";
824 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 854 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
855 resets = <&cpg 203>;
825 status = "disabled"; 856 status = "disabled";
826 }; 857 };
827 858
@@ -837,6 +868,7 @@
837 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>; 868 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
838 dma-names = "tx", "rx"; 869 dma-names = "tx", "rx";
839 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 870 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
871 resets = <&cpg 202>;
840 status = "disabled"; 872 status = "disabled";
841 }; 873 };
842 874
@@ -850,6 +882,7 @@
850 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 882 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
851 clocks = <&cpg CPG_MOD 926>; 883 clocks = <&cpg CPG_MOD 926>;
852 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 884 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
885 resets = <&cpg 926>;
853 status = "disabled"; 886 status = "disabled";
854 }; 887 };
855 888
@@ -862,6 +895,7 @@
862 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 895 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
863 clocks = <&cpg CPG_MOD 931>; 896 clocks = <&cpg CPG_MOD 931>;
864 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 897 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
898 resets = <&cpg 931>;
865 dmas = <&dmac1 0x91>, <&dmac1 0x90>; 899 dmas = <&dmac1 0x91>, <&dmac1 0x90>;
866 dma-names = "tx", "rx"; 900 dma-names = "tx", "rx";
867 i2c-scl-internal-delay-ns = <110>; 901 i2c-scl-internal-delay-ns = <110>;
@@ -877,6 +911,7 @@
877 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 911 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
878 clocks = <&cpg CPG_MOD 930>; 912 clocks = <&cpg CPG_MOD 930>;
879 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 913 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
914 resets = <&cpg 930>;
880 dmas = <&dmac1 0x93>, <&dmac1 0x92>; 915 dmas = <&dmac1 0x93>, <&dmac1 0x92>;
881 dma-names = "tx", "rx"; 916 dma-names = "tx", "rx";
882 i2c-scl-internal-delay-ns = <6>; 917 i2c-scl-internal-delay-ns = <6>;
@@ -892,6 +927,7 @@
892 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 927 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
893 clocks = <&cpg CPG_MOD 929>; 928 clocks = <&cpg CPG_MOD 929>;
894 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 929 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
930 resets = <&cpg 929>;
895 dmas = <&dmac1 0x95>, <&dmac1 0x94>; 931 dmas = <&dmac1 0x95>, <&dmac1 0x94>;
896 dma-names = "tx", "rx"; 932 dma-names = "tx", "rx";
897 i2c-scl-internal-delay-ns = <6>; 933 i2c-scl-internal-delay-ns = <6>;
@@ -907,6 +943,7 @@
907 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 943 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
908 clocks = <&cpg CPG_MOD 928>; 944 clocks = <&cpg CPG_MOD 928>;
909 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 945 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
946 resets = <&cpg 928>;
910 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 947 dmas = <&dmac0 0x97>, <&dmac0 0x96>;
911 dma-names = "tx", "rx"; 948 dma-names = "tx", "rx";
912 i2c-scl-internal-delay-ns = <110>; 949 i2c-scl-internal-delay-ns = <110>;
@@ -922,6 +959,7 @@
922 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 959 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
923 clocks = <&cpg CPG_MOD 927>; 960 clocks = <&cpg CPG_MOD 927>;
924 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 961 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
962 resets = <&cpg 927>;
925 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 963 dmas = <&dmac0 0x99>, <&dmac0 0x98>;
926 dma-names = "tx", "rx"; 964 dma-names = "tx", "rx";
927 i2c-scl-internal-delay-ns = <110>; 965 i2c-scl-internal-delay-ns = <110>;
@@ -937,6 +975,7 @@
937 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 975 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
938 clocks = <&cpg CPG_MOD 919>; 976 clocks = <&cpg CPG_MOD 919>;
939 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 977 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
978 resets = <&cpg 919>;
940 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 979 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>;
941 dma-names = "tx", "rx"; 980 dma-names = "tx", "rx";
942 i2c-scl-internal-delay-ns = <110>; 981 i2c-scl-internal-delay-ns = <110>;
@@ -952,6 +991,7 @@
952 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 991 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
953 clocks = <&cpg CPG_MOD 918>; 992 clocks = <&cpg CPG_MOD 918>;
954 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 993 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
994 resets = <&cpg 918>;
955 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 995 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>;
956 dma-names = "tx", "rx"; 996 dma-names = "tx", "rx";
957 i2c-scl-internal-delay-ns = <6>; 997 i2c-scl-internal-delay-ns = <6>;
@@ -963,6 +1003,7 @@
963 reg = <0 0xe6e30000 0 0x8>; 1003 reg = <0 0xe6e30000 0 0x8>;
964 clocks = <&cpg CPG_MOD 523>; 1004 clocks = <&cpg CPG_MOD 523>;
965 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1005 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1006 resets = <&cpg 523>;
966 #pwm-cells = <2>; 1007 #pwm-cells = <2>;
967 status = "disabled"; 1008 status = "disabled";
968 }; 1009 };
@@ -972,6 +1013,7 @@
972 reg = <0 0xe6e31000 0 0x8>; 1013 reg = <0 0xe6e31000 0 0x8>;
973 clocks = <&cpg CPG_MOD 523>; 1014 clocks = <&cpg CPG_MOD 523>;
974 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1015 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1016 resets = <&cpg 523>;
975 #pwm-cells = <2>; 1017 #pwm-cells = <2>;
976 status = "disabled"; 1018 status = "disabled";
977 }; 1019 };
@@ -981,6 +1023,7 @@
981 reg = <0 0xe6e32000 0 0x8>; 1023 reg = <0 0xe6e32000 0 0x8>;
982 clocks = <&cpg CPG_MOD 523>; 1024 clocks = <&cpg CPG_MOD 523>;
983 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1025 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1026 resets = <&cpg 523>;
984 #pwm-cells = <2>; 1027 #pwm-cells = <2>;
985 status = "disabled"; 1028 status = "disabled";
986 }; 1029 };
@@ -990,6 +1033,7 @@
990 reg = <0 0xe6e33000 0 0x8>; 1033 reg = <0 0xe6e33000 0 0x8>;
991 clocks = <&cpg CPG_MOD 523>; 1034 clocks = <&cpg CPG_MOD 523>;
992 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1035 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1036 resets = <&cpg 523>;
993 #pwm-cells = <2>; 1037 #pwm-cells = <2>;
994 status = "disabled"; 1038 status = "disabled";
995 }; 1039 };
@@ -999,6 +1043,7 @@
999 reg = <0 0xe6e34000 0 0x8>; 1043 reg = <0 0xe6e34000 0 0x8>;
1000 clocks = <&cpg CPG_MOD 523>; 1044 clocks = <&cpg CPG_MOD 523>;
1001 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1045 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1046 resets = <&cpg 523>;
1002 #pwm-cells = <2>; 1047 #pwm-cells = <2>;
1003 status = "disabled"; 1048 status = "disabled";
1004 }; 1049 };
@@ -1008,6 +1053,7 @@
1008 reg = <0 0xe6e35000 0 0x8>; 1053 reg = <0 0xe6e35000 0 0x8>;
1009 clocks = <&cpg CPG_MOD 523>; 1054 clocks = <&cpg CPG_MOD 523>;
1010 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1055 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1056 resets = <&cpg 523>;
1011 #pwm-cells = <2>; 1057 #pwm-cells = <2>;
1012 status = "disabled"; 1058 status = "disabled";
1013 }; 1059 };
@@ -1017,6 +1063,7 @@
1017 reg = <0 0xe6e36000 0 0x8>; 1063 reg = <0 0xe6e36000 0 0x8>;
1018 clocks = <&cpg CPG_MOD 523>; 1064 clocks = <&cpg CPG_MOD 523>;
1019 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1065 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1066 resets = <&cpg 523>;
1020 #pwm-cells = <2>; 1067 #pwm-cells = <2>;
1021 status = "disabled"; 1068 status = "disabled";
1022 }; 1069 };
@@ -1213,6 +1260,7 @@
1213 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 1260 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
1214 clocks = <&cpg CPG_MOD 815>; 1261 clocks = <&cpg CPG_MOD 815>;
1215 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1262 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1263 resets = <&cpg 815>;
1216 status = "disabled"; 1264 status = "disabled";
1217 }; 1265 };
1218 1266
@@ -1222,6 +1270,7 @@
1222 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1270 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
1223 clocks = <&cpg CPG_MOD 328>; 1271 clocks = <&cpg CPG_MOD 328>;
1224 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1272 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1273 resets = <&cpg 328>;
1225 status = "disabled"; 1274 status = "disabled";
1226 }; 1275 };
1227 1276
@@ -1231,6 +1280,7 @@
1231 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; 1280 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1232 clocks = <&cpg CPG_MOD 327>; 1281 clocks = <&cpg CPG_MOD 327>;
1233 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1282 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1283 resets = <&cpg 327>;
1234 status = "disabled"; 1284 status = "disabled";
1235 }; 1285 };
1236 1286
@@ -1243,6 +1293,7 @@
1243 interrupt-names = "ch0", "ch1"; 1293 interrupt-names = "ch0", "ch1";
1244 clocks = <&cpg CPG_MOD 330>; 1294 clocks = <&cpg CPG_MOD 330>;
1245 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1295 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1296 resets = <&cpg 330>;
1246 #dma-cells = <1>; 1297 #dma-cells = <1>;
1247 dma-channels = <2>; 1298 dma-channels = <2>;
1248 }; 1299 };
@@ -1256,6 +1307,7 @@
1256 interrupt-names = "ch0", "ch1"; 1307 interrupt-names = "ch0", "ch1";
1257 clocks = <&cpg CPG_MOD 331>; 1308 clocks = <&cpg CPG_MOD 331>;
1258 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1309 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1310 resets = <&cpg 331>;
1259 #dma-cells = <1>; 1311 #dma-cells = <1>;
1260 dma-channels = <2>; 1312 dma-channels = <2>;
1261 }; 1313 };
@@ -1267,6 +1319,7 @@
1267 clocks = <&cpg CPG_MOD 314>; 1319 clocks = <&cpg CPG_MOD 314>;
1268 max-frequency = <200000000>; 1320 max-frequency = <200000000>;
1269 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1321 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1322 resets = <&cpg 314>;
1270 status = "disabled"; 1323 status = "disabled";
1271 }; 1324 };
1272 1325
@@ -1277,6 +1330,7 @@
1277 clocks = <&cpg CPG_MOD 313>; 1330 clocks = <&cpg CPG_MOD 313>;
1278 max-frequency = <200000000>; 1331 max-frequency = <200000000>;
1279 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1332 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1333 resets = <&cpg 313>;
1280 status = "disabled"; 1334 status = "disabled";
1281 }; 1335 };
1282 1336
@@ -1287,6 +1341,7 @@
1287 clocks = <&cpg CPG_MOD 312>; 1341 clocks = <&cpg CPG_MOD 312>;
1288 max-frequency = <200000000>; 1342 max-frequency = <200000000>;
1289 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1343 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1344 resets = <&cpg 312>;
1290 status = "disabled"; 1345 status = "disabled";
1291 }; 1346 };
1292 1347
@@ -1297,6 +1352,7 @@
1297 clocks = <&cpg CPG_MOD 311>; 1352 clocks = <&cpg CPG_MOD 311>;
1298 max-frequency = <200000000>; 1353 max-frequency = <200000000>;
1299 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1354 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1355 resets = <&cpg 311>;
1300 status = "disabled"; 1356 status = "disabled";
1301 }; 1357 };
1302 1358
@@ -1307,6 +1363,7 @@
1307 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1363 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1308 clocks = <&cpg CPG_MOD 703>; 1364 clocks = <&cpg CPG_MOD 703>;
1309 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1365 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1366 resets = <&cpg 703>;
1310 #phy-cells = <0>; 1367 #phy-cells = <0>;
1311 status = "disabled"; 1368 status = "disabled";
1312 }; 1369 };
@@ -1317,6 +1374,7 @@
1317 reg = <0 0xee0a0200 0 0x700>; 1374 reg = <0 0xee0a0200 0 0x700>;
1318 clocks = <&cpg CPG_MOD 702>; 1375 clocks = <&cpg CPG_MOD 702>;
1319 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1376 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1377 resets = <&cpg 702>;
1320 #phy-cells = <0>; 1378 #phy-cells = <0>;
1321 status = "disabled"; 1379 status = "disabled";
1322 }; 1380 };
@@ -1327,6 +1385,7 @@
1327 reg = <0 0xee0c0200 0 0x700>; 1385 reg = <0 0xee0c0200 0 0x700>;
1328 clocks = <&cpg CPG_MOD 701>; 1386 clocks = <&cpg CPG_MOD 701>;
1329 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1387 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1388 resets = <&cpg 701>;
1330 #phy-cells = <0>; 1389 #phy-cells = <0>;
1331 status = "disabled"; 1390 status = "disabled";
1332 }; 1391 };
@@ -1339,6 +1398,7 @@
1339 phys = <&usb2_phy0>; 1398 phys = <&usb2_phy0>;
1340 phy-names = "usb"; 1399 phy-names = "usb";
1341 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1400 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1401 resets = <&cpg 703>;
1342 status = "disabled"; 1402 status = "disabled";
1343 }; 1403 };
1344 1404
@@ -1350,6 +1410,7 @@
1350 phys = <&usb2_phy1>; 1410 phys = <&usb2_phy1>;
1351 phy-names = "usb"; 1411 phy-names = "usb";
1352 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1412 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1413 resets = <&cpg 702>;
1353 status = "disabled"; 1414 status = "disabled";
1354 }; 1415 };
1355 1416
@@ -1361,6 +1422,7 @@
1361 phys = <&usb2_phy2>; 1422 phys = <&usb2_phy2>;
1362 phy-names = "usb"; 1423 phy-names = "usb";
1363 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1424 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1425 resets = <&cpg 701>;
1364 status = "disabled"; 1426 status = "disabled";
1365 }; 1427 };
1366 1428
@@ -1372,6 +1434,7 @@
1372 phys = <&usb2_phy0>; 1434 phys = <&usb2_phy0>;
1373 phy-names = "usb"; 1435 phy-names = "usb";
1374 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1436 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1437 resets = <&cpg 703>;
1375 status = "disabled"; 1438 status = "disabled";
1376 }; 1439 };
1377 1440
@@ -1383,6 +1446,7 @@
1383 phys = <&usb2_phy1>; 1446 phys = <&usb2_phy1>;
1384 phy-names = "usb"; 1447 phy-names = "usb";
1385 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1448 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1449 resets = <&cpg 702>;
1386 status = "disabled"; 1450 status = "disabled";
1387 }; 1451 };
1388 1452
@@ -1394,6 +1458,7 @@
1394 phys = <&usb2_phy2>; 1458 phys = <&usb2_phy2>;
1395 phy-names = "usb"; 1459 phy-names = "usb";
1396 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1460 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1461 resets = <&cpg 701>;
1397 status = "disabled"; 1462 status = "disabled";
1398 }; 1463 };
1399 1464
@@ -1410,6 +1475,7 @@
1410 phys = <&usb2_phy0>; 1475 phys = <&usb2_phy0>;
1411 phy-names = "usb"; 1476 phy-names = "usb";
1412 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1477 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1478 resets = <&cpg 704>;
1413 status = "disabled"; 1479 status = "disabled";
1414 }; 1480 };
1415 1481
@@ -1436,6 +1502,7 @@
1436 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1502 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1437 clock-names = "pcie", "pcie_bus"; 1503 clock-names = "pcie", "pcie_bus";
1438 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1504 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1505 resets = <&cpg 319>;
1439 status = "disabled"; 1506 status = "disabled";
1440 }; 1507 };
1441 1508
@@ -1462,6 +1529,7 @@
1462 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 1529 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1463 clock-names = "pcie", "pcie_bus"; 1530 clock-names = "pcie", "pcie_bus";
1464 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1531 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1532 resets = <&cpg 318>;
1465 status = "disabled"; 1533 status = "disabled";
1466 }; 1534 };
1467 1535
@@ -1471,6 +1539,7 @@
1471 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>; 1539 interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
1472 clocks = <&cpg CPG_MOD 624>; 1540 clocks = <&cpg CPG_MOD 624>;
1473 power-domains = <&sysc R8A7795_PD_A3VP>; 1541 power-domains = <&sysc R8A7795_PD_A3VP>;
1542 resets = <&cpg 624>;
1474 1543
1475 renesas,fcp = <&fcpvb1>; 1544 renesas,fcp = <&fcpvb1>;
1476 }; 1545 };
@@ -1480,6 +1549,7 @@
1480 reg = <0 0xfe92f000 0 0x200>; 1549 reg = <0 0xfe92f000 0 0x200>;
1481 clocks = <&cpg CPG_MOD 606>; 1550 clocks = <&cpg CPG_MOD 606>;
1482 power-domains = <&sysc R8A7795_PD_A3VP>; 1551 power-domains = <&sysc R8A7795_PD_A3VP>;
1552 resets = <&cpg 606>;
1483 }; 1553 };
1484 1554
1485 fcpf0: fcp@fe950000 { 1555 fcpf0: fcp@fe950000 {
@@ -1487,6 +1557,7 @@
1487 reg = <0 0xfe950000 0 0x200>; 1557 reg = <0 0xfe950000 0 0x200>;
1488 clocks = <&cpg CPG_MOD 615>; 1558 clocks = <&cpg CPG_MOD 615>;
1489 power-domains = <&sysc R8A7795_PD_A3VP>; 1559 power-domains = <&sysc R8A7795_PD_A3VP>;
1560 resets = <&cpg 615>;
1490 }; 1561 };
1491 1562
1492 fcpf1: fcp@fe951000 { 1563 fcpf1: fcp@fe951000 {
@@ -1494,6 +1565,7 @@
1494 reg = <0 0xfe951000 0 0x200>; 1565 reg = <0 0xfe951000 0 0x200>;
1495 clocks = <&cpg CPG_MOD 614>; 1566 clocks = <&cpg CPG_MOD 614>;
1496 power-domains = <&sysc R8A7795_PD_A3VP>; 1567 power-domains = <&sysc R8A7795_PD_A3VP>;
1568 resets = <&cpg 614>;
1497 }; 1569 };
1498 1570
1499 fcpf2: fcp@fe952000 { 1571 fcpf2: fcp@fe952000 {
@@ -1501,6 +1573,7 @@
1501 reg = <0 0xfe952000 0 0x200>; 1573 reg = <0 0xfe952000 0 0x200>;
1502 clocks = <&cpg CPG_MOD 613>; 1574 clocks = <&cpg CPG_MOD 613>;
1503 power-domains = <&sysc R8A7795_PD_A3VP>; 1575 power-domains = <&sysc R8A7795_PD_A3VP>;
1576 resets = <&cpg 613>;
1504 }; 1577 };
1505 1578
1506 vspbd: vsp@fe960000 { 1579 vspbd: vsp@fe960000 {
@@ -1509,6 +1582,7 @@
1509 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1582 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1510 clocks = <&cpg CPG_MOD 626>; 1583 clocks = <&cpg CPG_MOD 626>;
1511 power-domains = <&sysc R8A7795_PD_A3VP>; 1584 power-domains = <&sysc R8A7795_PD_A3VP>;
1585 resets = <&cpg 626>;
1512 1586
1513 renesas,fcp = <&fcpvb0>; 1587 renesas,fcp = <&fcpvb0>;
1514 }; 1588 };
@@ -1518,6 +1592,7 @@
1518 reg = <0 0xfe96f000 0 0x200>; 1592 reg = <0 0xfe96f000 0 0x200>;
1519 clocks = <&cpg CPG_MOD 607>; 1593 clocks = <&cpg CPG_MOD 607>;
1520 power-domains = <&sysc R8A7795_PD_A3VP>; 1594 power-domains = <&sysc R8A7795_PD_A3VP>;
1595 resets = <&cpg 607>;
1521 }; 1596 };
1522 1597
1523 vspi0: vsp@fe9a0000 { 1598 vspi0: vsp@fe9a0000 {
@@ -1526,6 +1601,7 @@
1526 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1601 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
1527 clocks = <&cpg CPG_MOD 631>; 1602 clocks = <&cpg CPG_MOD 631>;
1528 power-domains = <&sysc R8A7795_PD_A3VP>; 1603 power-domains = <&sysc R8A7795_PD_A3VP>;
1604 resets = <&cpg 631>;
1529 1605
1530 renesas,fcp = <&fcpvi0>; 1606 renesas,fcp = <&fcpvi0>;
1531 }; 1607 };
@@ -1535,6 +1611,7 @@
1535 reg = <0 0xfe9af000 0 0x200>; 1611 reg = <0 0xfe9af000 0 0x200>;
1536 clocks = <&cpg CPG_MOD 611>; 1612 clocks = <&cpg CPG_MOD 611>;
1537 power-domains = <&sysc R8A7795_PD_A3VP>; 1613 power-domains = <&sysc R8A7795_PD_A3VP>;
1614 resets = <&cpg 611>;
1538 }; 1615 };
1539 1616
1540 vspi1: vsp@fe9b0000 { 1617 vspi1: vsp@fe9b0000 {
@@ -1543,6 +1620,7 @@
1543 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>; 1620 interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
1544 clocks = <&cpg CPG_MOD 630>; 1621 clocks = <&cpg CPG_MOD 630>;
1545 power-domains = <&sysc R8A7795_PD_A3VP>; 1622 power-domains = <&sysc R8A7795_PD_A3VP>;
1623 resets = <&cpg 630>;
1546 1624
1547 renesas,fcp = <&fcpvi1>; 1625 renesas,fcp = <&fcpvi1>;
1548 }; 1626 };
@@ -1552,6 +1630,7 @@
1552 reg = <0 0xfe9bf000 0 0x200>; 1630 reg = <0 0xfe9bf000 0 0x200>;
1553 clocks = <&cpg CPG_MOD 610>; 1631 clocks = <&cpg CPG_MOD 610>;
1554 power-domains = <&sysc R8A7795_PD_A3VP>; 1632 power-domains = <&sysc R8A7795_PD_A3VP>;
1633 resets = <&cpg 610>;
1555 }; 1634 };
1556 1635
1557 vspi2: vsp@fe9c0000 { 1636 vspi2: vsp@fe9c0000 {
@@ -1560,6 +1639,7 @@
1560 interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>; 1639 interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
1561 clocks = <&cpg CPG_MOD 629>; 1640 clocks = <&cpg CPG_MOD 629>;
1562 power-domains = <&sysc R8A7795_PD_A3VP>; 1641 power-domains = <&sysc R8A7795_PD_A3VP>;
1642 resets = <&cpg 629>;
1563 1643
1564 renesas,fcp = <&fcpvi2>; 1644 renesas,fcp = <&fcpvi2>;
1565 }; 1645 };
@@ -1569,6 +1649,7 @@
1569 reg = <0 0xfe9cf000 0 0x200>; 1649 reg = <0 0xfe9cf000 0 0x200>;
1570 clocks = <&cpg CPG_MOD 609>; 1650 clocks = <&cpg CPG_MOD 609>;
1571 power-domains = <&sysc R8A7795_PD_A3VP>; 1651 power-domains = <&sysc R8A7795_PD_A3VP>;
1652 resets = <&cpg 609>;
1572 }; 1653 };
1573 1654
1574 vspd0: vsp@fea20000 { 1655 vspd0: vsp@fea20000 {
@@ -1577,6 +1658,7 @@
1577 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1658 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
1578 clocks = <&cpg CPG_MOD 623>; 1659 clocks = <&cpg CPG_MOD 623>;
1579 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1660 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1661 resets = <&cpg 623>;
1580 1662
1581 renesas,fcp = <&fcpvd0>; 1663 renesas,fcp = <&fcpvd0>;
1582 }; 1664 };
@@ -1586,6 +1668,7 @@
1586 reg = <0 0xfea27000 0 0x200>; 1668 reg = <0 0xfea27000 0 0x200>;
1587 clocks = <&cpg CPG_MOD 603>; 1669 clocks = <&cpg CPG_MOD 603>;
1588 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1670 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1671 resets = <&cpg 603>;
1589 }; 1672 };
1590 1673
1591 vspd1: vsp@fea28000 { 1674 vspd1: vsp@fea28000 {
@@ -1594,6 +1677,7 @@
1594 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1677 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
1595 clocks = <&cpg CPG_MOD 622>; 1678 clocks = <&cpg CPG_MOD 622>;
1596 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1679 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1680 resets = <&cpg 622>;
1597 1681
1598 renesas,fcp = <&fcpvd1>; 1682 renesas,fcp = <&fcpvd1>;
1599 }; 1683 };
@@ -1603,6 +1687,7 @@
1603 reg = <0 0xfea2f000 0 0x200>; 1687 reg = <0 0xfea2f000 0 0x200>;
1604 clocks = <&cpg CPG_MOD 602>; 1688 clocks = <&cpg CPG_MOD 602>;
1605 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1689 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1690 resets = <&cpg 602>;
1606 }; 1691 };
1607 1692
1608 vspd2: vsp@fea30000 { 1693 vspd2: vsp@fea30000 {
@@ -1611,6 +1696,7 @@
1611 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 1696 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
1612 clocks = <&cpg CPG_MOD 621>; 1697 clocks = <&cpg CPG_MOD 621>;
1613 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1698 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1699 resets = <&cpg 621>;
1614 1700
1615 renesas,fcp = <&fcpvd2>; 1701 renesas,fcp = <&fcpvd2>;
1616 }; 1702 };
@@ -1620,6 +1706,7 @@
1620 reg = <0 0xfea37000 0 0x200>; 1706 reg = <0 0xfea37000 0 0x200>;
1621 clocks = <&cpg CPG_MOD 601>; 1707 clocks = <&cpg CPG_MOD 601>;
1622 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1708 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1709 resets = <&cpg 601>;
1623 }; 1710 };
1624 1711
1625 vspd3: vsp@fea38000 { 1712 vspd3: vsp@fea38000 {
@@ -1628,6 +1715,7 @@
1628 interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>; 1715 interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
1629 clocks = <&cpg CPG_MOD 620>; 1716 clocks = <&cpg CPG_MOD 620>;
1630 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1717 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1718 resets = <&cpg 620>;
1631 1719
1632 renesas,fcp = <&fcpvd3>; 1720 renesas,fcp = <&fcpvd3>;
1633 }; 1721 };
@@ -1637,6 +1725,7 @@
1637 reg = <0 0xfea3f000 0 0x200>; 1725 reg = <0 0xfea3f000 0 0x200>;
1638 clocks = <&cpg CPG_MOD 600>; 1726 clocks = <&cpg CPG_MOD 600>;
1639 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1727 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1728 resets = <&cpg 600>;
1640 }; 1729 };
1641 1730
1642 fdp1@fe940000 { 1731 fdp1@fe940000 {
@@ -1645,6 +1734,7 @@
1645 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 1734 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
1646 clocks = <&cpg CPG_MOD 119>; 1735 clocks = <&cpg CPG_MOD 119>;
1647 power-domains = <&sysc R8A7795_PD_A3VP>; 1736 power-domains = <&sysc R8A7795_PD_A3VP>;
1737 resets = <&cpg 119>;
1648 renesas,fcp = <&fcpf0>; 1738 renesas,fcp = <&fcpf0>;
1649 }; 1739 };
1650 1740
@@ -1654,6 +1744,7 @@
1654 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>; 1744 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
1655 clocks = <&cpg CPG_MOD 118>; 1745 clocks = <&cpg CPG_MOD 118>;
1656 power-domains = <&sysc R8A7795_PD_A3VP>; 1746 power-domains = <&sysc R8A7795_PD_A3VP>;
1747 resets = <&cpg 118>;
1657 renesas,fcp = <&fcpf1>; 1748 renesas,fcp = <&fcpf1>;
1658 }; 1749 };
1659 1750
@@ -1663,6 +1754,7 @@
1663 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>; 1754 interrupts = <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>;
1664 clocks = <&cpg CPG_MOD 117>; 1755 clocks = <&cpg CPG_MOD 117>;
1665 power-domains = <&sysc R8A7795_PD_A3VP>; 1756 power-domains = <&sysc R8A7795_PD_A3VP>;
1757 resets = <&cpg 117>;
1666 renesas,fcp = <&fcpf2>; 1758 renesas,fcp = <&fcpf2>;
1667 }; 1759 };
1668 1760
@@ -1722,6 +1814,7 @@
1722 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 1814 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
1723 clocks = <&cpg CPG_MOD 522>; 1815 clocks = <&cpg CPG_MOD 522>;
1724 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 1816 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
1817 resets = <&cpg 522>;
1725 #thermal-sensor-cells = <1>; 1818 #thermal-sensor-cells = <1>;
1726 status = "okay"; 1819 status = "okay";
1727 }; 1820 };