diff options
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g5.dtsi')
-rw-r--r-- | arch/arm/boot/dts/aspeed-g5.dtsi | 156 |
1 files changed, 117 insertions, 39 deletions
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi index b6596633036c..a0bea4a6ec77 100644 --- a/arch/arm/boot/dts/aspeed-g5.dtsi +++ b/arch/arm/boot/dts/aspeed-g5.dtsi | |||
@@ -24,6 +24,69 @@ | |||
24 | #size-cells = <1>; | 24 | #size-cells = <1>; |
25 | ranges; | 25 | ranges; |
26 | 26 | ||
27 | fmc: flash-controller@1e620000 { | ||
28 | reg = < 0x1e620000 0xc4 | ||
29 | 0x20000000 0x10000000 >; | ||
30 | #address-cells = <1>; | ||
31 | #size-cells = <0>; | ||
32 | compatible = "aspeed,ast2500-fmc"; | ||
33 | status = "disabled"; | ||
34 | interrupts = <19>; | ||
35 | flash@0 { | ||
36 | reg = < 0 >; | ||
37 | compatible = "jedec,spi-nor"; | ||
38 | status = "disabled"; | ||
39 | }; | ||
40 | flash@1 { | ||
41 | reg = < 1 >; | ||
42 | compatible = "jedec,spi-nor"; | ||
43 | status = "disabled"; | ||
44 | }; | ||
45 | flash@2 { | ||
46 | reg = < 2 >; | ||
47 | compatible = "jedec,spi-nor"; | ||
48 | status = "disabled"; | ||
49 | }; | ||
50 | }; | ||
51 | |||
52 | spi1: flash-controller@1e630000 { | ||
53 | reg = < 0x1e630000 0xc4 | ||
54 | 0x30000000 0x08000000 >; | ||
55 | #address-cells = <1>; | ||
56 | #size-cells = <0>; | ||
57 | compatible = "aspeed,ast2500-spi"; | ||
58 | status = "disabled"; | ||
59 | flash@0 { | ||
60 | reg = < 0 >; | ||
61 | compatible = "jedec,spi-nor"; | ||
62 | status = "disabled"; | ||
63 | }; | ||
64 | flash@1 { | ||
65 | reg = < 1 >; | ||
66 | compatible = "jedec,spi-nor"; | ||
67 | status = "disabled"; | ||
68 | }; | ||
69 | }; | ||
70 | |||
71 | spi2: flash-controller@1e631000 { | ||
72 | reg = < 0x1e631000 0xc4 | ||
73 | 0x38000000 0x08000000 >; | ||
74 | #address-cells = <1>; | ||
75 | #size-cells = <0>; | ||
76 | compatible = "aspeed,ast2500-spi"; | ||
77 | status = "disabled"; | ||
78 | flash@0 { | ||
79 | reg = < 0 >; | ||
80 | compatible = "jedec,spi-nor"; | ||
81 | status = "disabled"; | ||
82 | }; | ||
83 | flash@1 { | ||
84 | reg = < 1 >; | ||
85 | compatible = "jedec,spi-nor"; | ||
86 | status = "disabled"; | ||
87 | }; | ||
88 | }; | ||
89 | |||
27 | vic: interrupt-controller@1e6c0080 { | 90 | vic: interrupt-controller@1e6c0080 { |
28 | compatible = "aspeed,ast2400-vic"; | 91 | compatible = "aspeed,ast2400-vic"; |
29 | interrupt-controller; | 92 | interrupt-controller; |
@@ -52,15 +115,49 @@ | |||
52 | #size-cells = <1>; | 115 | #size-cells = <1>; |
53 | ranges; | 116 | ranges; |
54 | 117 | ||
55 | clk_clkin: clk_clkin@1e6e2070 { | ||
56 | #clock-cells = <0>; | ||
57 | compatible = "aspeed,g5-clkin-clock"; | ||
58 | reg = <0x1e6e2070 0x04>; | ||
59 | }; | ||
60 | |||
61 | syscon: syscon@1e6e2000 { | 118 | syscon: syscon@1e6e2000 { |
62 | compatible = "aspeed,g5-scu", "syscon", "simple-mfd"; | 119 | compatible = "aspeed,g5-scu", "syscon", "simple-mfd"; |
63 | reg = <0x1e6e2000 0x1a8>; | 120 | reg = <0x1e6e2000 0x1a8>; |
121 | #address-cells = <1>; | ||
122 | #size-cells = <0>; | ||
123 | |||
124 | clk_clkin: clk_clkin@70 { | ||
125 | #clock-cells = <0>; | ||
126 | compatible = "aspeed,g5-clkin-clock", "fixed-clock"; | ||
127 | reg = <0x70>; | ||
128 | clock-frequency = <24000000>; | ||
129 | }; | ||
130 | |||
131 | clk_hpll: clk_hpll@24 { | ||
132 | #clock-cells = <0>; | ||
133 | compatible = "aspeed,g5-hpll-clock", "fixed-clock"; | ||
134 | reg = <0x24>; | ||
135 | clocks = <&clk_clkin>; | ||
136 | clock-frequency = <792000000>; | ||
137 | }; | ||
138 | |||
139 | clk_ahb: clk_ahb@70 { | ||
140 | #clock-cells = <0>; | ||
141 | compatible = "aspeed,g5-ahb-clock", "fixed-clock"; | ||
142 | reg = <0x70>; | ||
143 | clocks = <&clk_hpll>; | ||
144 | clock-frequency = <198000000>; | ||
145 | }; | ||
146 | |||
147 | clk_apb: clk_apb@08 { | ||
148 | #clock-cells = <0>; | ||
149 | compatible = "aspeed,g5-apb-clock", "fixed-clock"; | ||
150 | reg = <0x08>; | ||
151 | clocks = <&clk_hpll>; | ||
152 | clock-frequency = <24750000>; | ||
153 | }; | ||
154 | |||
155 | clk_uart: clk_uart@2c { | ||
156 | #clock-cells = <0>; | ||
157 | compatible = "aspeed,uart-clock", "fixed-clock"; | ||
158 | reg = <0x2c>; | ||
159 | clock-frequency = <24000000>; | ||
160 | }; | ||
64 | 161 | ||
65 | pinctrl: pinctrl { | 162 | pinctrl: pinctrl { |
66 | compatible = "aspeed,g5-pinctrl"; | 163 | compatible = "aspeed,g5-pinctrl"; |
@@ -285,7 +382,6 @@ | |||
285 | function = "LAD0"; | 382 | function = "LAD0"; |
286 | groups = "LAD0"; | 383 | groups = "LAD0"; |
287 | }; | 384 | }; |
288 | |||
289 | pinctrl_lad1_default: lad1_default { | 385 | pinctrl_lad1_default: lad1_default { |
290 | function = "LAD1"; | 386 | function = "LAD1"; |
291 | groups = "LAD1"; | 387 | groups = "LAD1"; |
@@ -872,33 +968,7 @@ | |||
872 | }; | 968 | }; |
873 | 969 | ||
874 | }; | 970 | }; |
875 | }; | ||
876 | |||
877 | clk_hpll: clk_hpll@1e6e2024 { | ||
878 | #clock-cells = <0>; | ||
879 | compatible = "aspeed,g5-hpll-clock"; | ||
880 | reg = <0x1e6e2024 0x4>; | ||
881 | clocks = <&clk_clkin>; | ||
882 | }; | ||
883 | |||
884 | clk_ahb: clk_ahb@1e6e2070 { | ||
885 | #clock-cells = <0>; | ||
886 | compatible = "aspeed,g5-ahb-clock"; | ||
887 | reg = <0x1e6e2070 0x4>; | ||
888 | clocks = <&clk_hpll>; | ||
889 | }; | ||
890 | 971 | ||
891 | clk_apb: clk_apb@1e6e2008 { | ||
892 | #clock-cells = <0>; | ||
893 | compatible = "aspeed,g5-apb-clock"; | ||
894 | reg = <0x1e6e2008 0x4>; | ||
895 | clocks = <&clk_hpll>; | ||
896 | }; | ||
897 | |||
898 | clk_uart: clk_uart@1e6e2008 { | ||
899 | #clock-cells = <0>; | ||
900 | compatible = "aspeed,uart-clock"; | ||
901 | reg = <0x1e6e202c 0x4>; | ||
902 | }; | 972 | }; |
903 | 973 | ||
904 | gfx: display@1e6e6000 { | 974 | gfx: display@1e6e6000 { |
@@ -934,21 +1004,21 @@ | |||
934 | 1004 | ||
935 | 1005 | ||
936 | wdt1: wdt@1e785000 { | 1006 | wdt1: wdt@1e785000 { |
937 | compatible = "aspeed,wdt"; | 1007 | compatible = "aspeed,ast2500-wdt"; |
938 | reg = <0x1e785000 0x1c>; | 1008 | reg = <0x1e785000 0x20>; |
939 | interrupts = <27>; | 1009 | interrupts = <27>; |
940 | }; | 1010 | }; |
941 | 1011 | ||
942 | wdt2: wdt@1e785020 { | 1012 | wdt2: wdt@1e785020 { |
943 | compatible = "aspeed,wdt"; | 1013 | compatible = "aspeed,ast2500-wdt"; |
944 | reg = <0x1e785020 0x1c>; | 1014 | reg = <0x1e785020 0x20>; |
945 | interrupts = <27>; | 1015 | interrupts = <27>; |
946 | status = "disabled"; | 1016 | status = "disabled"; |
947 | }; | 1017 | }; |
948 | 1018 | ||
949 | wdt3: wdt@1e785040 { | 1019 | wdt3: wdt@1e785040 { |
950 | compatible = "aspeed,wdt"; | 1020 | compatible = "aspeed,ast2500-wdt"; |
951 | reg = <0x1e785074 0x1c>; | 1021 | reg = <0x1e785040 0x20>; |
952 | status = "disabled"; | 1022 | status = "disabled"; |
953 | }; | 1023 | }; |
954 | 1024 | ||
@@ -1042,6 +1112,14 @@ | |||
1042 | no-loopback-test; | 1112 | no-loopback-test; |
1043 | status = "disabled"; | 1113 | status = "disabled"; |
1044 | }; | 1114 | }; |
1115 | |||
1116 | adc: adc@1e6e9000 { | ||
1117 | compatible = "aspeed,ast2500-adc"; | ||
1118 | reg = <0x1e6e9000 0xb0>; | ||
1119 | clocks = <&clk_apb>; | ||
1120 | #io-channel-cells = <1>; | ||
1121 | status = "disabled"; | ||
1122 | }; | ||
1045 | }; | 1123 | }; |
1046 | }; | 1124 | }; |
1047 | }; | 1125 | }; |