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Diffstat (limited to 'arch/arm/include/debug/brcmstb.S')
-rw-r--r--arch/arm/include/debug/brcmstb.S18
1 files changed, 10 insertions, 8 deletions
diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S
index 9113d7b33ae0..52aaed2b936f 100644
--- a/arch/arm/include/debug/brcmstb.S
+++ b/arch/arm/include/debug/brcmstb.S
@@ -22,7 +22,8 @@
22 22
23#define UARTA_3390 REG_PHYS_ADDR(0x40a900) 23#define UARTA_3390 REG_PHYS_ADDR(0x40a900)
24#define UARTA_7250 REG_PHYS_ADDR(0x40b400) 24#define UARTA_7250 REG_PHYS_ADDR(0x40b400)
25#define UARTA_7268 REG_PHYS_ADDR(0x40c000) 25#define UARTA_7260 REG_PHYS_ADDR(0x40c000)
26#define UARTA_7268 UARTA_7260
26#define UARTA_7271 UARTA_7268 27#define UARTA_7271 UARTA_7268
27#define UARTA_7364 REG_PHYS_ADDR(0x40b000) 28#define UARTA_7364 REG_PHYS_ADDR(0x40b000)
28#define UARTA_7366 UARTA_7364 29#define UARTA_7366 UARTA_7364
@@ -62,13 +63,14 @@
62 /* Chip specific detection starts here */ 63 /* Chip specific detection starts here */
6320: checkuart(\rp, \rv, 0x33900000, 3390) 6420: checkuart(\rp, \rv, 0x33900000, 3390)
6421: checkuart(\rp, \rv, 0x72500000, 7250) 6521: checkuart(\rp, \rv, 0x72500000, 7250)
6522: checkuart(\rp, \rv, 0x72680000, 7268) 6622: checkuart(\rp, \rv, 0x72600000, 7260)
6623: checkuart(\rp, \rv, 0x72710000, 7271) 6723: checkuart(\rp, \rv, 0x72680000, 7268)
6724: checkuart(\rp, \rv, 0x73640000, 7364) 6824: checkuart(\rp, \rv, 0x72710000, 7271)
6825: checkuart(\rp, \rv, 0x73660000, 7366) 6925: checkuart(\rp, \rv, 0x73640000, 7364)
6926: checkuart(\rp, \rv, 0x07437100, 74371) 7026: checkuart(\rp, \rv, 0x73660000, 7366)
7027: checkuart(\rp, \rv, 0x74390000, 7439) 7127: checkuart(\rp, \rv, 0x07437100, 74371)
7128: checkuart(\rp, \rv, 0x74450000, 7445) 7228: checkuart(\rp, \rv, 0x74390000, 7439)
7329: checkuart(\rp, \rv, 0x74450000, 7445)
72 74
73 /* No valid UART found */ 75 /* No valid UART found */
7490: mov \rp, #0 7690: mov \rp, #0