1 files changed, 8 insertions, 0 deletions

diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
index 6ac04fc303f5..e4e9bf04b736 100644
--- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
+++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c
@@ -559,6 +559,7 @@ static int dsi_pll_10nm_restore_state(struct msm_dsi_pll *pll)
         struct pll_10nm_cached_state *cached = &pll_10nm->cached_state;
         void __iomem *phy_base = pll_10nm->phy_cmn_mmio;
         u32 val;
+        int ret;
 
         val = pll_read(pll_10nm->mmio + REG_DSI_10nm_PHY_PLL_PLL_OUTDIV_RATE);
         val &= ~0x3;
@@ -573,6 +574,13 @@ static int dsi_pll_10nm_restore_state(struct msm_dsi_pll *pll)
         val |= cached->pll_mux;
         pll_write(phy_base + REG_DSI_10nm_PHY_CMN_CLK_CFG1, val);
 
+        ret = dsi_pll_10nm_vco_set_rate(&pll->clk_hw, pll_10nm->vco_current_rate, pll_10nm->vco_ref_clk_rate);
+        if (ret) {
+                DRM_DEV_ERROR(&pll_10nm->pdev->dev,
+                        "restore vco rate failed. ret=%d\n", ret);
+                return ret;
+        }
+
         DBG("DSI PLL%d", pll_10nm->id);
 
         return 0;