diff options
Diffstat (limited to 'libunwindstack/ArmExidx.cpp')
-rw-r--r-- | libunwindstack/ArmExidx.cpp | 31 |
1 files changed, 18 insertions, 13 deletions
diff --git a/libunwindstack/ArmExidx.cpp b/libunwindstack/ArmExidx.cpp index 12adf57dc..fed3e0e0f 100644 --- a/libunwindstack/ArmExidx.cpp +++ b/libunwindstack/ArmExidx.cpp | |||
@@ -14,7 +14,6 @@ | |||
14 | * limitations under the License. | 14 | * limitations under the License. |
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <assert.h> | ||
18 | #include <stdint.h> | 17 | #include <stdint.h> |
19 | 18 | ||
20 | #include <deque> | 19 | #include <deque> |
@@ -22,11 +21,15 @@ | |||
22 | 21 | ||
23 | #include <android-base/stringprintf.h> | 22 | #include <android-base/stringprintf.h> |
24 | 23 | ||
24 | #include <unwindstack/Log.h> | ||
25 | #include <unwindstack/Memory.h> | ||
26 | #include <unwindstack/Regs.h> | ||
27 | |||
25 | #include "ArmExidx.h" | 28 | #include "ArmExidx.h" |
26 | #include "Log.h" | 29 | #include "Check.h" |
27 | #include "Machine.h" | 30 | #include "Machine.h" |
28 | #include "Memory.h" | 31 | |
29 | #include "Regs.h" | 32 | namespace unwindstack { |
30 | 33 | ||
31 | void ArmExidx::LogRawData() { | 34 | void ArmExidx::LogRawData() { |
32 | std::string log_str("Raw Data:"); | 35 | std::string log_str("Raw Data:"); |
@@ -173,7 +176,7 @@ inline bool ArmExidx::GetByte(uint8_t* byte) { | |||
173 | } | 176 | } |
174 | 177 | ||
175 | inline bool ArmExidx::DecodePrefix_10_00(uint8_t byte) { | 178 | inline bool ArmExidx::DecodePrefix_10_00(uint8_t byte) { |
176 | assert((byte >> 4) == 0x8); | 179 | CHECK((byte >> 4) == 0x8); |
177 | 180 | ||
178 | uint16_t registers = (byte & 0xf) << 8; | 181 | uint16_t registers = (byte & 0xf) << 8; |
179 | if (!GetByte(&byte)) { | 182 | if (!GetByte(&byte)) { |
@@ -232,7 +235,7 @@ inline bool ArmExidx::DecodePrefix_10_00(uint8_t byte) { | |||
232 | } | 235 | } |
233 | 236 | ||
234 | inline bool ArmExidx::DecodePrefix_10_01(uint8_t byte) { | 237 | inline bool ArmExidx::DecodePrefix_10_01(uint8_t byte) { |
235 | assert((byte >> 4) == 0x9); | 238 | CHECK((byte >> 4) == 0x9); |
236 | 239 | ||
237 | uint8_t bits = byte & 0xf; | 240 | uint8_t bits = byte & 0xf; |
238 | if (bits == 13 || bits == 15) { | 241 | if (bits == 13 || bits == 15) { |
@@ -258,7 +261,7 @@ inline bool ArmExidx::DecodePrefix_10_01(uint8_t byte) { | |||
258 | } | 261 | } |
259 | 262 | ||
260 | inline bool ArmExidx::DecodePrefix_10_10(uint8_t byte) { | 263 | inline bool ArmExidx::DecodePrefix_10_10(uint8_t byte) { |
261 | assert((byte >> 4) == 0xa); | 264 | CHECK((byte >> 4) == 0xa); |
262 | 265 | ||
263 | // 10100nnn: Pop r4-r[4+nnn] | 266 | // 10100nnn: Pop r4-r[4+nnn] |
264 | // 10101nnn: Pop r4-r[4+nnn], r14 | 267 | // 10101nnn: Pop r4-r[4+nnn], r14 |
@@ -419,7 +422,7 @@ inline bool ArmExidx::DecodePrefix_10_11_01nn() { | |||
419 | } | 422 | } |
420 | 423 | ||
421 | inline bool ArmExidx::DecodePrefix_10_11_1nnn(uint8_t byte) { | 424 | inline bool ArmExidx::DecodePrefix_10_11_1nnn(uint8_t byte) { |
422 | assert((byte & ~0x07) == 0xb8); | 425 | CHECK((byte & ~0x07) == 0xb8); |
423 | 426 | ||
424 | // 10111nnn: Pop VFP double-precision registers D[8]-D[8+nnn] by FSTMFDX | 427 | // 10111nnn: Pop VFP double-precision registers D[8]-D[8+nnn] by FSTMFDX |
425 | if (log_) { | 428 | if (log_) { |
@@ -439,7 +442,7 @@ inline bool ArmExidx::DecodePrefix_10_11_1nnn(uint8_t byte) { | |||
439 | } | 442 | } |
440 | 443 | ||
441 | inline bool ArmExidx::DecodePrefix_10(uint8_t byte) { | 444 | inline bool ArmExidx::DecodePrefix_10(uint8_t byte) { |
442 | assert((byte >> 6) == 0x2); | 445 | CHECK((byte >> 6) == 0x2); |
443 | 446 | ||
444 | switch ((byte >> 4) & 0x3) { | 447 | switch ((byte >> 4) & 0x3) { |
445 | case 0: | 448 | case 0: |
@@ -469,7 +472,7 @@ inline bool ArmExidx::DecodePrefix_10(uint8_t byte) { | |||
469 | } | 472 | } |
470 | 473 | ||
471 | inline bool ArmExidx::DecodePrefix_11_000(uint8_t byte) { | 474 | inline bool ArmExidx::DecodePrefix_11_000(uint8_t byte) { |
472 | assert((byte & ~0x07) == 0xc0); | 475 | CHECK((byte & ~0x07) == 0xc0); |
473 | 476 | ||
474 | uint8_t bits = byte & 0x7; | 477 | uint8_t bits = byte & 0x7; |
475 | if (bits == 6) { | 478 | if (bits == 6) { |
@@ -550,7 +553,7 @@ inline bool ArmExidx::DecodePrefix_11_000(uint8_t byte) { | |||
550 | } | 553 | } |
551 | 554 | ||
552 | inline bool ArmExidx::DecodePrefix_11_001(uint8_t byte) { | 555 | inline bool ArmExidx::DecodePrefix_11_001(uint8_t byte) { |
553 | assert((byte & ~0x07) == 0xc8); | 556 | CHECK((byte & ~0x07) == 0xc8); |
554 | 557 | ||
555 | uint8_t bits = byte & 0x7; | 558 | uint8_t bits = byte & 0x7; |
556 | if (bits == 0) { | 559 | if (bits == 0) { |
@@ -605,7 +608,7 @@ inline bool ArmExidx::DecodePrefix_11_001(uint8_t byte) { | |||
605 | } | 608 | } |
606 | 609 | ||
607 | inline bool ArmExidx::DecodePrefix_11_010(uint8_t byte) { | 610 | inline bool ArmExidx::DecodePrefix_11_010(uint8_t byte) { |
608 | assert((byte & ~0x07) == 0xd0); | 611 | CHECK((byte & ~0x07) == 0xd0); |
609 | 612 | ||
610 | // 11010nnn: Pop VFP double precision registers D[8]-D[8+nnn] by VPUSH | 613 | // 11010nnn: Pop VFP double precision registers D[8]-D[8+nnn] by VPUSH |
611 | if (log_) { | 614 | if (log_) { |
@@ -624,7 +627,7 @@ inline bool ArmExidx::DecodePrefix_11_010(uint8_t byte) { | |||
624 | } | 627 | } |
625 | 628 | ||
626 | inline bool ArmExidx::DecodePrefix_11(uint8_t byte) { | 629 | inline bool ArmExidx::DecodePrefix_11(uint8_t byte) { |
627 | assert((byte >> 6) == 0x3); | 630 | CHECK((byte >> 6) == 0x3); |
628 | 631 | ||
629 | switch ((byte >> 3) & 0x7) { | 632 | switch ((byte >> 3) & 0x7) { |
630 | case 0: | 633 | case 0: |
@@ -684,3 +687,5 @@ bool ArmExidx::Eval() { | |||
684 | while (Decode()); | 687 | while (Decode()); |
685 | return status_ == ARM_STATUS_FINISH; | 688 | return status_ == ARM_STATUS_FINISH; |
686 | } | 689 | } |
690 | |||
691 | } // namespace unwindstack | ||