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author | Aneesh V | 2011-06-16 18:30:51 -0500 |
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committer | Albert ARIBAUD | 2011-07-04 03:55:25 -0500 |
commit | 93bc21930a1bfbc98e3121035207eafa427ee07f (patch) | |
tree | a0149a349481b704aedfe31cfd6733ee17a692d6 /README | |
parent | e05f00792b71184428fdb34a303644a1e457f000 (diff) | |
download | u-boot-93bc21930a1bfbc98e3121035207eafa427ee07f.tar.gz u-boot-93bc21930a1bfbc98e3121035207eafa427ee07f.tar.xz u-boot-93bc21930a1bfbc98e3121035207eafa427ee07f.zip |
armv7: add PL310 support to u-boot
PL310 is the L2$ controller from ARM used in many SoCs
including the Cortex-A9 based OMAP4430
Add support for some of the key PL310 operations
- Invalidate all
- Invalidate range
- Flush(clean & invalidate) all
- Flush range
Signed-off-by: Aneesh V <aneesh@ti.com>
Diffstat (limited to 'README')
-rw-r--r-- | README | 6 |
1 files changed, 6 insertions, 0 deletions
@@ -465,6 +465,12 @@ The following options need to be configured: | |||
465 | CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot | 465 | CONFIG_SYS_DCACHE_OFF - Do not enable data cache in U-Boot |
466 | CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot | 466 | CONFIG_SYS_L2CACHE_OFF- Do not enable L2 cache in U-Boot |
467 | 467 | ||
468 | - Cache Configuration for ARM: | ||
469 | CONFIG_SYS_L2_PL310 - Enable support for ARM PL310 L2 cache | ||
470 | controller | ||
471 | CONFIG_SYS_PL310_BASE - Physical base address of PL310 | ||
472 | controller register space | ||
473 | |||
468 | - Serial Ports: | 474 | - Serial Ports: |
469 | CONFIG_PL010_SERIAL | 475 | CONFIG_PL010_SERIAL |
470 | 476 | ||