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authorMario Six2018-10-04 02:00:54 -0500
committerSimon Glass2018-11-14 11:16:27 -0600
commitc0a2b086b22b4af3253e4e22d5a9d1e809fd1352 (patch)
treeba1587a5a08c55b2afc31dd0175bca0ba26a60b9 /drivers
parent313d4cc3e982c6bf45e8bcf54a7db256eef41837 (diff)
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misc: Add gdsys_soc driver
This patch adds a driver for the bus associated with a IHS FPGA. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/misc/Kconfig8
-rw-r--r--drivers/misc/Makefile1
-rw-r--r--drivers/misc/gdsys_soc.c74
-rw-r--r--drivers/misc/gdsys_soc.h23
4 files changed, 106 insertions, 0 deletions
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index c5697011f2..d589f32a55 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -312,4 +312,12 @@ config FS_LOADER
312 The consumer driver would then use this loader to program whatever, 312 The consumer driver would then use this loader to program whatever,
313 ie. the FPGA device. 313 ie. the FPGA device.
314 314
315config GDSYS_SOC
316 bool "Enable gdsys SOC driver"
317 depends on MISC
318 help
319 Support for gdsys IHS SOC, a simple bus associated with each gdsys
320 IHS (Integrated Hardware Systems) FPGA, which holds all devices whose
321 register maps are contained within the FPGA's register map.
322
315endmenu 323endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index d9ac672ab8..4a5a18675a 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -35,6 +35,7 @@ obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
35obj-$(CONFIG_FS_LOADER) += fs_loader.o 35obj-$(CONFIG_FS_LOADER) += fs_loader.o
36obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o 36obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
37obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o 37obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
38obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
38obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o 39obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
39obj-$(CONFIG_IMX8) += imx8/ 40obj-$(CONFIG_IMX8) += imx8/
40obj-$(CONFIG_LED_STATUS) += status_led.o 41obj-$(CONFIG_LED_STATUS) += status_led.o
diff --git a/drivers/misc/gdsys_soc.c b/drivers/misc/gdsys_soc.c
new file mode 100644
index 0000000000..94a21e08af
--- /dev/null
+++ b/drivers/misc/gdsys_soc.c
@@ -0,0 +1,74 @@
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2017
4 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
5 */
6
7#include <common.h>
8#include <dm.h>
9#include <dm/lists.h>
10
11#include "gdsys_soc.h"
12
13/**
14 * struct gdsys_soc_priv - Private data for gdsys soc bus
15 * @fpga: The gdsys IHS FPGA this bus is associated with
16 */
17struct gdsys_soc_priv {
18 struct udevice *fpga;
19};
20
21static const struct udevice_id gdsys_soc_ids[] = {
22 { .compatible = "gdsys,soc" },
23 { /* sentinel */ }
24};
25
26int gdsys_soc_get_fpga(struct udevice *child, struct udevice **fpga)
27{
28 struct gdsys_soc_priv *bus_priv;
29
30 if (!child->parent) {
31 debug("%s: Invalid parent\n", child->name);
32 return -EINVAL;
33 }
34
35 if (!device_is_compatible(child->parent, "gdsys,soc")) {
36 debug("%s: Not child of a gdsys soc\n", child->name);
37 return -EINVAL;
38 }
39
40 bus_priv = dev_get_priv(child->parent);
41
42 *fpga = bus_priv->fpga;
43
44 return 0;
45}
46
47static int gdsys_soc_probe(struct udevice *dev)
48{
49 struct gdsys_soc_priv *priv = dev_get_priv(dev);
50 struct udevice *fpga;
51 int res = uclass_get_device_by_phandle(UCLASS_MISC, dev, "fpga",
52 &fpga);
53 if (res == -ENOENT) {
54 debug("%s: Could not find 'fpga' phandle\n", dev->name);
55 return -EINVAL;
56 }
57
58 if (res == -ENODEV) {
59 debug("%s: Could not get FPGA device\n", dev->name);
60 return -EINVAL;
61 }
62
63 priv->fpga = fpga;
64
65 return 0;
66}
67
68U_BOOT_DRIVER(gdsys_soc_bus) = {
69 .name = "gdsys_soc_bus",
70 .id = UCLASS_SIMPLE_BUS,
71 .of_match = gdsys_soc_ids,
72 .probe = gdsys_soc_probe,
73 .priv_auto_alloc_size = sizeof(struct gdsys_soc_priv),
74};
diff --git a/drivers/misc/gdsys_soc.h b/drivers/misc/gdsys_soc.h
new file mode 100644
index 0000000000..088d3b6523
--- /dev/null
+++ b/drivers/misc/gdsys_soc.h
@@ -0,0 +1,23 @@
1/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2017
4 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
5 */
6
7#ifndef _GDSYS_SOC_H_
8#define _GDSYS_SOC_H_
9
10/**
11 * gdsys_soc_get_fpga() - Retrieve pointer to parent bus' FPGA device
12 * @child: The child device on the FPGA bus needing access to the FPGA.
13 * @fpga: Pointer to the retrieved FPGA device.
14 *
15 * To access their register maps, devices on gdsys soc buses usually have
16 * facilitate the accessor function of the IHS FPGA their parent bus is
17 * attached to. To access the FPGA device from within the bus' children, this
18 * function returns a pointer to it.
19 *
20 * Return: 0 on success, -ve on failure
21 */
22int gdsys_soc_get_fpga(struct udevice *child, struct udevice **fpga);
23#endif /* _GDSYS_SOC_H_ */