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Diffstat (limited to 'arch/arm/dts/hi3798cv200-poplar.dts')
-rw-r--r--arch/arm/dts/hi3798cv200-poplar.dts75
1 files changed, 64 insertions, 11 deletions
diff --git a/arch/arm/dts/hi3798cv200-poplar.dts b/arch/arm/dts/hi3798cv200-poplar.dts
index 964326eae8..606ba55c7d 100644
--- a/arch/arm/dts/hi3798cv200-poplar.dts
+++ b/arch/arm/dts/hi3798cv200-poplar.dts
@@ -1,14 +1,17 @@
1// SPDX-License-Identifier: GPL-2.0
2/* 1/*
3 * DTS File for HiSilicon Poplar Development Board 2 * DTS File for HiSilicon Poplar Development Board
4 * 3 *
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. 4 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
5 *
6 * Released under the GPLv2 only.
7 * SPDX-License-Identifier: GPL-2.0
6 */ 8 */
7 9
8/dts-v1/; 10/dts-v1/;
9 11
10#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/gpio/gpio.h>
11#include "hi3798cv200.dtsi" 13#include "hi3798cv200.dtsi"
14#include "poplar-pinctrl.dtsi"
12 15
13/ { 16/ {
14 model = "HiSilicon Poplar Development Board"; 17 model = "HiSilicon Poplar Development Board";
@@ -28,6 +31,13 @@
28 reg = <0x0 0x0 0x0 0x80000000>; 31 reg = <0x0 0x0 0x0 0x80000000>;
29 }; 32 };
30 33
34 firmware {
35 optee {
36 compatible = "linaro,optee-tz";
37 method = "smc";
38 };
39 };
40
31 leds { 41 leds {
32 compatible = "gpio-leds"; 42 compatible = "gpio-leds";
33 43
@@ -59,6 +69,33 @@
59 default-state = "off"; 69 default-state = "off";
60 }; 70 };
61 }; 71 };
72
73 reg_pcie: regulator-pcie {
74 compatible = "regulator-fixed";
75 regulator-name = "3V3_PCIE0";
76 regulator-min-microvolt = <3300000>;
77 regulator-max-microvolt = <3300000>;
78 gpio = <&gpio6 7 0>;
79 enable-active-high;
80 };
81};
82
83&ehci {
84 status = "okay";
85};
86
87&emmc {
88 pinctrl-names = "default";
89 pinctrl-0 = <&emmc_pins_1 &emmc_pins_2
90 &emmc_pins_3 &emmc_pins_4>;
91 fifo-depth = <256>;
92 clock-frequency = <200000000>;
93 cap-mmc-highspeed;
94 mmc-ddr-1_8v;
95 mmc-hs200-1_8v;
96 non-removable;
97 bus-width = <8>;
98 status = "okay";
62}; 99};
63 100
64&gmac1 { 101&gmac1 {
@@ -76,17 +113,17 @@
76 113
77&gpio1 { 114&gpio1 {
78 status = "okay"; 115 status = "okay";
79 gpio-line-names = "LS-GPIO-E", "", 116 gpio-line-names = "GPIO-E", "",
80 "", "", 117 "", "",
81 "", "LS-GPIO-F", 118 "", "GPIO-F",
82 "", "LS-GPIO-J"; 119 "", "GPIO-J";
83}; 120};
84 121
85&gpio2 { 122&gpio2 {
86 status = "okay"; 123 status = "okay";
87 gpio-line-names = "LS-GPIO-H", "LS-GPIO-I", 124 gpio-line-names = "GPIO-H", "GPIO-I",
88 "LS-GPIO-L", "LS-GPIO-G", 125 "GPIO-L", "GPIO-G",
89 "LS-GPIO-K", "", 126 "GPIO-K", "",
90 "", ""; 127 "", "";
91}; 128};
92 129
@@ -94,15 +131,15 @@
94 status = "okay"; 131 status = "okay";
95 gpio-line-names = "", "", 132 gpio-line-names = "", "",
96 "", "", 133 "", "",
97 "LS-GPIO-C", "", 134 "GPIO-C", "",
98 "", "LS-GPIO-B"; 135 "", "GPIO-B";
99}; 136};
100 137
101&gpio4 { 138&gpio4 {
102 status = "okay"; 139 status = "okay";
103 gpio-line-names = "", "", 140 gpio-line-names = "", "",
104 "", "", 141 "", "",
105 "", "LS-GPIO-D", 142 "", "GPIO-D",
106 "", ""; 143 "", "";
107}; 144};
108 145
@@ -110,7 +147,7 @@
110 status = "okay"; 147 status = "okay";
111 gpio-line-names = "", "USER-LED-1", 148 gpio-line-names = "", "USER-LED-1",
112 "USER-LED-2", "", 149 "USER-LED-2", "",
113 "", "LS-GPIO-A", 150 "", "GPIO-A",
114 "", ""; 151 "", "";
115}; 152};
116 153
@@ -144,6 +181,22 @@
144 status = "okay"; 181 status = "okay";
145}; 182};
146 183
184&ohci {
185 status = "okay";
186};
187
188&pcie {
189 reset-gpios = <&gpio4 4 GPIO_ACTIVE_HIGH>;
190 vpcie-supply = <&reg_pcie>;
191 status = "okay";
192};
193
194&sd0 {
195 bus-width = <4>;
196 cap-sd-highspeed;
197 status = "okay";
198};
199
147&spi0 { 200&spi0 {
148 status = "okay"; 201 status = "okay";
149 label = "LS-SPI0"; 202 label = "LS-SPI0";