diff options
Diffstat (limited to 'arch/arm/dts/omap3-igep.dtsi')
-rw-r--r-- | arch/arm/dts/omap3-igep.dtsi | 250 |
1 files changed, 250 insertions, 0 deletions
diff --git a/arch/arm/dts/omap3-igep.dtsi b/arch/arm/dts/omap3-igep.dtsi new file mode 100644 index 0000000000..f33cc80c9d --- /dev/null +++ b/arch/arm/dts/omap3-igep.dtsi | |||
@@ -0,0 +1,250 @@ | |||
1 | /* | ||
2 | * Common device tree for IGEP boards based on AM/DM37x | ||
3 | * | ||
4 | * Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com> | ||
5 | * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | /dts-v1/; | ||
12 | |||
13 | #include "omap36xx.dtsi" | ||
14 | |||
15 | / { | ||
16 | memory@80000000 { | ||
17 | device_type = "memory"; | ||
18 | reg = <0x80000000 0x20000000>; /* 512 MB */ | ||
19 | }; | ||
20 | |||
21 | chosen { | ||
22 | stdout-path = &uart3; | ||
23 | }; | ||
24 | |||
25 | sound { | ||
26 | compatible = "ti,omap-twl4030"; | ||
27 | ti,model = "igep2"; | ||
28 | ti,mcbsp = <&mcbsp2>; | ||
29 | }; | ||
30 | |||
31 | vdd33: regulator-vdd33 { | ||
32 | compatible = "regulator-fixed"; | ||
33 | regulator-name = "vdd33"; | ||
34 | regulator-always-on; | ||
35 | }; | ||
36 | |||
37 | }; | ||
38 | |||
39 | &omap3_pmx_core { | ||
40 | gpmc_pins: pinmux_gpmc_pins { | ||
41 | pinctrl-single,pins = < | ||
42 | /* OneNAND seems to require PIN_INPUT on clock. */ | ||
43 | OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0) /* gpmc_clk.gpmc_clk */ | ||
44 | >; | ||
45 | }; | ||
46 | |||
47 | uart1_pins: pinmux_uart1_pins { | ||
48 | pinctrl-single,pins = < | ||
49 | OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */ | ||
50 | OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_tx */ | ||
51 | >; | ||
52 | }; | ||
53 | |||
54 | uart3_pins: pinmux_uart3_pins { | ||
55 | pinctrl-single,pins = < | ||
56 | OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0) /* uart3_rx.uart3_rx */ | ||
57 | OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* uart3_tx.uart3_tx */ | ||
58 | >; | ||
59 | }; | ||
60 | |||
61 | mcbsp2_pins: pinmux_mcbsp2_pins { | ||
62 | pinctrl-single,pins = < | ||
63 | OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx.mcbsp2_fsx */ | ||
64 | OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx.mcbsp2_clkx */ | ||
65 | OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr.mcbsp2.dr */ | ||
66 | OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx.mcbsp2_dx */ | ||
67 | >; | ||
68 | }; | ||
69 | |||
70 | mmc1_pins: pinmux_mmc1_pins { | ||
71 | pinctrl-single,pins = < | ||
72 | OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ | ||
73 | OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ | ||
74 | OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ | ||
75 | OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ | ||
76 | OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ | ||
77 | OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ | ||
78 | >; | ||
79 | }; | ||
80 | |||
81 | mmc2_pins: pinmux_mmc2_pins { | ||
82 | pinctrl-single,pins = < | ||
83 | OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */ | ||
84 | OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd.sdmmc2_cmd */ | ||
85 | OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */ | ||
86 | OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat1.sdmmc2_dat1 */ | ||
87 | OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat2.sdmmc2_dat2 */ | ||
88 | OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat3.sdmmc2_dat3 */ | ||
89 | >; | ||
90 | }; | ||
91 | |||
92 | i2c1_pins: pinmux_i2c1_pins { | ||
93 | pinctrl-single,pins = < | ||
94 | OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ | ||
95 | OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */ | ||
96 | >; | ||
97 | }; | ||
98 | |||
99 | i2c3_pins: pinmux_i2c3_pins { | ||
100 | pinctrl-single,pins = < | ||
101 | OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl.i2c3_scl */ | ||
102 | OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda.i2c3_sda */ | ||
103 | >; | ||
104 | }; | ||
105 | }; | ||
106 | |||
107 | &gpmc { | ||
108 | pinctrl-names = "default"; | ||
109 | pinctrl-0 = <&gpmc_pins>; | ||
110 | |||
111 | nand@0,0 { | ||
112 | compatible = "ti,omap2-nand"; | ||
113 | reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ | ||
114 | interrupt-parent = <&gpmc>; | ||
115 | interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ | ||
116 | <1 IRQ_TYPE_NONE>; /* termcount */ | ||
117 | linux,mtd-name= "micron,mt29c4g96maz"; | ||
118 | nand-bus-width = <16>; | ||
119 | gpmc,device-width = <2>; | ||
120 | ti,nand-ecc-opt = "bch8"; | ||
121 | |||
122 | gpmc,sync-clk-ps = <0>; | ||
123 | gpmc,cs-on-ns = <0>; | ||
124 | gpmc,cs-rd-off-ns = <44>; | ||
125 | gpmc,cs-wr-off-ns = <44>; | ||
126 | gpmc,adv-on-ns = <6>; | ||
127 | gpmc,adv-rd-off-ns = <34>; | ||
128 | gpmc,adv-wr-off-ns = <44>; | ||
129 | gpmc,we-off-ns = <40>; | ||
130 | gpmc,oe-off-ns = <54>; | ||
131 | gpmc,access-ns = <64>; | ||
132 | gpmc,rd-cycle-ns = <82>; | ||
133 | gpmc,wr-cycle-ns = <82>; | ||
134 | gpmc,wr-access-ns = <40>; | ||
135 | gpmc,wr-data-mux-bus-ns = <0>; | ||
136 | |||
137 | #address-cells = <1>; | ||
138 | #size-cells = <1>; | ||
139 | |||
140 | status = "okay"; | ||
141 | }; | ||
142 | |||
143 | onenand@0,0 { | ||
144 | compatible = "ti,omap2-onenand"; | ||
145 | reg = <0 0 0x20000>; /* CS0, offset 0, IO size 128K */ | ||
146 | |||
147 | gpmc,sync-read; | ||
148 | gpmc,sync-write; | ||
149 | gpmc,burst-length = <16>; | ||
150 | gpmc,burst-wrap; | ||
151 | gpmc,burst-read; | ||
152 | gpmc,burst-write; | ||
153 | gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */ | ||
154 | gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */ | ||
155 | gpmc,cs-on-ns = <0>; | ||
156 | gpmc,cs-rd-off-ns = <96>; | ||
157 | gpmc,cs-wr-off-ns = <96>; | ||
158 | gpmc,adv-on-ns = <0>; | ||
159 | gpmc,adv-rd-off-ns = <12>; | ||
160 | gpmc,adv-wr-off-ns = <12>; | ||
161 | gpmc,oe-on-ns = <18>; | ||
162 | gpmc,oe-off-ns = <96>; | ||
163 | gpmc,we-on-ns = <0>; | ||
164 | gpmc,we-off-ns = <96>; | ||
165 | gpmc,rd-cycle-ns = <114>; | ||
166 | gpmc,wr-cycle-ns = <114>; | ||
167 | gpmc,access-ns = <90>; | ||
168 | gpmc,page-burst-access-ns = <12>; | ||
169 | gpmc,bus-turnaround-ns = <0>; | ||
170 | gpmc,cycle2cycle-delay-ns = <0>; | ||
171 | gpmc,wait-monitoring-ns = <0>; | ||
172 | gpmc,clk-activation-ns = <6>; | ||
173 | gpmc,wr-data-mux-bus-ns = <30>; | ||
174 | gpmc,wr-access-ns = <90>; | ||
175 | gpmc,sync-clk-ps = <12000>; | ||
176 | |||
177 | #address-cells = <1>; | ||
178 | #size-cells = <1>; | ||
179 | |||
180 | status = "disabled"; | ||
181 | }; | ||
182 | }; | ||
183 | |||
184 | &i2c1 { | ||
185 | pinctrl-names = "default"; | ||
186 | pinctrl-0 = <&i2c1_pins>; | ||
187 | clock-frequency = <2600000>; | ||
188 | |||
189 | twl: twl@48 { | ||
190 | reg = <0x48>; | ||
191 | interrupts = <7>; /* SYS_NIRQ cascaded to intc */ | ||
192 | interrupt-parent = <&intc>; | ||
193 | |||
194 | twl_audio: audio { | ||
195 | compatible = "ti,twl4030-audio"; | ||
196 | codec { | ||
197 | }; | ||
198 | }; | ||
199 | }; | ||
200 | }; | ||
201 | |||
202 | #include "twl4030.dtsi" | ||
203 | #include "twl4030_omap3.dtsi" | ||
204 | |||
205 | &i2c3 { | ||
206 | pinctrl-names = "default"; | ||
207 | pinctrl-0 = <&i2c3_pins>; | ||
208 | }; | ||
209 | |||
210 | &mcbsp2 { | ||
211 | pinctrl-names = "default"; | ||
212 | pinctrl-0 = <&mcbsp2_pins>; | ||
213 | status = "okay"; | ||
214 | }; | ||
215 | |||
216 | &mmc1 { | ||
217 | pinctrl-names = "default"; | ||
218 | pinctrl-0 = <&mmc1_pins>; | ||
219 | vmmc-supply = <&vmmc1>; | ||
220 | vmmc_aux-supply = <&vsim>; | ||
221 | bus-width = <4>; | ||
222 | cd-gpios = <&twl_gpio 0 GPIO_ACTIVE_LOW>; | ||
223 | }; | ||
224 | |||
225 | &mmc3 { | ||
226 | status = "disabled"; | ||
227 | }; | ||
228 | |||
229 | &uart1 { | ||
230 | pinctrl-names = "default"; | ||
231 | pinctrl-0 = <&uart1_pins>; | ||
232 | }; | ||
233 | |||
234 | &uart3 { | ||
235 | pinctrl-names = "default"; | ||
236 | pinctrl-0 = <&uart3_pins>; | ||
237 | }; | ||
238 | |||
239 | &twl_gpio { | ||
240 | ti,use-leds; | ||
241 | }; | ||
242 | |||
243 | &usb_otg_hs { | ||
244 | interface-type = <0>; | ||
245 | usb-phy = <&usb2_phy>; | ||
246 | phys = <&usb2_phy>; | ||
247 | phy-names = "usb2-phy"; | ||
248 | mode = <3>; | ||
249 | power = <50>; | ||
250 | }; | ||