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author | Pradeep Venkatasubbarao | 2013-12-03 05:01:25 -0600 |
---|---|---|
committer | Pradeep Venkatasubbarao | 2013-12-03 05:01:25 -0600 |
commit | 9e05b5f585e8502bcbac516cae35b0194058ece2 (patch) | |
tree | 7e86f4e8372058405134e7be9d5a4580e7b8aac4 | |
parent | 04da5646c83b698e7d18f3eee29b23bf6b161e1f (diff) | |
download | dspdce-9e05b5f585e8502bcbac516cae35b0194058ece2.tar.gz dspdce-9e05b5f585e8502bcbac516cae35b0194058ece2.tar.xz dspdce-9e05b5f585e8502bcbac516cae35b0194058ece2.zip |
Modified Memory Map in Resource table.1.00.00.00
Now DSP can allocate upto 64MB.
Signed-off-by: Pradeep Venkatasubbarao <pradeepv@ti.com>
-rw-r--r-- | Makefile | 32 | ||||
-rw-r--r-- | build/config.bld | 20 | ||||
-rw-r--r-- | platform/ti/dce/baseimage/custom_rsc_table_vayu_dsp.h | 654 | ||||
-rw-r--r-- | platform/ti/dce/baseimage/dce_dsp.cfg | 445 | ||||
-rw-r--r-- | platform/ti/dce/baseimage/main.c | 3 | ||||
-rw-r--r-- | src/ti/framework/dce/dce.c | 155 |
6 files changed, 697 insertions, 612 deletions
@@ -23,13 +23,12 @@ XDCVERSION ?= xdctools_3_25_02_70 | |||
23 | BIOSVERSION ?= bios_6_35_02_45 | 23 | BIOSVERSION ?= bios_6_35_02_45 |
24 | IPCVERSION ?= ipc_3_10_00_08 | 24 | IPCVERSION ?= ipc_3_10_00_08 |
25 | CEVERSION ?= codec_engine_3_24_00_08 | 25 | CEVERSION ?= codec_engine_3_24_00_08 |
26 | #FCVERSION ?= framework_components_3_24_00_09 | 26 | FCVERSION ?= framework_components_3_24_02_15 |
27 | FCVERSION ?= framework_components_3_24_02_14_eng | ||
28 | XDAISVERSION ?= xdais_7_24_00_04 | 27 | XDAISVERSION ?= xdais_7_24_00_04 |
29 | OSALVERSION ?= osal_1_24_00_09 | 28 | OSALVERSION ?= osal_1_24_00_09 |
30 | 29 | ||
31 | # TI Compiler Settings | 30 | # TI Compiler Settings |
32 | export CGT_C66X_ELF_INSTALL_DIR ?= /opt/ti/TI_CGT_TI_C66X_7.2.3 | 31 | export C66XCGTOOLSPATH ?= /opt/ti/C6000CGT7.4.2 |
33 | 32 | ||
34 | # Define where the sources are | 33 | # Define where the sources are |
35 | DSPDCEMMSRC = $(shell pwd) | 34 | DSPDCEMMSRC = $(shell pwd) |
@@ -96,21 +95,6 @@ vayu_config: unconfig | |||
96 | @echo ".\c" | 95 | @echo ".\c" |
97 | @echo "done" | 96 | @echo "done" |
98 | 97 | ||
99 | omap5_config: unconfig | ||
100 | @echo "Creating new config\c" | ||
101 | @echo DSP_CONFIG = omap5_smp_config > bldcfg.mk | ||
102 | @echo ".\c" | ||
103 | @echo MYXDCARGS=\"profile=$(PROFILE) trace_level=$(TRACELEVEL) hw_type=OMAP5 hw_version=$(HWVERSION) BIOS_type=non-SMP\" >> bldcfg.mk | ||
104 | @echo ".\c" | ||
105 | @echo CHIP = OMAP5 >> bldcfg.mk | ||
106 | @echo ".\c" | ||
107 | @echo FORSMP = 0 >> bldcfg.mk | ||
108 | @echo ".\c" | ||
109 | @echo DSPBINNAME = "omap5-dsp.xe66x" >> bldcfg.mk | ||
110 | @echo INTBINNAME = "dsp.xe66x" >> bldcfg.mk | ||
111 | @echo ".\c" | ||
112 | @echo "done" | ||
113 | |||
114 | clean: config | 98 | clean: config |
115 | export XDCARGS=$(MYXDCARGS); \ | 99 | export XDCARGS=$(MYXDCARGS); \ |
116 | $(XDCROOT)/xdc --jobs=$(JOBS) clean -PD $(DSPDCEMMSRC)/platform/ti/dce/baseimage/. | 100 | $(XDCROOT)/xdc --jobs=$(JOBS) clean -PD $(DSPDCEMMSRC)/platform/ti/dce/baseimage/. |
@@ -120,8 +104,8 @@ ifeq ($(IPCSRC),) | |||
120 | @echo "ERROR: IPCSRC not set. Exiting..." | 104 | @echo "ERROR: IPCSRC not set. Exiting..." |
121 | @echo "For more info, use 'make help'" | 105 | @echo "For more info, use 'make help'" |
122 | @exit 1 | 106 | @exit 1 |
123 | else ifeq ($(CGT_C66X_ELF_INSTALL_DIR),) | 107 | else ifeq ($(C66XCGTOOLSPATH),) |
124 | @echo "ERROR: CGT_C66X_ELF_INSTALL_DIR not set. Exiting..." | 108 | @echo "ERROR: C66XCGTOOLSPATH not set. Exiting..." |
125 | @echo "For more info, use 'make help'" | 109 | @echo "For more info, use 'make help'" |
126 | @exit 1 | 110 | @exit 1 |
127 | endif | 111 | endif |
@@ -130,7 +114,7 @@ endif | |||
130 | 114 | ||
131 | dspbin: build | 115 | dspbin: build |
132 | ifeq ($(FORSMP),0) | 116 | ifeq ($(FORSMP),0) |
133 | $(CGT_C66X_ELF_INSTALL_DIR)/bin/strip6x $(DSPDCEMMSRC)/platform/ti/dce/baseimage/out/dsp/$(PROFILE)/$(INTBINNAME) -o=$(DSPBINNAME) | 117 | $(C66XCGTOOLSPATH)/bin/strip6x $(DSPDCEMMSRC)/platform/ti/dce/baseimage/out/dsp/$(PROFILE)/$(INTBINNAME) -o=$(DSPBINNAME) |
134 | else | 118 | else |
135 | @echo "***********Not yet implemented************" | 119 | @echo "***********Not yet implemented************" |
136 | endif | 120 | endif |
@@ -144,7 +128,7 @@ tools: | |||
144 | @echo "FC := $(FCPROD)" | 128 | @echo "FC := $(FCPROD)" |
145 | @echo "CE := $(CEPROD)" | 129 | @echo "CE := $(CEPROD)" |
146 | @echo "XDAIS := $(XDAISPROD)" | 130 | @echo "XDAIS := $(XDAISPROD)" |
147 | @echo "CGT_C66X_ELF_INSTALL_DIR := $(CGT_C66X_ELF_INSTALL_DIR)" | 131 | @echo "C66XCGTOOLSPATH := $(C66XCGTOOLSPATH)" |
148 | @echo " " | 132 | @echo " " |
149 | 133 | ||
150 | sources: | 134 | sources: |
@@ -174,7 +158,7 @@ help: | |||
174 | @echo "Please export the following variables: " | 158 | @echo "Please export the following variables: " |
175 | @echo " 1. BIOSTOOLSROOT - Directory where all the BIOS tools are installed." | 159 | @echo " 1. BIOSTOOLSROOT - Directory where all the BIOS tools are installed." |
176 | @echo " If not mentioned, picks up the default, /opt/ti" | 160 | @echo " If not mentioned, picks up the default, /opt/ti" |
177 | @echo " 2. CGT_C66X_ELF_INSTALL_DIR - DSP Code Generation Tools installation path" | 161 | @echo " 2. C66XCGTOOLSPATH - DSP Code Generation Tools installation path" |
178 | @echo " If not mentioned, tries the default install location, /opt/ti/TI_CGT_TI_ARM_5.0.1" | 162 | @echo " If not mentioned, tries the default install location, /opt/ti/TI_CGT_TI_ARM_5.0.1" |
179 | @echo " 3. IPCSRC - Absolute path of the $(IPCVERSION)" | 163 | @echo " 3. IPCSRC - Absolute path of the $(IPCVERSION)" |
180 | @echo " 4. [Optional] - Any of the following variables can be defined to customize your build." | 164 | @echo " 4. [Optional] - Any of the following variables can be defined to customize your build." |
@@ -190,7 +174,7 @@ help: | |||
190 | @echo " FCVERSION = $(FCPROD)" | 174 | @echo " FCVERSION = $(FCPROD)" |
191 | @echo " XDAISVERSION = $(XDAISPROD)" | 175 | @echo " XDAISVERSION = $(XDAISPROD)" |
192 | @echo " OSALVERSION = $(OSALPROD)" | 176 | @echo " OSALVERSION = $(OSALPROD)" |
193 | @echo " CGT_C66X_ELF_INSTALL_DIR = $(CGT_C66X_ELF_INSTALL_DIR)" | 177 | @echo " C66XCGTOOLSPATH = $(C66XCGTOOLSPATH)" |
194 | @echo " " | 178 | @echo " " |
195 | @echo "Use the appropriate make targets from the following: " | 179 | @echo "Use the appropriate make targets from the following: " |
196 | @echo " Configure Platform: " | 180 | @echo " Configure Platform: " |
diff --git a/build/config.bld b/build/config.bld index 60ee3fb..d459ec5 100644 --- a/build/config.bld +++ b/build/config.bld | |||
@@ -24,17 +24,17 @@ for (x = 0; x < arguments.length; x++) | |||
24 | * --- External Memory --- | 24 | * --- External Memory --- |
25 | * Virtual Physical Size Comment | 25 | * Virtual Physical Size Comment |
26 | * ------------------------------------------------------------------------ | 26 | * ------------------------------------------------------------------------ |
27 | * 9500_0000 ????_???? 10_0000 ( ~1 MB) EXT_CODE | 27 | * 9500_0000 ????_???? 20_0000 ( ~2 MB) EXT_CODE |
28 | * 9510_0000 ????_???? 10_0000 ( 1 MB) EXT_DATA | 28 | * 9520_0000 ????_???? 20_0000 ( 2 MB) EXT_DATA |
29 | * 9520_0000 ????_???? 30_0000 ( 3 MB) EXT_HEAP | 29 | * 9540_0000 ????_???? 280_0000 ( 40 MB) EXT_HEAP |
30 | * 9F00_0000 9F00_0000 6_0000 ( 384 kB) TRACE_BUF | 30 | * 9F00_0000 9F00_0000 6_0000 ( 384 kB) TRACE_BUF |
31 | * 9F06_0000 9F06_0000 1_0000 ( 64 kB) EXC_DATA | 31 | * 9F06_0000 9F06_0000 1_0000 ( 64 kB) EXC_DATA |
32 | * 9F07_0000 9F07_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt) | 32 | * 9F07_0000 9F07_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt) |
33 | */ | 33 | */ |
34 | var evmDRA7XX_ExtMemMapDsp1 = { | 34 | var evmDRA7XX_ExtMemMapDsp1 = { |
35 | EXT_CODE: { name: "EXT_CODE", base: 0x95000000, len: 0x100000, space: "code", access: "RWX" }, | 35 | EXT_CODE: { name: "EXT_CODE", base: 0x95000000, len: 0x200000, space: "code", access: "RWX" }, |
36 | EXT_DATA: { name: "EXT_DATA", base: 0x95100000, len: 0x00100000, space: "data", access: "RW" }, | 36 | EXT_DATA: { name: "EXT_DATA", base: 0x95200000, len: 0x00200000, space: "data", access: "RW" }, |
37 | EXT_HEAP: { name: "EXT_HEAP", base: 0x95200000, len: 0x0300000, space: "data", access: "RW" }, | 37 | EXT_HEAP: { name: "EXT_HEAP", base: 0x95400000, len: 0x02800000, space: "data", access: "RW" }, |
38 | TRACE_BUF: { name: "TRACE_BUF", base: 0x9F000000, len: 0x00060000, space: "data", access: "RW" }, | 38 | TRACE_BUF: { name: "TRACE_BUF", base: 0x9F000000, len: 0x00060000, space: "data", access: "RW" }, |
39 | EXC_DATA: { name: "EXC_DATA", base: 0x9F060000, len: 0x00010000, space: "data", access: "RW" }, | 39 | EXC_DATA: { name: "EXC_DATA", base: 0x9F060000, len: 0x00010000, space: "data", access: "RW" }, |
40 | PM_DATA: { name: "PM_DATA", base: 0x9F070000, len: 0x00020000, space: "data", access: "RWX" } | 40 | PM_DATA: { name: "PM_DATA", base: 0x9F070000, len: 0x00020000, space: "data", access: "RWX" } |
@@ -62,7 +62,7 @@ var TargetBuild = commonBld.getTargetBuild(arguments); | |||
62 | * Setup for dsp target | 62 | * Setup for dsp target |
63 | ************************************/ | 63 | ************************************/ |
64 | var dsp_tgt = xdc.useModule('ti.targets.elf.C66'); | 64 | var dsp_tgt = xdc.useModule('ti.targets.elf.C66'); |
65 | dsp_tgt.rootDir = java.lang.System.getenv("CGT_C66X_ELF_INSTALL_DIR"); | 65 | dsp_tgt.rootDir = java.lang.System.getenv("C66XCGTOOLSPATH"); |
66 | dsp_tgt.ccOpts.suffix += " --gcc -D___DSPBIOS___ -DDSP"; | 66 | dsp_tgt.ccOpts.suffix += " --gcc -D___DSPBIOS___ -DDSP"; |
67 | dsp_tgt.ccOpts.suffix += " -ms "; | 67 | dsp_tgt.ccOpts.suffix += " -ms "; |
68 | //dsp_tgt.ccOpts.suffix += " -pden -pds=48 "; | 68 | //dsp_tgt.ccOpts.suffix += " -pden -pds=48 "; |
@@ -99,13 +99,13 @@ if(trace_level == 0) { | |||
99 | HwVer = ES10; | 99 | HwVer = ES10; |
100 | var build_vayu = true; | 100 | var build_vayu = true; |
101 | print("Selected Vayu for ES10"); | 101 | print("Selected Vayu for ES10"); |
102 | 102 | ||
103 | dsp_tgt.ccOpts.suffix += " -DBUILD_FOR_VAYU"; | 103 | dsp_tgt.ccOpts.suffix += " -DBUILD_FOR_VAYU"; |
104 | dsp_tgt.ccOpts.suffix += " -DVAYU_ES10"; | 104 | dsp_tgt.ccOpts.suffix += " -DVAYU_ES10"; |
105 | dsp_tgt.platform = dsp_tgt.platforms[0]; | 105 | dsp_tgt.platform = dsp_tgt.platforms[0]; |
106 | 106 | ||
107 | } | 107 | } |
108 | 108 | ||
109 | /************************************ | 109 | /************************************ |
110 | * Setup for WIN target | 110 | * Setup for WIN target |
111 | ************************************/ | 111 | ************************************/ |
diff --git a/platform/ti/dce/baseimage/custom_rsc_table_vayu_dsp.h b/platform/ti/dce/baseimage/custom_rsc_table_vayu_dsp.h index c8891cf..c289127 100644 --- a/platform/ti/dce/baseimage/custom_rsc_table_vayu_dsp.h +++ b/platform/ti/dce/baseimage/custom_rsc_table_vayu_dsp.h | |||
@@ -1,327 +1,327 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2013, Texas Instruments Incorporated | 2 | * Copyright (c) 2013, Texas Instruments Incorporated |
3 | * All rights reserved. | 3 | * All rights reserved. |
4 | * | 4 | * |
5 | * Redistribution and use in source and binary forms, with or without | 5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions | 6 | * modification, are permitted provided that the following conditions |
7 | * are met: | 7 | * are met: |
8 | * | 8 | * |
9 | * * Redistributions of source code must retain the above copyright | 9 | * * Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. | 10 | * notice, this list of conditions and the following disclaimer. |
11 | * | 11 | * |
12 | * * Redistributions in binary form must reproduce the above copyright | 12 | * * Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the | 13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. | 14 | * documentation and/or other materials provided with the distribution. |
15 | * | 15 | * |
16 | * * Neither the name of Texas Instruments Incorporated nor the names of | 16 | * * Neither the name of Texas Instruments Incorporated nor the names of |
17 | * its contributors may be used to endorse or promote products derived | 17 | * its contributors may be used to endorse or promote products derived |
18 | * from this software without specific prior written permission. | 18 | * from this software without specific prior written permission. |
19 | * | 19 | * |
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, | 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
22 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | 22 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | 23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
24 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, | 24 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
25 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, | 25 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
26 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; | 26 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; |
27 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | 27 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
28 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | 28 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
29 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | 29 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, |
30 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 30 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
31 | */ | 31 | */ |
32 | 32 | ||
33 | /* | 33 | /* |
34 | * ======== custom_rsc_table_vayu_ipu.h ======== | 34 | * ======== custom_rsc_table_vayu_ipu.h ======== |
35 | * | 35 | * |
36 | * Define the VAYU/DRA7xx custom resource table entries for all IPU cores. This will be | 36 | * Define the VAYU/DRA7xx custom resource table entries for all IPU cores. This will be |
37 | * incorporated into corresponding base images, and used by the remoteproc | 37 | * incorporated into corresponding base images, and used by the remoteproc |
38 | * on the host-side to allocated/reserve resources. | 38 | * on the host-side to allocated/reserve resources. |
39 | * | 39 | * |
40 | */ | 40 | */ |
41 | 41 | ||
42 | #ifndef __CUSTOM_RSC_TABLE_VAYU_DSP_H__ | 42 | #ifndef __CUSTOM_RSC_TABLE_VAYU_DSP_H__ |
43 | #define __CUSTOM_RSC_TABLE_VAYU_DSP_H__ | 43 | #define __CUSTOM_RSC_TABLE_VAYU_DSP_H__ |
44 | 44 | ||
45 | #include <ti/ipc/remoteproc/rsc_types.h> | 45 | #include <ti/ipc/remoteproc/rsc_types.h> |
46 | 46 | ||
47 | /* DSP Memory Map */ | 47 | /* DSP Memory Map */ |
48 | #define L4_DRA7XX_BASE 0x4A000000 | 48 | #define L4_DRA7XX_BASE 0x4A000000 |
49 | 49 | ||
50 | /* L4_CFG & L4_WKUP */ | 50 | /* L4_CFG & L4_WKUP */ |
51 | #define L4_PERIPHERAL_L4CFG (L4_DRA7XX_BASE) | 51 | #define L4_PERIPHERAL_L4CFG (L4_DRA7XX_BASE) |
52 | #define DSP_PERIPHERAL_L4CFG 0x4A000000 | 52 | #define DSP_PERIPHERAL_L4CFG 0x4A000000 |
53 | 53 | ||
54 | #define L4_PERIPHERAL_L4PER1 0x48000000 | 54 | #define L4_PERIPHERAL_L4PER1 0x48000000 |
55 | #define DSP_PERIPHERAL_L4PER1 0x48000000 | 55 | #define DSP_PERIPHERAL_L4PER1 0x48000000 |
56 | 56 | ||
57 | #define L4_PERIPHERAL_L4PER2 0x48400000 | 57 | #define L4_PERIPHERAL_L4PER2 0x48400000 |
58 | #define DSP_PERIPHERAL_L4PER2 0x48400000 | 58 | #define DSP_PERIPHERAL_L4PER2 0x48400000 |
59 | 59 | ||
60 | #define L4_PERIPHERAL_L4PER3 0x48800000 | 60 | #define L4_PERIPHERAL_L4PER3 0x48800000 |
61 | #define DSP_PERIPHERAL_L4PER3 0x48800000 | 61 | #define DSP_PERIPHERAL_L4PER3 0x48800000 |
62 | 62 | ||
63 | #define L4_PERIPHERAL_L4EMU 0x54000000 | 63 | #define L4_PERIPHERAL_L4EMU 0x54000000 |
64 | #define DSP_PERIPHERAL_L4EMU 0x54000000 | 64 | #define DSP_PERIPHERAL_L4EMU 0x54000000 |
65 | 65 | ||
66 | #define L3_PERIPHERAL_DMM 0x4E000000 | 66 | #define L3_PERIPHERAL_DMM 0x4E000000 |
67 | #define DSP_PERIPHERAL_DMM 0x4E000000 | 67 | #define DSP_PERIPHERAL_DMM 0x4E000000 |
68 | 68 | ||
69 | 69 | ||
70 | #define L3_PERIPHERAL_ISS 0x52000000 | 70 | #define L3_PERIPHERAL_ISS 0x52000000 |
71 | #define DSP_PERIPHERAL_ISS 0x52000000 | 71 | #define DSP_PERIPHERAL_ISS 0x52000000 |
72 | 72 | ||
73 | #define L3_TILER_MODE_0_1 0x60000000 | 73 | #define L3_TILER_MODE_0_1 0x60000000 |
74 | #define DSP_TILER_MODE_0_1 0x60000000 | 74 | #define DSP_TILER_MODE_0_1 0x60000000 |
75 | 75 | ||
76 | #define L3_TILER_MODE_2 0x70000000 | 76 | #define L3_TILER_MODE_2 0x70000000 |
77 | #define DSP_TILER_MODE_2 0x70000000 | 77 | #define DSP_TILER_MODE_2 0x70000000 |
78 | 78 | ||
79 | #define L3_TILER_MODE_3 0x78000000 | 79 | #define L3_TILER_MODE_3 0x78000000 |
80 | #define DSP_TILER_MODE_3 0x78000000 | 80 | #define DSP_TILER_MODE_3 0x78000000 |
81 | 81 | ||
82 | #define DSP_MEM_TEXT 0x95000000 | 82 | #define DSP_MEM_TEXT 0x95000000 |
83 | #define DSP_MEM_IOBUFS 0x80000000 | 83 | #define DSP_MEM_IOBUFS 0x80000000 |
84 | #define DSP_MEM_DATA 0x95100000 | 84 | #define DSP_MEM_DATA 0x95200000 |
85 | #define DSP_MEM_HEAP 0x95200000 | 85 | #define DSP_MEM_HEAP 0x95400000 |
86 | 86 | ||
87 | #define DSP_MEM_IPC_DATA 0x9F000000 | 87 | #define DSP_MEM_IPC_DATA 0x9F000000 |
88 | #define DSP_MEM_IPC_VRING 0xA0000000 | 88 | #define DSP_MEM_IPC_VRING 0xA0000000 |
89 | #define DSP_MEM_RPMSG_VRING0 0xA0000000 | 89 | #define DSP_MEM_RPMSG_VRING0 0xA0000000 |
90 | #define DSP_MEM_RPMSG_VRING1 0xA0004000 | 90 | #define DSP_MEM_RPMSG_VRING1 0xA0004000 |
91 | #define DSP_MEM_VRING_BUFS0 0xA0040000 | 91 | #define DSP_MEM_VRING_BUFS0 0xA0040000 |
92 | #define DSP_MEM_VRING_BUFS1 0xA0080000 | 92 | #define DSP_MEM_VRING_BUFS1 0xA0080000 |
93 | 93 | ||
94 | #define DSP_MEM_IPC_VRING_SIZE SZ_1M | 94 | #define DSP_MEM_IPC_VRING_SIZE SZ_1M |
95 | #define DSP_MEM_IPC_DATA_SIZE SZ_1M | 95 | #define DSP_MEM_IPC_DATA_SIZE SZ_1M |
96 | 96 | ||
97 | #define DSP_MEM_TEXT_SIZE SZ_1M | 97 | #define DSP_MEM_TEXT_SIZE (SZ_1M * 2) |
98 | 98 | ||
99 | #define DSP_MEM_DATA_SIZE SZ_1M | 99 | #define DSP_MEM_DATA_SIZE (SZ_1M * 2) |
100 | #define DSP_MEM_HEAP_SIZE (SZ_1M * 3) | 100 | #define DSP_MEM_HEAP_SIZE (SZ_1M * 40) |
101 | #define DSP_MEM_IOBUFS_SIZE (SZ_1M * 90) | 101 | #define DSP_MEM_IOBUFS_SIZE (SZ_1M * 90) |
102 | 102 | ||
103 | /* | 103 | /* |
104 | * Assign fixed RAM addresses to facilitate a fixed MMU table. | 104 | * Assign fixed RAM addresses to facilitate a fixed MMU table. |
105 | * PHYS_MEM_IPC_VRING & PHYS_MEM_IPC_DATA MUST be together. | 105 | * PHYS_MEM_IPC_VRING & PHYS_MEM_IPC_DATA MUST be together. |
106 | */ | 106 | */ |
107 | /* See CMA BASE addresses in Linux side: arch/arm/mach-omap2/remoteproc.c */ | 107 | /* See CMA BASE addresses in Linux side: arch/arm/mach-omap2/remoteproc.c */ |
108 | 108 | ||
109 | #define PHYS_MEM_IPC_VRING 0x95000000 | 109 | #define PHYS_MEM_IPC_VRING 0x99800000 |
110 | #define PHYS_MEM_IOBUFS 0xBA300000 | 110 | #define PHYS_MEM_IOBUFS 0xBA300000 |
111 | 111 | ||
112 | /* | 112 | /* |
113 | * Sizes of the virtqueues (expressed in number of buffers supported, | 113 | * Sizes of the virtqueues (expressed in number of buffers supported, |
114 | * and must be power of 2) | 114 | * and must be power of 2) |
115 | */ | 115 | */ |
116 | #define DSP_RPMSG_VQ0_SIZE 256 | 116 | #define DSP_RPMSG_VQ0_SIZE 256 |
117 | #define DSP_RPMSG_VQ1_SIZE 256 | 117 | #define DSP_RPMSG_VQ1_SIZE 256 |
118 | 118 | ||
119 | /* flip up bits whose indices represent features we support */ | 119 | /* flip up bits whose indices represent features we support */ |
120 | #define RPMSG_DSP_C0_FEATURES 1 | 120 | #define RPMSG_DSP_C0_FEATURES 1 |
121 | 121 | ||
122 | struct my_resource_table { | 122 | struct my_resource_table { |
123 | struct resource_table base; | 123 | struct resource_table base; |
124 | 124 | ||
125 | UInt32 offset[18]; /* Should match 'num' in actual definition */ | 125 | UInt32 offset[18]; /* Should match 'num' in actual definition */ |
126 | 126 | ||
127 | /* rpmsg vdev entry */ | 127 | /* rpmsg vdev entry */ |
128 | struct fw_rsc_vdev rpmsg_vdev; | 128 | struct fw_rsc_vdev rpmsg_vdev; |
129 | struct fw_rsc_vdev_vring rpmsg_vring0; | 129 | struct fw_rsc_vdev_vring rpmsg_vring0; |
130 | struct fw_rsc_vdev_vring rpmsg_vring1; | 130 | struct fw_rsc_vdev_vring rpmsg_vring1; |
131 | 131 | ||
132 | /* text carveout entry */ | 132 | /* text carveout entry */ |
133 | struct fw_rsc_carveout text_cout; | 133 | struct fw_rsc_carveout text_cout; |
134 | 134 | ||
135 | /* data carveout entry */ | 135 | /* data carveout entry */ |
136 | struct fw_rsc_carveout data_cout; | 136 | struct fw_rsc_carveout data_cout; |
137 | /* heap carveout entry */ | 137 | /* heap carveout entry */ |
138 | struct fw_rsc_carveout heap_cout; | 138 | struct fw_rsc_carveout heap_cout; |
139 | 139 | ||
140 | /* ipcdata carveout entry */ | 140 | /* ipcdata carveout entry */ |
141 | struct fw_rsc_carveout ipcdata_cout; | 141 | struct fw_rsc_carveout ipcdata_cout; |
142 | 142 | ||
143 | /* trace entry */ | 143 | /* trace entry */ |
144 | struct fw_rsc_trace trace; | 144 | struct fw_rsc_trace trace; |
145 | 145 | ||
146 | /* devmem entry */ | 146 | /* devmem entry */ |
147 | struct fw_rsc_devmem devmem0; | 147 | struct fw_rsc_devmem devmem0; |
148 | 148 | ||
149 | /* devmem entry */ | 149 | /* devmem entry */ |
150 | struct fw_rsc_devmem devmem1; | 150 | struct fw_rsc_devmem devmem1; |
151 | 151 | ||
152 | /* devmem entry */ | 152 | /* devmem entry */ |
153 | struct fw_rsc_devmem devmem2; | 153 | struct fw_rsc_devmem devmem2; |
154 | 154 | ||
155 | /* devmem entry */ | 155 | /* devmem entry */ |
156 | struct fw_rsc_devmem devmem3; | 156 | struct fw_rsc_devmem devmem3; |
157 | 157 | ||
158 | /* devmem entry */ | 158 | /* devmem entry */ |
159 | struct fw_rsc_devmem devmem4; | 159 | struct fw_rsc_devmem devmem4; |
160 | 160 | ||
161 | /* devmem entry */ | 161 | /* devmem entry */ |
162 | struct fw_rsc_devmem devmem5; | 162 | struct fw_rsc_devmem devmem5; |
163 | 163 | ||
164 | /* devmem entry */ | 164 | /* devmem entry */ |
165 | struct fw_rsc_devmem devmem6; | 165 | struct fw_rsc_devmem devmem6; |
166 | 166 | ||
167 | /* devmem entry */ | 167 | /* devmem entry */ |
168 | struct fw_rsc_devmem devmem7; | 168 | struct fw_rsc_devmem devmem7; |
169 | 169 | ||
170 | /* devmem entry */ | 170 | /* devmem entry */ |
171 | struct fw_rsc_devmem devmem8; | 171 | struct fw_rsc_devmem devmem8; |
172 | 172 | ||
173 | /* devmem entry */ | 173 | /* devmem entry */ |
174 | struct fw_rsc_devmem devmem9; | 174 | struct fw_rsc_devmem devmem9; |
175 | 175 | ||
176 | /* devmem entry */ | 176 | /* devmem entry */ |
177 | struct fw_rsc_devmem devmem10; | 177 | struct fw_rsc_devmem devmem10; |
178 | 178 | ||
179 | /* devmem entry */ | 179 | /* devmem entry */ |
180 | struct fw_rsc_devmem devmem11; | 180 | struct fw_rsc_devmem devmem11; |
181 | }; | 181 | }; |
182 | 182 | ||
183 | extern char ti_trace_SysMin_Module_State_0_outbuf__A; | 183 | extern char ti_trace_SysMin_Module_State_0_outbuf__A; |
184 | #define TRACEBUFADDR (UInt32)&ti_trace_SysMin_Module_State_0_outbuf__A | 184 | #define TRACEBUFADDR (UInt32)&ti_trace_SysMin_Module_State_0_outbuf__A |
185 | 185 | ||
186 | #pragma DATA_SECTION(ti_ipc_remoteproc_ResourceTable, ".resource_table") | 186 | #pragma DATA_SECTION(ti_ipc_remoteproc_ResourceTable, ".resource_table") |
187 | #pragma DATA_ALIGN(ti_ipc_remoteproc_ResourceTable, 4096) | 187 | #pragma DATA_ALIGN(ti_ipc_remoteproc_ResourceTable, 4096) |
188 | 188 | ||
189 | struct my_resource_table ti_ipc_remoteproc_ResourceTable = { | 189 | struct my_resource_table ti_ipc_remoteproc_ResourceTable = { |
190 | 1, /* we're the first version that implements this */ | 190 | 1, /* we're the first version that implements this */ |
191 | 18, /* number of entries in the table */ | 191 | 18, /* number of entries in the table */ |
192 | 0, 0, /* reserved, must be zero */ | 192 | 0, 0, /* reserved, must be zero */ |
193 | /* offsets to entries */ | 193 | /* offsets to entries */ |
194 | { | 194 | { |
195 | offsetof(struct my_resource_table, rpmsg_vdev), | 195 | offsetof(struct my_resource_table, rpmsg_vdev), |
196 | offsetof(struct my_resource_table, text_cout), | 196 | offsetof(struct my_resource_table, text_cout), |
197 | offsetof(struct my_resource_table, data_cout), | 197 | offsetof(struct my_resource_table, data_cout), |
198 | offsetof(struct my_resource_table, heap_cout), | 198 | offsetof(struct my_resource_table, heap_cout), |
199 | offsetof(struct my_resource_table, ipcdata_cout), | 199 | offsetof(struct my_resource_table, ipcdata_cout), |
200 | offsetof(struct my_resource_table, trace), | 200 | offsetof(struct my_resource_table, trace), |
201 | offsetof(struct my_resource_table, devmem0), | 201 | offsetof(struct my_resource_table, devmem0), |
202 | offsetof(struct my_resource_table, devmem1), | 202 | offsetof(struct my_resource_table, devmem1), |
203 | offsetof(struct my_resource_table, devmem2), | 203 | offsetof(struct my_resource_table, devmem2), |
204 | offsetof(struct my_resource_table, devmem3), | 204 | offsetof(struct my_resource_table, devmem3), |
205 | offsetof(struct my_resource_table, devmem4), | 205 | offsetof(struct my_resource_table, devmem4), |
206 | offsetof(struct my_resource_table, devmem5), | 206 | offsetof(struct my_resource_table, devmem5), |
207 | offsetof(struct my_resource_table, devmem6), | 207 | offsetof(struct my_resource_table, devmem6), |
208 | offsetof(struct my_resource_table, devmem7), | 208 | offsetof(struct my_resource_table, devmem7), |
209 | offsetof(struct my_resource_table, devmem8), | 209 | offsetof(struct my_resource_table, devmem8), |
210 | offsetof(struct my_resource_table, devmem9), | 210 | offsetof(struct my_resource_table, devmem9), |
211 | offsetof(struct my_resource_table, devmem10), | 211 | offsetof(struct my_resource_table, devmem10), |
212 | offsetof(struct my_resource_table, devmem11), | 212 | offsetof(struct my_resource_table, devmem11), |
213 | }, | 213 | }, |
214 | 214 | ||
215 | /* rpmsg vdev entry */ | 215 | /* rpmsg vdev entry */ |
216 | { | 216 | { |
217 | TYPE_VDEV, VIRTIO_ID_RPMSG, 0, | 217 | TYPE_VDEV, VIRTIO_ID_RPMSG, 0, |
218 | RPMSG_DSP_C0_FEATURES, 0, 0, 0, 2, { 0, 0 }, | 218 | RPMSG_DSP_C0_FEATURES, 0, 0, 0, 2, { 0, 0 }, |
219 | /* no config data */ | 219 | /* no config data */ |
220 | }, | 220 | }, |
221 | /* the two vrings */ | 221 | /* the two vrings */ |
222 | { DSP_MEM_RPMSG_VRING0, 4096, DSP_RPMSG_VQ0_SIZE, 1, 0 }, | 222 | { DSP_MEM_RPMSG_VRING0, 4096, DSP_RPMSG_VQ0_SIZE, 1, 0 }, |
223 | { DSP_MEM_RPMSG_VRING1, 4096, DSP_RPMSG_VQ1_SIZE, 2, 0 }, | 223 | { DSP_MEM_RPMSG_VRING1, 4096, DSP_RPMSG_VQ1_SIZE, 2, 0 }, |
224 | 224 | ||
225 | { | 225 | { |
226 | TYPE_CARVEOUT, | 226 | TYPE_CARVEOUT, |
227 | DSP_MEM_TEXT, 0, | 227 | DSP_MEM_TEXT, 0, |
228 | DSP_MEM_TEXT_SIZE, 0, 0, "DSP_MEM_TEXT", | 228 | DSP_MEM_TEXT_SIZE, 0, 0, "DSP_MEM_TEXT", |
229 | }, | 229 | }, |
230 | 230 | ||
231 | { | 231 | { |
232 | TYPE_CARVEOUT, | 232 | TYPE_CARVEOUT, |
233 | DSP_MEM_DATA, 0, | 233 | DSP_MEM_DATA, 0, |
234 | DSP_MEM_DATA_SIZE, 0, 0, "DSP_MEM_DATA", | 234 | DSP_MEM_DATA_SIZE, 0, 0, "DSP_MEM_DATA", |
235 | }, | 235 | }, |
236 | 236 | ||
237 | { | 237 | { |
238 | TYPE_CARVEOUT, | 238 | TYPE_CARVEOUT, |
239 | DSP_MEM_HEAP, 0, | 239 | DSP_MEM_HEAP, 0, |
240 | DSP_MEM_HEAP_SIZE, 0, 0, "DSP_MEM_HEAP", | 240 | DSP_MEM_HEAP_SIZE, 0, 0, "DSP_MEM_HEAP", |
241 | }, | 241 | }, |
242 | 242 | ||
243 | { | 243 | { |
244 | TYPE_CARVEOUT, | 244 | TYPE_CARVEOUT, |
245 | DSP_MEM_IPC_DATA, 0, | 245 | DSP_MEM_IPC_DATA, 0, |
246 | DSP_MEM_IPC_DATA_SIZE, 0, 0, "DSP_MEM_IPC_DATA", | 246 | DSP_MEM_IPC_DATA_SIZE, 0, 0, "DSP_MEM_IPC_DATA", |
247 | }, | 247 | }, |
248 | 248 | ||
249 | { | 249 | { |
250 | TYPE_TRACE, TRACEBUFADDR, 0x8000, 0, "trace:dsp", | 250 | TYPE_TRACE, TRACEBUFADDR, 0x8000, 0, "trace:dsp", |
251 | }, | 251 | }, |
252 | 252 | ||
253 | { | 253 | { |
254 | TYPE_DEVMEM, | 254 | TYPE_DEVMEM, |
255 | DSP_MEM_IPC_VRING, PHYS_MEM_IPC_VRING, | 255 | DSP_MEM_IPC_VRING, PHYS_MEM_IPC_VRING, |
256 | DSP_MEM_IPC_VRING_SIZE, 0, 0, "DSP_MEM_IPC_VRING", | 256 | DSP_MEM_IPC_VRING_SIZE, 0, 0, "DSP_MEM_IPC_VRING", |
257 | }, | 257 | }, |
258 | 258 | ||
259 | { | 259 | { |
260 | TYPE_DEVMEM, | 260 | TYPE_DEVMEM, |
261 | DSP_MEM_IOBUFS, PHYS_MEM_IOBUFS, | 261 | DSP_MEM_IOBUFS, PHYS_MEM_IOBUFS, |
262 | DSP_MEM_IOBUFS_SIZE, 0, 0, "DSP_MEM_IOBUFS", | 262 | DSP_MEM_IOBUFS_SIZE, 0, 0, "DSP_MEM_IOBUFS", |
263 | }, | 263 | }, |
264 | 264 | ||
265 | { | 265 | { |
266 | TYPE_DEVMEM, | 266 | TYPE_DEVMEM, |
267 | DSP_TILER_MODE_0_1, L3_TILER_MODE_0_1, | 267 | DSP_TILER_MODE_0_1, L3_TILER_MODE_0_1, |
268 | SZ_256M, 0, 0, "DSP_TILER_MODE_0_1", | 268 | SZ_256M, 0, 0, "DSP_TILER_MODE_0_1", |
269 | }, | 269 | }, |
270 | 270 | ||
271 | { | 271 | { |
272 | TYPE_DEVMEM, | 272 | TYPE_DEVMEM, |
273 | DSP_TILER_MODE_2, L3_TILER_MODE_2, | 273 | DSP_TILER_MODE_2, L3_TILER_MODE_2, |
274 | SZ_128M, 0, 0, "DSP_TILER_MODE_2", | 274 | SZ_128M, 0, 0, "DSP_TILER_MODE_2", |
275 | }, | 275 | }, |
276 | 276 | ||
277 | { | 277 | { |
278 | TYPE_DEVMEM, | 278 | TYPE_DEVMEM, |
279 | DSP_TILER_MODE_3, L3_TILER_MODE_3, | 279 | DSP_TILER_MODE_3, L3_TILER_MODE_3, |
280 | SZ_128M, 0, 0, "DSP_TILER_MODE_3", | 280 | SZ_128M, 0, 0, "DSP_TILER_MODE_3", |
281 | }, | 281 | }, |
282 | 282 | ||
283 | { | 283 | { |
284 | TYPE_DEVMEM, | 284 | TYPE_DEVMEM, |
285 | DSP_PERIPHERAL_L4CFG, L4_PERIPHERAL_L4CFG, | 285 | DSP_PERIPHERAL_L4CFG, L4_PERIPHERAL_L4CFG, |
286 | SZ_16M, 0, 0, "DSP_PERIPHERAL_L4CFG", | 286 | SZ_16M, 0, 0, "DSP_PERIPHERAL_L4CFG", |
287 | }, | 287 | }, |
288 | 288 | ||
289 | { | 289 | { |
290 | TYPE_DEVMEM, | 290 | TYPE_DEVMEM, |
291 | DSP_PERIPHERAL_L4PER1, L4_PERIPHERAL_L4PER1, | 291 | DSP_PERIPHERAL_L4PER1, L4_PERIPHERAL_L4PER1, |
292 | SZ_2M, 0, 0, "DSP_PERIPHERAL_L4PER1", | 292 | SZ_2M, 0, 0, "DSP_PERIPHERAL_L4PER1", |
293 | }, | 293 | }, |
294 | 294 | ||
295 | { | 295 | { |
296 | TYPE_DEVMEM, | 296 | TYPE_DEVMEM, |
297 | DSP_PERIPHERAL_L4PER2, L4_PERIPHERAL_L4PER2, | 297 | DSP_PERIPHERAL_L4PER2, L4_PERIPHERAL_L4PER2, |
298 | SZ_4M, 0, 0, "DSP_PERIPHERAL_L4PER2", | 298 | SZ_4M, 0, 0, "DSP_PERIPHERAL_L4PER2", |
299 | }, | 299 | }, |
300 | 300 | ||
301 | { | 301 | { |
302 | TYPE_DEVMEM, | 302 | TYPE_DEVMEM, |
303 | DSP_PERIPHERAL_L4PER3, L4_PERIPHERAL_L4PER3, | 303 | DSP_PERIPHERAL_L4PER3, L4_PERIPHERAL_L4PER3, |
304 | SZ_8M, 0, 0, "DSP_PERIPHERAL_L4PER3", | 304 | SZ_8M, 0, 0, "DSP_PERIPHERAL_L4PER3", |
305 | }, | 305 | }, |
306 | 306 | ||
307 | { | 307 | { |
308 | TYPE_DEVMEM, | 308 | TYPE_DEVMEM, |
309 | DSP_PERIPHERAL_L4EMU, L4_PERIPHERAL_L4EMU, | 309 | DSP_PERIPHERAL_L4EMU, L4_PERIPHERAL_L4EMU, |
310 | SZ_16M, 0, 0, "DSP_PERIPHERAL_L4EMU", | 310 | SZ_16M, 0, 0, "DSP_PERIPHERAL_L4EMU", |
311 | }, | 311 | }, |
312 | 312 | ||
313 | { | 313 | { |
314 | TYPE_DEVMEM, | 314 | TYPE_DEVMEM, |
315 | DSP_PERIPHERAL_DMM, L3_PERIPHERAL_DMM, | 315 | DSP_PERIPHERAL_DMM, L3_PERIPHERAL_DMM, |
316 | SZ_1M, 0, 0, "DSP_PERIPHERAL_DMM", | 316 | SZ_1M, 0, 0, "DSP_PERIPHERAL_DMM", |
317 | }, | 317 | }, |
318 | 318 | ||
319 | { | 319 | { |
320 | TYPE_DEVMEM, | 320 | TYPE_DEVMEM, |
321 | DSP_PERIPHERAL_ISS, L3_PERIPHERAL_ISS, | 321 | DSP_PERIPHERAL_ISS, L3_PERIPHERAL_ISS, |
322 | SZ_256K, 0, 0, "DSP_PERIPHERAL_ISS", | 322 | SZ_256K, 0, 0, "DSP_PERIPHERAL_ISS", |
323 | }, | 323 | }, |
324 | }; | 324 | }; |
325 | 325 | ||
326 | #endif /* __CUSTOM_RSC_TABLE_VAYU_DSP_H__ */ | 326 | #endif /* __CUSTOM_RSC_TABLE_VAYU_DSP_H__ */ |
327 | 327 | ||
diff --git a/platform/ti/dce/baseimage/dce_dsp.cfg b/platform/ti/dce/baseimage/dce_dsp.cfg index c4e1544..9669492 100644 --- a/platform/ti/dce/baseimage/dce_dsp.cfg +++ b/platform/ti/dce/baseimage/dce_dsp.cfg | |||
@@ -1,195 +1,250 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2011, Texas Instruments Incorporated | 2 | * Copyright (c) 2011, Texas Instruments Incorporated |
3 | * All rights reserved. | 3 | * All rights reserved. |
4 | * | 4 | * |
5 | * Redistribution and use in source and binary forms, with or without | 5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions | 6 | * modification, are permitted provided that the following conditions |
7 | * are met: | 7 | * are met: |
8 | * | 8 | * |
9 | * * Redistributions of source code must retain the above copyright | 9 | * * Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. | 10 | * notice, this list of conditions and the following disclaimer. |
11 | * | 11 | * |
12 | * * Redistributions in binary form must reproduce the above copyright | 12 | * * Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the | 13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. | 14 | * documentation and/or other materials provided with the distribution. |
15 | * | 15 | * |
16 | * * Neither the name of Texas Instruments Incorporated nor the names of | 16 | * * Neither the name of Texas Instruments Incorporated nor the names of |
17 | * its contributors may be used to endorse or promote products derived | 17 | * its contributors may be used to endorse or promote products derived |
18 | * from this software without specific prior written permission. | 18 | * from this software without specific prior written permission. |
19 | * | 19 | * |
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, | 21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, |
22 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | 22 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | 23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
24 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, | 24 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
25 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, | 25 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
26 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; | 26 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; |
27 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | 27 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
28 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | 28 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
29 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | 29 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, |
30 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 30 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
31 | */ | 31 | */ |
32 | 32 | ||
33 | 33 | ||
34 | var hw_OMAP4 = 0; | 34 | var hw_OMAP4 = 0; |
35 | var hw_OMAP5 = 1; | 35 | var hw_OMAP5 = 1; |
36 | var hw_VAYU = 2; | 36 | var hw_VAYU = 2; |
37 | var VIRTIO = 0; | 37 | var VIRTIO = 0; |
38 | var ZEBU = 0; | 38 | var ZEBU = 0; |
39 | var ES10 = 1; | 39 | var ES10 = 1; |
40 | var ES20 = 2; | 40 | var ES20 = 2; |
41 | 41 | ||
42 | var Program = xdc.useModule('xdc.cfg.Program'); | 42 | var Program = xdc.useModule('xdc.cfg.Program'); |
43 | 43 | ||
44 | var cfgArgs = prog.build.cfgArgs; | 44 | var cfgArgs = prog.build.cfgArgs; |
45 | 45 | ||
46 | Program.global.HwType = cfgArgs.HwType; | 46 | Program.global.HwType = cfgArgs.HwType; |
47 | Program.global.enableSMP = cfgArgs.enableSMP; | 47 | Program.global.enableSMP = cfgArgs.enableSMP; |
48 | Program.global.HwVer = cfgArgs.HwVer; | 48 | Program.global.HwVer = cfgArgs.HwVer; |
49 | Program.global.coreName = "dsp"; | 49 | Program.global.coreName = "dsp"; |
50 | 50 | ||
51 | print("HwType = " + Program.global.HwType); | 51 | print("HwType = " + Program.global.HwType); |
52 | 52 | ||
53 | if(Program.global.HwType == hw_VAYU) | 53 | //************************************* |
54 | { | 54 | var System = xdc.useModule('xdc.runtime.System'); |
55 | // xdc.loadCapsule("ti/configs/vayu/IpcCommon.cfg.xs"); | 55 | var SysMin = xdc.useModule('ti.trace.SysMin'); |
56 | xdc.includeFile("ti/configs/vayu/Dsp1.cfg"); | 56 | System.SupportProxy = SysMin; |
57 | 57 | SysMin.bufSize = 0x8000; | |
58 | } | 58 | |
59 | else | 59 | var Memory = xdc.useModule('xdc.runtime.Memory'); |
60 | { | 60 | Memory.defaultHeapSize = 0x20000; |
61 | // xdc.loadCapsule("ti/configs/omap54xx/IpcCommon.cfg.xs"); | 61 | |
62 | xdc.includeFile("ti/configs/omap54xx/Dsp.cfg"); | 62 | var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore'); |
63 | xdc.includeFile("ti/configs/omap54xx/DspAmmu.cfg"); | 63 | |
64 | } | 64 | var Cache = xdc.useModule('ti.sysbios.family.c66.Cache'); |
65 | 65 | Cache.setMarMeta(0xa0000000, 0x02000000, Cache.Mar_DISABLE); | |
66 | xdc.loadPackage('ti.ipc.mm'); | 66 | var L1cache = new Cache.Size(); |
67 | xdc.loadPackage('ti.ipc.ipcmgr'); | 67 | L1cache.l1dSize = Cache.L1Size_0K; |
68 | xdc.loadPackage('ti.srvmgr'); | 68 | |
69 | xdc.loadPackage('ti.srvmgr.omaprpc'); | 69 | xdc.loadPackage('ti.sdo.ipc.family.vayu'); |
70 | 70 | xdc.useModule('ti.sdo.ipc.family.vayu.InterruptDsp'); | |
71 | // Disabling default IpcCommon trace | 71 | xdc.loadPackage('ti.ipc.rpmsg'); |
72 | var Registry = xdc.useModule('xdc.runtime.Registry'); | 72 | xdc.loadPackage('ti.ipc.family.vayu'); |
73 | var Diags = xdc.useModule('xdc.runtime.Diags'); | 73 | |
74 | var Task = xdc.useModule('ti.sysbios.knl.Task'); | 74 | /* Enable Memory Translation module that operates on the BIOS Resource Table */ |
75 | Task.common$.namedInstance = true; | 75 | var Resource = xdc.useModule('ti.ipc.remoteproc.Resource'); |
76 | 76 | Resource.loadSegment = "EXT_CODE" | |
77 | Registry.common$.diags_ENTRY = Diags.RUNTIME_OFF; | 77 | |
78 | Registry.common$.diags_EXIT = Diags.RUNTIME_OFF; | 78 | /* Modules used in Power Management */ |
79 | Registry.common$.diags_USER1 = Diags.RUNTIME_OFF; | 79 | xdc.loadPackage('ti.pm'); |
80 | Registry.common$.diags_INFO = Diags.RUNTIME_OFF; | 80 | |
81 | Registry.common$.diags_LIFECYCLE = Diags.ALWAYS_ON; | 81 | /* Idle function that periodically flushes the unicache */ |
82 | Registry.common$.diags_STATUS = Diags.ALWAYS_ON; | 82 | var Idle = xdc.useModule('ti.sysbios.knl.Idle'); |
83 | Diags.setMaskEnabled = true; | 83 | Idle.addFunc('&VirtQueue_cacheWb'); |
84 | 84 | ||
85 | var Memory = xdc.useModule('xdc.runtime.Memory'); | 85 | var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf'); |
86 | var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem'); | 86 | var List = xdc.useModule('ti.sdo.utils.List'); |
87 | var GateHwi = xdc.useModule('ti.sysbios.gates.GateHwi'); | 87 | |
88 | HeapMem.common$.gate = GateHwi.create(); | 88 | xdc.useModule('ti.sysbios.xdcruntime.GateThreadSupport'); |
89 | 89 | var GateSwi = xdc.useModule('ti.sysbios.gates.GateSwi'); | |
90 | 90 | ||
91 | var heapMemParams = new HeapMem.Params; | 91 | var Task = xdc.useModule('ti.sysbios.knl.Task'); |
92 | heapMemParams.size = 0x280000; // 2.5MB | 92 | Task.common$.namedInstance = true; |
93 | heapMemParams.sectionName = ".systemHeap"; | 93 | |
94 | var heap0 = HeapMem.create(heapMemParams); | 94 | var Assert = xdc.useModule('xdc.runtime.Assert'); |
95 | Memory.defaultHeapInstance = heap0; | 95 | var Defaults = xdc.useModule('xdc.runtime.Defaults'); |
96 | Program.global.heap0 = heap0; | 96 | var Diags = xdc.useModule('xdc.runtime.Diags'); |
97 | 97 | var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys'); | |
98 | /* | 98 | var LoggerSysParams = new LoggerSys.Params(); |
99 | * Setup memory map. | 99 | |
100 | */ | 100 | /* Enable Logger: */ |
101 | 101 | Defaults.common$.logger = LoggerSys.create(LoggerSysParams); | |
102 | /* Mark heaps as NOINIT for optimizing boot-time */ | 102 | |
103 | Program.sectMap[".systemHeap"] = new Program.SectionSpec(); | 103 | /* Enable runtime Diags_setMask() for non-XDC spec'd modules: */ |
104 | Program.sectMap[".systemHeap"].loadSegment = "EXT_HEAP"; | 104 | var Text = xdc.useModule('xdc.runtime.Text'); |
105 | Program.sectMap[".systemHeap"].type = "NOINIT"; | 105 | Text.isLoaded = true; |
106 | 106 | ||
107 | 107 | var Main = xdc.useModule('xdc.runtime.Main'); | |
108 | /* ----------------------------- VERSION CONFIGURATION ---------------------*/ | 108 | Main.common$.diags_ASSERT = Diags.ALWAYS_ON; |
109 | var commonBld = xdc.loadCapsule("build/common.bld"); | 109 | Main.common$.diags_INTERNAL = Diags.ALWAYS_ON; |
110 | commonBld.GetVersionTag(); | 110 | |
111 | 111 | var Hwi = xdc.useModule('ti.sysbios.family.c64p.Hwi'); | |
112 | /* | 112 | Hwi.enableException = true; |
113 | * ======== CODEC ENGINE configurations ======== | 113 | |
114 | */ | 114 | /* -------------------------------- DSP ----------------------------------*/ |
115 | 115 | var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc'); | |
116 | var Global = xdc.useModule('ti.sdo.ce.osal.Global'); | 116 | MultiProc.setConfig("DSP1", ["HOST", "IPU2", "IPU1", "DSP2", "DSP1"]); |
117 | Global.runtimeEnv = Global.DSPBIOS; | 117 | |
118 | 118 | /* --------------------------- TICK --------------------------------------*/ | |
119 | xdc.useModule('ti.sdo.ce.global.Settings').profile = "debug"; | 119 | var Clock = xdc.useModule('ti.sysbios.knl.Clock'); |
120 | xdc.loadPackage('ti.sdo.ce.video').profile = "debug"; | 120 | Clock.tickSource = Clock.TickSource_NULL; |
121 | xdc.loadPackage('ti.sdo.ce.video3').profile = "debug"; | 121 | |
122 | xdc.loadPackage('ti.sdo.ce.alg').profile = "debug"; | 122 | //************************************** |
123 | 123 | xdc.loadPackage('ti.ipc.mm'); | |
124 | var HeapBufMP = xdc.useModule('ti.sdo.ipc.heaps.HeapBufMP'); | 124 | xdc.loadPackage('ti.ipc.ipcmgr'); |
125 | 125 | xdc.loadPackage('ti.srvmgr'); | |
126 | var ipcSettings = xdc.useModule('ti.sdo.ce.ipc.Settings'); | 126 | xdc.loadPackage('ti.srvmgr.omaprpc'); |
127 | ipcSettings.ipc = xdc.useModule('ti.sdo.ce.ipc.bios.Ipc'); | 127 | |
128 | // set to true to enable debugging of codec engine | 128 | // Disabling default IpcCommon trace |
129 | xdc.useModule('ti.sdo.ce.Settings').checked = true; | 129 | var Registry = xdc.useModule('xdc.runtime.Registry'); |
130 | 130 | var Diags = xdc.useModule('xdc.runtime.Diags'); | |
131 | /* Enable Memory Translation module that operates on the BIOS Resource Table */ | 131 | var Task = xdc.useModule('ti.sysbios.knl.Task'); |
132 | var Resource = xdc.useModule('ti.ipc.remoteproc.Resource'); | 132 | Task.common$.namedInstance = true; |
133 | Resource.customTable = true; | 133 | |
134 | 134 | Registry.common$.diags_ENTRY = Diags.RUNTIME_OFF; | |
135 | // Load decoder/encoder APIs: | 135 | Registry.common$.diags_EXIT = Diags.RUNTIME_OFF; |
136 | var VIDDEC2 = xdc.useModule('ti.sdo.ce.video2.IVIDDEC2'); | 136 | Registry.common$.diags_USER1 = Diags.RUNTIME_OFF; |
137 | var UNIVERSAL = xdc.useModule('ti.sdo.ce.universal.IUNIVERSAL'); | 137 | Registry.common$.diags_INFO = Diags.RUNTIME_OFF; |
138 | 138 | Registry.common$.diags_LIFECYCLE = Diags.ALWAYS_ON; | |
139 | // load whatever codecs are available in the build | 139 | Registry.common$.diags_STATUS = Diags.ALWAYS_ON; |
140 | var codecs = []; | 140 | Diags.setMaskEnabled = true; |
141 | 141 | ||
142 | function loadCodec(pkg, name) | 142 | var Memory = xdc.useModule('xdc.runtime.Memory'); |
143 | { | 143 | var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem'); |
144 | try { | 144 | var GateHwi = xdc.useModule('ti.sysbios.gates.GateHwi'); |
145 | var codec = xdc.useModule(pkg); | 145 | HeapMem.common$.gate = GateHwi.create(); |
146 | print('loading: ' + name); | 146 | |
147 | codecs.push({ name: name, mod: codec, local: true }); | 147 | |
148 | } catch(e) { | 148 | var heapMemParams = new HeapMem.Params; |
149 | print('no package: ' + pkg); | 149 | heapMemParams.size = 0x2400000; // 36MB |
150 | } | 150 | heapMemParams.sectionName = ".systemHeap"; |
151 | } | 151 | var heap0 = HeapMem.create(heapMemParams); |
152 | 152 | Memory.defaultHeapInstance = heap0; | |
153 | loadCodec('ti.sdo.codecs.universal.ce.UNIVERSAL', 'dsp_universalCopy'); | 153 | Program.global.heap0 = heap0; |
154 | 154 | ||
155 | var engine = xdc.useModule('ti.sdo.ce.Engine'); | 155 | /* |
156 | var myEngine = engine.create("dsp_vidsvr", codecs); | 156 | * Setup memory map. |
157 | 157 | */ | |
158 | xdc.useModule('ti.sysbios.knl.Task'); | 158 | |
159 | var Task = xdc.useModule('ti.sysbios.knl.Task'); | 159 | /* Mark heaps as NOINIT for optimizing boot-time */ |
160 | Task.defaultStackSize = 12 * 0x400; | 160 | Program.sectMap[".systemHeap"] = new Program.SectionSpec(); |
161 | 161 | Program.sectMap[".systemHeap"].loadSegment = "EXT_HEAP"; | |
162 | /* ----------------------------- Configure BIOS--------------------------------*/ | 162 | Program.sectMap[".systemHeap"].type = "NOINIT"; |
163 | 163 | Program.sectMap[".tracebuf"] = "TRACE_BUF"; | |
164 | BIOS = xdc.useModule('ti.sysbios.BIOS'); | 164 | Program.sectMap[".errorbuf"] = "EXC_DATA"; |
165 | BIOS.addUserStartupFunction('&IpcMgr_rpmsgStartup'); | 165 | |
166 | 166 | /* ----------------------------- VERSION CONFIGURATION ---------------------*/ | |
167 | BIOS.clockEnabled = true; | 167 | var commonBld = xdc.loadCapsule("build/common.bld"); |
168 | BIOS.libType = BIOS.LibType_Custom; | 168 | commonBld.GetVersionTag(); |
169 | BIOS.smpEnabled = false; | 169 | |
170 | 170 | /* | |
171 | 171 | * ======== CODEC ENGINE configurations ======== | |
172 | var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); | 172 | */ |
173 | if(Program.global.HwType == hw_OMAP5 || Program.global.HwType == hw_VAYU) | 173 | |
174 | { | 174 | var Global = xdc.useModule('ti.sdo.ce.osal.Global'); |
175 | /* | 175 | Global.runtimeEnv = Global.DSPBIOS; |
176 | BIOS assumes that default frequency is 38.4 MHz. On OMAP5, SYS_CLK is used to source | 176 | |
177 | Hence it is clocked at 19.2 MHz. | 177 | xdc.useModule('ti.sdo.ce.global.Settings').profile = "debug"; |
178 | 178 | xdc.loadPackage('ti.sdo.ce.video').profile = "debug"; | |
179 | Locally setting the BIOS configuration for GPT and CTM for OMAP5 till actual changes are | 179 | xdc.loadPackage('ti.sdo.ce.video3').profile = "debug"; |
180 | present in omap54xx/ipu/Platform.xdc | 180 | xdc.loadPackage('ti.sdo.ce.alg').profile = "debug"; |
181 | */ | 181 | |
182 | Timer.intFreq.hi = 0; | 182 | var HeapBufMP = xdc.useModule('ti.sdo.ipc.heaps.HeapBufMP'); |
183 | Timer.intFreq.lo = 19200000; | 183 | |
184 | BIOS.cpuFreq.hi = 0; | 184 | var ipcSettings = xdc.useModule('ti.sdo.ce.ipc.Settings'); |
185 | BIOS.cpuFreq.lo = 600000000; | 185 | ipcSettings.ipc = xdc.useModule('ti.sdo.ce.ipc.bios.Ipc'); |
186 | } | 186 | // set to true to enable debugging of codec engine |
187 | 187 | xdc.useModule('ti.sdo.ce.Settings').checked = true; | |
188 | Program.sectMap[".plt"] = "EXT_DATA"; | 188 | |
189 | 189 | /* Enable Memory Translation module that operates on the BIOS Resource Table */ | |
190 | 190 | var Resource = xdc.useModule('ti.ipc.remoteproc.Resource'); | |
191 | /* IPC 3.x is no longer providing version capability. If needed, then IPC needs to implement it. */ | 191 | Resource.customTable = true; |
192 | /* Version module; this will produce a .version section with trees infos. Read | 192 | |
193 | * with "readelf -p .version <base_image>" */ | 193 | // Load decoder/encoder APIs: |
194 | // xdc.useModule('ti.utils.Version'); | 194 | var VIDDEC2 = xdc.useModule('ti.sdo.ce.video2.IVIDDEC2'); |
195 | 195 | var UNIVERSAL = xdc.useModule('ti.sdo.ce.universal.IUNIVERSAL'); | |
196 | |||
197 | // load whatever codecs are available in the build | ||
198 | var codecs = []; | ||
199 | |||
200 | function loadCodec(pkg, name) | ||
201 | { | ||
202 | try { | ||
203 | var codec = xdc.useModule(pkg); | ||
204 | print('loading: ' + name); | ||
205 | codecs.push({ name: name, mod: codec, local: true }); | ||
206 | } catch(e) { | ||
207 | print('no package: ' + pkg); | ||
208 | } | ||
209 | } | ||
210 | |||
211 | loadCodec('ti.sdo.codecs.universal.ce.UNIVERSAL', 'dsp_universalCopy'); | ||
212 | |||
213 | var engine = xdc.useModule('ti.sdo.ce.Engine'); | ||
214 | var myEngine = engine.create("dsp_vidsvr", codecs); | ||
215 | |||
216 | xdc.useModule('ti.sysbios.knl.Task'); | ||
217 | var Task = xdc.useModule('ti.sysbios.knl.Task'); | ||
218 | Task.defaultStackSize = 12 * 0x400; | ||
219 | |||
220 | /* ----------------------------- Configure BIOS--------------------------------*/ | ||
221 | |||
222 | BIOS = xdc.useModule('ti.sysbios.BIOS'); | ||
223 | BIOS.addUserStartupFunction('&IpcMgr_rpmsgStartup'); | ||
224 | |||
225 | BIOS.clockEnabled = true; | ||
226 | BIOS.libType = BIOS.LibType_Custom; | ||
227 | BIOS.smpEnabled = false; | ||
228 | |||
229 | |||
230 | var Timer = xdc.useModule('ti.sysbios.timers.dmtimer.Timer'); | ||
231 | /* | ||
232 | BIOS assumes that default frequency is 38.4 MHz. On OMAP5, SYS_CLK is used to source | ||
233 | Hence it is clocked at 19.2 MHz. | ||
234 | |||
235 | Locally setting the BIOS configuration for GPT and CTM for OMAP5 till actual changes are | ||
236 | present in omap54xx/ipu/Platform.xdc | ||
237 | */ | ||
238 | Timer.intFreq.hi = 0; | ||
239 | Timer.intFreq.lo = 19200000; | ||
240 | BIOS.cpuFreq.hi = 0; | ||
241 | BIOS.cpuFreq.lo = 600000000; | ||
242 | |||
243 | Program.sectMap[".plt"] = "EXT_DATA"; | ||
244 | |||
245 | |||
246 | /* IPC 3.x is no longer providing version capability. If needed, then IPC needs to implement it. */ | ||
247 | /* Version module; this will produce a .version section with trees infos. Read | ||
248 | * with "readelf -p .version <base_image>" */ | ||
249 | // xdc.useModule('ti.utils.Version'); | ||
250 | |||
diff --git a/platform/ti/dce/baseimage/main.c b/platform/ti/dce/baseimage/main.c index 0186203..3694c3c 100644 --- a/platform/ti/dce/baseimage/main.c +++ b/platform/ti/dce/baseimage/main.c | |||
@@ -85,10 +85,11 @@ void tools_ShowVersion() | |||
85 | System_printf("\n\n **** DSPMM VERSION INFO **** \n\nCompile DATE %s TIME %s \n", __DATE__, __TIME__); | 85 | System_printf("\n\n **** DSPMM VERSION INFO **** \n\nCompile DATE %s TIME %s \n", __DATE__, __TIME__); |
86 | 86 | ||
87 | System_printf("\n** DSPMM VERSION INFO END ** \n"); | 87 | System_printf("\n** DSPMM VERSION INFO END ** \n"); |
88 | 88 | #if 0 | |
89 | System_printf("Trace Buffer PA 0x%x Trace Level %d\ | 89 | System_printf("Trace Buffer PA 0x%x Trace Level %d\ |
90 | \nTrace Usage: level:[0-4: 0-no trace, 1-err, 2-debug, 3-info, 4-CE,FC,IPC traces] \n\n", | 90 | \nTrace Usage: level:[0-4: 0-no trace, 1-err, 2-debug, 3-info, 4-CE,FC,IPC traces] \n\n", |
91 | MEMUTILS_getPhysicalAddr((Ptr)(TRACEBUFADDR)), dce_debug); | 91 | MEMUTILS_getPhysicalAddr((Ptr)(TRACEBUFADDR)), dce_debug); |
92 | #endif | ||
92 | } | 93 | } |
93 | 94 | ||
94 | int main(int argc, char * *argv) | 95 | int main(int argc, char * *argv) |
diff --git a/src/ti/framework/dce/dce.c b/src/ti/framework/dce/dce.c index 0b7093d..875b33e 100644 --- a/src/ti/framework/dce/dce.c +++ b/src/ti/framework/dce/dce.c | |||
@@ -29,7 +29,7 @@ | |||
29 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | 29 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, |
30 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 30 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
31 | */ | 31 | */ |
32 | 32 | ||
33 | #include <stdlib.h> | 33 | #include <stdlib.h> |
34 | #include <stdint.h> | 34 | #include <stdint.h> |
35 | #include <string.h> | 35 | #include <string.h> |
@@ -101,13 +101,13 @@ static Int32 engine_close(UInt32 size, UInt32 *data); | |||
101 | 101 | ||
102 | /* VIDDEC2 Decoder Server static function declarations */ | 102 | /* VIDDEC2 Decoder Server static function declarations */ |
103 | static VIDDEC2_Handle viddec2_create(Engine_Handle engine, String name, VIDDEC2_Params *params); | 103 | static VIDDEC2_Handle viddec2_create(Engine_Handle engine, String name, VIDDEC2_Params *params); |
104 | static int viddec2_reloc(VIDDEC2_Handle handle, uint8_t *ptr, uint32_t len); | 104 | static int viddec2_reloc(VIDDEC2_Handle handle, uint8_t *ptr, uint32_t len); |
105 | static int viddec2_control(VIDDEC2_Handle handle, VIDDEC2_Cmd id, VIDDEC2_DynamicParams *dynParams, | 105 | static int viddec2_control(VIDDEC2_Handle handle, VIDDEC2_Cmd id, VIDDEC2_DynamicParams *dynParams, |
106 | VIDDEC2_Status *status ); | 106 | VIDDEC2_Status *status ); |
107 | static int viddec2_process(VIDDEC2_Handle handle, XDM1_BufDesc *inBufs, | 107 | static int viddec2_process(VIDDEC2_Handle handle, XDM1_BufDesc *inBufs, |
108 | XDM_BufDesc *outBufs, VIDDEC2_InArgs *inArgs, VIDDEC2_OutArgs *outArgs ); | 108 | XDM_BufDesc *outBufs, VIDDEC2_InArgs *inArgs, VIDDEC2_OutArgs *outArgs ); |
109 | static int viddec2_delete(VIDDEC2_Handle handle); | 109 | static int viddec2_delete(VIDDEC2_Handle handle); |
110 | 110 | ||
111 | static struct { | 111 | static struct { |
112 | CreateFxn create; | 112 | CreateFxn create; |
113 | ControlFxn control; | 113 | ControlFxn control; |
@@ -124,7 +124,7 @@ static struct { | |||
124 | }, | 124 | }, |
125 | }; | 125 | }; |
126 | 126 | ||
127 | 127 | #define UNIVERSAL_COPY_EXAMPLE | |
128 | /* Static version string buffer. | 128 | /* Static version string buffer. |
129 | * Note: codec version can be large. For example, h264vdec needs more than | 129 | * Note: codec version can be large. For example, h264vdec needs more than |
130 | * 58 characters, or the query will fail. */ | 130 | * 58 characters, or the query will fail. */ |
@@ -139,7 +139,7 @@ static char version_buffer[VERSION_SIZE]; | |||
139 | * it gets populated in the future versions of framework components. | 139 | * it gets populated in the future versions of framework components. |
140 | * | 140 | * |
141 | * Forced off mode during video decode/encode is not supported. */ | 141 | * Forced off mode during video decode/encode is not supported. */ |
142 | #if 0 | 142 | #if 0 |
143 | static void dce_suspend() | 143 | static void dce_suspend() |
144 | { | 144 | { |
145 | INFO("Preparing for suspend..."); | 145 | INFO("Preparing for suspend..."); |
@@ -153,6 +153,7 @@ static void dce_resume() | |||
153 | } | 153 | } |
154 | #endif | 154 | #endif |
155 | 155 | ||
156 | #ifdef UNIVERSAL_COPY_EXAMPLE | ||
156 | static void get_universal_version(UNIVERSAL_Handle h, char *buffer, unsigned size) | 157 | static void get_universal_version(UNIVERSAL_Handle h, char *buffer, unsigned size) |
157 | { | 158 | { |
158 | UNIVERSAL_DynamicParams params = | 159 | UNIVERSAL_DynamicParams params = |
@@ -180,20 +181,59 @@ static void get_universal_version(UNIVERSAL_Handle h, char *buffer, unsigned siz | |||
180 | ERROR("Unknown version Error = %d:: buffer = %p size = %d", s, buffer, size); | 181 | ERROR("Unknown version Error = %d:: buffer = %p size = %d", s, buffer, size); |
181 | } | 182 | } |
182 | } | 183 | } |
184 | #else | ||
185 | static void get_viddec2_version(VIDDEC2_Handle h, char *buffer, unsigned size) | ||
186 | { | ||
187 | VIDDEC2_DynamicParams params = | ||
188 | { | ||
189 | .size = sizeof(VIDDEC2_DynamicParams), | ||
190 | }; | ||
191 | |||
192 | VIDDEC2_Status status = | ||
193 | { | ||
194 | .size = sizeof(VIDDEC2_Status), | ||
195 | .data = | ||
196 | { | ||
197 | .buf = (XDAS_Int8 *)buffer, | ||
198 | .bufSize = (XDAS_Int32)size, | ||
199 | }, | ||
200 | }; | ||
201 | |||
202 | XDAS_Int32 s; | ||
203 | |||
204 | memset(buffer, 0, size); | ||
205 | s = VIDDEC2_control(h, XDM_GETVERSION, ¶ms, &status); | ||
206 | |||
207 | if( s != VIDDEC2_EOK ) { | ||
208 | ERROR("Unknown version Error = %d:: buffer = %p size = %d", s, buffer, size); | ||
209 | } | ||
210 | } | ||
211 | |||
212 | #endif | ||
183 | 213 | ||
184 | // VIDDEC2_create wrapper, to display version string in the trace. | 214 | // VIDDEC2_create wrapper, to display version string in the trace. |
185 | static VIDDEC2_Handle viddec2_create(Engine_Handle engine, String name, VIDDEC2_Params *params) | 215 | static VIDDEC2_Handle viddec2_create(Engine_Handle engine, String name, VIDDEC2_Params *params) |
186 | { | 216 | { |
217 | #ifdef UNIVERSAL_COPY_EXAMPLE | ||
187 | UNIVERSAL_Handle h; | 218 | UNIVERSAL_Handle h; |
188 | 219 | ||
189 | DEBUG(">> engine=%08x, name=%s, params=%p", engine, name, params); | 220 | DEBUG(">> engine=%08x, name=%s, params=%p", engine, name, params); |
190 | 221 | ||
191 | h = UNIVERSAL_create(engine, name, (IUNIVERSAL_Params*)params); | 222 | h = UNIVERSAL_create(engine, name, (IUNIVERSAL_Params*)params); |
192 | 223 | if(h){ | |
193 | get_universal_version(h, version_buffer, VERSION_SIZE); | 224 | get_universal_version(h, version_buffer, VERSION_SIZE); |
194 | 225 | INFO("Created codec %s: version %s", name, version_buffer); | |
195 | INFO("Created codec %s: version %s", name, version_buffer); | 226 | } |
196 | 227 | #else | |
228 | VIDDEC2_Handle h; | ||
229 | |||
230 | h = VIDDEC2_create(engine, name, params); | ||
231 | |||
232 | if( h ) { | ||
233 | get_viddec2_version(h, version_buffer, VERSION_SIZE); | ||
234 | INFO("Created viddec2 %s: version %s", name, version_buffer); | ||
235 | } | ||
236 | #endif | ||
197 | return ((VIDDEC2_Handle)h); | 237 | return ((VIDDEC2_Handle)h); |
198 | } | 238 | } |
199 | 239 | ||
@@ -204,69 +244,74 @@ static int viddec2_reloc(VIDDEC2_Handle handle, uint8_t *ptr, uint32_t len) | |||
204 | 244 | ||
205 | } | 245 | } |
206 | 246 | ||
207 | static int viddec2_control(VIDDEC2_Handle handle, VIDDEC2_Cmd id, VIDDEC2_DynamicParams *dynParams, | 247 | static int viddec2_control(VIDDEC2_Handle handle, VIDDEC2_Cmd id, VIDDEC2_DynamicParams *dynParams, |
208 | VIDDEC2_Status *status ) | 248 | VIDDEC2_Status *status ) |
209 | { | 249 | { |
210 | int ret = 0; | 250 | int ret = 0; |
251 | #ifdef UNIVERSAL_COPY_EXAMPLE | ||
211 | UNIVERSAL_DynamicParams udynParam; | 252 | UNIVERSAL_DynamicParams udynParam; |
212 | UNIVERSAL_Status ustatus; | 253 | UNIVERSAL_Status ustatus; |
213 | 254 | ||
214 | udynParam.size = sizeof(UNIVERSAL_DynamicParams); | 255 | udynParam.size = sizeof(UNIVERSAL_DynamicParams); |
215 | ustatus.size = sizeof(UNIVERSAL_Status); | 256 | ustatus.size = sizeof(UNIVERSAL_Status); |
216 | //System_printf("command id is %d\n", id); | ||
217 | 257 | ||
218 | if(id == XDM_GETVERSION){ | 258 | if(id == XDM_GETVERSION){ |
219 | ustatus.data.numBufs = 1; | 259 | ustatus.data.numBufs = 1; |
220 | ustatus.data.descs[0].buf = status->data.buf; | 260 | ustatus.data.descs[0].buf = status->data.buf; |
221 | ustatus.data.descs[0].bufSize = status->data.bufSize; | 261 | ustatus.data.descs[0].bufSize = status->data.bufSize; |
222 | } | 262 | } |
223 | 263 | ||
224 | ret = UNIVERSAL_control((UNIVERSAL_Handle)handle, (UNIVERSAL_Cmd)id, | 264 | ret = UNIVERSAL_control((UNIVERSAL_Handle)handle, (UNIVERSAL_Cmd)id, |
225 | &udynParam, &ustatus); | 265 | &udynParam, &ustatus); |
226 | 266 | ||
227 | /*universal copy supports only XDM_GETVERSION cmd id */ | 267 | /*universal copy supports only XDM_GETVERSION cmd id */ |
228 | /*This is to return success to VIDDEC2 application in case of other cmd ids */ | 268 | /*This is to return success to VIDDEC2 application in case of other cmd ids */ |
229 | if(ret == IUNIVERSAL_EFAIL)ret = IUNIVERSAL_EOK; | 269 | if(ret == IUNIVERSAL_EFAIL)ret = IUNIVERSAL_EOK; |
230 | 270 | #else | |
271 | ret = VIDDEC2_control(handle, id, dynParams, status); | ||
272 | #endif | ||
231 | return ret; | 273 | return ret; |
232 | } | 274 | } |
233 | 275 | ||
234 | static int viddec2_process(VIDDEC2_Handle handle, XDM1_BufDesc *inBufs, | 276 | static int viddec2_process(VIDDEC2_Handle handle, XDM1_BufDesc *inBufs, |
235 | XDM_BufDesc *outBufs, VIDDEC2_InArgs *inArgs, VIDDEC2_OutArgs *outArgs ) | 277 | XDM_BufDesc *outBufs, VIDDEC2_InArgs *inArgs, VIDDEC2_OutArgs *outArgs ) |
236 | { | 278 | { |
237 | int ret = 0; | 279 | int ret = 0; |
280 | #ifdef UNIVERSAL_COPY_EXAMPLE | ||
238 | XDM1_BufDesc inBuf, outBuf; | 281 | XDM1_BufDesc inBuf, outBuf; |
239 | UNIVERSAL_InArgs inArg; | 282 | UNIVERSAL_InArgs inArg; |
240 | UNIVERSAL_OutArgs outArg; | 283 | UNIVERSAL_OutArgs outArg; |
241 | 284 | ||
242 | inArg.size = sizeof(UNIVERSAL_InArgs); | 285 | inArg.size = sizeof(UNIVERSAL_InArgs); |
243 | outArg.size = sizeof(UNIVERSAL_OutArgs); | 286 | outArg.size = sizeof(UNIVERSAL_OutArgs); |
244 | outArg.extendedError = 0; | 287 | outArg.extendedError = 0; |
245 | //System_printf("Before VIDDEC2 process\n"); | 288 | |
246 | |||
247 | //System_printf("outptr = 0x%x, size = %d\n",outBufs->bufs[0],outBufs->bufSizes[0]); | ||
248 | inBuf.numBufs = 1; | 289 | inBuf.numBufs = 1; |
249 | outBuf.numBufs = 1; | 290 | outBuf.numBufs = 1; |
250 | inBuf.descs[0].buf = inBufs->descs[0].buf; | 291 | inBuf.descs[0].buf = inBufs->descs[0].buf; |
251 | inBuf.descs[0].bufSize = inBufs->descs[0].bufSize; | 292 | inBuf.descs[0].bufSize = inBufs->descs[0].bufSize; |
252 | 293 | ||
253 | outBuf.descs[0].buf = outBufs->bufs[0]; | 294 | outBuf.descs[0].buf = outBufs->bufs[0]; |
254 | outBuf.descs[0].bufSize = outBufs->bufSizes[0]; | 295 | outBuf.descs[0].bufSize = outBufs->bufSizes[0]; |
255 | |||
256 | ret = UNIVERSAL_process((UNIVERSAL_Handle)handle, &inBuf, &outBuf, NULL, | ||
257 | &inArg, &outArg); | ||
258 | 296 | ||
259 | //System_printf("After VIDDEC2 process\n"); | 297 | ret = UNIVERSAL_process((UNIVERSAL_Handle)handle, &inBuf, &outBuf, NULL, |
260 | return ret; | 298 | &inArg, &outArg); |
299 | #else | ||
300 | ret = VIDDEC2_process(handle, inBufs, outBufs, inArgs, outArgs); | ||
301 | #endif | ||
302 | return ret; | ||
261 | } | 303 | } |
262 | 304 | ||
263 | static int viddec2_delete(VIDDEC2_Handle handle) | 305 | static int viddec2_delete(VIDDEC2_Handle handle) |
264 | { | 306 | { |
265 | //System_printf("Deleting VIDDEC2\n"); | 307 | #ifdef UNIVERSAL_COPY_EXAMPLE |
266 | UNIVERSAL_delete((UNIVERSAL_Handle)handle); | 308 | UNIVERSAL_delete((UNIVERSAL_Handle)handle); |
309 | #else | ||
310 | VIDDEC2_delete(handle); | ||
311 | #endif | ||
267 | return 0; | 312 | return 0; |
268 | } | 313 | } |
269 | 314 | ||
270 | 315 | ||
271 | /* | 316 | /* |
272 | * RPC message handlers | 317 | * RPC message handlers |
@@ -281,10 +326,10 @@ static int connect(void *msg) | |||
281 | 326 | ||
282 | FCSettings_init(); | 327 | FCSettings_init(); |
283 | Diags_setMask(FCSETTINGS_MODNAME "+12345678LEXAIZFS"); | 328 | Diags_setMask(FCSETTINGS_MODNAME "+12345678LEXAIZFS"); |
284 | 329 | ||
285 | CESettings_init(); | 330 | CESettings_init(); |
286 | Diags_setMask(CESETTINGS_MODNAME "+12345678LEXAIZFS"); | 331 | Diags_setMask(CESETTINGS_MODNAME "+12345678LEXAIZFS"); |
287 | 332 | ||
288 | /* | 333 | /* |
289 | * Enable use of runtime Diags_setMask per module: | 334 | * Enable use of runtime Diags_setMask per module: |
290 | * | 335 | * |
@@ -293,7 +338,7 @@ static int connect(void *msg) | |||
293 | Diags_setMask("ti.ipc.rpmsg.RPMessage=EXLFS"); | 338 | Diags_setMask("ti.ipc.rpmsg.RPMessage=EXLFS"); |
294 | Diags_setMask("ti.ipc.rpmsg.VirtQueue=EXLFS"); | 339 | Diags_setMask("ti.ipc.rpmsg.VirtQueue=EXLFS"); |
295 | } | 340 | } |
296 | 341 | ||
297 | CERuntime_init(); | 342 | CERuntime_init(); |
298 | 343 | ||
299 | if( !suspend_initialised ) { | 344 | if( !suspend_initialised ) { |
@@ -318,7 +363,7 @@ static Int32 engine_open(UInt32 size, UInt32 *data) | |||
318 | dce_engine_open *engine_open_msg = (dce_engine_open *)payload[0].data; | 363 | dce_engine_open *engine_open_msg = (dce_engine_open *)payload[0].data; |
319 | Engine_Handle eng_handle = NULL; | 364 | Engine_Handle eng_handle = NULL; |
320 | Uint32 num_params = MmRpc_NUM_PARAMETERS(size); | 365 | Uint32 num_params = MmRpc_NUM_PARAMETERS(size); |
321 | 366 | ||
322 | DEBUG(">> engine_open"); | 367 | DEBUG(">> engine_open"); |
323 | if( num_params != 1 ) { | 368 | if( num_params != 1 ) { |
324 | ERROR("Invalid number of params sent"); | 369 | ERROR("Invalid number of params sent"); |
@@ -326,10 +371,10 @@ static Int32 engine_open(UInt32 size, UInt32 *data) | |||
326 | } | 371 | } |
327 | 372 | ||
328 | dce_inv(engine_open_msg); | 373 | dce_inv(engine_open_msg); |
329 | 374 | ||
330 | eng_handle = Engine_open(engine_open_msg->name, engine_open_msg->engine_attrs, &engine_open_msg->error_code); | 375 | eng_handle = Engine_open(engine_open_msg->name, engine_open_msg->engine_attrs, &engine_open_msg->error_code); |
331 | DEBUG("<< engine=%08x, ec=%d", eng_handle, engine_open_msg->error_code); | 376 | DEBUG("<< engine=%08x, ec=%d", eng_handle, engine_open_msg->error_code); |
332 | 377 | ||
333 | dce_clean(engine_open_msg); | 378 | dce_clean(engine_open_msg); |
334 | 379 | ||
335 | return ((Int32)eng_handle); | 380 | return ((Int32)eng_handle); |
@@ -377,7 +422,7 @@ static Int32 codec_create(UInt32 size, UInt32 *data) | |||
377 | ERROR("invalid number of params sent"); | 422 | ERROR("invalid number of params sent"); |
378 | return (-1); | 423 | return (-1); |
379 | } | 424 | } |
380 | 425 | ||
381 | if(codec_id != OMAP_DCE_VIDDEC2){ | 426 | if(codec_id != OMAP_DCE_VIDDEC2){ |
382 | ERROR("invalid codec id sent"); | 427 | ERROR("invalid codec id sent"); |
383 | return (-1); | 428 | return (-1); |
@@ -386,7 +431,7 @@ static Int32 codec_create(UInt32 size, UInt32 *data) | |||
386 | dce_inv(static_params); | 431 | dce_inv(static_params); |
387 | 432 | ||
388 | codec_handle = (void *)codec_fxns[codec_id].create(engine, codec_name, static_params); | 433 | codec_handle = (void *)codec_fxns[codec_id].create(engine, codec_name, static_params); |
389 | 434 | ||
390 | DEBUG("<< codec_handle=%08x", codec_handle); | 435 | DEBUG("<< codec_handle=%08x", codec_handle); |
391 | 436 | ||
392 | dce_clean(static_params); | 437 | dce_clean(static_params); |
@@ -420,7 +465,7 @@ static int codec_control(UInt32 size, UInt32 *data) | |||
420 | ERROR("invalid number of params sent"); | 465 | ERROR("invalid number of params sent"); |
421 | return (-1); | 466 | return (-1); |
422 | } | 467 | } |
423 | 468 | ||
424 | if(codec_id != OMAP_DCE_VIDDEC2){ | 469 | if(codec_id != OMAP_DCE_VIDDEC2){ |
425 | ERROR("invalid codec id sent"); | 470 | ERROR("invalid codec id sent"); |
426 | return (-1); | 471 | return (-1); |
@@ -430,7 +475,7 @@ static int codec_control(UInt32 size, UInt32 *data) | |||
430 | dce_inv(status); | 475 | dce_inv(status); |
431 | 476 | ||
432 | ret = (uint32_t) codec_fxns[codec_id].control(codec_handle, cmd_id, dyn_params, status); | 477 | ret = (uint32_t) codec_fxns[codec_id].control(codec_handle, cmd_id, dyn_params, status); |
433 | 478 | ||
434 | DEBUG("<< result=%d", ret); | 479 | DEBUG("<< result=%d", ret); |
435 | 480 | ||
436 | dce_clean(dyn_params); | 481 | dce_clean(dyn_params); |
@@ -459,18 +504,18 @@ static int codec_get_version(UInt32 size, UInt32 *data) | |||
459 | ERROR("invalid number of params sent"); | 504 | ERROR("invalid number of params sent"); |
460 | return (-1); | 505 | return (-1); |
461 | } | 506 | } |
462 | 507 | ||
463 | if(codec_id != OMAP_DCE_VIDDEC2){ | 508 | if(codec_id != OMAP_DCE_VIDDEC2){ |
464 | ERROR("invalid codec id sent"); | 509 | ERROR("invalid codec id sent"); |
465 | return (-1); | 510 | return (-1); |
466 | } | 511 | } |
467 | 512 | ||
468 | version_buf = (void *)(H2P((MemHeader *)((IVIDDEC2_Status *)status)->data.buf)); | 513 | version_buf = (void *)(H2P((MemHeader *)((IVIDDEC2_Status *)status)->data.buf)); |
469 | 514 | ||
470 | dce_inv(dyn_params); | 515 | dce_inv(dyn_params); |
471 | dce_inv(status); | 516 | dce_inv(status); |
472 | dce_inv(version_buf); | 517 | dce_inv(version_buf); |
473 | 518 | ||
474 | ret = (uint32_t) codec_fxns[codec_id].control(codec_handle, XDM_GETVERSION, dyn_params, status); | 519 | ret = (uint32_t) codec_fxns[codec_id].control(codec_handle, XDM_GETVERSION, dyn_params, status); |
475 | 520 | ||
476 | DEBUG("<< result=%d", ret); | 521 | DEBUG("<< result=%d", ret); |
@@ -562,7 +607,7 @@ static int codec_process(UInt32 size, UInt32 *data) | |||
562 | void *outBufptr = (void *)payload[6].data; | 607 | void *outBufptr = (void *)payload[6].data; |
563 | Int32 ret = 0; | 608 | Int32 ret = 0; |
564 | void *outBufSize = NULL; | 609 | void *outBufSize = NULL; |
565 | 610 | ||
566 | DEBUG(">> codec_process"); | 611 | DEBUG(">> codec_process"); |
567 | 612 | ||
568 | if( num_params != 7 ) { | 613 | if( num_params != 7 ) { |
@@ -574,7 +619,7 @@ static int codec_process(UInt32 size, UInt32 *data) | |||
574 | ERROR("invalid codec id sent"); | 619 | ERROR("invalid codec id sent"); |
575 | return (-1); | 620 | return (-1); |
576 | } | 621 | } |
577 | 622 | ||
578 | outBufSize = (void *)(H2P((MemHeader *)((XDM_BufDesc *)outBufs)->bufSizes)); | 623 | outBufSize = (void *)(H2P((MemHeader *)((XDM_BufDesc *)outBufs)->bufSizes)); |
579 | 624 | ||
580 | dce_inv(inBufs); | 625 | dce_inv(inBufs); |
@@ -583,12 +628,12 @@ static int codec_process(UInt32 size, UInt32 *data) | |||
583 | dce_inv(outArgs); | 628 | dce_inv(outArgs); |
584 | dce_inv(outBufptr); | 629 | dce_inv(outBufptr); |
585 | dce_inv(outBufSize); | 630 | dce_inv(outBufSize); |
586 | 631 | ||
587 | DEBUG(">> codec=%p, inBufs=%p, outBufs=%p, inArgs=%p, outArgs=%p codec_id=%d", | 632 | DEBUG(">> codec=%p, inBufs=%p, outBufs=%p, inArgs=%p, outArgs=%p codec_id=%d", |
588 | codec, inBufs, outBufs, inArgs, outArgs, codec_id); | 633 | codec, inBufs, outBufs, inArgs, outArgs, codec_id); |
589 | 634 | ||
590 | ret = codec_fxns[codec_id].process((void *)codec, inBufs, outBufs, inArgs, outArgs); | 635 | ret = codec_fxns[codec_id].process((void *)codec, inBufs, outBufs, inArgs, outArgs); |
591 | 636 | ||
592 | 637 | ||
593 | DEBUG("<< ret=%d extendedError=%08x", ret, ((VIDDEC3_OutArgs *)outArgs)->extendedError); | 638 | DEBUG("<< ret=%d extendedError=%08x", ret, ((VIDDEC3_OutArgs *)outArgs)->extendedError); |
594 | 639 | ||
@@ -623,7 +668,7 @@ static int codec_delete(UInt32 size, UInt32 *data) | |||
623 | ERROR("invalid number of params sent"); | 668 | ERROR("invalid number of params sent"); |
624 | return (-1); | 669 | return (-1); |
625 | } | 670 | } |
626 | 671 | ||
627 | if(codec_id != OMAP_DCE_VIDDEC2){ | 672 | if(codec_id != OMAP_DCE_VIDDEC2){ |
628 | ERROR("invalid codec id sent"); | 673 | ERROR("invalid codec id sent"); |
629 | return (-1); | 674 | return (-1); |
@@ -739,7 +784,7 @@ static void dce_main(uint32_t arg0, uint32_t arg1) | |||
739 | { | 784 | { |
740 | int err = 0; | 785 | int err = 0; |
741 | dce_connect dce_connect_msg; | 786 | dce_connect dce_connect_msg; |
742 | 787 | ||
743 | err = MmServiceMgr_init(); // MmServiceMgr_init() will always return MmServiceMgr_S_SUCCESS. | 788 | err = MmServiceMgr_init(); // MmServiceMgr_init() will always return MmServiceMgr_S_SUCCESS. |
744 | 789 | ||
745 | // setup the RCM Server create params | 790 | // setup the RCM Server create params |
@@ -751,7 +796,7 @@ static void dce_main(uint32_t arg0, uint32_t arg1) | |||
751 | 796 | ||
752 | // Get the Service Manager handle | 797 | // Get the Service Manager handle |
753 | err = MmServiceMgr_register(SERVER_NAME, &rpc_Params, &dce_fxnSigTab, dce_SrvDelNotification); | 798 | err = MmServiceMgr_register(SERVER_NAME, &rpc_Params, &dce_fxnSigTab, dce_SrvDelNotification); |
754 | 799 | ||
755 | if( err < 0 ) { | 800 | if( err < 0 ) { |
756 | DEBUG("failed to start " SERVER_NAME " \n"); | 801 | DEBUG("failed to start " SERVER_NAME " \n"); |
757 | //err = -1; | 802 | //err = -1; |
@@ -796,7 +841,7 @@ Bool dce_init(void) | |||
796 | params.instance->name = "dce-server"; | 841 | params.instance->name = "dce-server"; |
797 | params.priority = Thread_Priority_ABOVE_NORMAL; | 842 | params.priority = Thread_Priority_ABOVE_NORMAL; |
798 | Task_create(dce_main, ¶ms, NULL); | 843 | Task_create(dce_main, ¶ms, NULL); |
799 | 844 | ||
800 | return (TRUE); | 845 | return (TRUE); |
801 | } | 846 | } |
802 | 847 | ||