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author | Kishon Vijay Abraham I | 2017-08-24 09:12:46 -0500 |
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committer | Jean-Jacques Hiblot | 2017-08-25 07:16:10 -0500 |
commit | 6a37d262ccda5afb8ab7608194a8dddfdb095bc0 (patch) | |
tree | 0942adda44b115da39d81362a52e739a986a077c | |
parent | 0b2b821d92addf376723b1b82c91acca4e8ef933 (diff) | |
download | infoadas-kernel-6a37d262ccda5afb8ab7608194a8dddfdb095bc0.tar.gz infoadas-kernel-6a37d262ccda5afb8ab7608194a8dddfdb095bc0.tar.xz infoadas-kernel-6a37d262ccda5afb8ab7608194a8dddfdb095bc0.zip |
dt-bindings: PCI: dra7xx: Add SoC specific compatible strings
Add new compatible strings for dra74x SoC (also used by dra76x) and
dra72x. This can be used to perform SoC specific configuration
(like configuring PCIe in x2 lane mode).
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
-rw-r--r-- | Documentation/devicetree/bindings/pci/ti-pci.txt | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt index 85746eca3632..067b1a5ca3cb 100644 --- a/Documentation/devicetree/bindings/pci/ti-pci.txt +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt | |||
@@ -1,8 +1,12 @@ | |||
1 | TI PCI Controllers | 1 | TI PCI Controllers |
2 | 2 | ||
3 | PCIe Designware Controller | 3 | PCIe Designware Controller |
4 | - compatible: Should be "ti,dra7-pcie" for RC | 4 | - compatible: Should be "ti,dra7-pcie" for RC (deprecated) |
5 | Should be "ti,dra7-pcie-ep" for EP | 5 | Should be "ti,dra7-pcie-ep" for EP (deprecated) |
6 | Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode | ||
7 | Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode | ||
8 | Should be "ti,dra726-pcie-rc" for dra72x in RC mode | ||
9 | Should be "ti,dra726-pcie-ep" for dra72x in EP mode | ||
6 | - phys : list of PHY specifiers (used by generic PHY framework) | 10 | - phys : list of PHY specifiers (used by generic PHY framework) |
7 | - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the | 11 | - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the |
8 | number of PHYs as specified in *phys* property. | 12 | number of PHYs as specified in *phys* property. |