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authorGowtham Tammana2016-07-14 17:02:44 -0500
committerGowtham Tammana2016-07-14 17:02:44 -0500
commit7a2b06ad1df46a274336f7ae0e24a9d67e72cd66 (patch)
tree899106714a0b5f118fcf4ce0c8efde1062e479de
parent9f5fb963e1eebcf4402cfc32fa06fe882a03e9e2 (diff)
downloadti-gc320-driver-7a2b06ad1df46a274336f7ae0e24a9d67e72cd66.tar.gz
ti-gc320-driver-7a2b06ad1df46a274336f7ae0e24a9d67e72cd66.tar.xz
ti-gc320-driver-7a2b06ad1df46a274336f7ae0e24a9d67e72cd66.zip
snapshot of k4.4 based driver
Signed-off-by: Gowtham Tammana <g-tammana@ti.com>
-rw-r--r--LICENSE53
-rw-r--r--Readme.md6
-rwxr-xr-xsrc/Kbuild285
-rwxr-xr-xsrc/config.j670
-rwxr-xr-xsrc/hal/kernel/arch/gc_hal_kernel_context.c1108
-rwxr-xr-xsrc/hal/kernel/arch/gc_hal_kernel_context.h247
-rwxr-xr-xsrc/hal/kernel/arch/gc_hal_kernel_hardware.c7894
-rwxr-xr-xsrc/hal/kernel/arch/gc_hal_kernel_hardware.h210
-rwxr-xr-xsrc/hal/kernel/arch/gc_hal_kernel_recorder.c713
-rwxr-xr-xsrc/hal/kernel/arch/makefile57
-rwxr-xr-xsrc/hal/kernel/arch/makefile.linux88
-rwxr-xr-xsrc/hal/kernel/arch/sources71
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel.c5008
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel.h1485
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel_command.c3366
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel_db.c1884
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel_debug.c2821
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel_event.c3145
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel_heap.c892
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel_mmu.c2315
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel_power.c381
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel_precomp.h63
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel_security.c62
-rwxr-xr-xsrc/hal/kernel/gc_hal_kernel_video_memory.c2761
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal.h2767
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_base.h5347
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_driver.h1203
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_dump.h123
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_eglplatform.h676
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_enum.h1650
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_kernel_buffer.h259
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_mem.h62
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_options.h1329
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_profiler.h619
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_raster.h1078
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_rename.h277
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_security_interface.h171
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_types.h976
-rwxr-xr-xsrc/hal/kernel/inc/gc_hal_version.h69
-rwxr-xr-xsrc/hal/kernel/makefile.linux97
-rwxr-xr-xsrc/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_array.h84
-rwxr-xr-xsrc/hal/os/linux/kernel/allocator/default/gc_hal_kernel_allocator_dmabuf.c353
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_allocator.c972
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_allocator.h470
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_debug.h147
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_debugfs.c1181
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_debugfs.h169
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_device.c2337
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_device.h264
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_iommu.c250
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_linux.c508
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_linux.h437
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_math.c66
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_mutex.h89
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_os.c8225
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_os.h124
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_platform.h342
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_probe.c1361
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_security_channel.c423
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_sync.c211
-rwxr-xr-xsrc/hal/os/linux/kernel/gc_hal_kernel_sync.h106
-rwxr-xr-xsrc/hal/os/linux/kernel/platform/default/gc_hal_kernel_platform_default.c81
-rwxr-xr-xsrc/hal/os/linux/kernel/platform/ti/gc_hal_kernel_platform_j6.c253
-rwxr-xr-xsrc/hal/os/linux/kernel/platform/ti/gc_hal_kernel_platform_ti.c188
64 files changed, 70328 insertions, 1 deletions
diff --git a/LICENSE b/LICENSE
new file mode 100644
index 0000000..3be69f6
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,53 @@
1/****************************************************************************
2*
3* The MIT License (MIT)
4*
5* Copyright (c) 2014 Vivante Corporation
6*
7* Permission is hereby granted, free of charge, to any person obtaining a
8* copy of this software and associated documentation files (the "Software"),
9* to deal in the Software without restriction, including without limitation
10* the rights to use, copy, modify, merge, publish, distribute, sublicense,
11* and/or sell copies of the Software, and to permit persons to whom the
12* Software is furnished to do so, subject to the following conditions:
13*
14* The above copyright notice and this permission notice shall be included in
15* all copies or substantial portions of the Software.
16*
17* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23* DEALINGS IN THE SOFTWARE.
24*
25*****************************************************************************
26*
27* The GPL License (GPL)
28*
29* Copyright (C) 2014 Vivante Corporation
30*
31* This program is free software; you can redistribute it and/or
32* modify it under the terms of the GNU General Public License
33* as published by the Free Software Foundation; either version 2
34* of the License, or (at your option) any later version.
35*
36* This program is distributed in the hope that it will be useful,
37* but WITHOUT ANY WARRANTY; without even the implied warranty of
38* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
39* GNU General Public License for more details.
40*
41* You should have received a copy of the GNU General Public License
42* along with this program; if not, write to the Free Software Foundation,
43* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
44*
45*****************************************************************************
46*
47* Note: This software is released under dual MIT and GPL licenses. A
48* recipient may use this file under the terms of either the MIT license or
49* GPL License. If you wish to use only one license not the other, you can
50* indicate your decision by deleting one of the above license notices in your
51* version of this file.
52*
53*****************************************************************************/
diff --git a/Readme.md b/Readme.md
index 2ba0689..fd27902 100644
--- a/Readme.md
+++ b/Readme.md
@@ -1 +1,5 @@
1master is an empty branch, checkout a relevant topic branch. 1
2# ti-gc320-driver
3
4This project hosts the kernel driver for GC320 IP available in Texas
5Instruments DRA7x based SoCs.
diff --git a/src/Kbuild b/src/Kbuild
new file mode 100755
index 0000000..f952b62
--- /dev/null
+++ b/src/Kbuild
@@ -0,0 +1,285 @@
1##############################################################################
2#
3# The MIT License (MIT)
4#
5# Copyright (c) 2014 Vivante Corporation
6#
7# Permission is hereby granted, free of charge, to any person obtaining a
8# copy of this software and associated documentation files (the "Software"),
9# to deal in the Software without restriction, including without limitation
10# the rights to use, copy, modify, merge, publish, distribute, sublicense,
11# and/or sell copies of the Software, and to permit persons to whom the
12# Software is furnished to do so, subject to the following conditions:
13#
14# The above copyright notice and this permission notice shall be included in
15# all copies or substantial portions of the Software.
16#
17# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23# DEALINGS IN THE SOFTWARE.
24#
25##############################################################################
26#
27# The GPL License (GPL)
28#
29# Copyright (C) 2014 Vivante Corporation
30#
31# This program is free software; you can redistribute it and/or
32# modify it under the terms of the GNU General Public License
33# as published by the Free Software Foundation; either version 2
34# of the License, or (at your option) any later version.
35#
36# This program is distributed in the hope that it will be useful,
37# but WITHOUT ANY WARRANTY; without even the implied warranty of
38# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
39# GNU General Public License for more details.
40#
41# You should have received a copy of the GNU General Public License
42# along with this program; if not, write to the Free Software Foundation,
43# Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
44#
45##############################################################################
46#
47# Note: This software is released under dual MIT and GPL licenses. A
48# recipient may use this file under the terms of either the MIT license or
49# GPL License. If you wish to use only one license not the other, you can
50# indicate your decision by deleting one of the above license notices in your
51# version of this file.
52#
53##############################################################################
54
55
56#
57# Linux build file for kernel HAL driver.
58#
59
60include $(AQROOT)/config.j6
61
62KERNEL_DIR ?= $(TOOL_DIR)/kernel
63
64OS_KERNEL_DIR := hal/os/linux/kernel
65ARCH_KERNEL_DIR := hal/kernel/arch
66ARCH_VG_KERNEL_DIR := hal/kernel/archvg
67HAL_KERNEL_DIR := hal/kernel
68HOST := $(shell hostname)
69
70# Check and include platform config.
71ifneq ($(PLATFORM),)
72
73# Get platform config path.
74PLATFORM_CONFIG ?= $(AQROOT)/$(OS_KERNEL_DIR)/platform/$(PLATFORM).config
75
76# Check whether it exists.
77PLATFORM_CONFIG := $(wildcard $(PLATFORM_CONFIG))
78
79# Include it if exists.
80ifneq ($(PLATFORM_CONFIG),)
81include $(PLATFORM_CONFIG)
82endif
83
84endif
85
86MODULE_NAME ?= galcore
87CUSTOMER_ALLOCATOR_OBJS ?=
88ALLOCATOR_ARRAY_H_LOCATION ?= $(OS_KERNEL_DIR)/allocator/default/
89
90EXTRA_CFLAGS += -Werror
91
92OBJS := $(OS_KERNEL_DIR)/gc_hal_kernel_device.o \
93 $(OS_KERNEL_DIR)/gc_hal_kernel_linux.o \
94 $(OS_KERNEL_DIR)/gc_hal_kernel_math.o \
95 $(OS_KERNEL_DIR)/gc_hal_kernel_os.o \
96 $(OS_KERNEL_DIR)/gc_hal_kernel_debugfs.o \
97 $(OS_KERNEL_DIR)/gc_hal_kernel_allocator.o \
98
99ifneq ($(CONFIG_DMA_SHARED_BUFFER),)
100OBJS += $(OS_KERNEL_DIR)/allocator/default/gc_hal_kernel_allocator_dmabuf.o
101endif
102
103ifneq ($(CONFIG_IOMMU_SUPPORT),)
104OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_iommu.o
105endif
106
107ifneq ($(PLATFORM),)
108OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_probe.o
109OBJS += $(OS_KERNEL_DIR)/platform/$(PLATFORM).o
110else
111OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_driver.o
112endif
113
114OBJS += $(HAL_KERNEL_DIR)/gc_hal_kernel.o \
115 $(HAL_KERNEL_DIR)/gc_hal_kernel_command.o \
116 $(HAL_KERNEL_DIR)/gc_hal_kernel_db.o \
117 $(HAL_KERNEL_DIR)/gc_hal_kernel_debug.o \
118 $(HAL_KERNEL_DIR)/gc_hal_kernel_event.o \
119 $(HAL_KERNEL_DIR)/gc_hal_kernel_heap.o \
120 $(HAL_KERNEL_DIR)/gc_hal_kernel_mmu.o \
121 $(HAL_KERNEL_DIR)/gc_hal_kernel_video_memory.o \
122 $(HAL_KERNEL_DIR)/gc_hal_kernel_power.o
123
124OBJS += $(ARCH_KERNEL_DIR)/gc_hal_kernel_context.o \
125 $(ARCH_KERNEL_DIR)/gc_hal_kernel_hardware.o
126
127
128
129ifneq ($(CONFIG_SYNC),)
130EXTRA_CFLAGS += -Idrivers/staging/android
131
132OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_sync.o
133endif
134
135ifeq ($(SECURITY), 1)
136OBJS += $(OS_KERNEL_DIR)/gc_hal_kernel_security_channel.o \
137 $(HAL_KERNEL_DIR)/gc_hal_kernel_security.o
138endif
139
140ifneq ($(CUSTOMER_ALLOCATOR_OBJS),)
141OBJS += $(CUSTOMER_ALLOCATOR_OBJS)
142endif
143
144ifeq ($(KERNELRELEASE), )
145
146.PHONY: all clean install
147
148# Define targets.
149all:
150 @$(MAKE) V=$(V) ARCH=$(ARCH_TYPE) -C $(KERNEL_DIR) SUBDIRS=`pwd` modules
151
152clean:
153 @rm -rf $(OBJS)
154 @rm -rf modules.order Module.symvers .tmp_versions
155 @find $(AQROOT) -name ".gc_*.cmd" | xargs rm -f
156
157install: all
158 @mkdir -p $(SDK_DIR)/drivers
159 @cp $(MODULE_NAME).ko $(SDK_DIR)/drivers
160
161else
162
163
164EXTRA_CFLAGS += -DLINUX -DDRIVER
165
166ifeq ($(FLAREON),1)
167EXTRA_CFLAGS += -DFLAREON
168endif
169
170ifeq ($(DEBUG), 1)
171EXTRA_CFLAGS += -DDBG=1 -DDEBUG -D_DEBUG
172else
173EXTRA_CFLAGS += -DDBG=0
174endif
175
176ifeq ($(NO_DMA_COHERENT), 1)
177EXTRA_CFLAGS += -DNO_DMA_COHERENT
178endif
179
180ifeq ($(CONFIG_DOVE_GPU), 1)
181EXTRA_CFLAGS += -DCONFIG_DOVE_GPU=1
182endif
183
184ifneq ($(USE_PLATFORM_DRIVER), 0)
185EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=1
186else
187EXTRA_CFLAGS += -DUSE_PLATFORM_DRIVER=0
188endif
189
190EXTRA_CFLAGS += -DVIVANTE_PROFILER=1
191EXTRA_CFLAGS += -DVIVANTE_PROFILER_CONTEXT=1
192
193ifeq ($(ENABLE_GPU_CLOCK_BY_DRIVER), 1)
194EXTRA_CFLAGS += -DENABLE_GPU_CLOCK_BY_DRIVER=1
195else
196EXTRA_CFLAGS += -DENABLE_GPU_CLOCK_BY_DRIVER=0
197endif
198
199ifeq ($(USE_NEW_LINUX_SIGNAL), 1)
200EXTRA_CFLAGS += -DUSE_NEW_LINUX_SIGNAL=1
201else
202EXTRA_CFLAGS += -DUSE_NEW_LINUX_SIGNAL=0
203endif
204
205ifeq ($(FORCE_ALL_VIDEO_MEMORY_CACHED), 1)
206EXTRA_CFLAGS += -DgcdPAGED_MEMORY_CACHEABLE=1
207else
208EXTRA_CFLAGS += -DgcdPAGED_MEMORY_CACHEABLE=0
209endif
210
211ifeq ($(NONPAGED_MEMORY_CACHEABLE), 1)
212EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_CACHEABLE=1
213else
214EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_CACHEABLE=0
215endif
216
217ifeq ($(NONPAGED_MEMORY_BUFFERABLE), 1)
218EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_BUFFERABLE=1
219else
220EXTRA_CFLAGS += -DgcdNONPAGED_MEMORY_BUFFERABLE=0
221endif
222
223ifeq ($(CACHE_FUNCTION_UNIMPLEMENTED), 1)
224EXTRA_CFLAGS += -DgcdCACHE_FUNCTION_UNIMPLEMENTED=1
225else
226EXTRA_CFLAGS += -DgcdCACHE_FUNCTION_UNIMPLEMENTED=0
227endif
228
229ifeq ($(CONFIG_SMP), y)
230EXTRA_CFLAGS += -DgcdSMP=1
231else
232EXTRA_CFLAGS += -DgcdSMP=0
233endif
234
235EXTRA_CFLAGS += -DgcdENABLE_3D=0
236
237EXTRA_CFLAGS += -DgcdENABLE_2D=1
238
239EXTRA_CFLAGS += -DgcdENABLE_VG=0
240
241ifeq ($(ENABLE_OUTER_CACHE_PATCH), 1)
242EXTRA_CFLAGS += -DgcdENABLE_OUTER_CACHE_PATCH=1
243else
244EXTRA_CFLAGS += -DgcdENABLE_OUTER_CACHE_PATCH=0
245endif
246
247ifeq ($(USE_BANK_ALIGNMENT), 1)
248 EXTRA_CFLAGS += -DgcdENABLE_BANK_ALIGNMENT=1
249 ifneq ($(BANK_BIT_START), 0)
250 ifneq ($(BANK_BIT_END), 0)
251 EXTRA_CFLAGS += -DgcdBANK_BIT_START=$(BANK_BIT_START)
252 EXTRA_CFLAGS += -DgcdBANK_BIT_END=$(BANK_BIT_END)
253 endif
254 endif
255
256 ifneq ($(BANK_CHANNEL_BIT), 0)
257 EXTRA_CFLAGS += -DgcdBANK_CHANNEL_BIT=$(BANK_CHANNEL_BIT)
258 endif
259endif
260
261ifeq ($(gcdFPGA_BUILD), 1)
262EXTRA_CFLAGS += -DgcdFPGA_BUILD=1
263else
264EXTRA_CFLAGS += -DgcdFPGA_BUILD=0
265endif
266
267ifeq ($(SECURITY), 1)
268EXTRA_CFLAGS += -DgcdSECURITY=1
269endif
270
271EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/inc
272EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel
273EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/arch
274EXTRA_CFLAGS += -I$(AQROOT)/hal/kernel/inc
275EXTRA_CFLAGS += -I$(AQROOT)/hal/os/linux/kernel
276EXTRA_CFLAGS += -I$(AQROOT)/$(ALLOCATOR_ARRAY_H_LOCATION)
277
278
279EXTRA_CFLAGS += -DHOST=\"$(HOST)\"
280
281obj-m = $(MODULE_NAME).o
282
283$(MODULE_NAME)-objs = $(OBJS)
284
285endif
diff --git a/src/config.j6 b/src/config.j6
new file mode 100755
index 0000000..0ff6b09
--- /dev/null
+++ b/src/config.j6
@@ -0,0 +1,70 @@
1##############################################################################
2#
3# The MIT License (MIT)
4#
5# Copyright (c) 2014 Vivante Corporation
6#
7# Permission is hereby granted, free of charge, to any person obtaining a
8# copy of this software and associated documentation files (the "Software"),
9# to deal in the Software without restriction, including without limitation
10# the rights to use, copy, modify, merge, publish, distribute, sublicense,
11# and/or sell copies of the Software, and to permit persons to whom the
12# Software is furnished to do so, subject to the following conditions:
13#
14# The above copyright notice and this permission notice shall be included in
15# all copies or substantial portions of the Software.
16#
17# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23# DEALINGS IN THE SOFTWARE.
24#
25##############################################################################
26#
27# The GPL License (GPL)
28#
29# Copyright (C) 2014 Vivante Corporation
30#
31# This program is free software; you can redistribute it and/or
32# modify it under the terms of the GNU General Public License
33# as published by the Free Software Foundation; either version 2
34# of the License, or (at your option) any later version.
35#
36# This program is distributed in the hope that it will be useful,
37# but WITHOUT ANY WARRANTY; without even the implied warranty of
38# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
39# GNU General Public License for more details.
40#
41# You should have received a copy of the GNU General Public License
42# along with this program; if not, write to the Free Software Foundation,
43# Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
44#
45##############################################################################
46#
47# Note: This software is released under dual MIT and GPL licenses. A
48# recipient may use this file under the terms of either the MIT license or
49# GPL License. If you wish to use only one license not the other, you can
50# indicate your decision by deleting one of the above license notices in your
51# version of this file.
52#
53##############################################################################
54
55
56ARCH_TYPE ?= arm
57SDK_DIR ?= $(AQROOT)/build/sdk
58VIVANTE_ENABLE_3D ?=0
59VIVANTE_ENABLE_2D ?=1
60VIVANTE_ENABLE_VG ?=0
61FORCE_ALL_VIDEO_MEMORY_CACHED ?= 0
62NONPAGED_MEMORY_CACHEABLE ?= 0
63NONPAGED_MEMORY_BUFFERABLE ?= 1
64CACHE_FUNCTION_UNIMPLEMENTED ?= 0
65ENABLE_OUTER_CACHE_PATCH ?= 1
66USE_BANK_ALIGNMENT ?= 0
67BANK_BIT_START ?= 0
68BANK_BIT_END ?= 0
69BANK_CHANNEL_BIT ?= 0
70PLATFORM ?= ti/gc_hal_kernel_platform_j6
diff --git a/src/hal/kernel/arch/gc_hal_kernel_context.c b/src/hal/kernel/arch/gc_hal_kernel_context.c
new file mode 100755
index 0000000..91e4c6b
--- /dev/null
+++ b/src/hal/kernel/arch/gc_hal_kernel_context.c
@@ -0,0 +1,1108 @@
1/****************************************************************************
2*
3* The MIT License (MIT)
4*
5* Copyright (c) 2014 Vivante Corporation
6*
7* Permission is hereby granted, free of charge, to any person obtaining a
8* copy of this software and associated documentation files (the "Software"),
9* to deal in the Software without restriction, including without limitation
10* the rights to use, copy, modify, merge, publish, distribute, sublicense,
11* and/or sell copies of the Software, and to permit persons to whom the
12* Software is furnished to do so, subject to the following conditions:
13*
14* The above copyright notice and this permission notice shall be included in
15* all copies or substantial portions of the Software.
16*
17* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23* DEALINGS IN THE SOFTWARE.
24*
25*****************************************************************************
26*
27* The GPL License (GPL)
28*
29* Copyright (C) 2014 Vivante Corporation
30*
31* This program is free software; you can redistribute it and/or
32* modify it under the terms of the GNU General Public License
33* as published by the Free Software Foundation; either version 2
34* of the License, or (at your option) any later version.
35*
36* This program is distributed in the hope that it will be useful,
37* but WITHOUT ANY WARRANTY; without even the implied warranty of
38* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
39* GNU General Public License for more details.
40*
41* You should have received a copy of the GNU General Public License
42* along with this program; if not, write to the Free Software Foundation,
43* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
44*
45*****************************************************************************
46*
47* Note: This software is released under dual MIT and GPL licenses. A
48* recipient may use this file under the terms of either the MIT license or
49* GPL License. If you wish to use only one license not the other, you can
50* indicate your decision by deleting one of the above license notices in your
51* version of this file.
52*
53*****************************************************************************/
54
55
56#include "gc_hal.h"
57#include "gc_hal_kernel.h"
58#include "gc_hal_kernel_context.h"
59#include "gc_hal_kernel_buffer.h"
60
61/******************************************************************************\
62******************************** Debugging Macro *******************************
63\******************************************************************************/
64
65/* Zone used for header/footer. */
66#define _GC_OBJ_ZONE gcvZONE_HARDWARE
67
68
69/******************************************************************************\
70************************** Context State Buffer Helpers ************************
71\******************************************************************************/
72
73#define _STATE(reg) \
74 _State(\
75 Context, index, \
76 reg ## _Address >> 2, \
77 reg ## _ResetValue, \
78 reg ## _Count, \
79 gcvFALSE, gcvFALSE \
80 )
81
82#define _STATE_COUNT(reg, count) \
83 _State(\
84 Context, index, \
85 reg ## _Address >> 2, \
86 reg ## _ResetValue, \
87 count, \
88 gcvFALSE, gcvFALSE \
89 )
90
91#define _STATE_COUNT_OFFSET(reg, offset, count) \
92 _State(\
93 Context, index, \
94 (reg ## _Address >> 2) + offset, \
95 reg ## _ResetValue, \
96 count, \
97 gcvFALSE, gcvFALSE \
98 )
99
100#define _STATE_MIRROR_COUNT(reg, mirror, count) \
101 _StateMirror(\
102 Context, \
103 reg ## _Address >> 2, \
104 count, \
105 mirror ## _Address >> 2 \
106 )
107
108#define _STATE_HINT(reg) \
109 _State(\
110 Context, index, \
111 reg ## _Address >> 2, \
112 reg ## _ResetValue, \
113 reg ## _Count, \
114 gcvFALSE, gcvTRUE \
115 )
116
117#define _STATE_HINT_BLOCK(reg, block, count) \
118 _State(\
119 Context, index, \
120 (reg ## _Address >> 2) + (block << reg ## _BLK), \
121 reg ## _ResetValue, \
122 count, \
123 gcvFALSE, gcvTRUE \
124 )
125
126#define _STATE_COUNT_OFFSET_HINT(reg, offset, count) \
127 _State(\
128 Context, index, \
129 (reg ## _Address >> 2) + offset, \
130 reg ## _ResetValue, \
131 count, \
132 gcvFALSE, gcvTRUE \
133 )
134
135#define _STATE_X(reg) \
136 _State(\
137 Context, index, \
138 reg ## _Address >> 2, \
139 reg ## _ResetValue, \
140 reg ## _Count, \
141 gcvTRUE, gcvFALSE \
142 )
143
144#define _STATE_INIT_VALUE(reg, value) \
145 _State(\
146 Context, index, \
147 reg ## _Address >> 2, \
148 value, \
149 reg ## _Count, \
150 gcvFALSE, gcvFALSE \
151 )
152
153#define _CLOSE_RANGE() \
154 _TerminateStateBlock(Context, index)
155
156#define _ENABLE(reg, field) \
157 do \
158 { \
159 if (gcmVERIFYFIELDVALUE(data, reg, MASK_ ## field, ENABLED)) \
160 { \
161 enable |= gcmFIELDMASK(reg, field); \
162 } \
163 } \
164 while (gcvFALSE)
165
166#define _BLOCK_COUNT(reg) \
167 ((reg ## _Count) >> (reg ## _BLK))
168
169
170/******************************************************************************\
171*********************** Support Functions and Definitions **********************
172\******************************************************************************/
173
174#define gcdSTATE_MASK \
175 (gcmSETFIELDVALUE(0, AQ_COMMAND_NOP_COMMAND, OPCODE, NOP) | 0xC0FFEE)
176
177
178
179static gctUINT32
180_FlushPipe(
181 IN gckCONTEXT Context,
182 IN gctUINT32 Index,
183 IN gcePIPE_SELECT Pipe
184 )
185{
186 gctUINT32 flushSlots;
187 gctBOOL txCacheFix;
188 gctBOOL fcFlushStall;
189 gctBOOL iCacheInvalidate;
190
191 txCacheFix
192 = gckHARDWARE_IsFeatureAvailable(Context->hardware, gcvFEATURE_TEX_CACHE_FLUSH_FIX);
193
194 fcFlushStall
195 = gckHARDWARE_IsFeatureAvailable(Context->hardware, gcvFEATURE_FC_FLUSH_STALL);
196
197 iCacheInvalidate
198 = ((((gctUINT32) (Context->hardware->identity.chipMinorFeatures3)) >> (0 ? 3:3) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))));
199
200 flushSlots = 6;
201
202 if (Pipe == gcvPIPE_3D)
203 {
204 if (!txCacheFix)
205 {
206 /* Semaphore stall */
207 flushSlots += 4;
208 }
209
210 /* VST cache */
211 flushSlots += 2;
212 }
213
214 if (fcFlushStall)
215 {
216 /* Flush tile status cache. */
217 flushSlots += 6;
218 }
219
220 if (iCacheInvalidate)
221 {
222 flushSlots += 12;
223 }
224
225 if (Context->buffer != gcvNULL)
226 {
227 gctUINT32_PTR buffer;
228
229 /* Address correct index. */
230 buffer = Context->buffer->logical + Index;
231
232 if (Pipe == gcvPIPE_3D && !txCacheFix)
233 {
234 /* Semaphore from FE to PE. */
235 *buffer++
236 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
237 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
238 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
239
240 *buffer++
241 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
242 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
243
244 /* Stall from FE to PE. */
245 *buffer++
246 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
247
248 *buffer++
249 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
250 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
251 }
252
253 /* Flush the current pipe. */
254 *buffer++
255 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
256 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
257 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
258
259 *buffer++
260 = (Pipe == gcvPIPE_2D)
261 ? ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)))
262 : ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
263 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))
264 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)))
265 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
266
267 /* Flush VST in separate cmd. */
268 if (Pipe == gcvPIPE_3D)
269 {
270 *buffer++
271 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
272 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
273 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
274
275 *buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
276 }
277
278 /* Semaphore from FE to PE. */
279 *buffer++
280 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
281 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
282 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
283
284 *buffer++
285 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
286 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
287
288 /* Stall from FE to PE. */
289 *buffer++
290 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
291
292 *buffer++
293 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
294 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
295
296 if (fcFlushStall)
297 {
298 *buffer++
299 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
300 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0594) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
301 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
302
303 *buffer++
304 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
305
306 /* Semaphore from FE to PE. */
307 *buffer++
308 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
309 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
310 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
311
312 *buffer++
313 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
314 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
315
316 /* Stall from FE to PE. */
317 *buffer++
318 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
319
320 *buffer++
321 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
322 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
323 }
324
325 if (iCacheInvalidate)
326 {
327 /* Invalidate I$ after pipe is stalled */
328 *buffer++
329 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
330 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
331 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0218) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
332
333 *buffer++
334 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
335
336 *buffer++
337 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
338 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
339 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x021A) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
340
341 *buffer++
342 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
343 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
344
345 *buffer++
346 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
347 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
348 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0218) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
349
350 *buffer++
351 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
352
353 *buffer++
354 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
355 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
356 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x021A) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
357
358 *buffer++
359 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
360 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
361
362 /* Semaphore from FE to PE. */
363 *buffer++
364 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
365 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
366 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
367
368 *buffer++
369 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
370 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
371
372 /* Stall from FE to PE. */
373 *buffer++
374 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
375
376 *buffer++
377 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
378 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
379 }
380 }
381
382 /* Number of slots taken by flushing pipe. */
383 return flushSlots;
384}
385
386
387static gctUINT32
388_SwitchPipe(
389 IN gckCONTEXT Context,
390 IN gctUINT32 Index,
391 IN gcePIPE_SELECT Pipe
392 )
393{
394 gctUINT32 slots = 6;
395
396 if (Context->buffer != gcvNULL)
397 {
398 gctUINT32_PTR buffer;
399
400 /* Address correct index. */
401 buffer = Context->buffer->logical + Index;
402
403 /* LoadState(AQPipeSelect, 1), pipe. */
404 *buffer++
405 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
406 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
407 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
408
409 *buffer++
410 = (Pipe == gcvPIPE_2D)
411 ? 0x1
412 : 0x0;
413
414 /* Semaphore from FE to PE. */
415 *buffer++
416 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
417 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
418 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
419
420 *buffer++
421 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
422 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
423
424 /* Stall from FE to PE. */
425 *buffer++
426 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
427
428 *buffer++
429 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
430 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
431 }
432
433 Context->pipeSelectBytes = slots * gcmSIZEOF(gctUINT32);
434
435 return slots;
436}
437
438
439static gceSTATUS
440_InitializeContextBuffer(
441 IN gckCONTEXT Context
442 )
443{
444 gctUINT32_PTR buffer;
445 gctUINT32 index;
446
447
448 /* Reset the buffer index. */
449 index = 0;
450
451 /* Reset the last state address. */
452 Context->lastAddress = ~0U;
453
454 /* Get the buffer pointer. */
455 buffer = (Context->buffer == gcvNULL)
456 ? gcvNULL
457 : Context->buffer->logical;
458
459
460 /**************************************************************************/
461 /* Build 2D states. *******************************************************/
462
463
464
465 /**************************************************************************/
466 /* Link to another address. ***********************************************/
467
468 Context->linkIndex3D = (gctUINT)index;
469
470 if (buffer != gcvNULL)
471 {
472 buffer[index + 0]
473 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
474 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
475
476 buffer[index + 1]
477 = 0;
478 }
479
480 index += 2;
481
482 /* Store the end of the context buffer. */
483 Context->bufferSize = index * gcmSIZEOF(gctUINT32);
484
485
486 /**************************************************************************/
487 /* Pipe switch for the case where neither 2D nor 3D are used. *************/
488
489 /* Store the 3D entry index. */
490 Context->entryOffsetXDFrom2D = (gctUINT)index * gcmSIZEOF(gctUINT32);
491
492 /* Flush 2D pipe. */
493 index += _FlushPipe(Context, index, gcvPIPE_2D);
494
495 /* Switch to 3D pipe. */
496 index += _SwitchPipe(Context, index, gcvPIPE_3D);
497
498 /* Store the location of the link. */
499 Context->linkIndexXD = (gctUINT)index;
500
501 if (buffer != gcvNULL)
502 {
503 buffer[index + 0]
504 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
505 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
506
507 buffer[index + 1]
508 = 0;
509 }
510
511 index += 2;
512
513
514 /**************************************************************************/
515 /* Save size for buffer. **************************************************/
516
517 Context->totalSize = index * gcmSIZEOF(gctUINT32);
518
519
520 /* Success. */
521 return gcvSTATUS_OK;
522}
523
524static gceSTATUS
525_DestroyContext(
526 IN gckCONTEXT Context
527 )
528{
529 gceSTATUS status = gcvSTATUS_OK;
530
531 if (Context != gcvNULL)
532 {
533 gcsCONTEXT_PTR bufferHead;
534
535 /* Free context buffers. */
536 for (bufferHead = Context->buffer; Context->buffer != gcvNULL;)
537 {
538 /* Get a shortcut to the current buffer. */
539 gcsCONTEXT_PTR buffer = Context->buffer;
540
541 /* Get the next buffer. */
542 gcsCONTEXT_PTR next = buffer->next;
543
544 /* Last item? */
545 if (next == bufferHead)
546 {
547 next = gcvNULL;
548 }
549
550 /* Destroy the signal. */
551 if (buffer->signal != gcvNULL)
552 {
553 gcmkONERROR(gckOS_DestroySignal(
554 Context->os, buffer->signal
555 ));
556
557 buffer->signal = gcvNULL;
558 }
559
560 /* Free state delta map. */
561 if (buffer->logical != gcvNULL)
562 {
563 if (Context->hardware->kernel->virtualCommandBuffer)
564 {
565 gcmkONERROR(gckEVENT_DestroyVirtualCommandBuffer(
566 Context->hardware->kernel->eventObj,
567 Context->totalSize,
568 buffer->physical,
569 buffer->logical,
570 gcvKERNEL_PIXEL
571 ));
572 }
573 else
574 {
575 gcmkONERROR(gckEVENT_FreeContiguousMemory(
576 Context->hardware->kernel->eventObj,
577 Context->totalSize,
578 buffer->physical,
579 buffer->logical,
580 gcvKERNEL_PIXEL
581 ));
582 }
583
584 buffer->logical = gcvNULL;
585 }
586
587 /* Free context buffer. */
588 gcmkONERROR(gcmkOS_SAFE_FREE(Context->os, buffer));
589
590 /* Remove from the list. */
591 Context->buffer = next;
592 }
593
594#if gcdSECURE_USER
595 /* Free the hint array. */
596 if (Context->hint != gcvNULL)
597 {
598 gcmkONERROR(gcmkOS_SAFE_FREE(Context->os, Context->hint));
599 }
600#endif
601 /* Free record array copy. */
602#if REMOVE_DUPLICATED_COPY_FROM_USER
603 if (Context->recordArrayMap != gcvNULL)
604 {
605 gcsRECORD_ARRAY_MAP_PTR map = Context->recordArrayMap;
606
607 do
608 {
609 /* Free record array. */
610 gcmkONERROR(gcmkOS_SAFE_FREE(Context->os, map->kData));
611 map = map->next;
612 }
613 while (map != Context->recordArrayMap);
614
615 gcmkONERROR(gcmkOS_SAFE_FREE(Context->os, Context->recordArrayMap));
616 }
617#else
618 if (Context->recordArray != gcvNULL)
619 {
620 gcmkONERROR(gcmkOS_SAFE_FREE(Context->os, Context->recordArray));
621 }
622#endif
623
624 /* Mark the gckCONTEXT object as unknown. */
625 Context->object.type = gcvOBJ_UNKNOWN;
626
627 /* Free the gckCONTEXT object. */
628 gcmkONERROR(gcmkOS_SAFE_FREE(Context->os, Context));
629 }
630
631OnError:
632 return status;
633}
634
635
636/******************************************************************************\
637**************************** Context Management API ****************************
638\******************************************************************************/
639
640/******************************************************************************\
641**
642** gckCONTEXT_Construct
643**
644** Construct a new gckCONTEXT object.
645**
646** INPUT:
647**
648** gckOS Os
649** Pointer to gckOS object.
650**
651** gctUINT32 ProcessID
652** Current process ID.
653**
654** gckHARDWARE Hardware
655** Pointer to gckHARDWARE object.
656**
657** OUTPUT:
658**
659** gckCONTEXT * Context
660** Pointer to a variable thet will receive the gckCONTEXT object
661** pointer.
662*/
663gceSTATUS
664gckCONTEXT_Construct(
665 IN gckOS Os,
666 IN gckHARDWARE Hardware,
667 IN gctUINT32 ProcessID,
668 OUT gckCONTEXT * Context
669 )
670{
671 gceSTATUS status;
672 gckCONTEXT context = gcvNULL;
673 gctUINT32 allocationSize;
674 gctUINT i;
675 gctPOINTER pointer = gcvNULL;
676 gctUINT32 address;
677
678 gcmkHEADER_ARG("Os=0x%08X Hardware=0x%08X", Os, Hardware);
679
680 /* Verify the arguments. */
681 gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
682 gcmkVERIFY_ARGUMENT(Context != gcvNULL);
683
684
685 /**************************************************************************/
686 /* Allocate and initialize basic fields of gckCONTEXT. ********************/
687
688 /* The context object size. */
689 allocationSize = gcmSIZEOF(struct _gckCONTEXT);
690
691 /* Allocate the object. */
692 gcmkONERROR(gckOS_Allocate(
693 Os, allocationSize, &pointer
694 ));
695
696 context = pointer;
697
698 /* Reset the entire object. */
699 gcmkONERROR(gckOS_ZeroMemory(context, allocationSize));
700
701 /* Initialize the gckCONTEXT object. */
702 context->object.type = gcvOBJ_CONTEXT;
703 context->os = Os;
704 context->hardware = Hardware;
705
706
707 context->entryPipe = gcvPIPE_2D;
708 context->exitPipe = gcvPIPE_2D;
709
710 /* Get the command buffer requirements. */
711 gcmkONERROR(gckHARDWARE_QueryCommandBuffer(
712 Hardware,
713 &context->alignment,
714 &context->reservedHead,
715 &context->reservedTail
716 ));
717
718 /* Mark the context as dirty to force loading of the entire state table
719 the first time. */
720 context->dirty = gcvTRUE;
721
722
723 /**************************************************************************/
724 /* Get the size of the context buffer. ************************************/
725
726 gcmkONERROR(_InitializeContextBuffer(context));
727
728
729 /**************************************************************************/
730 /* Compute the size of the record array. **********************************/
731
732 context->recordArraySize
733#ifdef DISABLE_RECORD_ARRAY_SIZE_OPTIMIZATION
734 = gcmSIZEOF(gcsSTATE_DELTA_RECORD) * (gctUINT)context->maxState;
735#else
736 = gcmSIZEOF(gcsSTATE_DELTA_RECORD) * (gctUINT)context->numStates;
737#endif
738
739
740 if (context->maxState > 0)
741 {
742 /**************************************************************************/
743 /* Allocate and reset the state mapping table. ****************************/
744 if (context->hardware->kernel->command->stateMap == gcvNULL)
745 {
746 /* Allocate the state mapping table. */
747 gcmkONERROR(gckOS_Allocate(
748 Os,
749 gcmSIZEOF(gcsSTATE_MAP) * context->maxState,
750 &pointer
751 ));
752
753 context->map = pointer;
754
755 /* Zero the state mapping table. */
756 gcmkONERROR(gckOS_ZeroMemory(
757 context->map, gcmSIZEOF(gcsSTATE_MAP) * context->maxState
758 ));
759
760 context->hardware->kernel->command->stateMap = pointer;
761 }
762 else
763 {
764 context->map = context->hardware->kernel->command->stateMap;
765 }
766
767 /**************************************************************************/
768 /* Allocate the hint array. ***********************************************/
769
770#if gcdSECURE_USER
771 /* Allocate hints. */
772 gcmkONERROR(gckOS_Allocate(
773 Os,
774 gcmSIZEOF(gctBOOL) * context->maxState,
775 &pointer
776 ));
777
778 context->hint = pointer;
779#endif
780 }
781
782 /**************************************************************************/
783 /* Allocate the context and state delta buffers. **************************/
784
785 for (i = 0; i < gcdCONTEXT_BUFFER_COUNT; i += 1)
786 {
787 /* Allocate a context buffer. */
788 gcsCONTEXT_PTR buffer;
789
790 gctSIZE_T totalSize = context->totalSize;
791
792 /* Allocate the context buffer structure. */
793 gcmkONERROR(gckOS_Allocate(
794 Os,
795 gcmSIZEOF(gcsCONTEXT),
796 &pointer
797 ));
798
799 buffer = pointer;
800
801 /* Reset the context buffer structure. */
802 gcmkVERIFY_OK(gckOS_ZeroMemory(
803 buffer, gcmSIZEOF(gcsCONTEXT)
804 ));
805
806 /* Append to the list. */
807 if (context->buffer == gcvNULL)
808 {
809 buffer->next = buffer;
810 context->buffer = buffer;
811 }
812 else
813 {
814 buffer->next = context->buffer->next;
815 context->buffer->next = buffer;
816 }
817
818 /* Set the number of delta in the order of creation. */
819#if gcmIS_DEBUG(gcdDEBUG_CODE)
820 buffer->num = i;
821#endif
822
823 /* Create the busy signal. */
824 gcmkONERROR(gckOS_CreateSignal(
825 Os, gcvFALSE, &buffer->signal
826 ));
827
828 /* Set the signal, buffer is currently not busy. */
829 gcmkONERROR(gckOS_Signal(
830 Os, buffer->signal, gcvTRUE
831 ));
832
833 /* Create a new physical context buffer. */
834 if (context->hardware->kernel->virtualCommandBuffer)
835 {
836 gcmkONERROR(gckKERNEL_AllocateVirtualCommandBuffer(
837 context->hardware->kernel,
838 gcvFALSE,
839 &totalSize,
840 &buffer->physical,
841 &pointer
842 ));
843
844 gcmkONERROR(gckKERNEL_GetGPUAddress(
845 context->hardware->kernel,
846 pointer,
847 gcvFALSE,
848 buffer->physical,
849 &address
850 ));
851 }
852 else
853 {
854 gcmkONERROR(gckOS_AllocateContiguous(
855 Os,
856 gcvFALSE,
857 &totalSize,
858 &buffer->physical,
859 &pointer
860 ));
861
862 gcmkONERROR(gckHARDWARE_ConvertLogical(
863 context->hardware,
864 pointer,
865 gcvFALSE,
866 &address
867 ));
868 }
869
870 buffer->logical = pointer;
871 buffer->address = address;
872
873 /* Set gckEVENT object pointer. */
874 buffer->eventObj = Hardware->kernel->eventObj;
875
876 /* Set the pointers to the LINK commands. */
877 if (context->linkIndex2D != 0)
878 {
879 buffer->link2D = &buffer->logical[context->linkIndex2D];
880 }
881
882 if (context->linkIndex3D != 0)
883 {
884 buffer->link3D = &buffer->logical[context->linkIndex3D];
885 }
886
887 if (context->linkIndexXD != 0)
888 {
889 gctPOINTER xdLink;
890 gctUINT32 xdEntryAddress;
891 gctUINT32 xdEntrySize;
892 gctUINT32 linkBytes;
893
894 /* Determine LINK parameters. */
895 xdLink
896 = &buffer->logical[context->linkIndexXD];
897
898 xdEntryAddress
899 = buffer->address
900 + context->entryOffsetXDFrom3D;
901
902 xdEntrySize
903 = context->bufferSize
904 - context->entryOffsetXDFrom3D;
905
906 /* Query LINK size. */
907 gcmkONERROR(gckHARDWARE_Link(
908 Hardware, gcvNULL, 0, 0, &linkBytes, gcvNULL, gcvNULL
909 ));
910
911 /* Generate a LINK. */
912 gcmkONERROR(gckHARDWARE_Link(
913 Hardware,
914 xdLink,
915 xdEntryAddress,
916 xdEntrySize,
917 &linkBytes,
918 gcvNULL,
919 gcvNULL
920 ));
921 }
922 }
923
924
925 /**************************************************************************/
926 /* Initialize the context buffers. ****************************************/
927
928 /* Initialize the current context buffer. */
929 gcmkONERROR(_InitializeContextBuffer(context));
930
931 /* Make all created contexts equal. */
932 {
933 gcsCONTEXT_PTR currContext, tempContext;
934
935 /* Set the current context buffer. */
936 currContext = context->buffer;
937
938 /* Get the next context buffer. */
939 tempContext = currContext->next;
940
941 /* Loop through all buffers. */
942 while (tempContext != currContext)
943 {
944 if (tempContext == gcvNULL)
945 {
946 gcmkONERROR(gcvSTATUS_NOT_FOUND);
947 }
948
949 /* Copy the current context. */
950 gckOS_MemCopy(
951 tempContext->logical,
952 currContext->logical,
953 context->totalSize
954 );
955
956 /* Get the next context buffer. */
957 tempContext = tempContext->next;
958 }
959 }
960
961 /* Return pointer to the gckCONTEXT object. */
962 *Context = context;
963
964 /* Success. */
965 gcmkFOOTER_ARG("*Context=0x%08X", *Context);
966 return gcvSTATUS_OK;
967
968OnError:
969 /* Roll back on error. */
970 gcmkVERIFY_OK(_DestroyContext(context));
971
972 /* Return the status. */
973 gcmkFOOTER();
974 return status;
975}
976
977/******************************************************************************\
978**
979** gckCONTEXT_Destroy
980**
981** Destroy a gckCONTEXT object.
982**
983** INPUT:
984**
985** gckCONTEXT Context
986** Pointer to an gckCONTEXT object.
987**
988** OUTPUT:
989**
990** Nothing.
991*/
992gceSTATUS
993gckCONTEXT_Destroy(
994 IN gckCONTEXT Context
995 )
996{
997 gceSTATUS status;
998
999 gcmkHEADER_ARG("Context=0x%08X", Context);
1000
1001 /* Verify the arguments. */
1002 gcmkVERIFY_OBJECT(Context, gcvOBJ_CONTEXT);
1003
1004 /* Destroy the context and all related objects. */
1005 status = _DestroyContext(Context);
1006
1007 /* Success. */
1008 gcmkFOOTER_NO();
1009 return status;
1010}
1011
1012/******************************************************************************\
1013**
1014** gckCONTEXT_Update
1015**
1016** Merge all pending state delta buffers into the current context buffer.
1017**
1018** INPUT:
1019**
1020** gckCONTEXT Context
1021** Pointer to an gckCONTEXT object.
1022**
1023** gctUINT32 ProcessID
1024** Current process ID.
1025**
1026** gcsSTATE_DELTA_PTR StateDelta
1027** Pointer to the state delta.
1028**
1029** OUTPUT:
1030**
1031** Nothing.
1032*/
1033gceSTATUS
1034gckCONTEXT_Update(
1035 IN gckCONTEXT Context,
1036 IN gctUINT32 ProcessID,
1037 IN gcsSTATE_DELTA_PTR StateDelta
1038 )
1039{
1040 return gcvSTATUS_OK;
1041}
1042
1043gceSTATUS
1044gckCONTEXT_MapBuffer(
1045 IN gckCONTEXT Context,
1046 OUT gctUINT32 *Physicals,
1047 OUT gctUINT64 *Logicals,
1048 OUT gctUINT32 *Bytes
1049 )
1050{
1051 gceSTATUS status;
1052 int i = 0;
1053 gctSIZE_T pageCount;
1054 gckVIRTUAL_COMMAND_BUFFER_PTR commandBuffer;
1055 gckKERNEL kernel = Context->hardware->kernel;
1056 gctPOINTER logical;
1057 gctPHYS_ADDR physical;
1058
1059 gcsCONTEXT_PTR buffer;
1060
1061 gcmkHEADER();
1062
1063 gcmkVERIFY_OBJECT(Context, gcvOBJ_CONTEXT);
1064
1065 buffer = Context->buffer;
1066
1067 for (i = 0; i < gcdCONTEXT_BUFFER_COUNT; i++)
1068 {
1069 if (kernel->virtualCommandBuffer)
1070 {
1071 commandBuffer = (gckVIRTUAL_COMMAND_BUFFER_PTR)buffer->physical;
1072 physical = commandBuffer->physical;
1073
1074 gcmkONERROR(gckOS_CreateUserVirtualMapping(
1075 kernel->os,
1076 physical,
1077 Context->totalSize,
1078 &logical,
1079 &pageCount));
1080 }
1081 else
1082 {
1083 physical = buffer->physical;
1084
1085 gcmkONERROR(gckOS_MapMemory(
1086 kernel->os,
1087 physical,
1088 Context->totalSize,
1089 &logical));
1090 }
1091
1092 Physicals[i] = gcmPTR_TO_NAME(physical);
1093
1094 Logicals[i] = gcmPTR_TO_UINT64(logical);
1095
1096 buffer = buffer->next;
1097 }
1098
1099 *Bytes = (gctUINT)Context->totalSize;
1100
1101 gcmkFOOTER_NO();
1102 return gcvSTATUS_OK;
1103
1104OnError:
1105 gcmkFOOTER();
1106 return status;
1107}
1108
diff --git a/src/hal/kernel/arch/gc_hal_kernel_context.h b/src/hal/kernel/arch/gc_hal_kernel_context.h
new file mode 100755
index 0000000..b02878b
--- /dev/null
+++ b/src/hal/kernel/arch/gc_hal_kernel_context.h
@@ -0,0 +1,247 @@
1/****************************************************************************
2*
3* The MIT License (MIT)
4*
5* Copyright (c) 2014 Vivante Corporation
6*
7* Permission is hereby granted, free of charge, to any person obtaining a
8* copy of this software and associated documentation files (the "Software"),
9* to deal in the Software without restriction, including without limitation
10* the rights to use, copy, modify, merge, publish, distribute, sublicense,
11* and/or sell copies of the Software, and to permit persons to whom the
12* Software is furnished to do so, subject to the following conditions:
13*
14* The above copyright notice and this permission notice shall be included in
15* all copies or substantial portions of the Software.
16*
17* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23* DEALINGS IN THE SOFTWARE.
24*
25*****************************************************************************
26*
27* The GPL License (GPL)
28*
29* Copyright (C) 2014 Vivante Corporation
30*
31* This program is free software; you can redistribute it and/or
32* modify it under the terms of the GNU General Public License
33* as published by the Free Software Foundation; either version 2
34* of the License, or (at your option) any later version.
35*
36* This program is distributed in the hope that it will be useful,
37* but WITHOUT ANY WARRANTY; without even the implied warranty of
38* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
39* GNU General Public License for more details.
40*
41* You should have received a copy of the GNU General Public License
42* along with this program; if not, write to the Free Software Foundation,
43* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
44*
45*****************************************************************************
46*
47* Note: This software is released under dual MIT and GPL licenses. A
48* recipient may use this file under the terms of either the MIT license or
49* GPL License. If you wish to use only one license not the other, you can
50* indicate your decision by deleting one of the above license notices in your
51* version of this file.
52*
53*****************************************************************************/
54
55
56#ifndef __gc_hal_kernel_context_h_
57#define __gc_hal_kernel_context_h_
58
59#include "gc_hal_kernel_buffer.h"
60
61/* Exprimental optimization. */
62#define REMOVE_DUPLICATED_COPY_FROM_USER 1
63
64#ifdef __cplusplus
65extern "C" {
66#endif
67
68/* Maps state locations within the context buffer. */
69typedef struct _gcsSTATE_MAP * gcsSTATE_MAP_PTR;
70typedef struct _gcsSTATE_MAP
71{
72 /* Index of the state in the context buffer. */
73 gctUINT index;
74
75 /* State mask. */
76 gctUINT32 mask;
77}
78gcsSTATE_MAP;
79
80/* Context buffer. */
81typedef struct _gcsCONTEXT * gcsCONTEXT_PTR;
82typedef struct _gcsCONTEXT
83{
84 /* For debugging: the number of context buffer in the order of creation. */
85#if gcmIS_DEBUG(gcdDEBUG_CODE)
86 gctUINT num;
87#endif
88
89 /* Pointer to gckEVENT object. */
90 gckEVENT eventObj;
91
92 /* Context busy signal. */
93 gctSIGNAL signal;
94
95 /* Physical address of the context buffer. */
96 gctPHYS_ADDR physical;
97
98 /* Logical address of the context buffer. */
99 gctUINT32_PTR logical;
100
101 /* Hardware address of the context buffer. */
102 gctUINT32 address;
103
104 /* Pointer to the LINK commands. */
105 gctPOINTER link2D;
106 gctPOINTER link3D;
107
108 /* The number of pending state deltas. */
109 gctUINT deltaCount;
110
111 /* Pointer to the first delta to be applied. */
112 gcsSTATE_DELTA_PTR delta;
113
114 /* Next context buffer. */
115 gcsCONTEXT_PTR next;
116}
117gcsCONTEXT;
118
119typedef struct _gcsRECORD_ARRAY_MAP * gcsRECORD_ARRAY_MAP_PTR;
120struct _gcsRECORD_ARRAY_MAP
121{
122 /* User pointer key. */
123 gctUINT64 key;
124
125 /* Kernel memory buffer. */
126 gcsSTATE_DELTA_RECORD_PTR kData;
127
128 /* Next map. */
129 gcsRECORD_ARRAY_MAP_PTR next;
130
131};
132
133#define USE_SW_RESET 1
134
135/* gckCONTEXT structure that hold the current context. */
136struct _gckCONTEXT
137{
138 /* Object. */
139 gcsOBJECT object;
140
141 /* Pointer to gckOS object. */
142 gckOS os;
143
144 /* Pointer to gckHARDWARE object. */
145 gckHARDWARE hardware;
146
147 /* Command buffer alignment. */
148 gctUINT32 alignment;
149 gctUINT32 reservedHead;
150 gctUINT32 reservedTail;
151
152 /* Context buffer metrics. */
153 gctSIZE_T maxState;
154 gctUINT32 numStates;
155 gctUINT32 totalSize;
156 gctUINT32 bufferSize;
157 gctUINT32 linkIndex2D;
158 gctUINT32 linkIndex3D;
159 gctUINT32 linkIndexXD;
160 gctUINT32 entryOffset3D;
161 gctUINT32 entryOffsetXDFrom2D;
162 gctUINT32 entryOffsetXDFrom3D;
163
164 /* Dirty flags. */
165 gctBOOL dirty;
166 gctBOOL dirty2D;
167 gctBOOL dirty3D;
168 gcsCONTEXT_PTR dirtyBuffer;
169
170 /* State mapping. */
171 gcsSTATE_MAP_PTR map;
172
173 /* List of context buffers. */
174 gcsCONTEXT_PTR buffer;
175
176 /* A copy of the user record array. */
177 gctUINT recordArraySize;
178#if REMOVE_DUPLICATED_COPY_FROM_USER
179 gcsRECORD_ARRAY_MAP_PTR recordArrayMap;
180#else
181 gcsSTATE_DELTA_RECORD_PTR recordArray;
182#endif
183
184 /* Requested pipe select for context. */
185 gcePIPE_SELECT entryPipe;
186 gcePIPE_SELECT exitPipe;
187
188 /* Variables used for building state buffer. */
189 gctUINT32 lastAddress;
190 gctSIZE_T lastSize;
191 gctUINT32 lastIndex;
192 gctBOOL lastFixed;
193
194 gctUINT32 pipeSelectBytes;
195
196 /* Hint array. */
197#if gcdSECURE_USER
198 gctBOOL_PTR hint;
199#endif
200
201#if VIVANTE_PROFILER_CONTEXT
202 gcsPROFILER_COUNTERS latestProfiler;
203 gcsPROFILER_COUNTERS histroyProfiler;
204
205#if USE_SW_RESET
206 /* RA */
207 gctUINT32 prevRaValidPixelCount;
208 gctUINT32 prevRaTotalQuadCount;
209 gctUINT32 prevRaValidQuadCountAfterEarlyZ;
210 gctUINT32 prevRaTotalPrimitiveCount;
211 gctUINT32 prevRaPipeCacheMissCounter;
212 gctUINT32 prevRaPrefetchCacheMissCounter;
213
214 /* PE */
215 gctUINT32 prevPePixelCountKilledByColorPipe;
216 gctUINT32 prevPePixelCountKilledByDepthPipe;
217 gctUINT32 prevPePixelCountDrawnByColorPipe;
218 gctUINT32 prevPePixelCountDrawnByDepthPipe;
219
220 /* PA */
221 gctUINT32 prevPaInputVtxCounter;
222 gctUINT32 prevPaInputPrimCounter;
223 gctUINT32 prevPaOutputPrimCounter;
224 gctUINT32 prevPaDepthClippedCounter;
225 gctUINT32 prevPaTrivialRejectedCounter;
226 gctUINT32 prevPaCulledCounter;
227
228 /* SH */
229 gctUINT32 prevVSInstCount;
230 gctUINT32 prevVSBranchInstCount;
231 gctUINT32 prevVSTexInstCount;
232 gctUINT32 prevVSVertexCount;
233 gctUINT32 prevPSInstCount;
234 gctUINT32 prevPSBranchInstCount;
235 gctUINT32 prevPSTexInstCount;
236 gctUINT32 prevPSPixelCount;
237#endif
238
239#endif
240};
241
242#ifdef __cplusplus
243}
244#endif
245
246#endif /* __gc_hal_kernel_context_h_ */
247
diff --git a/src/hal/kernel/arch/gc_hal_kernel_hardware.c b/src/hal/kernel/arch/gc_hal_kernel_hardware.c
new file mode 100755
index 0000000..10ea1e8
--- /dev/null
+++ b/src/hal/kernel/arch/gc_hal_kernel_hardware.c
@@ -0,0 +1,7894 @@
1/****************************************************************************
2*
3* The MIT License (MIT)
4*
5* Copyright (c) 2014 Vivante Corporation
6*
7* Permission is hereby granted, free of charge, to any person obtaining a
8* copy of this software and associated documentation files (the "Software"),
9* to deal in the Software without restriction, including without limitation
10* the rights to use, copy, modify, merge, publish, distribute, sublicense,
11* and/or sell copies of the Software, and to permit persons to whom the
12* Software is furnished to do so, subject to the following conditions:
13*
14* The above copyright notice and this permission notice shall be included in
15* all copies or substantial portions of the Software.
16*
17* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23* DEALINGS IN THE SOFTWARE.
24*
25*****************************************************************************
26*
27* The GPL License (GPL)
28*
29* Copyright (C) 2014 Vivante Corporation
30*
31* This program is free software; you can redistribute it and/or
32* modify it under the terms of the GNU General Public License
33* as published by the Free Software Foundation; either version 2
34* of the License, or (at your option) any later version.
35*
36* This program is distributed in the hope that it will be useful,
37* but WITHOUT ANY WARRANTY; without even the implied warranty of
38* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
39* GNU General Public License for more details.
40*
41* You should have received a copy of the GNU General Public License
42* along with this program; if not, write to the Free Software Foundation,
43* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
44*
45*****************************************************************************
46*
47* Note: This software is released under dual MIT and GPL licenses. A
48* recipient may use this file under the terms of either the MIT license or
49* GPL License. If you wish to use only one license not the other, you can
50* indicate your decision by deleting one of the above license notices in your
51* version of this file.
52*
53*****************************************************************************/
54
55
56#include "gc_hal.h"
57#include "gc_hal_kernel.h"
58#if VIVANTE_PROFILER_CONTEXT
59#include "gc_hal_kernel_context.h"
60#endif
61
62#define gcdDISABLE_FE_L2 1
63
64#define _GC_OBJ_ZONE gcvZONE_HARDWARE
65
66#define gcmSEMAPHORESTALL(buffer) \
67 do \
68 { \
69 /* Arm the PE-FE Semaphore. */ \
70 *buffer++ \
71 = gcmSETFIELDVALUE(0, AQ_COMMAND_LOAD_STATE_COMMAND, OPCODE, LOAD_STATE) \
72 | gcmSETFIELD (0, AQ_COMMAND_LOAD_STATE_COMMAND, COUNT, 1) \
73 | gcmSETFIELD (0, AQ_COMMAND_LOAD_STATE_COMMAND, ADDRESS, 0x0E02); \
74 \
75 *buffer++ \
76 = gcmSETFIELDVALUE(0, AQ_SEMAPHORE, SOURCE, FRONT_END) \
77 | gcmSETFIELDVALUE(0, AQ_SEMAPHORE, DESTINATION, PIXEL_ENGINE);\
78 \
79 /* STALL FE until PE is done flushing. */ \
80 *buffer++ \
81 = gcmSETFIELDVALUE(0, STALL_COMMAND, OPCODE, STALL); \
82 \
83 *buffer++ \
84 = gcmSETFIELDVALUE(0, STALL_STALL, SOURCE, FRONT_END) \
85 | gcmSETFIELDVALUE(0, STALL_STALL, DESTINATION, PIXEL_ENGINE); \
86 } while(0)
87
88typedef struct _gcsiDEBUG_REGISTERS * gcsiDEBUG_REGISTERS_PTR;
89typedef struct _gcsiDEBUG_REGISTERS
90{
91 gctSTRING module;
92 gctUINT index;
93 gctUINT shift;
94 gctUINT data;
95 gctUINT count;
96 gctUINT32 signature;
97}
98gcsiDEBUG_REGISTERS;
99
100/******************************************************************************\
101********************************* Support Code *********************************
102\******************************************************************************/
103static gctBOOL
104_IsHardwareMatch(
105 IN gckHARDWARE Hardware,
106 IN gctINT32 ChipModel,
107 IN gctUINT32 ChipRevision
108 )
109{
110 return ((Hardware->identity.chipModel == ChipModel) &&
111 (Hardware->identity.chipRevision == ChipRevision));
112}
113
114static gceSTATUS
115_ResetGPU(
116 IN gckHARDWARE Hardware,
117 IN gckOS Os,
118 IN gceCORE Core
119 );
120
121static gceSTATUS
122_IdentifyHardware(
123 IN gckOS Os,
124 IN gceCORE Core,
125 OUT gcsHAL_QUERY_CHIP_IDENTITY_PTR Identity
126 )
127{
128 gceSTATUS status;
129
130 gctUINT32 chipIdentity;
131
132 gctUINT32 streamCount = 0;
133 gctUINT32 registerMax = 0;
134 gctUINT32 threadCount = 0;
135 gctUINT32 shaderCoreCount = 0;
136 gctUINT32 vertexCacheSize = 0;
137 gctUINT32 vertexOutputBufferSize = 0;
138 gctUINT32 pixelPipes = 0;
139 gctUINT32 instructionCount = 0;
140 gctUINT32 numConstants = 0;
141 gctUINT32 bufferSize = 0;
142 gctUINT32 varyingsCount = 0;
143 gctUINT32 debugControl0 = 0;
144
145 gcmkHEADER_ARG("Os=0x%x", Os);
146
147 /***************************************************************************
148 ** Get chip ID and revision.
149 */
150
151 /* Read chip identity register. */
152 gcmkONERROR(
153 gckOS_ReadRegisterEx(Os, Core,
154 0x00018,
155 &chipIdentity));
156
157 /* Special case for older graphic cores. */
158 if (((((gctUINT32) (chipIdentity)) >> (0 ? 31:24) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1)))))) == (0x01 & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))))
159 {
160 Identity->chipModel = gcv500;
161 Identity->chipRevision = (((((gctUINT32) (chipIdentity)) >> (0 ? 15:12)) & ((gctUINT32) ((((1 ? 15:12) - (0 ? 15:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:12) - (0 ? 15:12) + 1)))))) );
162 }
163
164 else
165 {
166 /* Read chip identity register. */
167 gcmkONERROR(
168 gckOS_ReadRegisterEx(Os, Core,
169 0x00020,
170 (gctUINT32_PTR) &Identity->chipModel));
171
172 if (((Identity->chipModel & 0xFF00) == 0x0400)
173 && (Identity->chipModel != 0x0420)
174 && (Identity->chipModel != 0x0428))
175 {
176 Identity->chipModel = (gceCHIPMODEL) (Identity->chipModel & 0x0400);
177 }
178
179 /* Read CHIP_REV register. */
180 gcmkONERROR(
181 gckOS_ReadRegisterEx(Os, Core,
182 0x00024,
183 &Identity->chipRevision));
184
185 if ((Identity->chipModel == gcv2000) && (Identity->chipRevision & 0xffff0000) == 0xffff0000)
186 {
187 Identity->chipModel = gcv3000;
188 Identity->chipRevision &= 0xffff;
189 Identity->chipFlags |= gcvCHIP_FLAG_GC2000_R2;
190 }
191
192 if ((Identity->chipModel == gcv300)
193 && (Identity->chipRevision == 0x2201)
194 )
195 {
196 gctUINT32 chipDate;
197 gctUINT32 chipTime;
198
199 /* Read date and time registers. */
200 gcmkONERROR(
201 gckOS_ReadRegisterEx(Os, Core,
202 0x00028,
203 &chipDate));
204
205 gcmkONERROR(
206 gckOS_ReadRegisterEx(Os, Core,
207 0x0002C,
208 &chipTime));
209
210 if ((chipDate == 0x20080814) && (chipTime == 0x12051100))
211 {
212 /* This IP has an ECO; put the correct revision in it. */
213 Identity->chipRevision = 0x1051;
214 }
215 }
216
217 gcmkONERROR(
218 gckOS_ReadRegisterEx(Os, Core,
219 0x000A8,
220 &Identity->productID));
221 }
222
223 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
224 "Identity: chipModel=%X",
225 Identity->chipModel);
226
227 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
228 "Identity: chipRevision=%X",
229 Identity->chipRevision);
230
231
232 /***************************************************************************
233 ** Get chip features.
234 */
235
236 /* Read chip feature register. */
237 gcmkONERROR(
238 gckOS_ReadRegisterEx(Os, Core,
239 0x0001C,
240 &Identity->chipFeatures));
241
242
243 if (((Identity->chipModel == gcv500) && (Identity->chipRevision < 2))
244 || ((Identity->chipModel == gcv300) && (Identity->chipRevision < 0x2000))
245 )
246 {
247 /* GC500 rev 1.x and GC300 rev < 2.0 doesn't have these registers. */
248 Identity->chipMinorFeatures = 0;
249 Identity->chipMinorFeatures1 = 0;
250 Identity->chipMinorFeatures2 = 0;
251 Identity->chipMinorFeatures3 = 0;
252 Identity->chipMinorFeatures4 = 0;
253 Identity->chipMinorFeatures5 = 0;
254 Identity->chipMinorFeatures6 = 0;
255 }
256 else
257 {
258 /* Read chip minor feature register #0. */
259 gcmkONERROR(
260 gckOS_ReadRegisterEx(Os, Core,
261 0x00034,
262 &Identity->chipMinorFeatures));
263
264 if (((((gctUINT32) (Identity->chipMinorFeatures)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))))
265 )
266 {
267 /* Read chip minor featuress register #1. */
268 gcmkONERROR(
269 gckOS_ReadRegisterEx(Os, Core,
270 0x00074,
271 &Identity->chipMinorFeatures1));
272
273 /* Read chip minor featuress register #2. */
274 gcmkONERROR(
275 gckOS_ReadRegisterEx(Os, Core,
276 0x00084,
277 &Identity->chipMinorFeatures2));
278
279 /*Identity->chipMinorFeatures2 &= ~(0x1 << 3);*/
280
281 /* Read chip minor featuress register #1. */
282 gcmkONERROR(
283 gckOS_ReadRegisterEx(Os, Core,
284 0x00088,
285 &Identity->chipMinorFeatures3));
286
287
288 /* Read chip minor featuress register #4. */
289 gcmkONERROR(
290 gckOS_ReadRegisterEx(Os, Core,
291 0x00094,
292 &Identity->chipMinorFeatures4));
293
294 /* Read chip minor featuress register #5. */
295 gcmkONERROR(
296 gckOS_ReadRegisterEx(Os, Core,
297 0x000A0,
298 &Identity->chipMinorFeatures5));
299
300 /* Read chip minor featuress register #6. */
301 gcmkONERROR(
302 gckOS_ReadRegisterEx(Os, Core,
303 0x000DC,
304 &Identity->chipMinorFeatures6));
305 }
306 else
307 {
308 /* Chip doesn't has minor features register #1 or 2 or 3 or 4. */
309 Identity->chipMinorFeatures1 = 0;
310 Identity->chipMinorFeatures2 = 0;
311 Identity->chipMinorFeatures3 = 0;
312 Identity->chipMinorFeatures4 = 0;
313 Identity->chipMinorFeatures5 = 0;
314 Identity->chipMinorFeatures6 = 0;
315 }
316 }
317
318 /* Get the Supertile layout in the hardware. */
319 if (((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 26:26) & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))))
320 || ((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 8:8) & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1))))))))
321 {
322 Identity->superTileMode = 2;
323 }
324 else if (((((gctUINT32) (Identity->chipMinorFeatures)) >> (0 ? 27:27) & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))))
325 {
326 Identity->superTileMode = 1;
327 }
328 else
329 {
330 Identity->superTileMode = 0;
331 }
332
333 /* Exception for GC1000, revision 5035 & GC800, revision 4612 */
334 if (((Identity->chipModel == gcv1000) && ((Identity->chipRevision == 0x5035)
335 || (Identity->chipRevision == 0x5036)
336 || (Identity->chipRevision == 0x5037)
337 || (Identity->chipRevision == 0x5039)
338 || (Identity->chipRevision >= 0x5040)))
339 || ((Identity->chipModel == gcv800) && (Identity->chipRevision == 0x4612))
340 || ((Identity->chipModel == gcv600) && (Identity->chipRevision >= 0x4650))
341 || ((Identity->chipModel == gcv860) && (Identity->chipRevision == 0x4647))
342 || ((Identity->chipModel == gcv400) && (Identity->chipRevision >= 0x4633)))
343 {
344 Identity->superTileMode = 1;
345 }
346
347 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
348 "Identity: chipFeatures=0x%08X",
349 Identity->chipFeatures);
350
351 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
352 "Identity: chipMinorFeatures=0x%08X",
353 Identity->chipMinorFeatures);
354
355 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
356 "Identity: chipMinorFeatures1=0x%08X",
357 Identity->chipMinorFeatures1);
358
359 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
360 "Identity: chipMinorFeatures2=0x%08X",
361 Identity->chipMinorFeatures2);
362
363 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
364 "Identity: chipMinorFeatures3=0x%08X",
365 Identity->chipMinorFeatures3);
366
367 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
368 "Identity: chipMinorFeatures4=0x%08X",
369 Identity->chipMinorFeatures4);
370
371 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
372 "Identity: chipMinorFeatures5=0x%08X",
373 Identity->chipMinorFeatures5);
374
375 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
376 "Identity: chipMinorFeatures6=0x%08X",
377 Identity->chipMinorFeatures6);
378
379 /***************************************************************************
380 ** Get chip specs.
381 */
382
383 if (((((gctUINT32) (Identity->chipMinorFeatures)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))))
384 {
385 gctUINT32 specs, specs2, specs3, specs4;
386
387 /* Read gcChipSpecs register. */
388 gcmkONERROR(
389 gckOS_ReadRegisterEx(Os, Core,
390 0x00048,
391 &specs));
392
393 /* Extract the fields. */
394 registerMax = (((((gctUINT32) (specs)) >> (0 ? 7:4)) & ((gctUINT32) ((((1 ? 7:4) - (0 ? 7:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:4) - (0 ? 7:4) + 1)))))) );
395 threadCount = (((((gctUINT32) (specs)) >> (0 ? 11:8)) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1)))))) );
396 shaderCoreCount = (((((gctUINT32) (specs)) >> (0 ? 24:20)) & ((gctUINT32) ((((1 ? 24:20) - (0 ? 24:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 24:20) - (0 ? 24:20) + 1)))))) );
397 vertexCacheSize = (((((gctUINT32) (specs)) >> (0 ? 16:12)) & ((gctUINT32) ((((1 ? 16:12) - (0 ? 16:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:12) - (0 ? 16:12) + 1)))))) );
398 vertexOutputBufferSize = (((((gctUINT32) (specs)) >> (0 ? 31:28)) & ((gctUINT32) ((((1 ? 31:28) - (0 ? 31:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:28) - (0 ? 31:28) + 1)))))) );
399 pixelPipes = (((((gctUINT32) (specs)) >> (0 ? 27:25)) & ((gctUINT32) ((((1 ? 27:25) - (0 ? 27:25) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:25) - (0 ? 27:25) + 1)))))) );
400
401 /* Read gcChipSpecs2 register. */
402 gcmkONERROR(
403 gckOS_ReadRegisterEx(Os, Core,
404 0x00080,
405 &specs2));
406
407 instructionCount = (((((gctUINT32) (specs2)) >> (0 ? 15:8)) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1)))))) );
408 numConstants = (((((gctUINT32) (specs2)) >> (0 ? 31:16)) & ((gctUINT32) ((((1 ? 31:16) - (0 ? 31:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:16) - (0 ? 31:16) + 1)))))) );
409 bufferSize = (((((gctUINT32) (specs2)) >> (0 ? 7:0)) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1)))))) );
410
411 /* Read gcChipSpecs3 register. */
412 gcmkONERROR(
413 gckOS_ReadRegisterEx(Os, Core,
414 0x0008C,
415 &specs3));
416
417 varyingsCount = (((((gctUINT32) (specs3)) >> (0 ? 8:4)) & ((gctUINT32) ((((1 ? 8:4) - (0 ? 8:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:4) - (0 ? 8:4) + 1)))))) );
418
419 /* Read gcChipSpecs4 register. */
420 gcmkONERROR(
421 gckOS_ReadRegisterEx(Os, Core,
422 0x0009C,
423 &specs4));
424
425
426 streamCount = (((((gctUINT32) (specs4)) >> (0 ? 16:12)) & ((gctUINT32) ((((1 ? 16:12) - (0 ? 16:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:12) - (0 ? 16:12) + 1)))))) );
427 if (streamCount == 0)
428 {
429 /* Extract stream count from older register. */
430 streamCount = (((((gctUINT32) (specs)) >> (0 ? 3:0)) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1)))))) );
431 }
432
433 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
434 "Identity: chipSpecs1=0x%08X",
435 specs);
436
437 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
438 "Identity: chipSpecs2=0x%08X",
439 specs2);
440
441 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
442 "Identity: chipSpecs3=0x%08X",
443 specs3);
444
445 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
446 "Identity: chipSpecs4=0x%08X",
447 specs4);
448 }
449
450 /* Get the number of pixel pipes. */
451 Identity->pixelPipes = gcmMAX(pixelPipes, 1);
452
453 /* Get the stream count. */
454 Identity->streamCount = (streamCount != 0)
455 ? streamCount
456 : (Identity->chipModel >= gcv1000) ? 4 : 1;
457
458 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
459 "Specs: streamCount=%u%s",
460 Identity->streamCount,
461 (streamCount == 0) ? " (default)" : "");
462
463 /* Get the vertex output buffer size. */
464 Identity->vertexOutputBufferSize = (vertexOutputBufferSize != 0)
465 ? 1 << vertexOutputBufferSize
466 : (Identity->chipModel == gcv400)
467 ? (Identity->chipRevision < 0x4000) ? 512
468 : (Identity->chipRevision < 0x4200) ? 256
469 : 128
470 : (Identity->chipModel == gcv530)
471 ? (Identity->chipRevision < 0x4200) ? 512
472 : 128
473 : 512;
474
475 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
476 "Specs: vertexOutputBufferSize=%u%s",
477 Identity->vertexOutputBufferSize,
478 (vertexOutputBufferSize == 0) ? " (default)" : "");
479
480 /* Get the maximum number of threads. */
481 Identity->threadCount = (threadCount != 0)
482 ? 1 << threadCount
483 : (Identity->chipModel == gcv400) ? 64
484 : (Identity->chipModel == gcv500) ? 128
485 : (Identity->chipModel == gcv530) ? 128
486 : 256;
487
488 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
489 "Specs: threadCount=%u%s",
490 Identity->threadCount,
491 (threadCount == 0) ? " (default)" : "");
492
493 /* Get the number of shader cores. */
494 Identity->shaderCoreCount = (shaderCoreCount != 0)
495 ? shaderCoreCount
496 : (Identity->chipModel >= gcv1000) ? 2
497 : 1;
498 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
499 "Specs: shaderCoreCount=%u%s",
500 Identity->shaderCoreCount,
501 (shaderCoreCount == 0) ? " (default)" : "");
502
503 /* Get the vertex cache size. */
504 Identity->vertexCacheSize = (vertexCacheSize != 0)
505 ? vertexCacheSize
506 : 8;
507 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
508 "Specs: vertexCacheSize=%u%s",
509 Identity->vertexCacheSize,
510 (vertexCacheSize == 0) ? " (default)" : "");
511
512 /* Get the maximum number of temporary registers. */
513 Identity->registerMax = (registerMax != 0)
514 /* Maximum of registerMax/4 registers are accessible to 1 shader */
515 ? 1 << registerMax
516 : (Identity->chipModel == gcv400) ? 32
517 : 64;
518 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
519 "Specs: registerMax=%u%s",
520 Identity->registerMax,
521 (registerMax == 0) ? " (default)" : "");
522
523 /* Get the instruction count. */
524 Identity->instructionCount = (instructionCount == 0) ? 256
525 : (instructionCount == 1) ? 1024
526 : (instructionCount == 2) ? 2048
527 : (instructionCount == 0xFF) ? 512
528 : 256;
529
530 if (Identity->instructionCount == 256)
531 {
532 if ((Identity->chipModel == gcv2000 && Identity->chipRevision == 0x5108)
533 || Identity->chipModel == gcv880)
534 {
535 Identity->instructionCount = 512;
536 }
537 else if (((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 3:3) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))))
538 {
539 Identity->instructionCount = 512;
540 }
541 }
542
543 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
544 "Specs: instructionCount=%u%s",
545 Identity->instructionCount,
546 (instructionCount == 0) ? " (default)" : "");
547
548 /* Get the number of constants. */
549 Identity->numConstants = (numConstants == 0) ? 168 : numConstants;
550
551 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
552 "Specs: numConstants=%u%s",
553 Identity->numConstants,
554 (numConstants == 0) ? " (default)" : "");
555
556 /* Get the buffer size. */
557 Identity->bufferSize = bufferSize;
558
559 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
560 "Specs: bufferSize=%u%s",
561 Identity->bufferSize,
562 (bufferSize == 0) ? " (default)" : "");
563
564
565 if (varyingsCount != 0)
566 {
567 Identity->varyingsCount = varyingsCount;
568 }
569 else if (((((gctUINT32) (Identity->chipMinorFeatures1)) >> (0 ? 23:23) & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))))
570 {
571 Identity->varyingsCount = 12;
572 }
573 else
574 {
575 Identity->varyingsCount = 8;
576 }
577
578 /* For some cores, it consumes two varying for position, so the max varying vectors should minus one. */
579 if ((Identity->chipModel == gcv5000 && Identity->chipRevision == 0x5434) ||
580 (Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5222) ||
581 (Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5208) ||
582 (Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5245) ||
583 (Identity->chipModel == gcv3000 && Identity->chipRevision == 0x5435) ||
584 (Identity->chipModel == gcv2200 && Identity->chipRevision == 0x5244) ||
585 (Identity->chipModel == gcv1500 && Identity->chipRevision == 0x5246) ||
586 ((Identity->chipModel == gcv2100 || Identity->chipModel == gcv2000) && Identity->chipRevision == 0x5108) ||
587 (Identity->chipModel == gcv880 && (Identity->chipRevision == 0x5107 || Identity->chipRevision == 0x5106)))
588 {
589 Identity->varyingsCount -= 1;
590 }
591
592 Identity->chip2DControl = 0;
593 if (Identity->chipModel == gcv320)
594 {
595 gctUINT32 data;
596
597 gcmkONERROR(
598 gckOS_ReadRegisterEx(Os,
599 Core,
600 0x0002C,
601 &data));
602
603 if ((data != 33956864) &&
604 ((Identity->chipRevision == 0x5007) ||
605 (Identity->chipRevision == 0x5220)))
606 {
607 Identity->chip2DControl |= 0xFF &
608 (Identity->chipRevision == 0x5220 ? 8 :
609 (Identity->chipRevision == 0x5007 ? 12 : 0));
610 }
611
612 if (Identity->chipRevision == 0x5007)
613 {
614 /* Disable splitting rectangle. */
615 Identity->chip2DControl |= 0x100;
616
617 /* Enable 2D Flush. */
618 Identity->chip2DControl |= 0x200;
619 }
620 }
621
622
623 gcmkONERROR(
624 gckOS_ReadRegisterEx(Os, Core,
625 0x00470,
626 &debugControl0));
627
628 if (debugControl0 & (1 << 16))
629 {
630 Identity->chipFlags |= gcvCHIP_FLAG_MSAA_COHERENCEY_ECO_FIX;
631 }
632
633 /* Success. */
634 gcmkFOOTER();
635 return gcvSTATUS_OK;
636
637OnError:
638 /* Return the status. */
639 gcmkFOOTER();
640 return status;
641}
642
643#define gcdDEBUG_MODULE_CLOCK_GATING 0
644#define gcdDISABLE_MODULE_CLOCK_GATING 0
645#define gcdDISABLE_FE_CLOCK_GATING 0
646#define gcdDISABLE_PE_CLOCK_GATING 0
647#define gcdDISABLE_SH_CLOCK_GATING 0
648#define gcdDISABLE_PA_CLOCK_GATING 0
649#define gcdDISABLE_SE_CLOCK_GATING 0
650#define gcdDISABLE_RA_CLOCK_GATING 0
651#define gcdDISABLE_RA_EZ_CLOCK_GATING 0
652#define gcdDISABLE_RA_HZ_CLOCK_GATING 0
653#define gcdDISABLE_TX_CLOCK_GATING 0
654
655#if gcdDEBUG_MODULE_CLOCK_GATING
656gceSTATUS
657_ConfigureModuleLevelClockGating(
658 gckHARDWARE Hardware
659 )
660{
661 gctUINT32 data;
662
663 gcmkVERIFY_OK(
664 gckOS_ReadRegisterEx(Hardware->os,
665 Hardware->core,
666 Hardware->powerBaseAddress
667 + 0x00104,
668 &data));
669
670#if gcdDISABLE_FE_CLOCK_GATING
671 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
672#endif
673
674#if gcdDISABLE_PE_CLOCK_GATING
675 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)));
676#endif
677
678#if gcdDISABLE_SH_CLOCK_GATING
679 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)));
680#endif
681
682#if gcdDISABLE_PA_CLOCK_GATING
683 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
684#endif
685
686#if gcdDISABLE_SE_CLOCK_GATING
687 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
688#endif
689
690#if gcdDISABLE_RA_CLOCK_GATING
691 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6)));
692#endif
693
694#if gcdDISABLE_TX_CLOCK_GATING
695 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7)));
696#endif
697
698#if gcdDISABLE_RA_EZ_CLOCK_GATING
699 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)));
700#endif
701
702#if gcdDISABLE_RA_HZ_CLOCK_GATING
703 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17)));
704#endif
705
706 gcmkVERIFY_OK(
707 gckOS_WriteRegisterEx(Hardware->os,
708 Hardware->core,
709 Hardware->powerBaseAddress
710 + 0x00104,
711 data));
712
713#if gcdDISABLE_MODULE_CLOCK_GATING
714 gcmkVERIFY_OK(
715 gckOS_ReadRegisterEx(Hardware->os,
716 Hardware->core,
717 Hardware->powerBaseAddress +
718 0x00100,
719 &data));
720
721 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
722
723
724 gcmkVERIFY_OK(
725 gckOS_WriteRegisterEx(Hardware->os,
726 Hardware->core,
727 Hardware->powerBaseAddress
728 + 0x00100,
729 data));
730#endif
731
732 return gcvSTATUS_OK;
733}
734#endif
735
736#if gcdPOWEROFF_TIMEOUT
737void
738_PowerTimerFunction(
739 gctPOINTER Data
740 )
741{
742 gckHARDWARE hardware = (gckHARDWARE)Data;
743 gcmkVERIFY_OK(
744 gckHARDWARE_SetPowerManagementState(hardware, gcvPOWER_OFF_TIMEOUT));
745}
746#endif
747
748static gceSTATUS
749_VerifyDMA(
750 IN gckOS Os,
751 IN gceCORE Core,
752 gctUINT32_PTR Address1,
753 gctUINT32_PTR Address2,
754 gctUINT32_PTR State1,
755 gctUINT32_PTR State2
756 )
757{
758 gceSTATUS status;
759 gctUINT32 i;
760
761 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x660, State1));
762 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x664, Address1));
763
764 for (i = 0; i < 500; i += 1)
765 {
766 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x660, State2));
767 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x664, Address2));
768
769 if (*Address1 != *Address2)
770 {
771 break;
772 }
773
774 if (*State1 != *State2)
775 {
776 break;
777 }
778 }
779
780OnError:
781 return status;
782}
783
784static gceSTATUS
785_DumpDebugRegisters(
786 IN gckOS Os,
787 IN gceCORE Core,
788 IN gcsiDEBUG_REGISTERS_PTR Descriptor
789 )
790{
791 gceSTATUS status = gcvSTATUS_OK;
792 gctUINT32 select;
793 gctUINT32 data = 0;
794 gctUINT i;
795
796 gcmkHEADER_ARG("Os=0x%X Descriptor=0x%X", Os, Descriptor);
797
798 gcmkPRINT_N(4, " %s debug registers:\n", Descriptor->module);
799
800 for (i = 0; i < Descriptor->count; i += 1)
801 {
802 select = i << Descriptor->shift;
803
804 gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, Descriptor->index, select));
805#if gcdFPGA_BUILD
806 gcmkONERROR(gckOS_Delay(Os, 1000));
807#endif
808 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, Descriptor->data, &data));
809
810 gcmkPRINT_N(12, " [0x%02X] 0x%08X\n", i, data);
811 }
812
813 select = 0xF << Descriptor->shift;
814
815 for (i = 0; i < 500; i += 1)
816 {
817 gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, Descriptor->index, select));
818#if gcdFPGA_BUILD
819 gcmkONERROR(gckOS_Delay(Os, 1000));
820#endif
821 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, Descriptor->data, &data));
822
823 if (data == Descriptor->signature)
824 {
825 break;
826 }
827 }
828
829 if (i == 500)
830 {
831 gcmkPRINT_N(4, " failed to obtain the signature (read 0x%08X).\n", data);
832 }
833 else
834 {
835 gcmkPRINT_N(8, " signature = 0x%08X (%d read attempt(s))\n", data, i + 1);
836 }
837
838OnError:
839 /* Return the error. */
840 gcmkFOOTER();
841 return status;
842}
843
844static gceSTATUS
845_IsGPUPresent(
846 IN gckHARDWARE Hardware
847 )
848{
849 gceSTATUS status;
850 gcsHAL_QUERY_CHIP_IDENTITY identity;
851 gctUINT32 control;
852
853 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
854
855 /* Verify the arguments. */
856 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
857
858 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
859 Hardware->core,
860 0x00000,
861 &control));
862
863 control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)));
864 control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
865
866 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
867 Hardware->core,
868 0x00000,
869 control));
870
871 /* Identify the hardware. */
872 gcmkONERROR(_IdentifyHardware(Hardware->os,
873 Hardware->core,
874 &identity));
875
876 /* Check if these are the same values as saved before. */
877 if ((Hardware->identity.chipModel != identity.chipModel)
878 || (Hardware->identity.chipRevision != identity.chipRevision)
879 || (Hardware->identity.chipFeatures != identity.chipFeatures)
880 || (Hardware->identity.chipMinorFeatures != identity.chipMinorFeatures)
881 || (Hardware->identity.chipMinorFeatures1 != identity.chipMinorFeatures1)
882 || (Hardware->identity.chipMinorFeatures2 != identity.chipMinorFeatures2)
883 )
884 {
885 gcmkPRINT("[galcore]: GPU is not present.");
886 gcmkONERROR(gcvSTATUS_GPU_NOT_RESPONDING);
887 }
888
889 /* Success. */
890 gcmkFOOTER_NO();
891 return gcvSTATUS_OK;
892
893OnError:
894 /* Return the error. */
895 gcmkFOOTER();
896 return status;
897}
898
899gceSTATUS
900_FlushCache(
901 gckHARDWARE Hardware,
902 gckCOMMAND Command
903 )
904{
905 gceSTATUS status;
906 gctUINT32 bytes, requested;
907 gctPOINTER buffer;
908
909 /* Get the size of the flush command. */
910 gcmkONERROR(gckHARDWARE_Flush(Hardware,
911 gcvFLUSH_ALL,
912 gcvNULL,
913 &requested));
914
915 /* Reserve space in the command queue. */
916 gcmkONERROR(gckCOMMAND_Reserve(Command,
917 requested,
918 &buffer,
919 &bytes));
920
921 /* Append a flush. */
922 gcmkONERROR(gckHARDWARE_Flush(
923 Hardware, gcvFLUSH_ALL, buffer, &bytes
924 ));
925
926 /* Execute the command queue. */
927 gcmkONERROR(gckCOMMAND_Execute(Command, requested));
928
929 return gcvSTATUS_OK;
930
931OnError:
932 return status;
933}
934
935gctBOOL
936_IsGPUIdle(
937 IN gctUINT32 Idle
938 )
939{
940 return (((((gctUINT32) (Idle)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) )
941 && (((((gctUINT32) (Idle)) >> (0 ? 1:1)) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1)))))) )
942 && (((((gctUINT32) (Idle)) >> (0 ? 3:3)) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) )
943 && (((((gctUINT32) (Idle)) >> (0 ? 4:4)) & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1)))))) )
944 && (((((gctUINT32) (Idle)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) )
945 && (((((gctUINT32) (Idle)) >> (0 ? 6:6)) & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1)))))) )
946 && (((((gctUINT32) (Idle)) >> (0 ? 7:7)) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1)))))) )
947 && (((((gctUINT32) (Idle)) >> (0 ? 2:2)) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))) )
948 ;
949}
950
951/*
952* State timer helper must be called with powerMutex held.
953*/
954void
955gckSTATETIMER_Reset(
956 IN gcsSTATETIMER * StateTimer,
957 IN gctUINT64 Start
958 )
959{
960 gctUINT64 now;
961
962 if (Start)
963 {
964 now = Start;
965 }
966 else
967 {
968 gckOS_GetProfileTick(&now);
969 }
970
971 StateTimer->recent = StateTimer->start = now;
972
973 gckOS_ZeroMemory(StateTimer->elapse, gcmSIZEOF(StateTimer->elapse));
974}
975
976void
977gckSTATETIMER_Accumulate(
978 IN gcsSTATETIMER * StateTimer,
979 IN gceCHIPPOWERSTATE OldState
980 )
981{
982 gctUINT64 now;
983 gctUINT64 elapse;
984
985 gckOS_GetProfileTick(&now);
986
987 elapse = now - StateTimer->recent;
988
989 StateTimer->recent = now;
990
991 StateTimer->elapse[OldState] += elapse;
992}
993
994void
995gckSTATETIMER_Query(
996 IN gcsSTATETIMER * StateTimer,
997 IN gceCHIPPOWERSTATE State,
998 OUT gctUINT64_PTR Start,
999 OUT gctUINT64_PTR End,
1000 OUT gctUINT64_PTR On,
1001 OUT gctUINT64_PTR Off,
1002 OUT gctUINT64_PTR Idle,
1003 OUT gctUINT64_PTR Suspend
1004 )
1005{
1006 *Start = StateTimer->start;
1007
1008 gckSTATETIMER_Accumulate(StateTimer, State);
1009
1010 *End = StateTimer->recent;
1011
1012 *On = StateTimer->elapse[gcvPOWER_ON];
1013 *Off = StateTimer->elapse[gcvPOWER_OFF];
1014 *Idle = StateTimer->elapse[gcvPOWER_IDLE];
1015 *Suspend = StateTimer->elapse[gcvPOWER_SUSPEND];
1016
1017 gckSTATETIMER_Reset(StateTimer, StateTimer->recent);
1018}
1019
1020/******************************************************************************\
1021****************************** gckHARDWARE API code *****************************
1022\******************************************************************************/
1023
1024/*******************************************************************************
1025**
1026** gckHARDWARE_Construct
1027**
1028** Construct a new gckHARDWARE object.
1029**
1030** INPUT:
1031**
1032** gckOS Os
1033** Pointer to an initialized gckOS object.
1034**
1035** gceCORE Core
1036** Specified core.
1037**
1038** OUTPUT:
1039**
1040** gckHARDWARE * Hardware
1041** Pointer to a variable that will hold the pointer to the gckHARDWARE
1042** object.
1043*/
1044gceSTATUS
1045gckHARDWARE_Construct(
1046 IN gckOS Os,
1047 IN gceCORE Core,
1048 OUT gckHARDWARE * Hardware
1049 )
1050{
1051 gceSTATUS status;
1052 gckHARDWARE hardware = gcvNULL;
1053 gctUINT16 data = 0xff00;
1054 gctPOINTER pointer = gcvNULL;
1055#if gcdMULTI_GPU_AFFINITY
1056 gctUINT32 control;
1057#endif
1058
1059 gcmkHEADER_ARG("Os=0x%x", Os);
1060
1061 /* Verify the arguments. */
1062 gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
1063 gcmkVERIFY_ARGUMENT(Hardware != gcvNULL);
1064
1065 /* Enable the GPU. */
1066 gcmkONERROR(gckOS_SetGPUPower(Os, Core, gcvTRUE, gcvTRUE));
1067 gcmkONERROR(gckOS_WriteRegisterEx(Os,
1068 Core,
1069 0x00000,
1070 0x00000900));
1071
1072 /* Allocate the gckHARDWARE object. */
1073 gcmkONERROR(gckOS_Allocate(Os,
1074 gcmSIZEOF(struct _gckHARDWARE),
1075 &pointer));
1076
1077 gckOS_ZeroMemory(pointer, gcmSIZEOF(struct _gckHARDWARE));
1078
1079 hardware = (gckHARDWARE) pointer;
1080
1081 /* Initialize the gckHARDWARE object. */
1082 hardware->object.type = gcvOBJ_HARDWARE;
1083 hardware->os = Os;
1084 hardware->core = Core;
1085
1086 /* Identify the hardware. */
1087 gcmkONERROR(_IdentifyHardware(Os, Core, &hardware->identity));
1088
1089 /* Determine the hardware type */
1090 switch (hardware->identity.chipModel)
1091 {
1092 case gcv350:
1093 case gcv355:
1094 hardware->type = gcvHARDWARE_VG;
1095 break;
1096
1097 case gcv200:
1098 case gcv300:
1099 case gcv320:
1100 case gcv328:
1101 case gcv420:
1102 case gcv428:
1103 case gcv520:
1104 hardware->type = gcvHARDWARE_2D;
1105 break;
1106
1107 default:
1108#if gcdMULTI_GPU_AFFINITY
1109 hardware->type = (Core == gcvCORE_MAJOR) ? gcvHARDWARE_3D : gcvHARDWARE_OCL;
1110#else
1111 hardware->type = gcvHARDWARE_3D;
1112#endif
1113
1114 if(hardware->identity.chipModel == gcv880 && hardware->identity.chipRevision == 0x5107)
1115 {
1116 /*set outstanding limit*/
1117 gctUINT32 axi_ot;
1118 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x00414, &axi_ot));
1119 axi_ot = (axi_ot & (~0xFF)) | 0x00010;
1120 gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, 0x00414, axi_ot));
1121 }
1122
1123
1124 if ((((((gctUINT32) (hardware->identity.chipFeatures)) >> (0 ? 9:9)) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1)))))) ))
1125 {
1126 hardware->type = (gceHARDWARE_TYPE) (hardware->type | gcvHARDWARE_2D);
1127 }
1128 }
1129
1130 hardware->powerBaseAddress
1131 = ((hardware->identity.chipModel == gcv300)
1132 && (hardware->identity.chipRevision < 0x2000))
1133 ? 0x0100
1134 : 0x0000;
1135
1136 /* _ResetGPU need powerBaseAddress. */
1137 status = _ResetGPU(hardware, Os, Core);
1138
1139 if (status != gcvSTATUS_OK)
1140 {
1141 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
1142 "_ResetGPU failed: status=%d\n", status);
1143 }
1144
1145#if gcdENABLE_DEC_COMPRESSION && !gcdDEC_ENABLE_AHB
1146 gcmkONERROR(gckOS_WriteRegisterEx(Os, gcvCORE_DEC, 0x18180, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1))))))) << (0 ? 22:22))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1))))))) << (0 ? 22:22)))));
1147#endif
1148
1149#if gcdMULTI_GPU_AFFINITY
1150 control = ((((gctUINT32) (0x00FF0A05)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27)));
1151
1152 gcmkONERROR(gckOS_WriteRegisterEx(Os,
1153 Core,
1154 0x0055C,
1155 control));
1156#endif
1157
1158 hardware->powerMutex = gcvNULL;
1159
1160 hardware->mmuVersion
1161 = (((((gctUINT32) (hardware->identity.chipMinorFeatures1)) >> (0 ? 28:28)) & ((gctUINT32) ((((1 ? 28:28) - (0 ? 28:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 28:28) - (0 ? 28:28) + 1)))))) );
1162
1163 /* Determine whether bug fixes #1 are present. */
1164 hardware->extraEventStates = ((((gctUINT32) (hardware->identity.chipMinorFeatures1)) >> (0 ? 3:3) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) == (0x0 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))));
1165
1166 /* Check if big endian */
1167 hardware->bigEndian = (*(gctUINT8 *)&data == 0xff);
1168
1169 /* Initialize the fast clear. */
1170 gcmkONERROR(gckHARDWARE_SetFastClear(hardware, -1, -1));
1171
1172#if !gcdENABLE_128B_MERGE
1173
1174 if (((((gctUINT32) (hardware->identity.chipMinorFeatures2)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))))
1175 {
1176 /* 128B merge is turned on by default. Disable it. */
1177 gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, 0x00558, 0));
1178 }
1179
1180#endif
1181
1182 /* Set power state to ON. */
1183 hardware->chipPowerState = gcvPOWER_ON;
1184 hardware->clockState = gcvTRUE;
1185 hardware->powerState = gcvTRUE;
1186 hardware->lastWaitLink = ~0U;
1187 hardware->lastEnd = ~0U;
1188 hardware->globalSemaphore = gcvNULL;
1189#if gcdENABLE_FSCALE_VAL_ADJUST
1190 hardware->powerOnFscaleVal = 64;
1191#endif
1192
1193 gcmkONERROR(gckOS_CreateMutex(Os, &hardware->powerMutex));
1194 gcmkONERROR(gckOS_CreateSemaphore(Os, &hardware->globalSemaphore));
1195 hardware->startIsr = gcvNULL;
1196 hardware->stopIsr = gcvNULL;
1197
1198#if gcdPOWEROFF_TIMEOUT
1199 hardware->powerOffTimeout = gcdPOWEROFF_TIMEOUT;
1200
1201 gcmkVERIFY_OK(gckOS_CreateTimer(Os,
1202 _PowerTimerFunction,
1203 (gctPOINTER)hardware,
1204 &hardware->powerOffTimer));
1205#endif
1206
1207 gcmkONERROR(gckOS_AtomConstruct(Os, &hardware->pageTableDirty));
1208 gcmkONERROR(gckOS_AtomConstruct(Os, &hardware->pendingEvent));
1209
1210#if gcdLINK_QUEUE_SIZE
1211 hardware->linkQueue.front = 0;
1212 hardware->linkQueue.rear = 0;
1213 hardware->linkQueue.count = 0;
1214#endif
1215
1216 /* Enable power management by default. */
1217 hardware->powerManagement = gcvTRUE;
1218
1219 /* Disable profiler by default */
1220 hardware->gpuProfiler = gcvFALSE;
1221
1222#if defined(LINUX) || defined(__QNXNTO__) || defined(UNDERCE)
1223 if (hardware->mmuVersion)
1224 {
1225 hardware->endAfterFlushMmuCache = gcvTRUE;
1226 }
1227 else
1228#endif
1229 {
1230 hardware->endAfterFlushMmuCache = gcvFALSE;
1231 }
1232
1233 gcmkONERROR(gckOS_QueryOption(Os, "mmu", (gctUINT32_PTR)&hardware->enableMMU));
1234
1235 hardware->minFscaleValue = 1;
1236
1237 gckSTATETIMER_Reset(&hardware->powerStateTimer, 0);
1238
1239 /* Return pointer to the gckHARDWARE object. */
1240 *Hardware = hardware;
1241
1242 /* Success. */
1243 gcmkFOOTER_ARG("*Hardware=0x%x", *Hardware);
1244 return gcvSTATUS_OK;
1245
1246OnError:
1247 /* Roll back. */
1248 if (hardware != gcvNULL)
1249 {
1250 /* Turn off the power. */
1251 gcmkVERIFY_OK(gckOS_SetGPUPower(Os, Core, gcvFALSE, gcvFALSE));
1252
1253 if (hardware->globalSemaphore != gcvNULL)
1254 {
1255 /* Destroy the global semaphore. */
1256 gcmkVERIFY_OK(gckOS_DestroySemaphore(Os,
1257 hardware->globalSemaphore));
1258 }
1259
1260 if (hardware->powerMutex != gcvNULL)
1261 {
1262 /* Destroy the power mutex. */
1263 gcmkVERIFY_OK(gckOS_DeleteMutex(Os, hardware->powerMutex));
1264 }
1265
1266#if gcdPOWEROFF_TIMEOUT
1267 if (hardware->powerOffTimer != gcvNULL)
1268 {
1269 gcmkVERIFY_OK(gckOS_StopTimer(Os, hardware->powerOffTimer));
1270 gcmkVERIFY_OK(gckOS_DestroyTimer(Os, hardware->powerOffTimer));
1271 }
1272#endif
1273
1274 if (hardware->pageTableDirty != gcvNULL)
1275 {
1276 gcmkVERIFY_OK(gckOS_AtomDestroy(Os, hardware->pageTableDirty));
1277 }
1278
1279 if (hardware->pendingEvent != gcvNULL)
1280 {
1281 gcmkVERIFY_OK(gckOS_AtomDestroy(Os, hardware->pendingEvent));
1282 }
1283
1284 gcmkVERIFY_OK(gcmkOS_SAFE_FREE(Os, hardware));
1285 }
1286
1287 /* Return the status. */
1288 gcmkFOOTER();
1289 return status;
1290}
1291
1292/*******************************************************************************
1293**
1294** gckHARDWARE_Destroy
1295**
1296** Destroy an gckHARDWARE object.
1297**
1298** INPUT:
1299**
1300** gckHARDWARE Hardware
1301** Pointer to the gckHARDWARE object that needs to be destroyed.
1302**
1303** OUTPUT:
1304**
1305** Nothing.
1306*/
1307gceSTATUS
1308gckHARDWARE_Destroy(
1309 IN gckHARDWARE Hardware
1310 )
1311{
1312 gceSTATUS status;
1313
1314 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
1315
1316 /* Verify the arguments. */
1317 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1318
1319 /* Destroy the power semaphore. */
1320 gcmkVERIFY_OK(gckOS_DestroySemaphore(Hardware->os,
1321 Hardware->globalSemaphore));
1322
1323 /* Destroy the power mutex. */
1324 gcmkVERIFY_OK(gckOS_DeleteMutex(Hardware->os, Hardware->powerMutex));
1325
1326#if gcdPOWEROFF_TIMEOUT
1327 gcmkVERIFY_OK(gckOS_StopTimer(Hardware->os, Hardware->powerOffTimer));
1328 gcmkVERIFY_OK(gckOS_DestroyTimer(Hardware->os, Hardware->powerOffTimer));
1329#endif
1330
1331 gcmkVERIFY_OK(gckOS_AtomDestroy(Hardware->os, Hardware->pageTableDirty));
1332
1333 gcmkVERIFY_OK(gckOS_AtomDestroy(Hardware->os, Hardware->pendingEvent));
1334
1335 gcmkVERIFY_OK(gckOS_FreeNonPagedMemory(
1336 Hardware->os,
1337 Hardware->functionBytes,
1338 Hardware->functionPhysical,
1339 Hardware->functionLogical
1340 ));
1341
1342 /* Mark the object as unknown. */
1343 Hardware->object.type = gcvOBJ_UNKNOWN;
1344
1345 /* Free the object. */
1346 gcmkONERROR(gcmkOS_SAFE_FREE(Hardware->os, Hardware));
1347
1348 /* Success. */
1349 gcmkFOOTER_NO();
1350 return gcvSTATUS_OK;
1351
1352OnError:
1353 gcmkFOOTER();
1354 return status;
1355}
1356
1357/*******************************************************************************
1358**
1359** gckHARDWARE_GetType
1360**
1361** Get the hardware type.
1362**
1363** INPUT:
1364**
1365** gckHARDWARE Harwdare
1366** Pointer to an gckHARDWARE object.
1367**
1368** OUTPUT:
1369**
1370** gceHARDWARE_TYPE * Type
1371** Pointer to a variable that receives the type of hardware object.
1372*/
1373gceSTATUS
1374gckHARDWARE_GetType(
1375 IN gckHARDWARE Hardware,
1376 OUT gceHARDWARE_TYPE * Type
1377 )
1378{
1379 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
1380 gcmkVERIFY_ARGUMENT(Type != gcvNULL);
1381
1382 *Type = Hardware->type;
1383
1384 gcmkFOOTER_ARG("*Type=%d", *Type);
1385 return gcvSTATUS_OK;
1386}
1387
1388/*******************************************************************************
1389**
1390** gckHARDWARE_InitializeHardware
1391**
1392** Initialize the hardware.
1393**
1394** INPUT:
1395**
1396** gckHARDWARE Hardware
1397** Pointer to the gckHARDWARE object.
1398**
1399** OUTPUT:
1400**
1401** Nothing.
1402*/
1403gceSTATUS
1404gckHARDWARE_InitializeHardware(
1405 IN gckHARDWARE Hardware
1406 )
1407{
1408 gceSTATUS status;
1409 gctUINT32 baseAddress;
1410 gctUINT32 chipRev;
1411 gctUINT32 control;
1412 gctUINT32 data;
1413 gctUINT32 regPMC = 0;
1414
1415 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
1416
1417 /* Verify the arguments. */
1418 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1419
1420 /* Read the chip revision register. */
1421 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
1422 Hardware->core,
1423 0x00024,
1424 &chipRev));
1425
1426 chipRev &= 0xffff;
1427
1428 if (chipRev != Hardware->identity.chipRevision)
1429 {
1430 /* Chip is not there! */
1431 gcmkONERROR(gcvSTATUS_CONTEXT_LOSSED);
1432 }
1433
1434 /* Disable isolate GPU bit. */
1435 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1436 Hardware->core,
1437 0x00000,
1438 ((((gctUINT32) (0x00000900)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)))));
1439
1440 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
1441 Hardware->core,
1442 0x00000,
1443 &control));
1444
1445 /* Enable debug register. */
1446 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1447 Hardware->core,
1448 0x00000,
1449 ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:11) - (0 ? 11:11) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:11) - (0 ? 11:11) + 1))))))) << (0 ? 11:11))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:11) - (0 ? 11:11) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:11) - (0 ? 11:11) + 1))))))) << (0 ? 11:11)))));
1450
1451 /* Reset memory counters. */
1452 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1453 Hardware->core,
1454 0x0003C,
1455 ~0U));
1456
1457 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1458 Hardware->core,
1459 0x0003C,
1460 0));
1461
1462 /* Get the system's physical base address. */
1463 gcmkONERROR(gckOS_GetBaseAddress(Hardware->os, &baseAddress));
1464
1465 /* Program the base addesses. */
1466 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1467 Hardware->core,
1468 0x0041C,
1469 baseAddress));
1470
1471 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1472 Hardware->core,
1473 0x00418,
1474 baseAddress));
1475
1476 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1477 Hardware->core,
1478 0x00428,
1479 baseAddress));
1480
1481 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1482 Hardware->core,
1483 0x00420,
1484 baseAddress));
1485
1486 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1487 Hardware->core,
1488 0x00424,
1489 baseAddress));
1490
1491 {
1492 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
1493 Hardware->core,
1494 Hardware->powerBaseAddress +
1495 0x00100,
1496 &data));
1497
1498 /* Enable clock gating. */
1499 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
1500
1501 if ((Hardware->identity.chipRevision == 0x4301)
1502 || (Hardware->identity.chipRevision == 0x4302)
1503 )
1504 {
1505 /* Disable stall module level clock gating for 4.3.0.1 and 4.3.0.2
1506 ** revisions. */
1507 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)));
1508 }
1509
1510 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1511 Hardware->core,
1512 Hardware->powerBaseAddress
1513 + 0x00100,
1514 data));
1515
1516 }
1517
1518 if (Hardware->identity.chipModel == gcv4000 &&
1519 ((Hardware->identity.chipRevision == 0x5208) || (Hardware->identity.chipRevision == 0x5222)))
1520 {
1521 gcmkONERROR(
1522 gckOS_WriteRegisterEx(Hardware->os,
1523 Hardware->core,
1524 0x0010C,
1525 ((((gctUINT32) (0x01590880)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))) << (0 ? 23:23))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))) << (0 ? 23:23)))));
1526 }
1527
1528 if (Hardware->identity.chipModel == gcv1000 &&
1529 (Hardware->identity.chipRevision == 0x5039 ||
1530 Hardware->identity.chipRevision == 0x5040))
1531 {
1532 gctUINT32 pulseEater;
1533
1534 pulseEater = ((((gctUINT32) (0x01590880)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)));
1535
1536 gcmkONERROR(
1537 gckOS_WriteRegisterEx(Hardware->os,
1538 Hardware->core,
1539 0x0010C,
1540 ((((gctUINT32) (pulseEater)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17)))));
1541 }
1542
1543 if ((gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_HALTI2) == gcvSTATUS_FALSE)
1544 || (Hardware->identity.chipRevision < 0x5422)
1545 )
1546 {
1547 if (regPMC == 0)
1548 {
1549 gcmkONERROR(
1550 gckOS_ReadRegisterEx(Hardware->os,
1551 Hardware->core,
1552 Hardware->powerBaseAddress
1553 + 0x00104,
1554 &regPMC));
1555 }
1556
1557 regPMC = ((((gctUINT32) (regPMC)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) << (0 ? 15:15))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) << (0 ? 15:15)));
1558 }
1559
1560 if (_IsHardwareMatch(Hardware, gcv2000, 0x5108))
1561 {
1562 gcmkONERROR(
1563 gckOS_ReadRegisterEx(Hardware->os,
1564 Hardware->core,
1565 0x00480,
1566 &data));
1567
1568 /* Set FE bus to one, TX bus to zero */
1569 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)));
1570 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7)));
1571
1572 gcmkONERROR(
1573 gckOS_WriteRegisterEx(Hardware->os,
1574 Hardware->core,
1575 0x00480,
1576 data));
1577 }
1578
1579 gcmkONERROR(
1580 gckHARDWARE_SetMMU(Hardware,
1581 Hardware->kernel->mmu->pageTableLogical));
1582
1583 if (Hardware->identity.chipModel >= gcv400
1584 && Hardware->identity.chipModel != gcv420
1585 && (((((gctUINT32) (Hardware->identity.chipMinorFeatures3)) >> (0 ? 15:15) & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) != gcvTRUE)
1586 )
1587 {
1588 if (regPMC == 0)
1589 {
1590 gcmkONERROR(
1591 gckOS_ReadRegisterEx(Hardware->os,
1592 Hardware->core,
1593 Hardware->powerBaseAddress
1594 + 0x00104,
1595 &regPMC));
1596 }
1597
1598 /* Disable PA clock gating. */
1599 regPMC = ((((gctUINT32) (regPMC)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
1600 }
1601
1602 /* Limit 2D outstanding request. */
1603 if (_IsHardwareMatch(Hardware, gcv880, 0x5107))
1604 {
1605 gctUINT32 axi_ot;
1606 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00414, &axi_ot));
1607 axi_ot = (axi_ot & (~0xFF)) | 0x00010;
1608 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00414, axi_ot));
1609 }
1610
1611 if (Hardware->identity.chip2DControl & 0xFF)
1612 {
1613 gctUINT32 data;
1614
1615 gcmkONERROR(
1616 gckOS_ReadRegisterEx(Hardware->os,
1617 Hardware->core,
1618 0x00414,
1619 &data));
1620
1621 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (Hardware->identity.chip2DControl & 0xFF) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0)));
1622
1623 gcmkONERROR(
1624 gckOS_WriteRegisterEx(Hardware->os,
1625 Hardware->core,
1626 0x00414,
1627 data));
1628 }
1629
1630 if (_IsHardwareMatch(Hardware, gcv1000, 0x5035))
1631 {
1632 gcmkONERROR(
1633 gckOS_ReadRegisterEx(Hardware->os,
1634 Hardware->core,
1635 0x00414,
1636 &data));
1637
1638 /* Disable HZ-L2. */
1639 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12)));
1640
1641 gcmkONERROR(
1642 gckOS_WriteRegisterEx(Hardware->os,
1643 Hardware->core,
1644 0x00414,
1645 data));
1646 }
1647
1648 if (_IsHardwareMatch(Hardware, gcv4000, 0x5222)
1649 || _IsHardwareMatch(Hardware, gcv2000, 0x5108)
1650 )
1651 {
1652 if (regPMC == 0)
1653 {
1654 gcmkONERROR(
1655 gckOS_ReadRegisterEx(Hardware->os,
1656 Hardware->core,
1657 Hardware->powerBaseAddress
1658 + 0x00104,
1659 &regPMC));
1660 }
1661
1662 /* Disable TX clock gating. */
1663 regPMC = ((((gctUINT32) (regPMC)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7)));
1664 }
1665
1666 if (_IsHardwareMatch(Hardware, gcv880, 0x5106))
1667 {
1668 Hardware->kernel->timeOut = 140 * 1000;
1669 }
1670
1671 if (regPMC == 0)
1672 {
1673 gcmkONERROR(
1674 gckOS_ReadRegisterEx(Hardware->os,
1675 Hardware->core,
1676 Hardware->powerBaseAddress
1677 + 0x00104,
1678 &regPMC));
1679 }
1680
1681 /* Disable RA HZ clock gating. */
1682 regPMC = ((((gctUINT32) (regPMC)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17)));
1683
1684 /* Disable RA EZ clock gating. */
1685 regPMC = ((((gctUINT32) (regPMC)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) &l