summaryrefslogtreecommitdiffstats
path: root/src/hal/kernel/arch/gc_hal_kernel_hardware.c
diff options
context:
space:
mode:
Diffstat (limited to 'src/hal/kernel/arch/gc_hal_kernel_hardware.c')
-rwxr-xr-xsrc/hal/kernel/arch/gc_hal_kernel_hardware.c7894
1 files changed, 7894 insertions, 0 deletions
diff --git a/src/hal/kernel/arch/gc_hal_kernel_hardware.c b/src/hal/kernel/arch/gc_hal_kernel_hardware.c
new file mode 100755
index 0000000..10ea1e8
--- /dev/null
+++ b/src/hal/kernel/arch/gc_hal_kernel_hardware.c
@@ -0,0 +1,7894 @@
1/****************************************************************************
2*
3* The MIT License (MIT)
4*
5* Copyright (c) 2014 Vivante Corporation
6*
7* Permission is hereby granted, free of charge, to any person obtaining a
8* copy of this software and associated documentation files (the "Software"),
9* to deal in the Software without restriction, including without limitation
10* the rights to use, copy, modify, merge, publish, distribute, sublicense,
11* and/or sell copies of the Software, and to permit persons to whom the
12* Software is furnished to do so, subject to the following conditions:
13*
14* The above copyright notice and this permission notice shall be included in
15* all copies or substantial portions of the Software.
16*
17* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23* DEALINGS IN THE SOFTWARE.
24*
25*****************************************************************************
26*
27* The GPL License (GPL)
28*
29* Copyright (C) 2014 Vivante Corporation
30*
31* This program is free software; you can redistribute it and/or
32* modify it under the terms of the GNU General Public License
33* as published by the Free Software Foundation; either version 2
34* of the License, or (at your option) any later version.
35*
36* This program is distributed in the hope that it will be useful,
37* but WITHOUT ANY WARRANTY; without even the implied warranty of
38* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
39* GNU General Public License for more details.
40*
41* You should have received a copy of the GNU General Public License
42* along with this program; if not, write to the Free Software Foundation,
43* Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
44*
45*****************************************************************************
46*
47* Note: This software is released under dual MIT and GPL licenses. A
48* recipient may use this file under the terms of either the MIT license or
49* GPL License. If you wish to use only one license not the other, you can
50* indicate your decision by deleting one of the above license notices in your
51* version of this file.
52*
53*****************************************************************************/
54
55
56#include "gc_hal.h"
57#include "gc_hal_kernel.h"
58#if VIVANTE_PROFILER_CONTEXT
59#include "gc_hal_kernel_context.h"
60#endif
61
62#define gcdDISABLE_FE_L2 1
63
64#define _GC_OBJ_ZONE gcvZONE_HARDWARE
65
66#define gcmSEMAPHORESTALL(buffer) \
67 do \
68 { \
69 /* Arm the PE-FE Semaphore. */ \
70 *buffer++ \
71 = gcmSETFIELDVALUE(0, AQ_COMMAND_LOAD_STATE_COMMAND, OPCODE, LOAD_STATE) \
72 | gcmSETFIELD (0, AQ_COMMAND_LOAD_STATE_COMMAND, COUNT, 1) \
73 | gcmSETFIELD (0, AQ_COMMAND_LOAD_STATE_COMMAND, ADDRESS, 0x0E02); \
74 \
75 *buffer++ \
76 = gcmSETFIELDVALUE(0, AQ_SEMAPHORE, SOURCE, FRONT_END) \
77 | gcmSETFIELDVALUE(0, AQ_SEMAPHORE, DESTINATION, PIXEL_ENGINE);\
78 \
79 /* STALL FE until PE is done flushing. */ \
80 *buffer++ \
81 = gcmSETFIELDVALUE(0, STALL_COMMAND, OPCODE, STALL); \
82 \
83 *buffer++ \
84 = gcmSETFIELDVALUE(0, STALL_STALL, SOURCE, FRONT_END) \
85 | gcmSETFIELDVALUE(0, STALL_STALL, DESTINATION, PIXEL_ENGINE); \
86 } while(0)
87
88typedef struct _gcsiDEBUG_REGISTERS * gcsiDEBUG_REGISTERS_PTR;
89typedef struct _gcsiDEBUG_REGISTERS
90{
91 gctSTRING module;
92 gctUINT index;
93 gctUINT shift;
94 gctUINT data;
95 gctUINT count;
96 gctUINT32 signature;
97}
98gcsiDEBUG_REGISTERS;
99
100/******************************************************************************\
101********************************* Support Code *********************************
102\******************************************************************************/
103static gctBOOL
104_IsHardwareMatch(
105 IN gckHARDWARE Hardware,
106 IN gctINT32 ChipModel,
107 IN gctUINT32 ChipRevision
108 )
109{
110 return ((Hardware->identity.chipModel == ChipModel) &&
111 (Hardware->identity.chipRevision == ChipRevision));
112}
113
114static gceSTATUS
115_ResetGPU(
116 IN gckHARDWARE Hardware,
117 IN gckOS Os,
118 IN gceCORE Core
119 );
120
121static gceSTATUS
122_IdentifyHardware(
123 IN gckOS Os,
124 IN gceCORE Core,
125 OUT gcsHAL_QUERY_CHIP_IDENTITY_PTR Identity
126 )
127{
128 gceSTATUS status;
129
130 gctUINT32 chipIdentity;
131
132 gctUINT32 streamCount = 0;
133 gctUINT32 registerMax = 0;
134 gctUINT32 threadCount = 0;
135 gctUINT32 shaderCoreCount = 0;
136 gctUINT32 vertexCacheSize = 0;
137 gctUINT32 vertexOutputBufferSize = 0;
138 gctUINT32 pixelPipes = 0;
139 gctUINT32 instructionCount = 0;
140 gctUINT32 numConstants = 0;
141 gctUINT32 bufferSize = 0;
142 gctUINT32 varyingsCount = 0;
143 gctUINT32 debugControl0 = 0;
144
145 gcmkHEADER_ARG("Os=0x%x", Os);
146
147 /***************************************************************************
148 ** Get chip ID and revision.
149 */
150
151 /* Read chip identity register. */
152 gcmkONERROR(
153 gckOS_ReadRegisterEx(Os, Core,
154 0x00018,
155 &chipIdentity));
156
157 /* Special case for older graphic cores. */
158 if (((((gctUINT32) (chipIdentity)) >> (0 ? 31:24) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1)))))) == (0x01 & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))))
159 {
160 Identity->chipModel = gcv500;
161 Identity->chipRevision = (((((gctUINT32) (chipIdentity)) >> (0 ? 15:12)) & ((gctUINT32) ((((1 ? 15:12) - (0 ? 15:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:12) - (0 ? 15:12) + 1)))))) );
162 }
163
164 else
165 {
166 /* Read chip identity register. */
167 gcmkONERROR(
168 gckOS_ReadRegisterEx(Os, Core,
169 0x00020,
170 (gctUINT32_PTR) &Identity->chipModel));
171
172 if (((Identity->chipModel & 0xFF00) == 0x0400)
173 && (Identity->chipModel != 0x0420)
174 && (Identity->chipModel != 0x0428))
175 {
176 Identity->chipModel = (gceCHIPMODEL) (Identity->chipModel & 0x0400);
177 }
178
179 /* Read CHIP_REV register. */
180 gcmkONERROR(
181 gckOS_ReadRegisterEx(Os, Core,
182 0x00024,
183 &Identity->chipRevision));
184
185 if ((Identity->chipModel == gcv2000) && (Identity->chipRevision & 0xffff0000) == 0xffff0000)
186 {
187 Identity->chipModel = gcv3000;
188 Identity->chipRevision &= 0xffff;
189 Identity->chipFlags |= gcvCHIP_FLAG_GC2000_R2;
190 }
191
192 if ((Identity->chipModel == gcv300)
193 && (Identity->chipRevision == 0x2201)
194 )
195 {
196 gctUINT32 chipDate;
197 gctUINT32 chipTime;
198
199 /* Read date and time registers. */
200 gcmkONERROR(
201 gckOS_ReadRegisterEx(Os, Core,
202 0x00028,
203 &chipDate));
204
205 gcmkONERROR(
206 gckOS_ReadRegisterEx(Os, Core,
207 0x0002C,
208 &chipTime));
209
210 if ((chipDate == 0x20080814) && (chipTime == 0x12051100))
211 {
212 /* This IP has an ECO; put the correct revision in it. */
213 Identity->chipRevision = 0x1051;
214 }
215 }
216
217 gcmkONERROR(
218 gckOS_ReadRegisterEx(Os, Core,
219 0x000A8,
220 &Identity->productID));
221 }
222
223 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
224 "Identity: chipModel=%X",
225 Identity->chipModel);
226
227 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
228 "Identity: chipRevision=%X",
229 Identity->chipRevision);
230
231
232 /***************************************************************************
233 ** Get chip features.
234 */
235
236 /* Read chip feature register. */
237 gcmkONERROR(
238 gckOS_ReadRegisterEx(Os, Core,
239 0x0001C,
240 &Identity->chipFeatures));
241
242
243 if (((Identity->chipModel == gcv500) && (Identity->chipRevision < 2))
244 || ((Identity->chipModel == gcv300) && (Identity->chipRevision < 0x2000))
245 )
246 {
247 /* GC500 rev 1.x and GC300 rev < 2.0 doesn't have these registers. */
248 Identity->chipMinorFeatures = 0;
249 Identity->chipMinorFeatures1 = 0;
250 Identity->chipMinorFeatures2 = 0;
251 Identity->chipMinorFeatures3 = 0;
252 Identity->chipMinorFeatures4 = 0;
253 Identity->chipMinorFeatures5 = 0;
254 Identity->chipMinorFeatures6 = 0;
255 }
256 else
257 {
258 /* Read chip minor feature register #0. */
259 gcmkONERROR(
260 gckOS_ReadRegisterEx(Os, Core,
261 0x00034,
262 &Identity->chipMinorFeatures));
263
264 if (((((gctUINT32) (Identity->chipMinorFeatures)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))))
265 )
266 {
267 /* Read chip minor featuress register #1. */
268 gcmkONERROR(
269 gckOS_ReadRegisterEx(Os, Core,
270 0x00074,
271 &Identity->chipMinorFeatures1));
272
273 /* Read chip minor featuress register #2. */
274 gcmkONERROR(
275 gckOS_ReadRegisterEx(Os, Core,
276 0x00084,
277 &Identity->chipMinorFeatures2));
278
279 /*Identity->chipMinorFeatures2 &= ~(0x1 << 3);*/
280
281 /* Read chip minor featuress register #1. */
282 gcmkONERROR(
283 gckOS_ReadRegisterEx(Os, Core,
284 0x00088,
285 &Identity->chipMinorFeatures3));
286
287
288 /* Read chip minor featuress register #4. */
289 gcmkONERROR(
290 gckOS_ReadRegisterEx(Os, Core,
291 0x00094,
292 &Identity->chipMinorFeatures4));
293
294 /* Read chip minor featuress register #5. */
295 gcmkONERROR(
296 gckOS_ReadRegisterEx(Os, Core,
297 0x000A0,
298 &Identity->chipMinorFeatures5));
299
300 /* Read chip minor featuress register #6. */
301 gcmkONERROR(
302 gckOS_ReadRegisterEx(Os, Core,
303 0x000DC,
304 &Identity->chipMinorFeatures6));
305 }
306 else
307 {
308 /* Chip doesn't has minor features register #1 or 2 or 3 or 4. */
309 Identity->chipMinorFeatures1 = 0;
310 Identity->chipMinorFeatures2 = 0;
311 Identity->chipMinorFeatures3 = 0;
312 Identity->chipMinorFeatures4 = 0;
313 Identity->chipMinorFeatures5 = 0;
314 Identity->chipMinorFeatures6 = 0;
315 }
316 }
317
318 /* Get the Supertile layout in the hardware. */
319 if (((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 26:26) & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))))
320 || ((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 8:8) & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1))))))))
321 {
322 Identity->superTileMode = 2;
323 }
324 else if (((((gctUINT32) (Identity->chipMinorFeatures)) >> (0 ? 27:27) & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))))
325 {
326 Identity->superTileMode = 1;
327 }
328 else
329 {
330 Identity->superTileMode = 0;
331 }
332
333 /* Exception for GC1000, revision 5035 & GC800, revision 4612 */
334 if (((Identity->chipModel == gcv1000) && ((Identity->chipRevision == 0x5035)
335 || (Identity->chipRevision == 0x5036)
336 || (Identity->chipRevision == 0x5037)
337 || (Identity->chipRevision == 0x5039)
338 || (Identity->chipRevision >= 0x5040)))
339 || ((Identity->chipModel == gcv800) && (Identity->chipRevision == 0x4612))
340 || ((Identity->chipModel == gcv600) && (Identity->chipRevision >= 0x4650))
341 || ((Identity->chipModel == gcv860) && (Identity->chipRevision == 0x4647))
342 || ((Identity->chipModel == gcv400) && (Identity->chipRevision >= 0x4633)))
343 {
344 Identity->superTileMode = 1;
345 }
346
347 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
348 "Identity: chipFeatures=0x%08X",
349 Identity->chipFeatures);
350
351 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
352 "Identity: chipMinorFeatures=0x%08X",
353 Identity->chipMinorFeatures);
354
355 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
356 "Identity: chipMinorFeatures1=0x%08X",
357 Identity->chipMinorFeatures1);
358
359 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
360 "Identity: chipMinorFeatures2=0x%08X",
361 Identity->chipMinorFeatures2);
362
363 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
364 "Identity: chipMinorFeatures3=0x%08X",
365 Identity->chipMinorFeatures3);
366
367 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
368 "Identity: chipMinorFeatures4=0x%08X",
369 Identity->chipMinorFeatures4);
370
371 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
372 "Identity: chipMinorFeatures5=0x%08X",
373 Identity->chipMinorFeatures5);
374
375 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
376 "Identity: chipMinorFeatures6=0x%08X",
377 Identity->chipMinorFeatures6);
378
379 /***************************************************************************
380 ** Get chip specs.
381 */
382
383 if (((((gctUINT32) (Identity->chipMinorFeatures)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))))
384 {
385 gctUINT32 specs, specs2, specs3, specs4;
386
387 /* Read gcChipSpecs register. */
388 gcmkONERROR(
389 gckOS_ReadRegisterEx(Os, Core,
390 0x00048,
391 &specs));
392
393 /* Extract the fields. */
394 registerMax = (((((gctUINT32) (specs)) >> (0 ? 7:4)) & ((gctUINT32) ((((1 ? 7:4) - (0 ? 7:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:4) - (0 ? 7:4) + 1)))))) );
395 threadCount = (((((gctUINT32) (specs)) >> (0 ? 11:8)) & ((gctUINT32) ((((1 ? 11:8) - (0 ? 11:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:8) - (0 ? 11:8) + 1)))))) );
396 shaderCoreCount = (((((gctUINT32) (specs)) >> (0 ? 24:20)) & ((gctUINT32) ((((1 ? 24:20) - (0 ? 24:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 24:20) - (0 ? 24:20) + 1)))))) );
397 vertexCacheSize = (((((gctUINT32) (specs)) >> (0 ? 16:12)) & ((gctUINT32) ((((1 ? 16:12) - (0 ? 16:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:12) - (0 ? 16:12) + 1)))))) );
398 vertexOutputBufferSize = (((((gctUINT32) (specs)) >> (0 ? 31:28)) & ((gctUINT32) ((((1 ? 31:28) - (0 ? 31:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:28) - (0 ? 31:28) + 1)))))) );
399 pixelPipes = (((((gctUINT32) (specs)) >> (0 ? 27:25)) & ((gctUINT32) ((((1 ? 27:25) - (0 ? 27:25) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:25) - (0 ? 27:25) + 1)))))) );
400
401 /* Read gcChipSpecs2 register. */
402 gcmkONERROR(
403 gckOS_ReadRegisterEx(Os, Core,
404 0x00080,
405 &specs2));
406
407 instructionCount = (((((gctUINT32) (specs2)) >> (0 ? 15:8)) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1)))))) );
408 numConstants = (((((gctUINT32) (specs2)) >> (0 ? 31:16)) & ((gctUINT32) ((((1 ? 31:16) - (0 ? 31:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:16) - (0 ? 31:16) + 1)))))) );
409 bufferSize = (((((gctUINT32) (specs2)) >> (0 ? 7:0)) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1)))))) );
410
411 /* Read gcChipSpecs3 register. */
412 gcmkONERROR(
413 gckOS_ReadRegisterEx(Os, Core,
414 0x0008C,
415 &specs3));
416
417 varyingsCount = (((((gctUINT32) (specs3)) >> (0 ? 8:4)) & ((gctUINT32) ((((1 ? 8:4) - (0 ? 8:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:4) - (0 ? 8:4) + 1)))))) );
418
419 /* Read gcChipSpecs4 register. */
420 gcmkONERROR(
421 gckOS_ReadRegisterEx(Os, Core,
422 0x0009C,
423 &specs4));
424
425
426 streamCount = (((((gctUINT32) (specs4)) >> (0 ? 16:12)) & ((gctUINT32) ((((1 ? 16:12) - (0 ? 16:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:12) - (0 ? 16:12) + 1)))))) );
427 if (streamCount == 0)
428 {
429 /* Extract stream count from older register. */
430 streamCount = (((((gctUINT32) (specs)) >> (0 ? 3:0)) & ((gctUINT32) ((((1 ? 3:0) - (0 ? 3:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:0) - (0 ? 3:0) + 1)))))) );
431 }
432
433 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
434 "Identity: chipSpecs1=0x%08X",
435 specs);
436
437 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
438 "Identity: chipSpecs2=0x%08X",
439 specs2);
440
441 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
442 "Identity: chipSpecs3=0x%08X",
443 specs3);
444
445 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
446 "Identity: chipSpecs4=0x%08X",
447 specs4);
448 }
449
450 /* Get the number of pixel pipes. */
451 Identity->pixelPipes = gcmMAX(pixelPipes, 1);
452
453 /* Get the stream count. */
454 Identity->streamCount = (streamCount != 0)
455 ? streamCount
456 : (Identity->chipModel >= gcv1000) ? 4 : 1;
457
458 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
459 "Specs: streamCount=%u%s",
460 Identity->streamCount,
461 (streamCount == 0) ? " (default)" : "");
462
463 /* Get the vertex output buffer size. */
464 Identity->vertexOutputBufferSize = (vertexOutputBufferSize != 0)
465 ? 1 << vertexOutputBufferSize
466 : (Identity->chipModel == gcv400)
467 ? (Identity->chipRevision < 0x4000) ? 512
468 : (Identity->chipRevision < 0x4200) ? 256
469 : 128
470 : (Identity->chipModel == gcv530)
471 ? (Identity->chipRevision < 0x4200) ? 512
472 : 128
473 : 512;
474
475 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
476 "Specs: vertexOutputBufferSize=%u%s",
477 Identity->vertexOutputBufferSize,
478 (vertexOutputBufferSize == 0) ? " (default)" : "");
479
480 /* Get the maximum number of threads. */
481 Identity->threadCount = (threadCount != 0)
482 ? 1 << threadCount
483 : (Identity->chipModel == gcv400) ? 64
484 : (Identity->chipModel == gcv500) ? 128
485 : (Identity->chipModel == gcv530) ? 128
486 : 256;
487
488 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
489 "Specs: threadCount=%u%s",
490 Identity->threadCount,
491 (threadCount == 0) ? " (default)" : "");
492
493 /* Get the number of shader cores. */
494 Identity->shaderCoreCount = (shaderCoreCount != 0)
495 ? shaderCoreCount
496 : (Identity->chipModel >= gcv1000) ? 2
497 : 1;
498 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
499 "Specs: shaderCoreCount=%u%s",
500 Identity->shaderCoreCount,
501 (shaderCoreCount == 0) ? " (default)" : "");
502
503 /* Get the vertex cache size. */
504 Identity->vertexCacheSize = (vertexCacheSize != 0)
505 ? vertexCacheSize
506 : 8;
507 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
508 "Specs: vertexCacheSize=%u%s",
509 Identity->vertexCacheSize,
510 (vertexCacheSize == 0) ? " (default)" : "");
511
512 /* Get the maximum number of temporary registers. */
513 Identity->registerMax = (registerMax != 0)
514 /* Maximum of registerMax/4 registers are accessible to 1 shader */
515 ? 1 << registerMax
516 : (Identity->chipModel == gcv400) ? 32
517 : 64;
518 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
519 "Specs: registerMax=%u%s",
520 Identity->registerMax,
521 (registerMax == 0) ? " (default)" : "");
522
523 /* Get the instruction count. */
524 Identity->instructionCount = (instructionCount == 0) ? 256
525 : (instructionCount == 1) ? 1024
526 : (instructionCount == 2) ? 2048
527 : (instructionCount == 0xFF) ? 512
528 : 256;
529
530 if (Identity->instructionCount == 256)
531 {
532 if ((Identity->chipModel == gcv2000 && Identity->chipRevision == 0x5108)
533 || Identity->chipModel == gcv880)
534 {
535 Identity->instructionCount = 512;
536 }
537 else if (((((gctUINT32) (Identity->chipMinorFeatures3)) >> (0 ? 3:3) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))))
538 {
539 Identity->instructionCount = 512;
540 }
541 }
542
543 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
544 "Specs: instructionCount=%u%s",
545 Identity->instructionCount,
546 (instructionCount == 0) ? " (default)" : "");
547
548 /* Get the number of constants. */
549 Identity->numConstants = (numConstants == 0) ? 168 : numConstants;
550
551 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
552 "Specs: numConstants=%u%s",
553 Identity->numConstants,
554 (numConstants == 0) ? " (default)" : "");
555
556 /* Get the buffer size. */
557 Identity->bufferSize = bufferSize;
558
559 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
560 "Specs: bufferSize=%u%s",
561 Identity->bufferSize,
562 (bufferSize == 0) ? " (default)" : "");
563
564
565 if (varyingsCount != 0)
566 {
567 Identity->varyingsCount = varyingsCount;
568 }
569 else if (((((gctUINT32) (Identity->chipMinorFeatures1)) >> (0 ? 23:23) & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))))
570 {
571 Identity->varyingsCount = 12;
572 }
573 else
574 {
575 Identity->varyingsCount = 8;
576 }
577
578 /* For some cores, it consumes two varying for position, so the max varying vectors should minus one. */
579 if ((Identity->chipModel == gcv5000 && Identity->chipRevision == 0x5434) ||
580 (Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5222) ||
581 (Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5208) ||
582 (Identity->chipModel == gcv4000 && Identity->chipRevision == 0x5245) ||
583 (Identity->chipModel == gcv3000 && Identity->chipRevision == 0x5435) ||
584 (Identity->chipModel == gcv2200 && Identity->chipRevision == 0x5244) ||
585 (Identity->chipModel == gcv1500 && Identity->chipRevision == 0x5246) ||
586 ((Identity->chipModel == gcv2100 || Identity->chipModel == gcv2000) && Identity->chipRevision == 0x5108) ||
587 (Identity->chipModel == gcv880 && (Identity->chipRevision == 0x5107 || Identity->chipRevision == 0x5106)))
588 {
589 Identity->varyingsCount -= 1;
590 }
591
592 Identity->chip2DControl = 0;
593 if (Identity->chipModel == gcv320)
594 {
595 gctUINT32 data;
596
597 gcmkONERROR(
598 gckOS_ReadRegisterEx(Os,
599 Core,
600 0x0002C,
601 &data));
602
603 if ((data != 33956864) &&
604 ((Identity->chipRevision == 0x5007) ||
605 (Identity->chipRevision == 0x5220)))
606 {
607 Identity->chip2DControl |= 0xFF &
608 (Identity->chipRevision == 0x5220 ? 8 :
609 (Identity->chipRevision == 0x5007 ? 12 : 0));
610 }
611
612 if (Identity->chipRevision == 0x5007)
613 {
614 /* Disable splitting rectangle. */
615 Identity->chip2DControl |= 0x100;
616
617 /* Enable 2D Flush. */
618 Identity->chip2DControl |= 0x200;
619 }
620 }
621
622
623 gcmkONERROR(
624 gckOS_ReadRegisterEx(Os, Core,
625 0x00470,
626 &debugControl0));
627
628 if (debugControl0 & (1 << 16))
629 {
630 Identity->chipFlags |= gcvCHIP_FLAG_MSAA_COHERENCEY_ECO_FIX;
631 }
632
633 /* Success. */
634 gcmkFOOTER();
635 return gcvSTATUS_OK;
636
637OnError:
638 /* Return the status. */
639 gcmkFOOTER();
640 return status;
641}
642
643#define gcdDEBUG_MODULE_CLOCK_GATING 0
644#define gcdDISABLE_MODULE_CLOCK_GATING 0
645#define gcdDISABLE_FE_CLOCK_GATING 0
646#define gcdDISABLE_PE_CLOCK_GATING 0
647#define gcdDISABLE_SH_CLOCK_GATING 0
648#define gcdDISABLE_PA_CLOCK_GATING 0
649#define gcdDISABLE_SE_CLOCK_GATING 0
650#define gcdDISABLE_RA_CLOCK_GATING 0
651#define gcdDISABLE_RA_EZ_CLOCK_GATING 0
652#define gcdDISABLE_RA_HZ_CLOCK_GATING 0
653#define gcdDISABLE_TX_CLOCK_GATING 0
654
655#if gcdDEBUG_MODULE_CLOCK_GATING
656gceSTATUS
657_ConfigureModuleLevelClockGating(
658 gckHARDWARE Hardware
659 )
660{
661 gctUINT32 data;
662
663 gcmkVERIFY_OK(
664 gckOS_ReadRegisterEx(Hardware->os,
665 Hardware->core,
666 Hardware->powerBaseAddress
667 + 0x00104,
668 &data));
669
670#if gcdDISABLE_FE_CLOCK_GATING
671 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
672#endif
673
674#if gcdDISABLE_PE_CLOCK_GATING
675 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)));
676#endif
677
678#if gcdDISABLE_SH_CLOCK_GATING
679 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)));
680#endif
681
682#if gcdDISABLE_PA_CLOCK_GATING
683 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
684#endif
685
686#if gcdDISABLE_SE_CLOCK_GATING
687 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
688#endif
689
690#if gcdDISABLE_RA_CLOCK_GATING
691 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6)));
692#endif
693
694#if gcdDISABLE_TX_CLOCK_GATING
695 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7)));
696#endif
697
698#if gcdDISABLE_RA_EZ_CLOCK_GATING
699 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)));
700#endif
701
702#if gcdDISABLE_RA_HZ_CLOCK_GATING
703 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17)));
704#endif
705
706 gcmkVERIFY_OK(
707 gckOS_WriteRegisterEx(Hardware->os,
708 Hardware->core,
709 Hardware->powerBaseAddress
710 + 0x00104,
711 data));
712
713#if gcdDISABLE_MODULE_CLOCK_GATING
714 gcmkVERIFY_OK(
715 gckOS_ReadRegisterEx(Hardware->os,
716 Hardware->core,
717 Hardware->powerBaseAddress +
718 0x00100,
719 &data));
720
721 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
722
723
724 gcmkVERIFY_OK(
725 gckOS_WriteRegisterEx(Hardware->os,
726 Hardware->core,
727 Hardware->powerBaseAddress
728 + 0x00100,
729 data));
730#endif
731
732 return gcvSTATUS_OK;
733}
734#endif
735
736#if gcdPOWEROFF_TIMEOUT
737void
738_PowerTimerFunction(
739 gctPOINTER Data
740 )
741{
742 gckHARDWARE hardware = (gckHARDWARE)Data;
743 gcmkVERIFY_OK(
744 gckHARDWARE_SetPowerManagementState(hardware, gcvPOWER_OFF_TIMEOUT));
745}
746#endif
747
748static gceSTATUS
749_VerifyDMA(
750 IN gckOS Os,
751 IN gceCORE Core,
752 gctUINT32_PTR Address1,
753 gctUINT32_PTR Address2,
754 gctUINT32_PTR State1,
755 gctUINT32_PTR State2
756 )
757{
758 gceSTATUS status;
759 gctUINT32 i;
760
761 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x660, State1));
762 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x664, Address1));
763
764 for (i = 0; i < 500; i += 1)
765 {
766 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x660, State2));
767 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x664, Address2));
768
769 if (*Address1 != *Address2)
770 {
771 break;
772 }
773
774 if (*State1 != *State2)
775 {
776 break;
777 }
778 }
779
780OnError:
781 return status;
782}
783
784static gceSTATUS
785_DumpDebugRegisters(
786 IN gckOS Os,
787 IN gceCORE Core,
788 IN gcsiDEBUG_REGISTERS_PTR Descriptor
789 )
790{
791 gceSTATUS status = gcvSTATUS_OK;
792 gctUINT32 select;
793 gctUINT32 data = 0;
794 gctUINT i;
795
796 gcmkHEADER_ARG("Os=0x%X Descriptor=0x%X", Os, Descriptor);
797
798 gcmkPRINT_N(4, " %s debug registers:\n", Descriptor->module);
799
800 for (i = 0; i < Descriptor->count; i += 1)
801 {
802 select = i << Descriptor->shift;
803
804 gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, Descriptor->index, select));
805#if gcdFPGA_BUILD
806 gcmkONERROR(gckOS_Delay(Os, 1000));
807#endif
808 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, Descriptor->data, &data));
809
810 gcmkPRINT_N(12, " [0x%02X] 0x%08X\n", i, data);
811 }
812
813 select = 0xF << Descriptor->shift;
814
815 for (i = 0; i < 500; i += 1)
816 {
817 gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, Descriptor->index, select));
818#if gcdFPGA_BUILD
819 gcmkONERROR(gckOS_Delay(Os, 1000));
820#endif
821 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, Descriptor->data, &data));
822
823 if (data == Descriptor->signature)
824 {
825 break;
826 }
827 }
828
829 if (i == 500)
830 {
831 gcmkPRINT_N(4, " failed to obtain the signature (read 0x%08X).\n", data);
832 }
833 else
834 {
835 gcmkPRINT_N(8, " signature = 0x%08X (%d read attempt(s))\n", data, i + 1);
836 }
837
838OnError:
839 /* Return the error. */
840 gcmkFOOTER();
841 return status;
842}
843
844static gceSTATUS
845_IsGPUPresent(
846 IN gckHARDWARE Hardware
847 )
848{
849 gceSTATUS status;
850 gcsHAL_QUERY_CHIP_IDENTITY identity;
851 gctUINT32 control;
852
853 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
854
855 /* Verify the arguments. */
856 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
857
858 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
859 Hardware->core,
860 0x00000,
861 &control));
862
863 control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)));
864 control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
865
866 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
867 Hardware->core,
868 0x00000,
869 control));
870
871 /* Identify the hardware. */
872 gcmkONERROR(_IdentifyHardware(Hardware->os,
873 Hardware->core,
874 &identity));
875
876 /* Check if these are the same values as saved before. */
877 if ((Hardware->identity.chipModel != identity.chipModel)
878 || (Hardware->identity.chipRevision != identity.chipRevision)
879 || (Hardware->identity.chipFeatures != identity.chipFeatures)
880 || (Hardware->identity.chipMinorFeatures != identity.chipMinorFeatures)
881 || (Hardware->identity.chipMinorFeatures1 != identity.chipMinorFeatures1)
882 || (Hardware->identity.chipMinorFeatures2 != identity.chipMinorFeatures2)
883 )
884 {
885 gcmkPRINT("[galcore]: GPU is not present.");
886 gcmkONERROR(gcvSTATUS_GPU_NOT_RESPONDING);
887 }
888
889 /* Success. */
890 gcmkFOOTER_NO();
891 return gcvSTATUS_OK;
892
893OnError:
894 /* Return the error. */
895 gcmkFOOTER();
896 return status;
897}
898
899gceSTATUS
900_FlushCache(
901 gckHARDWARE Hardware,
902 gckCOMMAND Command
903 )
904{
905 gceSTATUS status;
906 gctUINT32 bytes, requested;
907 gctPOINTER buffer;
908
909 /* Get the size of the flush command. */
910 gcmkONERROR(gckHARDWARE_Flush(Hardware,
911 gcvFLUSH_ALL,
912 gcvNULL,
913 &requested));
914
915 /* Reserve space in the command queue. */
916 gcmkONERROR(gckCOMMAND_Reserve(Command,
917 requested,
918 &buffer,
919 &bytes));
920
921 /* Append a flush. */
922 gcmkONERROR(gckHARDWARE_Flush(
923 Hardware, gcvFLUSH_ALL, buffer, &bytes
924 ));
925
926 /* Execute the command queue. */
927 gcmkONERROR(gckCOMMAND_Execute(Command, requested));
928
929 return gcvSTATUS_OK;
930
931OnError:
932 return status;
933}
934
935gctBOOL
936_IsGPUIdle(
937 IN gctUINT32 Idle
938 )
939{
940 return (((((gctUINT32) (Idle)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) )
941 && (((((gctUINT32) (Idle)) >> (0 ? 1:1)) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1)))))) )
942 && (((((gctUINT32) (Idle)) >> (0 ? 3:3)) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) )
943 && (((((gctUINT32) (Idle)) >> (0 ? 4:4)) & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1)))))) )
944 && (((((gctUINT32) (Idle)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) )
945 && (((((gctUINT32) (Idle)) >> (0 ? 6:6)) & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1)))))) )
946 && (((((gctUINT32) (Idle)) >> (0 ? 7:7)) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1)))))) )
947 && (((((gctUINT32) (Idle)) >> (0 ? 2:2)) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))) )
948 ;
949}
950
951/*
952* State timer helper must be called with powerMutex held.
953*/
954void
955gckSTATETIMER_Reset(
956 IN gcsSTATETIMER * StateTimer,
957 IN gctUINT64 Start
958 )
959{
960 gctUINT64 now;
961
962 if (Start)
963 {
964 now = Start;
965 }
966 else
967 {
968 gckOS_GetProfileTick(&now);
969 }
970
971 StateTimer->recent = StateTimer->start = now;
972
973 gckOS_ZeroMemory(StateTimer->elapse, gcmSIZEOF(StateTimer->elapse));
974}
975
976void
977gckSTATETIMER_Accumulate(
978 IN gcsSTATETIMER * StateTimer,
979 IN gceCHIPPOWERSTATE OldState
980 )
981{
982 gctUINT64 now;
983 gctUINT64 elapse;
984
985 gckOS_GetProfileTick(&now);
986
987 elapse = now - StateTimer->recent;
988
989 StateTimer->recent = now;
990
991 StateTimer->elapse[OldState] += elapse;
992}
993
994void
995gckSTATETIMER_Query(
996 IN gcsSTATETIMER * StateTimer,
997 IN gceCHIPPOWERSTATE State,
998 OUT gctUINT64_PTR Start,
999 OUT gctUINT64_PTR End,
1000 OUT gctUINT64_PTR On,
1001 OUT gctUINT64_PTR Off,
1002 OUT gctUINT64_PTR Idle,
1003 OUT gctUINT64_PTR Suspend
1004 )
1005{
1006 *Start = StateTimer->start;
1007
1008 gckSTATETIMER_Accumulate(StateTimer, State);
1009
1010 *End = StateTimer->recent;
1011
1012 *On = StateTimer->elapse[gcvPOWER_ON];
1013 *Off = StateTimer->elapse[gcvPOWER_OFF];
1014 *Idle = StateTimer->elapse[gcvPOWER_IDLE];
1015 *Suspend = StateTimer->elapse[gcvPOWER_SUSPEND];
1016
1017 gckSTATETIMER_Reset(StateTimer, StateTimer->recent);
1018}
1019
1020/******************************************************************************\
1021****************************** gckHARDWARE API code *****************************
1022\******************************************************************************/
1023
1024/*******************************************************************************
1025**
1026** gckHARDWARE_Construct
1027**
1028** Construct a new gckHARDWARE object.
1029**
1030** INPUT:
1031**
1032** gckOS Os
1033** Pointer to an initialized gckOS object.
1034**
1035** gceCORE Core
1036** Specified core.
1037**
1038** OUTPUT:
1039**
1040** gckHARDWARE * Hardware
1041** Pointer to a variable that will hold the pointer to the gckHARDWARE
1042** object.
1043*/
1044gceSTATUS
1045gckHARDWARE_Construct(
1046 IN gckOS Os,
1047 IN gceCORE Core,
1048 OUT gckHARDWARE * Hardware
1049 )
1050{
1051 gceSTATUS status;
1052 gckHARDWARE hardware = gcvNULL;
1053 gctUINT16 data = 0xff00;
1054 gctPOINTER pointer = gcvNULL;
1055#if gcdMULTI_GPU_AFFINITY
1056 gctUINT32 control;
1057#endif
1058
1059 gcmkHEADER_ARG("Os=0x%x", Os);
1060
1061 /* Verify the arguments. */
1062 gcmkVERIFY_OBJECT(Os, gcvOBJ_OS);
1063 gcmkVERIFY_ARGUMENT(Hardware != gcvNULL);
1064
1065 /* Enable the GPU. */
1066 gcmkONERROR(gckOS_SetGPUPower(Os, Core, gcvTRUE, gcvTRUE));
1067 gcmkONERROR(gckOS_WriteRegisterEx(Os,
1068 Core,
1069 0x00000,
1070 0x00000900));
1071
1072 /* Allocate the gckHARDWARE object. */
1073 gcmkONERROR(gckOS_Allocate(Os,
1074 gcmSIZEOF(struct _gckHARDWARE),
1075 &pointer));
1076
1077 gckOS_ZeroMemory(pointer, gcmSIZEOF(struct _gckHARDWARE));
1078
1079 hardware = (gckHARDWARE) pointer;
1080
1081 /* Initialize the gckHARDWARE object. */
1082 hardware->object.type = gcvOBJ_HARDWARE;
1083 hardware->os = Os;
1084 hardware->core = Core;
1085
1086 /* Identify the hardware. */
1087 gcmkONERROR(_IdentifyHardware(Os, Core, &hardware->identity));
1088
1089 /* Determine the hardware type */
1090 switch (hardware->identity.chipModel)
1091 {
1092 case gcv350:
1093 case gcv355:
1094 hardware->type = gcvHARDWARE_VG;
1095 break;
1096
1097 case gcv200:
1098 case gcv300:
1099 case gcv320:
1100 case gcv328:
1101 case gcv420:
1102 case gcv428:
1103 case gcv520:
1104 hardware->type = gcvHARDWARE_2D;
1105 break;
1106
1107 default:
1108#if gcdMULTI_GPU_AFFINITY
1109 hardware->type = (Core == gcvCORE_MAJOR) ? gcvHARDWARE_3D : gcvHARDWARE_OCL;
1110#else
1111 hardware->type = gcvHARDWARE_3D;
1112#endif
1113
1114 if(hardware->identity.chipModel == gcv880 && hardware->identity.chipRevision == 0x5107)
1115 {
1116 /*set outstanding limit*/
1117 gctUINT32 axi_ot;
1118 gcmkONERROR(gckOS_ReadRegisterEx(Os, Core, 0x00414, &axi_ot));
1119 axi_ot = (axi_ot & (~0xFF)) | 0x00010;
1120 gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, 0x00414, axi_ot));
1121 }
1122
1123
1124 if ((((((gctUINT32) (hardware->identity.chipFeatures)) >> (0 ? 9:9)) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1)))))) ))
1125 {
1126 hardware->type = (gceHARDWARE_TYPE) (hardware->type | gcvHARDWARE_2D);
1127 }
1128 }
1129
1130 hardware->powerBaseAddress
1131 = ((hardware->identity.chipModel == gcv300)
1132 && (hardware->identity.chipRevision < 0x2000))
1133 ? 0x0100
1134 : 0x0000;
1135
1136 /* _ResetGPU need powerBaseAddress. */
1137 status = _ResetGPU(hardware, Os, Core);
1138
1139 if (status != gcvSTATUS_OK)
1140 {
1141 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
1142 "_ResetGPU failed: status=%d\n", status);
1143 }
1144
1145#if gcdENABLE_DEC_COMPRESSION && !gcdDEC_ENABLE_AHB
1146 gcmkONERROR(gckOS_WriteRegisterEx(Os, gcvCORE_DEC, 0x18180, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1))))))) << (0 ? 22:22))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1))))))) << (0 ? 22:22)))));
1147#endif
1148
1149#if gcdMULTI_GPU_AFFINITY
1150 control = ((((gctUINT32) (0x00FF0A05)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1))))))) << (0 ? 27:27)));
1151
1152 gcmkONERROR(gckOS_WriteRegisterEx(Os,
1153 Core,
1154 0x0055C,
1155 control));
1156#endif
1157
1158 hardware->powerMutex = gcvNULL;
1159
1160 hardware->mmuVersion
1161 = (((((gctUINT32) (hardware->identity.chipMinorFeatures1)) >> (0 ? 28:28)) & ((gctUINT32) ((((1 ? 28:28) - (0 ? 28:28) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 28:28) - (0 ? 28:28) + 1)))))) );
1162
1163 /* Determine whether bug fixes #1 are present. */
1164 hardware->extraEventStates = ((((gctUINT32) (hardware->identity.chipMinorFeatures1)) >> (0 ? 3:3) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) == (0x0 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))));
1165
1166 /* Check if big endian */
1167 hardware->bigEndian = (*(gctUINT8 *)&data == 0xff);
1168
1169 /* Initialize the fast clear. */
1170 gcmkONERROR(gckHARDWARE_SetFastClear(hardware, -1, -1));
1171
1172#if !gcdENABLE_128B_MERGE
1173
1174 if (((((gctUINT32) (hardware->identity.chipMinorFeatures2)) >> (0 ? 21:21) & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 21:21) - (0 ? 21:21) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:21) - (0 ? 21:21) + 1))))))))
1175 {
1176 /* 128B merge is turned on by default. Disable it. */
1177 gcmkONERROR(gckOS_WriteRegisterEx(Os, Core, 0x00558, 0));
1178 }
1179
1180#endif
1181
1182 /* Set power state to ON. */
1183 hardware->chipPowerState = gcvPOWER_ON;
1184 hardware->clockState = gcvTRUE;
1185 hardware->powerState = gcvTRUE;
1186 hardware->lastWaitLink = ~0U;
1187 hardware->lastEnd = ~0U;
1188 hardware->globalSemaphore = gcvNULL;
1189#if gcdENABLE_FSCALE_VAL_ADJUST
1190 hardware->powerOnFscaleVal = 64;
1191#endif
1192
1193 gcmkONERROR(gckOS_CreateMutex(Os, &hardware->powerMutex));
1194 gcmkONERROR(gckOS_CreateSemaphore(Os, &hardware->globalSemaphore));
1195 hardware->startIsr = gcvNULL;
1196 hardware->stopIsr = gcvNULL;
1197
1198#if gcdPOWEROFF_TIMEOUT
1199 hardware->powerOffTimeout = gcdPOWEROFF_TIMEOUT;
1200
1201 gcmkVERIFY_OK(gckOS_CreateTimer(Os,
1202 _PowerTimerFunction,
1203 (gctPOINTER)hardware,
1204 &hardware->powerOffTimer));
1205#endif
1206
1207 gcmkONERROR(gckOS_AtomConstruct(Os, &hardware->pageTableDirty));
1208 gcmkONERROR(gckOS_AtomConstruct(Os, &hardware->pendingEvent));
1209
1210#if gcdLINK_QUEUE_SIZE
1211 hardware->linkQueue.front = 0;
1212 hardware->linkQueue.rear = 0;
1213 hardware->linkQueue.count = 0;
1214#endif
1215
1216 /* Enable power management by default. */
1217 hardware->powerManagement = gcvTRUE;
1218
1219 /* Disable profiler by default */
1220 hardware->gpuProfiler = gcvFALSE;
1221
1222#if defined(LINUX) || defined(__QNXNTO__) || defined(UNDERCE)
1223 if (hardware->mmuVersion)
1224 {
1225 hardware->endAfterFlushMmuCache = gcvTRUE;
1226 }
1227 else
1228#endif
1229 {
1230 hardware->endAfterFlushMmuCache = gcvFALSE;
1231 }
1232
1233 gcmkONERROR(gckOS_QueryOption(Os, "mmu", (gctUINT32_PTR)&hardware->enableMMU));
1234
1235 hardware->minFscaleValue = 1;
1236
1237 gckSTATETIMER_Reset(&hardware->powerStateTimer, 0);
1238
1239 /* Return pointer to the gckHARDWARE object. */
1240 *Hardware = hardware;
1241
1242 /* Success. */
1243 gcmkFOOTER_ARG("*Hardware=0x%x", *Hardware);
1244 return gcvSTATUS_OK;
1245
1246OnError:
1247 /* Roll back. */
1248 if (hardware != gcvNULL)
1249 {
1250 /* Turn off the power. */
1251 gcmkVERIFY_OK(gckOS_SetGPUPower(Os, Core, gcvFALSE, gcvFALSE));
1252
1253 if (hardware->globalSemaphore != gcvNULL)
1254 {
1255 /* Destroy the global semaphore. */
1256 gcmkVERIFY_OK(gckOS_DestroySemaphore(Os,
1257 hardware->globalSemaphore));
1258 }
1259
1260 if (hardware->powerMutex != gcvNULL)
1261 {
1262 /* Destroy the power mutex. */
1263 gcmkVERIFY_OK(gckOS_DeleteMutex(Os, hardware->powerMutex));
1264 }
1265
1266#if gcdPOWEROFF_TIMEOUT
1267 if (hardware->powerOffTimer != gcvNULL)
1268 {
1269 gcmkVERIFY_OK(gckOS_StopTimer(Os, hardware->powerOffTimer));
1270 gcmkVERIFY_OK(gckOS_DestroyTimer(Os, hardware->powerOffTimer));
1271 }
1272#endif
1273
1274 if (hardware->pageTableDirty != gcvNULL)
1275 {
1276 gcmkVERIFY_OK(gckOS_AtomDestroy(Os, hardware->pageTableDirty));
1277 }
1278
1279 if (hardware->pendingEvent != gcvNULL)
1280 {
1281 gcmkVERIFY_OK(gckOS_AtomDestroy(Os, hardware->pendingEvent));
1282 }
1283
1284 gcmkVERIFY_OK(gcmkOS_SAFE_FREE(Os, hardware));
1285 }
1286
1287 /* Return the status. */
1288 gcmkFOOTER();
1289 return status;
1290}
1291
1292/*******************************************************************************
1293**
1294** gckHARDWARE_Destroy
1295**
1296** Destroy an gckHARDWARE object.
1297**
1298** INPUT:
1299**
1300** gckHARDWARE Hardware
1301** Pointer to the gckHARDWARE object that needs to be destroyed.
1302**
1303** OUTPUT:
1304**
1305** Nothing.
1306*/
1307gceSTATUS
1308gckHARDWARE_Destroy(
1309 IN gckHARDWARE Hardware
1310 )
1311{
1312 gceSTATUS status;
1313
1314 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
1315
1316 /* Verify the arguments. */
1317 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1318
1319 /* Destroy the power semaphore. */
1320 gcmkVERIFY_OK(gckOS_DestroySemaphore(Hardware->os,
1321 Hardware->globalSemaphore));
1322
1323 /* Destroy the power mutex. */
1324 gcmkVERIFY_OK(gckOS_DeleteMutex(Hardware->os, Hardware->powerMutex));
1325
1326#if gcdPOWEROFF_TIMEOUT
1327 gcmkVERIFY_OK(gckOS_StopTimer(Hardware->os, Hardware->powerOffTimer));
1328 gcmkVERIFY_OK(gckOS_DestroyTimer(Hardware->os, Hardware->powerOffTimer));
1329#endif
1330
1331 gcmkVERIFY_OK(gckOS_AtomDestroy(Hardware->os, Hardware->pageTableDirty));
1332
1333 gcmkVERIFY_OK(gckOS_AtomDestroy(Hardware->os, Hardware->pendingEvent));
1334
1335 gcmkVERIFY_OK(gckOS_FreeNonPagedMemory(
1336 Hardware->os,
1337 Hardware->functionBytes,
1338 Hardware->functionPhysical,
1339 Hardware->functionLogical
1340 ));
1341
1342 /* Mark the object as unknown. */
1343 Hardware->object.type = gcvOBJ_UNKNOWN;
1344
1345 /* Free the object. */
1346 gcmkONERROR(gcmkOS_SAFE_FREE(Hardware->os, Hardware));
1347
1348 /* Success. */
1349 gcmkFOOTER_NO();
1350 return gcvSTATUS_OK;
1351
1352OnError:
1353 gcmkFOOTER();
1354 return status;
1355}
1356
1357/*******************************************************************************
1358**
1359** gckHARDWARE_GetType
1360**
1361** Get the hardware type.
1362**
1363** INPUT:
1364**
1365** gckHARDWARE Harwdare
1366** Pointer to an gckHARDWARE object.
1367**
1368** OUTPUT:
1369**
1370** gceHARDWARE_TYPE * Type
1371** Pointer to a variable that receives the type of hardware object.
1372*/
1373gceSTATUS
1374gckHARDWARE_GetType(
1375 IN gckHARDWARE Hardware,
1376 OUT gceHARDWARE_TYPE * Type
1377 )
1378{
1379 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
1380 gcmkVERIFY_ARGUMENT(Type != gcvNULL);
1381
1382 *Type = Hardware->type;
1383
1384 gcmkFOOTER_ARG("*Type=%d", *Type);
1385 return gcvSTATUS_OK;
1386}
1387
1388/*******************************************************************************
1389**
1390** gckHARDWARE_InitializeHardware
1391**
1392** Initialize the hardware.
1393**
1394** INPUT:
1395**
1396** gckHARDWARE Hardware
1397** Pointer to the gckHARDWARE object.
1398**
1399** OUTPUT:
1400**
1401** Nothing.
1402*/
1403gceSTATUS
1404gckHARDWARE_InitializeHardware(
1405 IN gckHARDWARE Hardware
1406 )
1407{
1408 gceSTATUS status;
1409 gctUINT32 baseAddress;
1410 gctUINT32 chipRev;
1411 gctUINT32 control;
1412 gctUINT32 data;
1413 gctUINT32 regPMC = 0;
1414
1415 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
1416
1417 /* Verify the arguments. */
1418 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1419
1420 /* Read the chip revision register. */
1421 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
1422 Hardware->core,
1423 0x00024,
1424 &chipRev));
1425
1426 chipRev &= 0xffff;
1427
1428 if (chipRev != Hardware->identity.chipRevision)
1429 {
1430 /* Chip is not there! */
1431 gcmkONERROR(gcvSTATUS_CONTEXT_LOSSED);
1432 }
1433
1434 /* Disable isolate GPU bit. */
1435 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1436 Hardware->core,
1437 0x00000,
1438 ((((gctUINT32) (0x00000900)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)))));
1439
1440 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
1441 Hardware->core,
1442 0x00000,
1443 &control));
1444
1445 /* Enable debug register. */
1446 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1447 Hardware->core,
1448 0x00000,
1449 ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:11) - (0 ? 11:11) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:11) - (0 ? 11:11) + 1))))))) << (0 ? 11:11))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:11) - (0 ? 11:11) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:11) - (0 ? 11:11) + 1))))))) << (0 ? 11:11)))));
1450
1451 /* Reset memory counters. */
1452 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1453 Hardware->core,
1454 0x0003C,
1455 ~0U));
1456
1457 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1458 Hardware->core,
1459 0x0003C,
1460 0));
1461
1462 /* Get the system's physical base address. */
1463 gcmkONERROR(gckOS_GetBaseAddress(Hardware->os, &baseAddress));
1464
1465 /* Program the base addesses. */
1466 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1467 Hardware->core,
1468 0x0041C,
1469 baseAddress));
1470
1471 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1472 Hardware->core,
1473 0x00418,
1474 baseAddress));
1475
1476 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1477 Hardware->core,
1478 0x00428,
1479 baseAddress));
1480
1481 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1482 Hardware->core,
1483 0x00420,
1484 baseAddress));
1485
1486 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1487 Hardware->core,
1488 0x00424,
1489 baseAddress));
1490
1491 {
1492 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
1493 Hardware->core,
1494 Hardware->powerBaseAddress +
1495 0x00100,
1496 &data));
1497
1498 /* Enable clock gating. */
1499 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
1500
1501 if ((Hardware->identity.chipRevision == 0x4301)
1502 || (Hardware->identity.chipRevision == 0x4302)
1503 )
1504 {
1505 /* Disable stall module level clock gating for 4.3.0.1 and 4.3.0.2
1506 ** revisions. */
1507 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)));
1508 }
1509
1510 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1511 Hardware->core,
1512 Hardware->powerBaseAddress
1513 + 0x00100,
1514 data));
1515
1516 }
1517
1518 if (Hardware->identity.chipModel == gcv4000 &&
1519 ((Hardware->identity.chipRevision == 0x5208) || (Hardware->identity.chipRevision == 0x5222)))
1520 {
1521 gcmkONERROR(
1522 gckOS_WriteRegisterEx(Hardware->os,
1523 Hardware->core,
1524 0x0010C,
1525 ((((gctUINT32) (0x01590880)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))) << (0 ? 23:23))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))) << (0 ? 23:23)))));
1526 }
1527
1528 if (Hardware->identity.chipModel == gcv1000 &&
1529 (Hardware->identity.chipRevision == 0x5039 ||
1530 Hardware->identity.chipRevision == 0x5040))
1531 {
1532 gctUINT32 pulseEater;
1533
1534 pulseEater = ((((gctUINT32) (0x01590880)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)));
1535
1536 gcmkONERROR(
1537 gckOS_WriteRegisterEx(Hardware->os,
1538 Hardware->core,
1539 0x0010C,
1540 ((((gctUINT32) (pulseEater)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17)))));
1541 }
1542
1543 if ((gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_HALTI2) == gcvSTATUS_FALSE)
1544 || (Hardware->identity.chipRevision < 0x5422)
1545 )
1546 {
1547 if (regPMC == 0)
1548 {
1549 gcmkONERROR(
1550 gckOS_ReadRegisterEx(Hardware->os,
1551 Hardware->core,
1552 Hardware->powerBaseAddress
1553 + 0x00104,
1554 &regPMC));
1555 }
1556
1557 regPMC = ((((gctUINT32) (regPMC)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) << (0 ? 15:15))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) << (0 ? 15:15)));
1558 }
1559
1560 if (_IsHardwareMatch(Hardware, gcv2000, 0x5108))
1561 {
1562 gcmkONERROR(
1563 gckOS_ReadRegisterEx(Hardware->os,
1564 Hardware->core,
1565 0x00480,
1566 &data));
1567
1568 /* Set FE bus to one, TX bus to zero */
1569 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)));
1570 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7)));
1571
1572 gcmkONERROR(
1573 gckOS_WriteRegisterEx(Hardware->os,
1574 Hardware->core,
1575 0x00480,
1576 data));
1577 }
1578
1579 gcmkONERROR(
1580 gckHARDWARE_SetMMU(Hardware,
1581 Hardware->kernel->mmu->pageTableLogical));
1582
1583 if (Hardware->identity.chipModel >= gcv400
1584 && Hardware->identity.chipModel != gcv420
1585 && (((((gctUINT32) (Hardware->identity.chipMinorFeatures3)) >> (0 ? 15:15) & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 15:15) - (0 ? 15:15) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:15) - (0 ? 15:15) + 1))))))) != gcvTRUE)
1586 )
1587 {
1588 if (regPMC == 0)
1589 {
1590 gcmkONERROR(
1591 gckOS_ReadRegisterEx(Hardware->os,
1592 Hardware->core,
1593 Hardware->powerBaseAddress
1594 + 0x00104,
1595 &regPMC));
1596 }
1597
1598 /* Disable PA clock gating. */
1599 regPMC = ((((gctUINT32) (regPMC)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
1600 }
1601
1602 /* Limit 2D outstanding request. */
1603 if (_IsHardwareMatch(Hardware, gcv880, 0x5107))
1604 {
1605 gctUINT32 axi_ot;
1606 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00414, &axi_ot));
1607 axi_ot = (axi_ot & (~0xFF)) | 0x00010;
1608 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00414, axi_ot));
1609 }
1610
1611 if (Hardware->identity.chip2DControl & 0xFF)
1612 {
1613 gctUINT32 data;
1614
1615 gcmkONERROR(
1616 gckOS_ReadRegisterEx(Hardware->os,
1617 Hardware->core,
1618 0x00414,
1619 &data));
1620
1621 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (Hardware->identity.chip2DControl & 0xFF) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0)));
1622
1623 gcmkONERROR(
1624 gckOS_WriteRegisterEx(Hardware->os,
1625 Hardware->core,
1626 0x00414,
1627 data));
1628 }
1629
1630 if (_IsHardwareMatch(Hardware, gcv1000, 0x5035))
1631 {
1632 gcmkONERROR(
1633 gckOS_ReadRegisterEx(Hardware->os,
1634 Hardware->core,
1635 0x00414,
1636 &data));
1637
1638 /* Disable HZ-L2. */
1639 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12)));
1640
1641 gcmkONERROR(
1642 gckOS_WriteRegisterEx(Hardware->os,
1643 Hardware->core,
1644 0x00414,
1645 data));
1646 }
1647
1648 if (_IsHardwareMatch(Hardware, gcv4000, 0x5222)
1649 || _IsHardwareMatch(Hardware, gcv2000, 0x5108)
1650 )
1651 {
1652 if (regPMC == 0)
1653 {
1654 gcmkONERROR(
1655 gckOS_ReadRegisterEx(Hardware->os,
1656 Hardware->core,
1657 Hardware->powerBaseAddress
1658 + 0x00104,
1659 &regPMC));
1660 }
1661
1662 /* Disable TX clock gating. */
1663 regPMC = ((((gctUINT32) (regPMC)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7)));
1664 }
1665
1666 if (_IsHardwareMatch(Hardware, gcv880, 0x5106))
1667 {
1668 Hardware->kernel->timeOut = 140 * 1000;
1669 }
1670
1671 if (regPMC == 0)
1672 {
1673 gcmkONERROR(
1674 gckOS_ReadRegisterEx(Hardware->os,
1675 Hardware->core,
1676 Hardware->powerBaseAddress
1677 + 0x00104,
1678 &regPMC));
1679 }
1680
1681 /* Disable RA HZ clock gating. */
1682 regPMC = ((((gctUINT32) (regPMC)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17)));
1683
1684 /* Disable RA EZ clock gating. */
1685 regPMC = ((((gctUINT32) (regPMC)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)));
1686
1687 if (regPMC != 0)
1688 {
1689 gcmkONERROR(
1690 gckOS_WriteRegisterEx(Hardware->os,
1691 Hardware->core,
1692 Hardware->powerBaseAddress
1693 + 0x00104,
1694 regPMC));
1695 }
1696
1697 if (_IsHardwareMatch(Hardware, gcv2000, 0x5108)
1698 || (_IsHardwareMatch(Hardware, gcv3000, 0x5450) && (Hardware->identity.chipFlags & gcvCHIP_FLAG_GC2000_R2))
1699 || _IsHardwareMatch(Hardware, gcv320, 0x5007)
1700 || _IsHardwareMatch(Hardware, gcv320, 0x5303)
1701 || _IsHardwareMatch(Hardware, gcv880, 0x5106)
1702 || _IsHardwareMatch(Hardware, gcv400, 0x4645)
1703 )
1704 {
1705 /* Update GPU AXI cache atttribute. */
1706 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1707 Hardware->core,
1708 0x00008,
1709 0x00002200));
1710 }
1711
1712
1713 if ((Hardware->identity.chipRevision > 0x5420)
1714 && gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_PIPE_3D))
1715 {
1716 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
1717 Hardware->core,
1718 0x0010C,
1719 &data));
1720
1721 /* Disable internal DFS. */
1722 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 18:18) - (0 ? 18:18) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 18:18) - (0 ? 18:18) + 1))))))) << (0 ? 18:18))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 18:18) - (0 ? 18:18) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 18:18) - (0 ? 18:18) + 1))))))) << (0 ? 18:18)));
1723
1724 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
1725 Hardware->core,
1726 0x0010C,
1727 data));
1728 }
1729
1730#if gcdDEBUG_MODULE_CLOCK_GATING
1731 _ConfigureModuleLevelClockGating(Hardware);
1732#endif
1733
1734 /* Success. */
1735 gcmkFOOTER_NO();
1736 return gcvSTATUS_OK;
1737
1738OnError:
1739 /* Return the error. */
1740 gcmkFOOTER();
1741 return status;
1742}
1743
1744/*******************************************************************************
1745**
1746** gckHARDWARE_QueryMemory
1747**
1748** Query the amount of memory available on the hardware.
1749**
1750** INPUT:
1751**
1752** gckHARDWARE Hardware
1753** Pointer to the gckHARDWARE object.
1754**
1755** OUTPUT:
1756**
1757** gctSIZE_T * InternalSize
1758** Pointer to a variable that will hold the size of the internal video
1759** memory in bytes. If 'InternalSize' is gcvNULL, no information of the
1760** internal memory will be returned.
1761**
1762** gctUINT32 * InternalBaseAddress
1763** Pointer to a variable that will hold the hardware's base address for
1764** the internal video memory. This pointer cannot be gcvNULL if
1765** 'InternalSize' is also non-gcvNULL.
1766**
1767** gctUINT32 * InternalAlignment
1768** Pointer to a variable that will hold the hardware's base address for
1769** the internal video memory. This pointer cannot be gcvNULL if
1770** 'InternalSize' is also non-gcvNULL.
1771**
1772** gctSIZE_T * ExternalSize
1773** Pointer to a variable that will hold the size of the external video
1774** memory in bytes. If 'ExternalSize' is gcvNULL, no information of the
1775** external memory will be returned.
1776**
1777** gctUINT32 * ExternalBaseAddress
1778** Pointer to a variable that will hold the hardware's base address for
1779** the external video memory. This pointer cannot be gcvNULL if
1780** 'ExternalSize' is also non-gcvNULL.
1781**
1782** gctUINT32 * ExternalAlignment
1783** Pointer to a variable that will hold the hardware's base address for
1784** the external video memory. This pointer cannot be gcvNULL if
1785** 'ExternalSize' is also non-gcvNULL.
1786**
1787** gctUINT32 * HorizontalTileSize
1788** Number of horizontal pixels per tile. If 'HorizontalTileSize' is
1789** gcvNULL, no horizontal pixel per tile will be returned.
1790**
1791** gctUINT32 * VerticalTileSize
1792** Number of vertical pixels per tile. If 'VerticalTileSize' is
1793** gcvNULL, no vertical pixel per tile will be returned.
1794*/
1795gceSTATUS
1796gckHARDWARE_QueryMemory(
1797 IN gckHARDWARE Hardware,
1798 OUT gctSIZE_T * InternalSize,
1799 OUT gctUINT32 * InternalBaseAddress,
1800 OUT gctUINT32 * InternalAlignment,
1801 OUT gctSIZE_T * ExternalSize,
1802 OUT gctUINT32 * ExternalBaseAddress,
1803 OUT gctUINT32 * ExternalAlignment,
1804 OUT gctUINT32 * HorizontalTileSize,
1805 OUT gctUINT32 * VerticalTileSize
1806 )
1807{
1808 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
1809
1810 /* Verify the arguments. */
1811 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1812
1813 if (InternalSize != gcvNULL)
1814 {
1815 /* No internal memory. */
1816 *InternalSize = 0;
1817 }
1818
1819 if (ExternalSize != gcvNULL)
1820 {
1821 /* No external memory. */
1822 *ExternalSize = 0;
1823 }
1824
1825 if (HorizontalTileSize != gcvNULL)
1826 {
1827 /* 4x4 tiles. */
1828 *HorizontalTileSize = 4;
1829 }
1830
1831 if (VerticalTileSize != gcvNULL)
1832 {
1833 /* 4x4 tiles. */
1834 *VerticalTileSize = 4;
1835 }
1836
1837 /* Success. */
1838 gcmkFOOTER_ARG("*InternalSize=%lu *InternalBaseAddress=0x%08x "
1839 "*InternalAlignment=0x%08x *ExternalSize=%lu "
1840 "*ExternalBaseAddress=0x%08x *ExtenalAlignment=0x%08x "
1841 "*HorizontalTileSize=%u *VerticalTileSize=%u",
1842 gcmOPT_VALUE(InternalSize),
1843 gcmOPT_VALUE(InternalBaseAddress),
1844 gcmOPT_VALUE(InternalAlignment),
1845 gcmOPT_VALUE(ExternalSize),
1846 gcmOPT_VALUE(ExternalBaseAddress),
1847 gcmOPT_VALUE(ExternalAlignment),
1848 gcmOPT_VALUE(HorizontalTileSize),
1849 gcmOPT_VALUE(VerticalTileSize));
1850 return gcvSTATUS_OK;
1851}
1852
1853/*******************************************************************************
1854**
1855** gckHARDWARE_QueryChipIdentity
1856**
1857** Query the identity of the hardware.
1858**
1859** INPUT:
1860**
1861** gckHARDWARE Hardware
1862** Pointer to the gckHARDWARE object.
1863**
1864** OUTPUT:
1865**
1866** gcsHAL_QUERY_CHIP_IDENTITY_PTR Identity
1867** Pointer to the identity structure.
1868**
1869*/
1870gceSTATUS
1871gckHARDWARE_QueryChipIdentity(
1872 IN gckHARDWARE Hardware,
1873 OUT gcsHAL_QUERY_CHIP_IDENTITY_PTR Identity
1874 )
1875{
1876 gctUINT32 features;
1877
1878 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
1879
1880 /* Verify the arguments. */
1881 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1882 gcmkVERIFY_ARGUMENT(Identity != gcvNULL);
1883
1884 /* Return chip model and revision. */
1885 Identity->chipModel = Hardware->identity.chipModel;
1886 Identity->chipRevision = Hardware->identity.chipRevision;
1887
1888 /* Return feature set. */
1889 features = Hardware->identity.chipFeatures;
1890
1891 if ((((((gctUINT32) (features)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ))
1892 {
1893 /* Override fast clear by command line. */
1894 features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (Hardware->allowFastClear) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
1895 }
1896
1897 if ((((((gctUINT32) (features)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) ))
1898 {
1899 /* Override compression by command line. */
1900 features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) ((gctUINT32) (Hardware->allowCompression) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
1901 }
1902
1903 /* Mark 2D pipe as available for GC500.0 through GC500.2 and GC300,
1904 ** since they did not have this bit. */
1905 if (((Hardware->identity.chipModel == gcv500) && (Hardware->identity.chipRevision <= 2))
1906 || (Hardware->identity.chipModel == gcv300)
1907 )
1908 {
1909 features = ((((gctUINT32) (features)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)));
1910 }
1911
1912 Identity->chipFeatures = features;
1913
1914 /* Return minor features. */
1915 Identity->chipMinorFeatures = Hardware->identity.chipMinorFeatures;
1916 Identity->chipMinorFeatures1 = Hardware->identity.chipMinorFeatures1;
1917 Identity->chipMinorFeatures2 = Hardware->identity.chipMinorFeatures2;
1918 Identity->chipMinorFeatures3 = Hardware->identity.chipMinorFeatures3;
1919 Identity->chipMinorFeatures4 = Hardware->identity.chipMinorFeatures4;
1920 Identity->chipMinorFeatures5 = Hardware->identity.chipMinorFeatures5;
1921 Identity->chipMinorFeatures6 = Hardware->identity.chipMinorFeatures6;
1922
1923 /* Return chip specs. */
1924 Identity->streamCount = Hardware->identity.streamCount;
1925 Identity->registerMax = Hardware->identity.registerMax;
1926 Identity->threadCount = Hardware->identity.threadCount;
1927 Identity->shaderCoreCount = Hardware->identity.shaderCoreCount;
1928 Identity->vertexCacheSize = Hardware->identity.vertexCacheSize;
1929 Identity->vertexOutputBufferSize = Hardware->identity.vertexOutputBufferSize;
1930 Identity->pixelPipes = Hardware->identity.pixelPipes;
1931 Identity->instructionCount = Hardware->identity.instructionCount;
1932 Identity->numConstants = Hardware->identity.numConstants;
1933 Identity->bufferSize = Hardware->identity.bufferSize;
1934 Identity->varyingsCount = Hardware->identity.varyingsCount;
1935 Identity->superTileMode = Hardware->identity.superTileMode;
1936 Identity->chip2DControl = Hardware->identity.chip2DControl;
1937
1938 Identity->productID = Hardware->identity.productID;
1939 Identity->chipFlags = Hardware->identity.chipFlags;
1940
1941 /* Success. */
1942 gcmkFOOTER_NO();
1943 return gcvSTATUS_OK;
1944}
1945
1946/*******************************************************************************
1947**
1948** gckHARDWARE_SplitMemory
1949**
1950** Split a hardware specific memory address into a pool and offset.
1951**
1952** INPUT:
1953**
1954** gckHARDWARE Hardware
1955** Pointer to the gckHARDWARE object.
1956**
1957** gctUINT32 Address
1958** Address in hardware specific format.
1959**
1960** OUTPUT:
1961**
1962** gcePOOL * Pool
1963** Pointer to a variable that will hold the pool type for the address.
1964**
1965** gctUINT32 * Offset
1966** Pointer to a variable that will hold the offset for the address.
1967*/
1968gceSTATUS
1969gckHARDWARE_SplitMemory(
1970 IN gckHARDWARE Hardware,
1971 IN gctUINT32 Address,
1972 OUT gcePOOL * Pool,
1973 OUT gctUINT32 * Offset
1974 )
1975{
1976 gcmkHEADER_ARG("Hardware=0x%x Addres=0x%08x", Hardware, Address);
1977
1978 /* Verify the arguments. */
1979 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
1980 gcmkVERIFY_ARGUMENT(Pool != gcvNULL);
1981 gcmkVERIFY_ARGUMENT(Offset != gcvNULL);
1982
1983 if (Hardware->mmuVersion == 0)
1984 {
1985 /* Dispatch on memory type. */
1986 switch ((((((gctUINT32) (Address)) >> (0 ? 31:31)) & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1)))))) ))
1987 {
1988 case 0x0:
1989 /* System memory. */
1990 *Pool = gcvPOOL_SYSTEM;
1991 break;
1992
1993 case 0x1:
1994 /* Virtual memory. */
1995 *Pool = gcvPOOL_VIRTUAL;
1996 break;
1997
1998 default:
1999 /* Invalid memory type. */
2000 gcmkFOOTER_ARG("status=%d", gcvSTATUS_INVALID_ARGUMENT);
2001 return gcvSTATUS_INVALID_ARGUMENT;
2002 }
2003
2004 /* Return offset of address. */
2005 *Offset = (((((gctUINT32) (Address)) >> (0 ? 30:0)) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1)))))) );
2006 }
2007 else
2008 {
2009 *Pool = gcvPOOL_SYSTEM;
2010 *Offset = Address;
2011 }
2012
2013 /* Success. */
2014 gcmkFOOTER_ARG("*Pool=%d *Offset=0x%08x", *Pool, *Offset);
2015 return gcvSTATUS_OK;
2016}
2017
2018/*******************************************************************************
2019**
2020** gckHARDWARE_Execute
2021**
2022** Kickstart the hardware's command processor with an initialized command
2023** buffer.
2024**
2025** INPUT:
2026**
2027** gckHARDWARE Hardware
2028** Pointer to the gckHARDWARE object.
2029**
2030** gctUINT32 Address
2031** Hardware address of command buffer.
2032**
2033** gctSIZE_T Bytes
2034** Number of bytes for the prefetch unit (until after the first LINK).
2035**
2036** OUTPUT:
2037**
2038** Nothing.
2039*/
2040gceSTATUS
2041gckHARDWARE_Execute(
2042 IN gckHARDWARE Hardware,
2043 IN gctUINT32 Address,
2044 IN gctSIZE_T Bytes
2045 )
2046{
2047 gceSTATUS status;
2048 gctUINT32 control;
2049
2050 gcmkHEADER_ARG("Hardware=0x%x Address=0x%x Bytes=%lu",
2051 Hardware, Address, Bytes);
2052
2053 /* Verify the arguments. */
2054 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2055
2056 /* Enable all events. */
2057 gcmkONERROR(
2058 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00014, ~0U));
2059
2060 /* Write address register. */
2061 gcmkONERROR(
2062 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00654, Address));
2063
2064 /* Build control register. */
2065 control = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)))
2066 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) ((Bytes + 7) >> 3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
2067
2068 /* Set big endian */
2069 if (Hardware->bigEndian)
2070 {
2071 control |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 21:20) - (0 ? 21:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:20) - (0 ? 21:20) + 1))))))) << (0 ? 21:20))) | (((gctUINT32) (0x2 & ((gctUINT32) ((((1 ? 21:20) - (0 ? 21:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 21:20) - (0 ? 21:20) + 1))))))) << (0 ? 21:20)));
2072 }
2073
2074 /* Write control register. */
2075 gcmkONERROR(
2076 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00658, control));
2077
2078 /* Increase execute count. */
2079 Hardware->executeCount++;
2080
2081 /* Record last execute address. */
2082 Hardware->lastExecuteAddress = Address;
2083
2084 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2085 "Started command buffer @ 0x%08x",
2086 Address);
2087
2088 /* Success. */
2089 gcmkFOOTER_NO();
2090 return gcvSTATUS_OK;
2091
2092OnError:
2093 /* Return the status. */
2094 gcmkFOOTER();
2095 return status;
2096}
2097
2098/*******************************************************************************
2099**
2100** gckHARDWARE_WaitLink
2101**
2102** Append a WAIT/LINK command sequence at the specified location in the command
2103** queue.
2104**
2105** INPUT:
2106**
2107** gckHARDWARE Hardware
2108** Pointer to an gckHARDWARE object.
2109**
2110** gctPOINTER Logical
2111** Pointer to the current location inside the command queue to append
2112** WAIT/LINK command sequence at or gcvNULL just to query the size of the
2113** WAIT/LINK command sequence.
2114**
2115** gctUINT32 Offset
2116** Offset into command buffer required for alignment.
2117**
2118** gctSIZE_T * Bytes
2119** Pointer to the number of bytes available for the WAIT/LINK command
2120** sequence. If 'Logical' is gcvNULL, this argument will be ignored.
2121**
2122** OUTPUT:
2123**
2124** gctSIZE_T * Bytes
2125** Pointer to a variable that will receive the number of bytes required
2126** by the WAIT/LINK command sequence. If 'Bytes' is gcvNULL, nothing will
2127** be returned.
2128**
2129** gctUINT32 * WaitOffset
2130** Pointer to a variable that will receive the offset of the WAIT command
2131** from the specified logcial pointer.
2132** If 'WaitOffset' is gcvNULL nothing will be returned.
2133**
2134** gctSIZE_T * WaitSize
2135** Pointer to a variable that will receive the number of bytes used by
2136** the WAIT command. If 'LinkSize' is gcvNULL nothing will be returned.
2137*/
2138gceSTATUS
2139gckHARDWARE_WaitLink(
2140 IN gckHARDWARE Hardware,
2141 IN gctPOINTER Logical,
2142 IN gctUINT32 Offset,
2143 IN OUT gctUINT32 * Bytes,
2144 OUT gctUINT32 * WaitOffset,
2145 OUT gctUINT32 * WaitSize
2146 )
2147{
2148 static const gctUINT waitCount = 200;
2149
2150 gceSTATUS status;
2151 gctUINT32 address;
2152 gctUINT32_PTR logical;
2153 gctUINT32 bytes;
2154
2155 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Offset=0x%08x *Bytes=%lu",
2156 Hardware, Logical, Offset, gcmOPT_VALUE(Bytes));
2157
2158 /* Verify the arguments. */
2159 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2160 gcmkVERIFY_ARGUMENT((Logical != gcvNULL) || (Bytes != gcvNULL));
2161
2162 /* Compute number of bytes required. */
2163 bytes = gcmALIGN(Offset + 16, 8) - Offset;
2164 /* Cast the input pointer. */
2165 logical = (gctUINT32_PTR) Logical;
2166
2167 if (logical != gcvNULL)
2168 {
2169 /* Not enough space? */
2170 if (*Bytes < bytes)
2171 {
2172 /* Command queue too small. */
2173 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
2174 }
2175
2176 /* Convert logical into hardware specific address. */
2177 gcmkONERROR(gckHARDWARE_ConvertLogical(Hardware, logical, gcvFALSE, &address));
2178
2179 /* Store the WAIT/LINK address. */
2180 Hardware->lastWaitLink = address;
2181
2182 /* Append WAIT(count). */
2183 logical[0]
2184 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2185 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (waitCount) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
2186
2187
2188 /* Append LINK(2, address). */
2189 logical[2]
2190 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2191 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (bytes >> 3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
2192
2193 logical[3] = address;
2194
2195 gcmkTRACE_ZONE(
2196 gcvLEVEL_INFO, gcvZONE_HARDWARE,
2197 "0x%08x: WAIT %u", address, waitCount
2198 );
2199
2200 gcmkTRACE_ZONE(
2201 gcvLEVEL_INFO, gcvZONE_HARDWARE,
2202 "0x%08x: LINK 0x%08x, #%lu",
2203 address + 8, address, bytes
2204 );
2205 if (WaitOffset != gcvNULL)
2206 {
2207 /* Return the offset pointer to WAIT command. */
2208 *WaitOffset = 0;
2209 }
2210
2211 if (WaitSize != gcvNULL)
2212 {
2213 /* Return number of bytes used by the WAIT command. */
2214 *WaitSize = 8;
2215 }
2216 }
2217
2218 if (Bytes != gcvNULL)
2219 {
2220 /* Return number of bytes required by the WAIT/LINK command
2221 ** sequence. */
2222 *Bytes = bytes;
2223 }
2224
2225 /* Success. */
2226 gcmkFOOTER_ARG("*Bytes=%lu *WaitOffset=0x%x *WaitSize=%lu",
2227 gcmOPT_VALUE(Bytes), gcmOPT_VALUE(WaitOffset),
2228 gcmOPT_VALUE(WaitSize));
2229 return gcvSTATUS_OK;
2230
2231OnError:
2232 /* Return the status. */
2233 gcmkFOOTER();
2234 return status;
2235}
2236
2237/*******************************************************************************
2238**
2239** gckHARDWARE_End
2240**
2241** Append an END command at the specified location in the command queue.
2242**
2243** INPUT:
2244**
2245** gckHARDWARE Hardware
2246** Pointer to an gckHARDWARE object.
2247**
2248** gctPOINTER Logical
2249** Pointer to the current location inside the command queue to append
2250** END command at or gcvNULL just to query the size of the END command.
2251**
2252** gctSIZE_T * Bytes
2253** Pointer to the number of bytes available for the END command. If
2254** 'Logical' is gcvNULL, this argument will be ignored.
2255**
2256** OUTPUT:
2257**
2258** gctSIZE_T * Bytes
2259** Pointer to a variable that will receive the number of bytes required
2260** for the END command. If 'Bytes' is gcvNULL, nothing will be returned.
2261*/
2262gceSTATUS
2263gckHARDWARE_End(
2264 IN gckHARDWARE Hardware,
2265 IN gctPOINTER Logical,
2266 IN OUT gctUINT32 * Bytes
2267 )
2268{
2269 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
2270 gctUINT32 address;
2271 gceSTATUS status;
2272
2273 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x *Bytes=%lu",
2274 Hardware, Logical, gcmOPT_VALUE(Bytes));
2275
2276 /* Verify the arguments. */
2277 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2278 gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
2279
2280 if (Logical != gcvNULL)
2281 {
2282 if (*Bytes < 8)
2283 {
2284 /* Command queue too small. */
2285 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
2286 }
2287
2288 /* Append END. */
2289 logical[0] =
2290 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x02 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
2291
2292 /* Record the count of execution which is finised by this END. */
2293 logical[1] =
2294 Hardware->executeCount;
2295
2296 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, "0x%x: END", Logical);
2297
2298 /* Make sure the CPU writes out the data to memory. */
2299 gcmkONERROR(
2300 gckOS_MemoryBarrier(Hardware->os, Logical));
2301
2302 gcmkONERROR(gckHARDWARE_ConvertLogical(Hardware, logical, gcvFALSE, &address));
2303
2304 Hardware->lastEnd = address;
2305 }
2306
2307 if (Bytes != gcvNULL)
2308 {
2309 /* Return number of bytes required by the END command. */
2310 *Bytes = 8;
2311 }
2312
2313 /* Success. */
2314 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
2315 return gcvSTATUS_OK;
2316
2317OnError:
2318 /* Return the status. */
2319 gcmkFOOTER();
2320 return status;
2321}
2322
2323
2324/*******************************************************************************
2325**
2326** gckHARDWARE_Nop
2327**
2328** Append a NOP command at the specified location in the command queue.
2329**
2330** INPUT:
2331**
2332** gckHARDWARE Hardware
2333** Pointer to an gckHARDWARE object.
2334**
2335** gctPOINTER Logical
2336** Pointer to the current location inside the command queue to append
2337** NOP command at or gcvNULL just to query the size of the NOP command.
2338**
2339** gctSIZE_T * Bytes
2340** Pointer to the number of bytes available for the NOP command. If
2341** 'Logical' is gcvNULL, this argument will be ignored.
2342**
2343** OUTPUT:
2344**
2345** gctSIZE_T * Bytes
2346** Pointer to a variable that will receive the number of bytes required
2347** for the NOP command. If 'Bytes' is gcvNULL, nothing will be returned.
2348*/
2349gceSTATUS
2350gckHARDWARE_Nop(
2351 IN gckHARDWARE Hardware,
2352 IN gctPOINTER Logical,
2353 IN OUT gctSIZE_T * Bytes
2354 )
2355{
2356 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
2357 gceSTATUS status;
2358
2359 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x *Bytes=%lu",
2360 Hardware, Logical, gcmOPT_VALUE(Bytes));
2361
2362 /* Verify the arguments. */
2363 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2364 gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
2365
2366 if (Logical != gcvNULL)
2367 {
2368 if (*Bytes < 8)
2369 {
2370 /* Command queue too small. */
2371 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
2372 }
2373
2374 /* Append NOP. */
2375 logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x03 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
2376
2377 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, "0x%x: NOP", Logical);
2378 }
2379
2380 if (Bytes != gcvNULL)
2381 {
2382 /* Return number of bytes required by the NOP command. */
2383 *Bytes = 8;
2384 }
2385
2386 /* Success. */
2387 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
2388 return gcvSTATUS_OK;
2389
2390OnError:
2391 /* Return the status. */
2392 gcmkFOOTER();
2393 return status;
2394}
2395
2396/*******************************************************************************
2397**
2398** gckHARDWARE_Event
2399**
2400** Append an EVENT command at the specified location in the command queue.
2401**
2402** INPUT:
2403**
2404** gckHARDWARE Hardware
2405** Pointer to an gckHARDWARE object.
2406**
2407** gctPOINTER Logical
2408** Pointer to the current location inside the command queue to append
2409** the EVENT command at or gcvNULL just to query the size of the EVENT
2410** command.
2411**
2412** gctUINT8 Event
2413** Event ID to program.
2414**
2415** gceKERNEL_WHERE FromWhere
2416** Location of the pipe to send the event.
2417**
2418** gctSIZE_T * Bytes
2419** Pointer to the number of bytes available for the EVENT command. If
2420** 'Logical' is gcvNULL, this argument will be ignored.
2421**
2422** OUTPUT:
2423**
2424** gctSIZE_T * Bytes
2425** Pointer to a variable that will receive the number of bytes required
2426** for the EVENT command. If 'Bytes' is gcvNULL, nothing will be
2427** returned.
2428*/
2429gceSTATUS
2430gckHARDWARE_Event(
2431 IN gckHARDWARE Hardware,
2432 IN gctPOINTER Logical,
2433 IN gctUINT8 Event,
2434 IN gceKERNEL_WHERE FromWhere,
2435 IN OUT gctUINT32 * Bytes
2436 )
2437{
2438 gctUINT size;
2439 gctUINT32 destination = 0;
2440 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
2441 gceSTATUS status;
2442
2443 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Event=%u FromWhere=%d *Bytes=%lu",
2444 Hardware, Logical, Event, FromWhere, gcmOPT_VALUE(Bytes));
2445
2446 /* Verify the arguments. */
2447 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2448 gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
2449 gcmkVERIFY_ARGUMENT(Event < 32);
2450
2451
2452 /* Determine the size of the command. */
2453
2454 size = (Hardware->extraEventStates && (FromWhere == gcvKERNEL_PIXEL))
2455 ? gcmALIGN(8 + (1 + 5) * 4, 8) /* EVENT + 5 STATES */
2456 : 8;
2457
2458 if (Logical != gcvNULL)
2459 {
2460 if (*Bytes < size)
2461 {
2462 /* Command queue too small. */
2463 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
2464 }
2465
2466 switch (FromWhere)
2467 {
2468 case gcvKERNEL_COMMAND:
2469 /* From command processor. */
2470 destination = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)));
2471 break;
2472
2473 case gcvKERNEL_PIXEL:
2474 /* From pixel engine. */
2475 destination = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6)));
2476 break;
2477
2478 default:
2479 gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
2480 }
2481
2482 /* Append EVENT(Event, destiantion). */
2483 logical[0] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2484 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E01) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
2485 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
2486
2487 logical[1] = ((((gctUINT32) (destination)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) ((gctUINT32) (Event) & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)));
2488
2489 /* Make sure the event ID gets written out before GPU can access it. */
2490 gcmkONERROR(
2491 gckOS_MemoryBarrier(Hardware->os, logical + 1));
2492
2493#if gcmIS_DEBUG(gcdDEBUG_TRACE)
2494 {
2495 gctPHYS_ADDR_T phys;
2496 gckOS_GetPhysicalAddress(Hardware->os, Logical, &phys);
2497 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2498 "0x%08x: EVENT %d", phys, Event);
2499 }
2500#endif
2501
2502 /* Append the extra states. These are needed for the chips that do not
2503 ** support back-to-back events due to the async interface. The extra
2504 ** states add the necessary delay to ensure that event IDs do not
2505 ** collide. */
2506 if (size > 8)
2507 {
2508 logical[2] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2509 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0100) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
2510 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
2511 logical[3] = 0;
2512 logical[4] = 0;
2513 logical[5] = 0;
2514 logical[6] = 0;
2515 logical[7] = 0;
2516 }
2517
2518#if gcdINTERRUPT_STATISTIC
2519 if (Event < gcmCOUNTOF(Hardware->kernel->eventObj->queues))
2520 {
2521 gckOS_AtomSetMask(Hardware->pendingEvent, 1 << Event);
2522 }
2523#endif
2524 }
2525
2526 if (Bytes != gcvNULL)
2527 {
2528 /* Return number of bytes required by the EVENT command. */
2529 *Bytes = size;
2530 }
2531
2532 /* Success. */
2533 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
2534 return gcvSTATUS_OK;
2535
2536OnError:
2537 /* Return the status. */
2538 gcmkFOOTER();
2539 return status;
2540}
2541
2542/*******************************************************************************
2543**
2544** gckHARDWARE_PipeSelect
2545**
2546** Append a PIPESELECT command at the specified location in the command queue.
2547**
2548** INPUT:
2549**
2550** gckHARDWARE Hardware
2551** Pointer to an gckHARDWARE object.
2552**
2553** gctPOINTER Logical
2554** Pointer to the current location inside the command queue to append
2555** the PIPESELECT command at or gcvNULL just to query the size of the
2556** PIPESELECT command.
2557**
2558** gcePIPE_SELECT Pipe
2559** Pipe value to select.
2560**
2561** gctSIZE_T * Bytes
2562** Pointer to the number of bytes available for the PIPESELECT command.
2563** If 'Logical' is gcvNULL, this argument will be ignored.
2564**
2565** OUTPUT:
2566**
2567** gctSIZE_T * Bytes
2568** Pointer to a variable that will receive the number of bytes required
2569** for the PIPESELECT command. If 'Bytes' is gcvNULL, nothing will be
2570** returned.
2571*/
2572gceSTATUS
2573gckHARDWARE_PipeSelect(
2574 IN gckHARDWARE Hardware,
2575 IN gctPOINTER Logical,
2576 IN gcePIPE_SELECT Pipe,
2577 IN OUT gctUINT32 * Bytes
2578 )
2579{
2580 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
2581 gceSTATUS status;
2582
2583 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Pipe=%d *Bytes=%lu",
2584 Hardware, Logical, Pipe, gcmOPT_VALUE(Bytes));
2585
2586 /* Verify the arguments. */
2587 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2588 gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
2589
2590 /* Append a PipeSelect. */
2591 if (Logical != gcvNULL)
2592 {
2593 gctUINT32 flush, stall;
2594
2595 if (*Bytes < 32)
2596 {
2597 /* Command queue too small. */
2598 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
2599 }
2600
2601 flush = (Pipe == gcvPIPE_2D)
2602 ? ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))
2603 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
2604 : ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)));
2605
2606 stall = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
2607 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
2608
2609 /* LoadState(AQFlush, 1), flush. */
2610 logical[0]
2611 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2612 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
2613 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
2614
2615 logical[1]
2616 = flush;
2617
2618 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2619 "0x%x: FLUSH 0x%x", logical, flush);
2620
2621 /* LoadState(AQSempahore, 1), stall. */
2622 logical[2]
2623 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2624 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
2625 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
2626
2627 logical[3]
2628 = stall;
2629
2630 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2631 "0x%x: SEMAPHORE 0x%x", logical + 2, stall);
2632
2633 /* Stall, stall. */
2634 logical[4] = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
2635 logical[5] = stall;
2636
2637 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2638 "0x%x: STALL 0x%x", logical + 4, stall);
2639
2640 /* LoadState(AQPipeSelect, 1), pipe. */
2641 logical[6]
2642 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2643 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
2644 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
2645
2646 logical[7] = (Pipe == gcvPIPE_2D)
2647 ? 0x1
2648 : 0x0;
2649
2650 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
2651 "0x%x: PIPE %d", logical + 6, Pipe);
2652 }
2653
2654 if (Bytes != gcvNULL)
2655 {
2656 /* Return number of bytes required by the PIPESELECT command. */
2657 *Bytes = 32;
2658 }
2659
2660 /* Success. */
2661 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
2662 return gcvSTATUS_OK;
2663
2664OnError:
2665 /* Return the status. */
2666 gcmkFOOTER();
2667 return status;
2668}
2669
2670/*******************************************************************************
2671**
2672** gckHARDWARE_Link
2673**
2674** Append a LINK command at the specified location in the command queue.
2675**
2676** INPUT:
2677**
2678** gckHARDWARE Hardware
2679** Pointer to an gckHARDWARE object.
2680**
2681** gctPOINTER Logical
2682** Pointer to the current location inside the command queue to append
2683** the LINK command at or gcvNULL just to query the size of the LINK
2684** command.
2685**
2686** gctUINT32 FetchAddress
2687** Hardware address of destination of LINK.
2688**
2689** gctSIZE_T FetchSize
2690** Number of bytes in destination of LINK.
2691**
2692** gctSIZE_T * Bytes
2693** Pointer to the number of bytes available for the LINK command. If
2694** 'Logical' is gcvNULL, this argument will be ignored.
2695**
2696** OUTPUT:
2697**
2698** gctSIZE_T * Bytes
2699** Pointer to a variable that will receive the number of bytes required
2700** for the LINK command. If 'Bytes' is gcvNULL, nothing will be returned.
2701*/
2702gceSTATUS
2703gckHARDWARE_Link(
2704 IN gckHARDWARE Hardware,
2705 IN gctPOINTER Logical,
2706 IN gctUINT32 FetchAddress,
2707 IN gctUINT32 FetchSize,
2708 IN OUT gctUINT32 * Bytes,
2709 OUT gctUINT32 * Low,
2710 OUT gctUINT32 * High
2711 )
2712{
2713 gceSTATUS status;
2714 gctSIZE_T bytes;
2715 gctUINT32 link;
2716 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
2717
2718 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x FetchAddress=0x%x FetchSize=%lu "
2719 "*Bytes=%lu",
2720 Hardware, Logical, FetchAddress, FetchSize,
2721 gcmOPT_VALUE(Bytes));
2722
2723 /* Verify the arguments. */
2724 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2725 gcmkVERIFY_ARGUMENT((Logical == gcvNULL) || (Bytes != gcvNULL));
2726
2727 if (Logical != gcvNULL)
2728 {
2729 if (*Bytes < 8)
2730 {
2731 /* Command queue too small. */
2732 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
2733 }
2734
2735 gcmkONERROR(
2736 gckOS_WriteMemory(Hardware->os, logical + 1, FetchAddress));
2737
2738 if (High)
2739 {
2740 *High = FetchAddress;
2741 }
2742
2743 /* Make sure the address got written before the LINK command. */
2744 gcmkONERROR(
2745 gckOS_MemoryBarrier(Hardware->os, logical + 1));
2746
2747 /* Compute number of 64-byte aligned bytes to fetch. */
2748 bytes = gcmALIGN(FetchAddress + FetchSize, 64) - FetchAddress;
2749
2750 /* Append LINK(bytes / 8), FetchAddress. */
2751 link = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
2752 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (bytes >> 3) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
2753
2754 gcmkONERROR(
2755 gckOS_WriteMemory(Hardware->os, logical, link));
2756
2757 if (Low)
2758 {
2759 *Low = link;
2760 }
2761
2762 /* Memory barrier. */
2763 gcmkONERROR(
2764 gckOS_MemoryBarrier(Hardware->os, logical));
2765 }
2766
2767 if (Bytes != gcvNULL)
2768 {
2769 /* Return number of bytes required by the LINK command. */
2770 *Bytes = 8;
2771 }
2772
2773 /* Success. */
2774 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
2775 return gcvSTATUS_OK;
2776
2777OnError:
2778 /* Return the status. */
2779 gcmkFOOTER();
2780 return status;
2781}
2782
2783/*******************************************************************************
2784**
2785** gckHARDWARE_UpdateQueueTail
2786**
2787** Update the tail of the command queue.
2788**
2789** INPUT:
2790**
2791** gckHARDWARE Hardware
2792** Pointer to an gckHARDWARE object.
2793**
2794** gctPOINTER Logical
2795** Logical address of the start of the command queue.
2796**
2797** gctUINT32 Offset
2798** Offset into the command queue of the tail (last command).
2799**
2800** OUTPUT:
2801**
2802** Nothing.
2803*/
2804gceSTATUS
2805gckHARDWARE_UpdateQueueTail(
2806 IN gckHARDWARE Hardware,
2807 IN gctPOINTER Logical,
2808 IN gctUINT32 Offset
2809 )
2810{
2811 gceSTATUS status;
2812
2813 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x Offset=0x%08x",
2814 Hardware, Logical, Offset);
2815
2816 /* Verify the hardware. */
2817 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2818
2819 /* Force a barrier. */
2820 gcmkONERROR(
2821 gckOS_MemoryBarrier(Hardware->os, Logical));
2822
2823 /* Notify gckKERNEL object of change. */
2824 gcmkONERROR(
2825 gckKERNEL_Notify(Hardware->kernel,
2826 gcvNOTIFY_COMMAND_QUEUE,
2827 gcvFALSE));
2828
2829 if (status == gcvSTATUS_CHIP_NOT_READY)
2830 {
2831 gcmkONERROR(gcvSTATUS_DEVICE);
2832 }
2833
2834 /* Success. */
2835 gcmkFOOTER_NO();
2836 return gcvSTATUS_OK;
2837
2838OnError:
2839 /* Return the status. */
2840 gcmkFOOTER();
2841 return status;
2842}
2843
2844/*******************************************************************************
2845**
2846** gckHARDWARE_ConvertLogical
2847**
2848** Convert a logical system address into a hardware specific address.
2849**
2850** INPUT:
2851**
2852** gckHARDWARE Hardware
2853** Pointer to an gckHARDWARE object.
2854**
2855** gctPOINTER Logical
2856** Logical address to convert.
2857**
2858** gctBOOL InUserSpace
2859** gcvTRUE if the memory in user space.
2860**
2861** gctUINT32* Address
2862** Return hardware specific address.
2863**
2864** OUTPUT:
2865**
2866** Nothing.
2867*/
2868gceSTATUS
2869gckHARDWARE_ConvertLogical(
2870 IN gckHARDWARE Hardware,
2871 IN gctPOINTER Logical,
2872 IN gctBOOL InUserSpace,
2873 OUT gctUINT32 * Address
2874 )
2875{
2876 gctUINT32 address;
2877 gceSTATUS status;
2878 gctUINT32 baseAddress;
2879 gctPHYS_ADDR_T physical;
2880
2881 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x InUserSpace=%d",
2882 Hardware, Logical, InUserSpace);
2883
2884 /* Verify the arguments. */
2885 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2886 gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
2887 gcmkVERIFY_ARGUMENT(Address != gcvNULL);
2888
2889 /* Convert logical address into a physical address. */
2890 if (InUserSpace)
2891 {
2892 gcmkONERROR(gckOS_UserLogicalToPhysical(Hardware->os, Logical, &physical));
2893 }
2894 else
2895 {
2896 gcmkONERROR(gckOS_GetPhysicalAddress(Hardware->os, Logical, &physical));
2897 }
2898
2899 gcmkSAFECASTPHYSADDRT(address, physical);
2900
2901 /* For old MMU, get GPU address according to baseAddress. */
2902 if (Hardware->mmuVersion == 0)
2903 {
2904 gcmkONERROR(gckOS_GetBaseAddress(Hardware->os, &baseAddress));
2905
2906 /* Subtract base address to get a GPU address. */
2907 gcmkASSERT(address >= baseAddress);
2908 address -= baseAddress;
2909 }
2910
2911 /* Return hardware specific address. */
2912 *Address = (Hardware->mmuVersion == 0)
2913 ? ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)))
2914 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0))) | (((gctUINT32) ((gctUINT32) (address) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0)))
2915 : address;
2916
2917 /* Success. */
2918 gcmkFOOTER_ARG("*Address=0x%08x", *Address);
2919 return gcvSTATUS_OK;
2920
2921OnError:
2922 /* Return the status. */
2923 gcmkFOOTER();
2924 return status;
2925}
2926
2927/*******************************************************************************
2928**
2929** gckHARDWARE_Interrupt
2930**
2931** Process an interrupt.
2932**
2933** INPUT:
2934**
2935** gckHARDWARE Hardware
2936** Pointer to an gckHARDWARE object.
2937**
2938** gctBOOL InterruptValid
2939** If gcvTRUE, this function will read the interrupt acknowledge
2940** register, stores the data, and return whether or not the interrupt
2941** is ours or not. If gcvFALSE, this functions will read the interrupt
2942** acknowledge register and combine it with any stored value to handle
2943** the event notifications.
2944**
2945** OUTPUT:
2946**
2947** Nothing.
2948*/
2949gceSTATUS
2950gckHARDWARE_Interrupt(
2951 IN gckHARDWARE Hardware,
2952 IN gctBOOL InterruptValid
2953 )
2954{
2955 gckEVENT eventObj;
2956 gctUINT32 data = 0;
2957 gceSTATUS status;
2958
2959 gcmkHEADER_ARG("Hardware=0x%x InterruptValid=%d", Hardware, InterruptValid);
2960
2961 /* Verify the arguments. */
2962 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
2963
2964 /* Extract gckEVENT object. */
2965 eventObj = Hardware->kernel->eventObj;
2966 gcmkVERIFY_OBJECT(eventObj, gcvOBJ_EVENT);
2967
2968 if (InterruptValid)
2969 {
2970 /* Read AQIntrAcknowledge register. */
2971 gcmkONERROR(
2972 gckOS_ReadRegisterEx(Hardware->os,
2973 Hardware->core,
2974 0x00010,
2975 &data));
2976
2977 if (data == 0)
2978 {
2979 /* Not our interrupt. */
2980 status = gcvSTATUS_NOT_OUR_INTERRUPT;
2981 }
2982 else
2983 {
2984
2985#if gcdINTERRUPT_STATISTIC
2986 gckOS_AtomClearMask(Hardware->pendingEvent, data);
2987#endif
2988
2989 /* Inform gckEVENT of the interrupt. */
2990 status = gckEVENT_Interrupt(eventObj,
2991 data);
2992 }
2993 }
2994 else
2995 {
2996 /* Handle events. */
2997 status = gckEVENT_Notify(eventObj, 0);
2998 }
2999
3000OnError:
3001 /* Return the status. */
3002 gcmkFOOTER();
3003 return status;
3004}
3005
3006/*******************************************************************************
3007**
3008** gckHARDWARE_QueryCommandBuffer
3009**
3010** Query the command buffer alignment and number of reserved bytes.
3011**
3012** INPUT:
3013**
3014** gckHARDWARE Harwdare
3015** Pointer to an gckHARDWARE object.
3016**
3017** OUTPUT:
3018**
3019** gctSIZE_T * Alignment
3020** Pointer to a variable receiving the alignment for each command.
3021**
3022** gctSIZE_T * ReservedHead
3023** Pointer to a variable receiving the number of reserved bytes at the
3024** head of each command buffer.
3025**
3026** gctSIZE_T * ReservedTail
3027** Pointer to a variable receiving the number of bytes reserved at the
3028** tail of each command buffer.
3029*/
3030gceSTATUS
3031gckHARDWARE_QueryCommandBuffer(
3032 IN gckHARDWARE Hardware,
3033 OUT gctUINT32 * Alignment,
3034 OUT gctUINT32 * ReservedHead,
3035 OUT gctUINT32 * ReservedTail
3036 )
3037{
3038 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
3039
3040 /* Verify the arguments. */
3041 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
3042
3043 if (Alignment != gcvNULL)
3044 {
3045 /* Align every 8 bytes. */
3046 *Alignment = 8;
3047 }
3048
3049 if (ReservedHead != gcvNULL)
3050 {
3051 /* Reserve space for SelectPipe(). */
3052 *ReservedHead = 32;
3053 }
3054
3055 if (ReservedTail != gcvNULL)
3056 {
3057 /* Reserve space for Link(). */
3058 *ReservedTail = 8;
3059 }
3060
3061 /* Success. */
3062 gcmkFOOTER_ARG("*Alignment=%lu *ReservedHead=%lu *ReservedTail=%lu",
3063 gcmOPT_VALUE(Alignment), gcmOPT_VALUE(ReservedHead),
3064 gcmOPT_VALUE(ReservedTail));
3065 return gcvSTATUS_OK;
3066}
3067
3068/*******************************************************************************
3069**
3070** gckHARDWARE_QuerySystemMemory
3071**
3072** Query the command buffer alignment and number of reserved bytes.
3073**
3074** INPUT:
3075**
3076** gckHARDWARE Harwdare
3077** Pointer to an gckHARDWARE object.
3078**
3079** OUTPUT:
3080**
3081** gctSIZE_T * SystemSize
3082** Pointer to a variable that receives the maximum size of the system
3083** memory.
3084**
3085** gctUINT32 * SystemBaseAddress
3086** Poinetr to a variable that receives the base address for system
3087** memory.
3088*/
3089gceSTATUS
3090gckHARDWARE_QuerySystemMemory(
3091 IN gckHARDWARE Hardware,
3092 OUT gctSIZE_T * SystemSize,
3093 OUT gctUINT32 * SystemBaseAddress
3094 )
3095{
3096 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
3097
3098 /* Verify the arguments. */
3099 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
3100
3101 if (SystemSize != gcvNULL)
3102 {
3103 /* Maximum system memory can be 2GB. */
3104 *SystemSize = 1U << 31;
3105 }
3106
3107 if (SystemBaseAddress != gcvNULL)
3108 {
3109 /* Set system memory base address. */
3110 *SystemBaseAddress = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)));
3111 }
3112
3113 /* Success. */
3114 gcmkFOOTER_ARG("*SystemSize=%lu *SystemBaseAddress=%lu",
3115 gcmOPT_VALUE(SystemSize), gcmOPT_VALUE(SystemBaseAddress));
3116 return gcvSTATUS_OK;
3117}
3118
3119
3120/*******************************************************************************
3121**
3122** gckHARDWARE_SetMMU
3123**
3124** Set the page table base address.
3125**
3126** INPUT:
3127**
3128** gckHARDWARE Harwdare
3129** Pointer to an gckHARDWARE object.
3130**
3131** gctPOINTER Logical
3132** Logical address of the page table.
3133**
3134** OUTPUT:
3135**
3136** Nothing.
3137*/
3138gceSTATUS
3139gckHARDWARE_SetMMU(
3140 IN gckHARDWARE Hardware,
3141 IN gctPOINTER Logical
3142 )
3143{
3144 gceSTATUS status;
3145 gctUINT32 address = 0;
3146 gctUINT32 idle;
3147 gctUINT32 timer = 0, delay = 1;
3148 gctPHYS_ADDR_T physical;
3149
3150 gcmkHEADER_ARG("Hardware=0x%x Logical=0x%x", Hardware, Logical);
3151
3152 /* Verify the arguments. */
3153 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
3154
3155 if (Hardware->mmuVersion == 0)
3156 {
3157 gcmkVERIFY_ARGUMENT(Logical != gcvNULL);
3158
3159 /* Convert the logical address into physical address. */
3160 gcmkONERROR(gckOS_GetPhysicalAddress(Hardware->os, Logical, &physical));
3161
3162 gcmkSAFECASTPHYSADDRT(address, physical);
3163
3164 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
3165 "Setting page table to 0x%08X",
3166 address);
3167
3168 /* Write the AQMemoryFePageTable register. */
3169 gcmkONERROR(
3170 gckOS_WriteRegisterEx(Hardware->os,
3171 Hardware->core,
3172 0x00400,
3173 address));
3174
3175 /* Write the AQMemoryRaPageTable register. */
3176 gcmkONERROR(
3177 gckOS_WriteRegisterEx(Hardware->os,
3178 Hardware->core,
3179 0x00410,
3180 address));
3181
3182 /* Write the AQMemoryTxPageTable register. */
3183 gcmkONERROR(
3184 gckOS_WriteRegisterEx(Hardware->os,
3185 Hardware->core,
3186 0x00404,
3187 address));
3188
3189
3190 /* Write the AQMemoryPePageTable register. */
3191 gcmkONERROR(
3192 gckOS_WriteRegisterEx(Hardware->os,
3193 Hardware->core,
3194 0x00408,
3195 address));
3196
3197 /* Write the AQMemoryPezPageTable register. */
3198 gcmkONERROR(
3199 gckOS_WriteRegisterEx(Hardware->os,
3200 Hardware->core,
3201 0x0040C,
3202 address));
3203 }
3204 else if (Hardware->enableMMU == gcvTRUE)
3205 {
3206 /* Prepared command sequence contains an END,
3207 ** so update lastEnd and store executeCount to END command.
3208 */
3209 gcsHARDWARE_FUNCTION *function = &Hardware->functions[gcvHARDWARE_FUNCTION_MMU];
3210 gctUINT32_PTR endLogical = (gctUINT32_PTR)function->endLogical;
3211
3212 Hardware->lastEnd = function->endAddress;
3213
3214 *(endLogical + 1) = Hardware->executeCount + 1;
3215
3216 /* Execute prepared command sequence. */
3217 gcmkONERROR(gckHARDWARE_Execute(
3218 Hardware,
3219 function->address,
3220 function->bytes
3221 ));
3222
3223#if gcdLINK_QUEUE_SIZE
3224 gckLINKQUEUE_Enqueue(
3225 &Hardware->linkQueue,
3226 function->address,
3227 function->address + function->bytes,
3228 0,
3229 0
3230 );
3231#endif
3232
3233 /* Wait until MMU configure finishes. */
3234 do
3235 {
3236 gckOS_Delay(Hardware->os, delay);
3237
3238 gcmkONERROR(gckOS_ReadRegisterEx(
3239 Hardware->os,
3240 Hardware->core,
3241 0x00004,
3242 &idle));
3243
3244 timer += delay;
3245 delay *= 2;
3246
3247#if gcdGPU_TIMEOUT
3248 if (timer >= Hardware->kernel->timeOut)
3249 {
3250 gckHARDWARE_DumpGPUState(Hardware);
3251 gckCOMMAND_DumpExecutingBuffer(Hardware->kernel->command);
3252
3253 /* Even if hardware is not reset correctly, let software
3254 ** continue to avoid software stuck. Software will timeout again
3255 ** and try to recover GPU in next timeout.
3256 */
3257 gcmkONERROR(gcvSTATUS_DEVICE);
3258 }
3259#endif
3260 }
3261 while (!(((((gctUINT32) (idle)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ));
3262
3263 /* Enable MMU. */
3264 gcmkONERROR(gckOS_WriteRegisterEx(
3265 Hardware->os,
3266 Hardware->core,
3267 0x0018C,
3268 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (gcvTRUE) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
3269 ));
3270 }
3271
3272 /* Return the status. */
3273 gcmkFOOTER_NO();
3274 return gcvSTATUS_OK;
3275
3276OnError:
3277 /* Return the status. */
3278 gcmkFOOTER();
3279 return status;
3280}
3281
3282/*******************************************************************************
3283**
3284** gckHARDWARE_FlushMMU
3285**
3286** Flush the page table.
3287**
3288** INPUT:
3289**
3290** gckHARDWARE Harwdare
3291** Pointer to an gckHARDWARE object.
3292**
3293** OUTPUT:
3294**
3295** Nothing.
3296*/
3297gceSTATUS
3298gckHARDWARE_FlushMMU(
3299 IN gckHARDWARE Hardware
3300 )
3301{
3302 gceSTATUS status;
3303 gckCOMMAND command;
3304 gctUINT32_PTR buffer;
3305 gctUINT32 bufferSize;
3306 gctPOINTER pointer = gcvNULL;
3307 gctUINT32 flushSize;
3308 gctUINT32 count;
3309 gctPHYS_ADDR_T physical;
3310 gctUINT32 address;
3311
3312 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
3313
3314 /* Verify the arguments. */
3315 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
3316
3317 /* Verify the gckCOMMAND object pointer. */
3318 command = Hardware->kernel->command;
3319
3320 /* Flush the memory controller. */
3321 if (Hardware->mmuVersion == 0)
3322 {
3323 gcmkONERROR(gckCOMMAND_Reserve(
3324 command, 8, &pointer, &bufferSize
3325 ));
3326
3327 buffer = (gctUINT32_PTR) pointer;
3328
3329 buffer[0]
3330 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3331 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E04) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3332 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3333
3334 buffer[1]
3335 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
3336 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))
3337 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)))
3338 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)))
3339 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
3340
3341 gcmkONERROR(gckCOMMAND_Execute(command, 8));
3342 }
3343 else
3344 {
3345 /* semaphore stall cmd size */
3346 gctUINT32 stCmds = gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_TEX_CACHE_FLUSH_FIX) ? 0 : 4;
3347
3348 flushSize = (stCmds + 18) * 4;
3349
3350 gcmkONERROR(gckCOMMAND_Reserve(
3351 command, flushSize, &pointer, &bufferSize
3352 ));
3353
3354 buffer = (gctUINT32_PTR) pointer;
3355
3356 count = ((gctUINT)bufferSize - flushSize + 7) >> 3;
3357
3358 gcmkONERROR(gckOS_GetPhysicalAddress(command->os, buffer, &physical));
3359
3360 gcmkSAFECASTPHYSADDRT(address, physical);
3361
3362 if (stCmds)
3363 {
3364 /* Arm the PE-FE Semaphore. */
3365 *buffer++
3366 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3367 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3368 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3369
3370 *buffer++
3371 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3372 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3373
3374 /* STALL FE until PE is done flushing. */
3375 *buffer++
3376 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
3377
3378 *buffer++
3379 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3380 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3381 }
3382
3383 /* Flush cache. */
3384 *buffer++
3385 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3386 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3387 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3388
3389 *buffer++
3390 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)))
3391 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))
3392 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)))
3393 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)))
3394 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6)));
3395
3396 /* Flush VTS in separate command */
3397 *buffer++
3398 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3399 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3400 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3401
3402 *buffer++
3403 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
3404
3405 /* Arm the PE-FE Semaphore. */
3406 *buffer++
3407 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3408 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3409 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3410
3411 *buffer++
3412 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3413 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3414
3415 /* STALL FE until PE is done flushing. */
3416 *buffer++
3417 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
3418
3419 *buffer++
3420 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3421 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3422
3423 /* LINK to next slot to flush FE FIFO. */
3424 *buffer++
3425 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3426 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (4) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3427
3428 *buffer++
3429 = address + (stCmds + 10) * gcmSIZEOF(gctUINT32);
3430
3431 /* Flush MMU cache. */
3432 *buffer++
3433 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3434 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0061) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3435 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3436
3437 *buffer++
3438 = (((((gctUINT32) (~0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) & ((((gctUINT32) (~0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))));
3439
3440 /* Arm the PE-FE Semaphore. */
3441 *buffer++
3442 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3443 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3444 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3445
3446 *buffer++
3447 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3448 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3449
3450 /* STALL FE until PE is done flushing. */
3451 *buffer++
3452 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
3453
3454 *buffer++
3455 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3456 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3457
3458 /* LINK to next slot to flush FE FIFO. */
3459 *buffer++
3460 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3461 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (count) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3462
3463 *buffer++
3464 = address + flushSize;
3465
3466 gcmkONERROR(gckCOMMAND_Execute(command, flushSize));
3467 }
3468
3469 /* Success. */
3470 gcmkFOOTER_NO();
3471 return gcvSTATUS_OK;
3472
3473OnError:
3474
3475 /* Return the status. */
3476 gcmkFOOTER();
3477 return status;
3478}
3479
3480gceSTATUS
3481gckHARDWARE_SetMMUStates(
3482 IN gckHARDWARE Hardware,
3483 IN gctPOINTER MtlbAddress,
3484 IN gceMMU_MODE Mode,
3485 IN gctPOINTER SafeAddress,
3486 IN gctPOINTER Logical,
3487 IN OUT gctUINT32 * Bytes
3488 )
3489{
3490 gceSTATUS status;
3491 gctUINT32 config, address;
3492 gctUINT32 extMtlb, extSafeAddrss, configEx = 0;
3493 gctPHYS_ADDR_T physical;
3494 gctUINT32_PTR buffer;
3495 gctBOOL ace;
3496 gctUINT32 reserveBytes = 16 + 4 * 4;
3497
3498 gctBOOL config2D;
3499
3500 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
3501
3502 /* Verify the arguments. */
3503 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
3504 gcmkVERIFY_ARGUMENT(Hardware->mmuVersion != 0);
3505
3506 ace = gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_ACE);
3507
3508 if (ace)
3509 {
3510 reserveBytes += 8;
3511 }
3512
3513 config2D = gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_PIPE_3D)
3514 && gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_PIPE_2D);
3515
3516 if (config2D)
3517 {
3518 reserveBytes +=
3519 /* Pipe Select. */
3520 4 * 4
3521 /* Configure MMU States. */
3522 + 4 * 4
3523 /* Semaphore stall */
3524 + 4 * 8;
3525
3526 if (ace)
3527 {
3528 reserveBytes += 8;
3529 }
3530 }
3531
3532 /* Convert logical address into physical address. */
3533 gcmkONERROR(
3534 gckOS_GetPhysicalAddress(Hardware->os, MtlbAddress, &physical));
3535
3536 config = (gctUINT32)(physical & 0xFFFFFFFF);
3537 extMtlb = (gctUINT32)(physical >> 32);
3538
3539 gcmkONERROR(
3540 gckOS_GetPhysicalAddress(Hardware->os, SafeAddress, &physical));
3541
3542 address = (gctUINT32)(physical & 0xFFFFFFFF);
3543 extSafeAddrss = (gctUINT32)(physical >> 32);
3544
3545 if (address & 0x3F)
3546 {
3547 gcmkONERROR(gcvSTATUS_NOT_ALIGNED);
3548 }
3549
3550 switch (Mode)
3551 {
3552 case gcvMMU_MODE_1K:
3553 if (config & 0x3FF)
3554 {
3555 gcmkONERROR(gcvSTATUS_NOT_ALIGNED);
3556 }
3557
3558 config |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
3559
3560 break;
3561
3562 case gcvMMU_MODE_4K:
3563 if (config & 0xFFF)
3564 {
3565 gcmkONERROR(gcvSTATUS_NOT_ALIGNED);
3566 }
3567
3568 config |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
3569
3570 break;
3571
3572 default:
3573 gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
3574 }
3575
3576 if (ace)
3577 {
3578 configEx = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (extSafeAddrss) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0)))
3579 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (extMtlb) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)));
3580 }
3581
3582 if (Logical != gcvNULL)
3583 {
3584 buffer = Logical;
3585
3586 *buffer++
3587 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3588 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0061) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3589 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3590
3591 *buffer++ = config;
3592
3593 *buffer++
3594 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3595 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0060) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3596 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3597
3598 *buffer++ = address;
3599
3600 if (ace)
3601 {
3602 *buffer++
3603 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3604 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0068) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3605 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3606
3607 *buffer++
3608 = configEx;
3609 }
3610
3611 do{*buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))); *buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))); *buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))); *buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));} while(0);;
3612
3613 if (config2D)
3614 {
3615 /* LoadState(AQPipeSelect, 1), pipe. */
3616 *buffer++
3617 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3618 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3619 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3620
3621 *buffer++ = 0x1;
3622
3623 *buffer++
3624 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3625 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0061) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3626 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3627
3628 *buffer++ = config;
3629
3630 *buffer++
3631 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3632 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0060) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3633 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3634
3635 *buffer++ = address;
3636
3637 if (ace)
3638 {
3639 *buffer++
3640 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3641 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0068) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3642 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3643
3644 *buffer++
3645 = configEx;
3646 }
3647
3648 do{*buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))); *buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))); *buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))); *buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));} while(0);;
3649
3650 /* LoadState(AQPipeSelect, 1), pipe. */
3651 *buffer++
3652 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3653 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E00) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3654 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3655
3656 *buffer++ = 0x0;
3657
3658 do{*buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))); *buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))); *buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))); *buffer++ = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));} while(0);;
3659 }
3660
3661 }
3662
3663 if (Bytes != gcvNULL)
3664 {
3665 *Bytes = reserveBytes;
3666 }
3667
3668 /* Return the status. */
3669 gcmkFOOTER_NO();
3670 return status;
3671
3672OnError:
3673 /* Return the status. */
3674 gcmkFOOTER();
3675 return status;
3676}
3677
3678#if gcdPROCESS_ADDRESS_SPACE
3679/*******************************************************************************
3680**
3681** gckHARDWARE_ConfigMMU
3682**
3683** Append a MMU Configuration command sequence at the specified location in the command
3684** queue. That command sequence consists of mmu configuration, LINK and WAIT/LINK.
3685** LINK is fetched and paresed with new mmu configuration.
3686**
3687** If MMU Configuration is not changed between commit, change last WAIT/LINK to
3688** link to ENTRY.
3689**
3690** -+-----------+-----------+-----------------------------------------
3691** | WAIT/LINK | WAIT/LINK |
3692** -+-----------+-----------+-----------------------------------------
3693** | /|\
3694** \|/ |
3695** +--------------------+
3696** | ENTRY | ... | LINK |
3697** +--------------------+
3698**
3699** If MMU Configuration is changed between commit, change last WAIT/LINK to
3700** link to MMU CONFIGURATION command sequence, and there are an EVNET and
3701** an END at the end of this command sequence, when interrupt handler
3702** receives this event, it will start FE at ENTRY to continue the command
3703** buffer execution.
3704**
3705** -+-----------+-------------------+---------+---------+-----------+--
3706** | WAIT/LINK | MMU CONFIGURATION | EVENT | END | WAIT/LINK |
3707** -+-----------+-------------------+---------+---------+-----------+--
3708** | /|\ /|\
3709** +-------------+ |
3710** +--------------------+
3711** | ENTRY | ... | LINK |
3712** +--------------------+
3713** INPUT:
3714**
3715** gckHARDWARE Hardware
3716** Pointer to an gckHARDWARE object.
3717**
3718** gctPOINTER Logical
3719** Pointer to the current location inside the command queue to append
3720** command sequence at or gcvNULL just to query the size of the
3721** command sequence.
3722**
3723** gctPOINTER MtlbLogical
3724** Pointer to the current Master TLB.
3725**
3726** gctUINT32 Offset
3727** Offset into command buffer required for alignment.
3728**
3729** gctSIZE_T * Bytes
3730** Pointer to the number of bytes available for the command
3731** sequence. If 'Logical' is gcvNULL, this argument will be ignored.
3732**
3733** OUTPUT:
3734**
3735** gctSIZE_T * Bytes
3736** Pointer to a variable that will receive the number of bytes required
3737** by the command sequence. If 'Bytes' is gcvNULL, nothing will
3738** be returned.
3739**
3740** gctUINT32 * WaitLinkOffset
3741** Pointer to a variable that will receive the offset of the WAIT/LINK command
3742** from the specified logcial pointer.
3743** If 'WaitLinkOffset' is gcvNULL nothing will be returned.
3744**
3745** gctSIZE_T * WaitLinkBytes
3746** Pointer to a variable that will receive the number of bytes used by
3747** the WAIT command.
3748** If 'WaitLinkBytes' is gcvNULL nothing will be returned.
3749*/
3750gceSTATUS
3751gckHARDWARE_ConfigMMU(
3752 IN gckHARDWARE Hardware,
3753 IN gctPOINTER Logical,
3754 IN gctPOINTER MtlbLogical,
3755 IN gctUINT32 Offset,
3756 IN OUT gctSIZE_T * Bytes,
3757 OUT gctSIZE_T * WaitLinkOffset,
3758 OUT gctSIZE_T * WaitLinkBytes
3759 )
3760{
3761 gceSTATUS status;
3762 gctSIZE_T bytes, bytesAligned;
3763 gctUINT32 config;
3764 gctUINT32_PTR buffer = (gctUINT32_PTR) Logical;
3765 gctUINT32 physical;
3766 gctUINT32 event;
3767 gctSIZE_T stCmds; /* semaphore stall cmd size */;
3768
3769 gcmkHEADER_ARG("Hardware=0x%08X Logical=0x%08x MtlbLogical=0x%08X",
3770 Hardware, Logical, MtlbLogical);
3771
3772 stCmds = gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_TEX_CACHE_FLUSH_FIX) ? 0 : 4;
3773
3774 bytes
3775 /* Semaphore stall states. */
3776 = stCmds * 4
3777 /* Flush cache states. */
3778 + 20 * 4
3779 /* MMU configuration states. */
3780 + 6 * 4
3781 /* EVENT. */
3782 + 2 * 4
3783 /* END. */
3784 + 2 * 4
3785 /* WAIT/LINK. */
3786 + 4 * 4;
3787
3788 /* Compute number of bytes required. */
3789 bytesAligned = gcmALIGN(Offset + bytes, 8) - Offset;
3790
3791 if (buffer != gcvNULL)
3792 {
3793 if (MtlbLogical == gcvNULL)
3794 {
3795 gcmkONERROR(gcvSTATUS_INVALID_ARGUMENT);
3796 }
3797
3798 /* Get physical address of this command buffer segment. */
3799 gcmkONERROR(gckOS_GetPhysicalAddress(Hardware->os, buffer, &physical));
3800
3801 /* Get physical address of Master TLB. */
3802 gcmkONERROR(gckOS_GetPhysicalAddress(Hardware->os, MtlbLogical, &config));
3803
3804 config |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
3805 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
3806
3807 if (stCmds)
3808 {
3809 /* Arm the PE-FE Semaphore. */
3810 *buffer++
3811 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3812 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3813 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3814
3815 *buffer++
3816 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3817 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3818
3819 /* STALL FE until PE is done flushing. */
3820 *buffer++
3821 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
3822
3823 *buffer++
3824 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3825 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3826 }
3827
3828 /* Flush cache. */
3829 *buffer++
3830 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3831 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3832 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3833
3834 *buffer++
3835 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)))
3836 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))
3837 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
3838 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)))
3839 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)))
3840 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6)));
3841
3842 /* Flush VTS in separate command */
3843 *buffer++
3844 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3845 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3846 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3847
3848 *buffer++
3849 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
3850
3851 /* Flush tile status cache. */
3852 *buffer++
3853 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3854 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3855 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0594) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3856
3857 *buffer++
3858 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
3859
3860 /* Arm the PE-FE Semaphore. */
3861 *buffer++
3862 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3863 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3864 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3865
3866 *buffer++
3867 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3868 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3869
3870 /* STALL FE until PE is done flushing. */
3871 *buffer++
3872 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
3873
3874 *buffer++
3875 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3876 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3877
3878 /* LINK to next slot to flush FE FIFO. */
3879 *buffer++
3880 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3881 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (4) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3882
3883 *buffer++
3884 = physical + (stCmds + 12) * gcmSIZEOF(gctUINT32);
3885
3886 /* Configure MMU. */
3887 *buffer++
3888 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3889 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0061) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3890 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3891
3892 *buffer++
3893 = (((((gctUINT32) (~0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) & ((((gctUINT32) (~0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))) | (((gctUINT32) (0x0 & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))));
3894
3895 /* Arm the PE-FE Semaphore. */
3896 *buffer++
3897 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3898 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3899 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3900
3901 *buffer++
3902 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3903 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3904
3905 /* STALL FE until PE is done flushing. */
3906 *buffer++
3907 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
3908
3909 *buffer++
3910 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3911 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3912
3913 /* LINK to next slot to flush FE FIFO. */
3914 *buffer++
3915 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x08 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3916 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3917
3918 *buffer++
3919 = physical + (stCmds + 20) * 4;
3920
3921 *buffer++
3922 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3923 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0061) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3924 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3925
3926 *buffer++
3927 = config;
3928
3929 /* Arm the PE-FE Semaphore. */
3930 *buffer++
3931 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3932 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
3933 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
3934
3935 *buffer++
3936 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3937 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3938
3939 /* STALL FE until PE is done flushing. */
3940 *buffer++
3941 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
3942
3943 *buffer++
3944 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
3945 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
3946
3947 /* Event 29. */
3948 *buffer++
3949 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
3950 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E01) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
3951 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
3952
3953 event = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6)));
3954 event = ((((gctUINT32) (event)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) ((gctUINT32) (29) & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)));
3955
3956 *buffer++
3957 = event;
3958
3959 /* Append END. */
3960 *buffer++
3961 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x02 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
3962 }
3963
3964 if (Bytes != gcvNULL)
3965 {
3966 *Bytes = bytesAligned;
3967 }
3968
3969 if (WaitLinkOffset != gcvNULL)
3970 {
3971 *WaitLinkOffset = bytes - 4 * 4;
3972 }
3973
3974 if (WaitLinkBytes != gcvNULL)
3975 {
3976 *WaitLinkBytes = 4 * 4;
3977 }
3978
3979 gcmkFOOTER_NO();
3980 return gcvSTATUS_OK;
3981
3982OnError:
3983 gcmkFOOTER();
3984 return status;
3985}
3986#endif
3987
3988/*******************************************************************************
3989**
3990** gckHARDWARE_BuildVirtualAddress
3991**
3992** Build a virtual address.
3993**
3994** INPUT:
3995**
3996** gckHARDWARE Harwdare
3997** Pointer to an gckHARDWARE object.
3998**
3999** gctUINT32 Index
4000** Index into page table.
4001**
4002** gctUINT32 Offset
4003** Offset into page.
4004**
4005** OUTPUT:
4006**
4007** gctUINT32 * Address
4008** Pointer to a variable receiving te hardware address.
4009*/
4010gceSTATUS
4011gckHARDWARE_BuildVirtualAddress(
4012 IN gckHARDWARE Hardware,
4013 IN gctUINT32 Index,
4014 IN gctUINT32 Offset,
4015 OUT gctUINT32 * Address
4016 )
4017{
4018 gcmkHEADER_ARG("Hardware=0x%x Index=%u Offset=%u", Hardware, Index, Offset);
4019
4020 /* Verify the arguments. */
4021 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4022 gcmkVERIFY_ARGUMENT(Address != gcvNULL);
4023
4024 /* Build virtual address. */
4025 *Address = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1))))))) << (0 ? 31:31)))
4026 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0))) | (((gctUINT32) ((gctUINT32) (Offset | (Index << 12)) & ((gctUINT32) ((((1 ? 30:0) - (0 ? 30:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 30:0) - (0 ? 30:0) + 1))))))) << (0 ? 30:0)));
4027
4028 /* Success. */
4029 gcmkFOOTER_ARG("*Address=0x%08x", *Address);
4030 return gcvSTATUS_OK;
4031}
4032
4033gceSTATUS
4034gckHARDWARE_GetIdle(
4035 IN gckHARDWARE Hardware,
4036 IN gctBOOL Wait,
4037 OUT gctUINT32 * Data
4038 )
4039{
4040 gceSTATUS status;
4041 gctUINT32 idle = 0;
4042 gctINT retry, poll, pollCount;
4043 gctUINT32 address;
4044
4045 gcmkHEADER_ARG("Hardware=0x%x Wait=%d", Hardware, Wait);
4046
4047 /* Verify the arguments. */
4048 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4049 gcmkVERIFY_ARGUMENT(Data != gcvNULL);
4050
4051
4052 /* If we have to wait, try 100 polls per millisecond. */
4053 pollCount = Wait ? 100 : 1;
4054
4055 /* At most, try for 1 second. */
4056 for (retry = 0; retry < 1000; ++retry)
4057 {
4058 /* If we have to wait, try 100 polls per millisecond. */
4059 for (poll = pollCount; poll > 0; --poll)
4060 {
4061 /* Read register. */
4062 gcmkONERROR(
4063 gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00004, &idle));
4064
4065 /* Read the current FE address. */
4066 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
4067 Hardware->core,
4068 0x00664,
4069 &address));
4070
4071
4072 /* See if we have to wait for FE idle. */
4073 if (_IsGPUIdle(idle)
4074 && (address == Hardware->lastEnd + 8)
4075 )
4076 {
4077 /* FE is idle. */
4078 break;
4079 }
4080 }
4081
4082 /* Check if we need to wait for FE and FE is busy. */
4083 if (Wait && !_IsGPUIdle(idle))
4084 {
4085 /* Wait a little. */
4086 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
4087 "%s: Waiting for idle: 0x%08X",
4088 __FUNCTION__, idle);
4089
4090 gcmkVERIFY_OK(gckOS_Delay(Hardware->os, 1));
4091 }
4092 else
4093 {
4094 break;
4095 }
4096 }
4097
4098 /* Return idle to caller. */
4099 *Data = idle;
4100
4101#if defined(EMULATOR)
4102 /* Wait a little while until CModel FE gets END.
4103 * END is supposed to be appended by caller.
4104 */
4105 gckOS_Delay(gcvNULL, 100);
4106#endif
4107
4108 /* Success. */
4109 gcmkFOOTER_ARG("*Data=0x%08x", *Data);
4110 return gcvSTATUS_OK;
4111
4112OnError:
4113 /* Return the status. */
4114 gcmkFOOTER();
4115 return status;
4116}
4117
4118/* Flush the caches. */
4119gceSTATUS
4120gckHARDWARE_Flush(
4121 IN gckHARDWARE Hardware,
4122 IN gceKERNEL_FLUSH Flush,
4123 IN gctPOINTER Logical,
4124 IN OUT gctUINT32 * Bytes
4125 )
4126{
4127 gctUINT32 pipe;
4128 gctUINT32 flush = 0;
4129 gctUINT32 flushVST = 0;
4130 gctBOOL flushTileStatus;
4131 gctUINT32_PTR logical = (gctUINT32_PTR) Logical;
4132 gceSTATUS status;
4133
4134 gcmkHEADER_ARG("Hardware=0x%x Flush=0x%x Logical=0x%x *Bytes=%lu",
4135 Hardware, Flush, Logical, gcmOPT_VALUE(Bytes));
4136
4137 /* Verify the arguments. */
4138 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4139
4140 /* Get current pipe. */
4141 pipe = Hardware->kernel->command->pipeSelect;
4142
4143 /* Flush tile status cache. */
4144 flushTileStatus = Flush & gcvFLUSH_TILE_STATUS;
4145
4146 /* Flush 3D color cache. */
4147 if ((Flush & gcvFLUSH_COLOR) && (pipe == 0x0))
4148 {
4149 flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)));
4150 }
4151
4152 /* Flush 3D depth cache. */
4153 if ((Flush & gcvFLUSH_DEPTH) && (pipe == 0x0))
4154 {
4155 flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
4156 }
4157
4158 /* Flush 3D texture cache. */
4159 if ((Flush & gcvFLUSH_TEXTURE) && (pipe == 0x0))
4160 {
4161 flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)));
4162 flushVST = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)));
4163 }
4164
4165 /* Flush 2D cache. */
4166 if ((Flush & gcvFLUSH_2D) && (pipe == 0x1))
4167 {
4168 flush |= ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)));
4169 }
4170
4171
4172 /* See if there is a valid flush. */
4173 if ((flush == 0) && (flushTileStatus == gcvFALSE))
4174 {
4175 if (Bytes != gcvNULL)
4176 {
4177 /* No bytes required. */
4178 *Bytes = 0;
4179 }
4180 }
4181 else
4182 {
4183 gctUINT32 reserveBytes = 0;
4184 gctBOOL txCacheFix = gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_TEX_CACHE_FLUSH_FIX)
4185 ? gcvTRUE : gcvFALSE;
4186
4187 /* Determine reserve bytes. */
4188 if (!txCacheFix)
4189 {
4190 /* Semaphore/Stall */
4191 reserveBytes += 4 * gcmSIZEOF(gctUINT32);
4192 }
4193
4194 if (flush)
4195 {
4196 reserveBytes += 2 * gcmSIZEOF(gctUINT32);
4197 }
4198
4199 if (flushVST)
4200 {
4201 reserveBytes += 2 * gcmSIZEOF(gctUINT32);
4202 }
4203
4204 if (flushTileStatus)
4205 {
4206 reserveBytes += 2 * gcmSIZEOF(gctUINT32);
4207 }
4208
4209 /* Semaphore/Stall */
4210 reserveBytes += 4 * gcmSIZEOF(gctUINT32);
4211
4212 /* Copy to command queue. */
4213 if (Logical != gcvNULL)
4214 {
4215 if (*Bytes < reserveBytes)
4216 {
4217 /* Command queue too small. */
4218 gcmkONERROR(gcvSTATUS_BUFFER_TOO_SMALL);
4219 }
4220
4221 if (!txCacheFix)
4222 {
4223 /* Semaphore. */
4224 *logical++
4225 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
4226 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
4227 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
4228
4229 *logical++
4230 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
4231 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
4232
4233 /* Stall. */
4234 *logical++
4235 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
4236
4237 *logical++
4238 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
4239 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
4240 }
4241
4242 if (flush)
4243 {
4244 /* Append LOAD_STATE to AQFlush. */
4245 *logical++
4246 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
4247 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
4248 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
4249
4250 *logical++ = flush;
4251
4252 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, "0x%x: FLUSH 0x%x", logical - 1, flush);
4253 }
4254
4255 if (flushVST)
4256 {
4257 /* Append LOAD_STATE to AQFlush. */
4258 *logical++
4259 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
4260 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E03) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
4261 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
4262
4263 *logical++ = flushVST;
4264
4265 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, "0x%x: FLUSH 0x%x", logical - 1, flush);
4266 }
4267
4268 if (flushTileStatus)
4269 {
4270 *logical++
4271 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
4272 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0594) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)))
4273 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)));
4274
4275 *logical++
4276 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) (0x1 & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
4277
4278 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
4279 "0x%x: FLUSH TILE STATUS 0x%x", logical - 1, logical[-1]);
4280 }
4281
4282 /* Semaphore. */
4283 *logical++
4284 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)))
4285 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 25:16) - (0 ? 25:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 25:16) - (0 ? 25:16) + 1))))))) << (0 ? 25:16)))
4286 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0))) | (((gctUINT32) ((gctUINT32) (0x0E02) & ((gctUINT32) ((((1 ? 15:0) - (0 ? 15:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:0) - (0 ? 15:0) + 1))))))) << (0 ? 15:0)));
4287
4288 *logical++
4289 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
4290 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
4291
4292 /* Stall. */
4293 *logical++
4294 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27))) | (((gctUINT32) (0x09 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))) << (0 ? 31:27)));
4295
4296 *logical++
4297 = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0))) | (((gctUINT32) (0x01 & ((gctUINT32) ((((1 ? 4:0) - (0 ? 4:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:0) - (0 ? 4:0) + 1))))))) << (0 ? 4:0)))
4298 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8))) | (((gctUINT32) (0x07 & ((gctUINT32) ((((1 ? 12:8) - (0 ? 12:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:8) - (0 ? 12:8) + 1))))))) << (0 ? 12:8)));
4299 }
4300
4301 if (Bytes != gcvNULL)
4302 {
4303 /* bytes required. */
4304 *Bytes = reserveBytes;
4305 }
4306 }
4307
4308 /* Success. */
4309 gcmkFOOTER_ARG("*Bytes=%lu", gcmOPT_VALUE(Bytes));
4310 return gcvSTATUS_OK;
4311
4312OnError:
4313 /* Return the status. */
4314 gcmkFOOTER();
4315 return status;
4316}
4317
4318gceSTATUS
4319gckHARDWARE_SetFastClear(
4320 IN gckHARDWARE Hardware,
4321 IN gctINT Enable,
4322 IN gctINT Compression
4323 )
4324{
4325 return gcvSTATUS_OK;
4326}
4327
4328typedef enum
4329{
4330 gcvPOWER_FLAG_INITIALIZE = 1 << 0,
4331 gcvPOWER_FLAG_STALL = 1 << 1,
4332 gcvPOWER_FLAG_STOP = 1 << 2,
4333 gcvPOWER_FLAG_START = 1 << 3,
4334 gcvPOWER_FLAG_RELEASE = 1 << 4,
4335 gcvPOWER_FLAG_DELAY = 1 << 5,
4336 gcvPOWER_FLAG_SAVE = 1 << 6,
4337 gcvPOWER_FLAG_ACQUIRE = 1 << 7,
4338 gcvPOWER_FLAG_POWER_OFF = 1 << 8,
4339 gcvPOWER_FLAG_CLOCK_OFF = 1 << 9,
4340 gcvPOWER_FLAG_CLOCK_ON = 1 << 10,
4341}
4342gcePOWER_FLAGS;
4343
4344#if gcmIS_DEBUG(gcdDEBUG_TRACE)
4345static gctCONST_STRING
4346_PowerEnum(gceCHIPPOWERSTATE State)
4347{
4348 const gctCONST_STRING states[] =
4349 {
4350 gcmSTRING(gcvPOWER_ON),
4351 gcmSTRING(gcvPOWER_OFF),
4352 gcmSTRING(gcvPOWER_IDLE),
4353 gcmSTRING(gcvPOWER_SUSPEND),
4354 gcmSTRING(gcvPOWER_SUSPEND_ATPOWERON),
4355 gcmSTRING(gcvPOWER_OFF_ATPOWERON),
4356 gcmSTRING(gcvPOWER_IDLE_BROADCAST),
4357 gcmSTRING(gcvPOWER_SUSPEND_BROADCAST),
4358 gcmSTRING(gcvPOWER_OFF_BROADCAST),
4359 gcmSTRING(gcvPOWER_OFF_RECOVERY),
4360 gcmSTRING(gcvPOWER_OFF_TIMEOUT),
4361 gcmSTRING(gcvPOWER_ON_AUTO)
4362 };
4363
4364 if ((State >= gcvPOWER_ON) && (State <= gcvPOWER_ON_AUTO))
4365 {
4366 return states[State - gcvPOWER_ON];
4367 }
4368
4369 return "unknown";
4370}
4371#endif
4372
4373/*******************************************************************************
4374**
4375** gckHARDWARE_SetPowerManagementState
4376**
4377** Set GPU to a specified power state.
4378**
4379** INPUT:
4380**
4381** gckHARDWARE Harwdare
4382** Pointer to an gckHARDWARE object.
4383**
4384** gceCHIPPOWERSTATE State
4385** Power State.
4386**
4387*/
4388gceSTATUS
4389gckHARDWARE_SetPowerManagementState(
4390 IN gckHARDWARE Hardware,
4391 IN gceCHIPPOWERSTATE State
4392 )
4393{
4394 gceSTATUS status;
4395 gckCOMMAND command = gcvNULL;
4396 gckOS os;
4397 gctUINT flag, clock;
4398 gctPOINTER buffer;
4399 gctUINT32 bytes, requested;
4400 gctBOOL acquired = gcvFALSE;
4401 gctBOOL mutexAcquired = gcvFALSE;
4402 gctBOOL stall = gcvTRUE;
4403 gctBOOL broadcast = gcvFALSE;
4404#if gcdPOWEROFF_TIMEOUT
4405 gctBOOL timeout = gcvFALSE;
4406 gctBOOL isAfter = gcvFALSE;
4407 gctUINT32 currentTime;
4408#endif
4409 gctUINT32 process, thread;
4410 gctBOOL commitEntered = gcvFALSE;
4411 gctBOOL commandStarted = gcvFALSE;
4412 gctBOOL isrStarted = gcvFALSE;
4413
4414#if gcdENABLE_PROFILING
4415 gctUINT64 time, freq, mutexTime, onTime, stallTime, stopTime, delayTime,
4416 initTime, offTime, startTime, totalTime;
4417#endif
4418 gctBOOL global = gcvFALSE;
4419 gctBOOL globalAcquired = gcvFALSE;
4420 gctBOOL configMmu = gcvFALSE;
4421
4422 /* State transition flags. */
4423 static const gctUINT flags[4][4] =
4424 {
4425 /* gcvPOWER_ON */
4426 { /* ON */ 0,
4427 /* OFF */ gcvPOWER_FLAG_ACQUIRE |
4428 gcvPOWER_FLAG_STALL |
4429 gcvPOWER_FLAG_STOP |
4430 gcvPOWER_FLAG_POWER_OFF |
4431 gcvPOWER_FLAG_CLOCK_OFF,
4432 /* IDLE */ gcvPOWER_FLAG_ACQUIRE |
4433 gcvPOWER_FLAG_STALL,
4434 /* SUSPEND */ gcvPOWER_FLAG_ACQUIRE |
4435 gcvPOWER_FLAG_STALL |
4436 gcvPOWER_FLAG_STOP |
4437 gcvPOWER_FLAG_CLOCK_OFF,
4438 },
4439
4440 /* gcvPOWER_OFF */
4441 { /* ON */ gcvPOWER_FLAG_INITIALIZE |
4442 gcvPOWER_FLAG_START |
4443 gcvPOWER_FLAG_RELEASE |
4444 gcvPOWER_FLAG_DELAY,
4445 /* OFF */ 0,
4446 /* IDLE */ gcvPOWER_FLAG_INITIALIZE |
4447 gcvPOWER_FLAG_START |
4448 gcvPOWER_FLAG_DELAY,
4449 /* SUSPEND */ gcvPOWER_FLAG_INITIALIZE |
4450 gcvPOWER_FLAG_CLOCK_OFF,
4451 },
4452
4453 /* gcvPOWER_IDLE */
4454 { /* ON */ gcvPOWER_FLAG_RELEASE,
4455 /* OFF */ gcvPOWER_FLAG_STOP |
4456 gcvPOWER_FLAG_POWER_OFF |
4457 gcvPOWER_FLAG_CLOCK_OFF,
4458 /* IDLE */ 0,
4459 /* SUSPEND */ gcvPOWER_FLAG_STOP |
4460 gcvPOWER_FLAG_CLOCK_OFF,
4461 },
4462
4463 /* gcvPOWER_SUSPEND */
4464 { /* ON */ gcvPOWER_FLAG_START |
4465 gcvPOWER_FLAG_RELEASE |
4466 gcvPOWER_FLAG_DELAY |
4467 gcvPOWER_FLAG_CLOCK_ON,
4468 /* OFF */ gcvPOWER_FLAG_SAVE |
4469 gcvPOWER_FLAG_POWER_OFF |
4470 gcvPOWER_FLAG_CLOCK_OFF,
4471 /* IDLE */ gcvPOWER_FLAG_START |
4472 gcvPOWER_FLAG_DELAY |
4473 gcvPOWER_FLAG_CLOCK_ON,
4474 /* SUSPEND */ 0,
4475 },
4476 };
4477
4478 /* Clocks. */
4479 static const gctUINT clocks[4] =
4480 {
4481 /* gcvPOWER_ON */
4482 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) |
4483 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) |
4484 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (64) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) |
4485 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))),
4486
4487 /* gcvPOWER_OFF */
4488 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) |
4489 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) |
4490 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) |
4491 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))),
4492
4493 /* gcvPOWER_IDLE */
4494 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) |
4495 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) |
4496 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) |
4497 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))),
4498
4499 /* gcvPOWER_SUSPEND */
4500 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) |
4501 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) |
4502 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) |
4503 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))),
4504 };
4505
4506 gcmkHEADER_ARG("Hardware=0x%x State=%d", Hardware, State);
4507#if gcmIS_DEBUG(gcdDEBUG_TRACE)
4508 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
4509 "Switching to power state %d(%s)",
4510 State, _PowerEnum(State));
4511#endif
4512
4513 /* Verify the arguments. */
4514 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
4515
4516 /* Get the gckOS object pointer. */
4517 os = Hardware->os;
4518 gcmkVERIFY_OBJECT(os, gcvOBJ_OS);
4519
4520 /* Get the gckCOMMAND object pointer. */
4521 gcmkVERIFY_OBJECT(Hardware->kernel, gcvOBJ_KERNEL);
4522 command = Hardware->kernel->command;
4523 gcmkVERIFY_OBJECT(command, gcvOBJ_COMMAND);
4524
4525 /* Start profiler. */
4526 gcmkPROFILE_INIT(freq, time);
4527
4528 /* Convert the broadcast power state. */
4529 switch (State)
4530 {
4531 case gcvPOWER_SUSPEND_ATPOWERON:
4532 /* Convert to SUSPEND and don't wait for STALL. */
4533 State = gcvPOWER_SUSPEND;
4534 stall = gcvFALSE;
4535 break;
4536
4537 case gcvPOWER_OFF_ATPOWERON:
4538 /* Convert to OFF and don't wait for STALL. */
4539 State = gcvPOWER_OFF;
4540 stall = gcvFALSE;
4541 break;
4542
4543 case gcvPOWER_IDLE_BROADCAST:
4544 /* Convert to IDLE and note we are inside broadcast. */
4545 State = gcvPOWER_IDLE;
4546 broadcast = gcvTRUE;
4547 break;
4548
4549 case gcvPOWER_SUSPEND_BROADCAST:
4550 /* Convert to SUSPEND and note we are inside broadcast. */
4551 State = gcvPOWER_SUSPEND;
4552 broadcast = gcvTRUE;
4553 break;
4554
4555 case gcvPOWER_OFF_BROADCAST:
4556 /* Convert to OFF and note we are inside broadcast. */
4557 State = gcvPOWER_OFF;
4558 broadcast = gcvTRUE;
4559 break;
4560
4561 case gcvPOWER_OFF_RECOVERY:
4562 /* Convert to OFF and note we are inside recovery. */
4563 State = gcvPOWER_OFF;
4564 stall = gcvFALSE;
4565 broadcast = gcvTRUE;
4566 break;
4567
4568 case gcvPOWER_ON_AUTO:
4569 /* Convert to ON and note we are inside recovery. */
4570 State = gcvPOWER_ON;
4571 break;
4572
4573 case gcvPOWER_ON:
4574 case gcvPOWER_IDLE:
4575 case gcvPOWER_SUSPEND:
4576 case gcvPOWER_OFF:
4577 /* Mark as global power management. */
4578 global = gcvTRUE;
4579 break;
4580
4581#if gcdPOWEROFF_TIMEOUT
4582 case gcvPOWER_OFF_TIMEOUT:
4583 /* Convert to OFF and note we are inside broadcast. */
4584 State = gcvPOWER_OFF;
4585 broadcast = gcvTRUE;
4586 /* Check time out */
4587 timeout = gcvTRUE;
4588 break;
4589#endif
4590
4591 default:
4592 break;
4593 }
4594
4595 if (Hardware->powerManagement == gcvFALSE
4596 && State != gcvPOWER_ON
4597 )
4598 {
4599 gcmkFOOTER_NO();
4600 return gcvSTATUS_OK;
4601 }
4602
4603 /* Get current process and thread IDs. */
4604 gcmkONERROR(gckOS_GetProcessID(&process));
4605 gcmkONERROR(gckOS_GetThreadID(&thread));
4606
4607 if (broadcast)
4608 {
4609 /* Try to acquire the power mutex. */
4610 status = gckOS_AcquireMutex(os, Hardware->powerMutex, 0);
4611
4612 if (status == gcvSTATUS_TIMEOUT)
4613 {
4614 /* Check if we already own this mutex. */
4615 if ((Hardware->powerProcess == process)
4616 && (Hardware->powerThread == thread)
4617 )
4618 {
4619 /* Bail out on recursive power management. */
4620 gcmkFOOTER_NO();
4621 return gcvSTATUS_OK;
4622 }
4623 else if (State != gcvPOWER_ON)
4624 {
4625 /* Called from IST,
4626 ** so waiting here will cause deadlock,
4627 ** if lock holder call gckCOMMAND_Stall() */
4628 status = gcvSTATUS_INVALID_REQUEST;
4629 goto OnError;
4630 }
4631 else
4632 {
4633 /* Acquire the power mutex. */
4634 gcmkONERROR(gckOS_AcquireMutex(os,
4635 Hardware->powerMutex,
4636 gcvINFINITE));
4637 }
4638 }
4639 }
4640 else
4641 {
4642 /* Acquire the power mutex. */
4643 gcmkONERROR(gckOS_AcquireMutex(os, Hardware->powerMutex, gcvINFINITE));
4644 }
4645
4646 /* Get time until mtuex acquired. */
4647 gcmkPROFILE_QUERY(time, mutexTime);
4648
4649 Hardware->powerProcess = process;
4650 Hardware->powerThread = thread;
4651 mutexAcquired = gcvTRUE;
4652
4653 /* Grab control flags and clock. */
4654 flag = flags[Hardware->chipPowerState][State];
4655 clock = clocks[State];
4656
4657#if gcdENABLE_FSCALE_VAL_ADJUST
4658 if (State == gcvPOWER_ON)
4659 {
4660 clock = ((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (Hardware->powerOnFscaleVal) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2)));
4661 }
4662#endif
4663
4664 if (State == gcvPOWER_SUSPEND && Hardware->chipPowerState == gcvPOWER_OFF && broadcast)
4665 {
4666#if gcdPOWER_SUSPEND_WHEN_IDLE
4667 /* Do nothing */
4668
4669 /* Release the power mutex. */
4670 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
4671
4672 gcmkFOOTER_NO();
4673 return gcvSTATUS_OK;
4674#else
4675 /* Clock should be on when switch power from off to suspend */
4676 clock = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) |
4677 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) |
4678 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) |
4679 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) ;
4680#endif
4681 }
4682
4683#if gcdPOWEROFF_TIMEOUT
4684 if (timeout)
4685 {
4686 gcmkONERROR(gckOS_GetTicks(&currentTime));
4687
4688 gcmkONERROR(
4689 gckOS_TicksAfter(Hardware->powerOffTime, currentTime, &isAfter));
4690
4691 /* powerOffTime is pushed forward, give up.*/
4692 if (isAfter
4693 /* Expect a transition start from IDLE or SUSPEND. */
4694 || (Hardware->chipPowerState == gcvPOWER_ON)
4695 || (Hardware->chipPowerState == gcvPOWER_OFF)
4696 )
4697 {
4698 /* Release the power mutex. */
4699 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
4700
4701 /* No need to do anything. */
4702 gcmkFOOTER_NO();
4703 return gcvSTATUS_OK;
4704 }
4705
4706 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
4707 "Power Off GPU[%d] at %u [supposed to be at %u]",
4708 Hardware->core, currentTime, Hardware->powerOffTime);
4709 }
4710#endif
4711
4712 if (flag == 0)
4713 {
4714 /* Release the power mutex. */
4715 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
4716
4717 /* No need to do anything. */
4718 gcmkFOOTER_NO();
4719 return gcvSTATUS_OK;
4720 }
4721
4722 /* If this is an internal power management, we have to check if we can grab
4723 ** the global power semaphore. If we cannot, we have to wait until the
4724 ** external world changes power management. */
4725 if (!global)
4726 {
4727 /* Try to acquire the global semaphore. */
4728 status = gckOS_TryAcquireSemaphore(os, Hardware->globalSemaphore);
4729 if (status == gcvSTATUS_TIMEOUT)
4730 {
4731 if (State == gcvPOWER_IDLE || State == gcvPOWER_SUSPEND)
4732 {
4733 /* Called from thread routine which should NEVER sleep.*/
4734 gcmkONERROR(gcvSTATUS_INVALID_REQUEST);
4735 }
4736
4737 /* Release the power mutex. */
4738 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
4739 "Releasing the power mutex.");
4740 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
4741 mutexAcquired = gcvFALSE;
4742
4743 /* Wait for the semaphore. */
4744 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
4745 "Waiting for global semaphore.");
4746 gcmkONERROR(gckOS_AcquireSemaphore(os, Hardware->globalSemaphore));
4747 globalAcquired = gcvTRUE;
4748
4749 /* Acquire the power mutex. */
4750 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
4751 "Reacquiring the power mutex.");
4752 gcmkONERROR(gckOS_AcquireMutex(os,
4753 Hardware->powerMutex,
4754 gcvINFINITE));
4755 mutexAcquired = gcvTRUE;
4756
4757 /* chipPowerState may be changed by external world during the time
4758 ** we give up powerMutex, so updating flag now is necessary. */
4759 flag = flags[Hardware->chipPowerState][State];
4760
4761 if (flag == 0)
4762 {
4763 gcmkONERROR(gckOS_ReleaseSemaphore(os, Hardware->globalSemaphore));
4764 globalAcquired = gcvFALSE;
4765
4766 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
4767 mutexAcquired = gcvFALSE;
4768
4769 gcmkFOOTER_NO();
4770 return gcvSTATUS_OK;
4771 }
4772 }
4773 else
4774 {
4775 /* Error. */
4776 gcmkONERROR(status);
4777 }
4778
4779 /* Release the global semaphore again. */
4780 gcmkONERROR(gckOS_ReleaseSemaphore(os, Hardware->globalSemaphore));
4781 globalAcquired = gcvFALSE;
4782 }
4783 else
4784 {
4785 if (State == gcvPOWER_OFF || State == gcvPOWER_SUSPEND || State == gcvPOWER_IDLE)
4786 {
4787 /* Acquire the global semaphore if it has not been acquired. */
4788 status = gckOS_TryAcquireSemaphore(os, Hardware->globalSemaphore);
4789 if (status == gcvSTATUS_OK)
4790 {
4791 globalAcquired = gcvTRUE;
4792 }
4793 else if (status != gcvSTATUS_TIMEOUT)
4794 {
4795 /* Other errors. */
4796 gcmkONERROR(status);
4797 }
4798 /* Ignore gcvSTATUS_TIMEOUT and leave globalAcquired as gcvFALSE.
4799 ** gcvSTATUS_TIMEOUT means global semaphore has already
4800 ** been acquired before this operation, so even if we fail,
4801 ** we should not release it in our error handling. It should be
4802 ** released by the next successful global gcvPOWER_ON. */
4803 }
4804
4805 /* Global power management can't be aborted, so sync with
4806 ** proceeding last commit. */
4807 if (flag & gcvPOWER_FLAG_ACQUIRE)
4808 {
4809 /* Acquire the power management semaphore. */
4810 gcmkONERROR(gckOS_AcquireSemaphore(os, command->powerSemaphore));
4811 acquired = gcvTRUE;
4812
4813 /* avoid acquiring again. */
4814 flag &= ~gcvPOWER_FLAG_ACQUIRE;
4815 }
4816 }
4817
4818 if (flag & (gcvPOWER_FLAG_INITIALIZE | gcvPOWER_FLAG_CLOCK_ON))
4819 {
4820 /* Turn on the power. */
4821 gcmkONERROR(gckOS_SetGPUPower(os, Hardware->core, gcvTRUE, gcvTRUE));
4822
4823 /* Mark clock and power as enabled. */
4824 Hardware->clockState = gcvTRUE;
4825 Hardware->powerState = gcvTRUE;
4826
4827 for (;;)
4828 {
4829 /* Check if GPU is present and awake. */
4830 status = _IsGPUPresent(Hardware);
4831
4832 /* Check if the GPU is not responding. */
4833 if (status == gcvSTATUS_GPU_NOT_RESPONDING)
4834 {
4835 /* Turn off the power and clock. */
4836 gcmkONERROR(gckOS_SetGPUPower(os, Hardware->core, gcvFALSE, gcvFALSE));
4837
4838 Hardware->clockState = gcvFALSE;
4839 Hardware->powerState = gcvFALSE;
4840
4841 /* Wait a little. */
4842 gckOS_Delay(os, 1);
4843
4844 /* Turn on the power and clock. */
4845 gcmkONERROR(gckOS_SetGPUPower(os, Hardware->core, gcvTRUE, gcvTRUE));
4846
4847 Hardware->clockState = gcvTRUE;
4848 Hardware->powerState = gcvTRUE;
4849
4850 /* We need to initialize the hardware and start the command
4851 * processor. */
4852 flag |= gcvPOWER_FLAG_INITIALIZE | gcvPOWER_FLAG_START;
4853 }
4854 else
4855 {
4856 /* Test for error. */
4857 gcmkONERROR(status);
4858
4859 /* Break out of loop. */
4860 break;
4861 }
4862 }
4863 }
4864
4865 /* Get time until powered on. */
4866 gcmkPROFILE_QUERY(time, onTime);
4867
4868 if ((flag & gcvPOWER_FLAG_STALL) && stall)
4869 {
4870 gctBOOL idle;
4871 gctINT32 atomValue;
4872
4873 /* For global operation, all pending commits have already been
4874 ** blocked by globalSemaphore or powerSemaphore.*/
4875 if (!global)
4876 {
4877 /* Check commit atom. */
4878 gcmkONERROR(gckOS_AtomGet(os, command->atomCommit, &atomValue));
4879
4880 if (atomValue > 0)
4881 {
4882 /* Commits are pending - abort power management. */
4883 status = broadcast ? gcvSTATUS_CHIP_NOT_READY
4884 : gcvSTATUS_MORE_DATA;
4885 goto OnError;
4886 }
4887 }
4888
4889 if (broadcast)
4890 {
4891 /* Check for idle. */
4892 gcmkONERROR(gckHARDWARE_QueryIdle(Hardware, &idle));
4893
4894 if (!idle)
4895 {
4896 status = gcvSTATUS_CHIP_NOT_READY;
4897 goto OnError;
4898 }
4899 }
4900
4901 else
4902 {
4903 /* Acquire the command queue. */
4904 gcmkONERROR(gckCOMMAND_EnterCommit(command, gcvTRUE));
4905 commitEntered = gcvTRUE;
4906
4907 /* Get the size of the flush command. */
4908 gcmkONERROR(gckHARDWARE_Flush(Hardware,
4909 gcvFLUSH_ALL,
4910 gcvNULL,
4911 &requested));
4912
4913 /* Reserve space in the command queue. */
4914 gcmkONERROR(gckCOMMAND_Reserve(command,
4915 requested,
4916 &buffer,
4917 &bytes));
4918
4919 /* Append a flush. */
4920 gcmkONERROR(gckHARDWARE_Flush(
4921 Hardware, gcvFLUSH_ALL, buffer, &bytes
4922 ));
4923
4924 /* Execute the command queue. */
4925 gcmkONERROR(gckCOMMAND_Execute(command, requested));
4926
4927 /* Release the command queue. */
4928 gcmkONERROR(gckCOMMAND_ExitCommit(command, gcvTRUE));
4929 commitEntered = gcvFALSE;
4930
4931 /* Wait to finish all commands. */
4932 gcmkONERROR(gckCOMMAND_Stall(command, gcvTRUE));
4933 }
4934 }
4935
4936 /* Get time until stalled. */
4937 gcmkPROFILE_QUERY(time, stallTime);
4938
4939 if (flag & gcvPOWER_FLAG_ACQUIRE)
4940 {
4941 /* Acquire the power management semaphore. */
4942 gcmkONERROR(gckOS_AcquireSemaphore(os, command->powerSemaphore));
4943 acquired = gcvTRUE;
4944 }
4945
4946 if (flag & gcvPOWER_FLAG_STOP)
4947 {
4948 /* Stop the command parser. */
4949 gcmkONERROR(gckCOMMAND_Stop(command, gcvFALSE));
4950
4951 /* Stop the Isr. */
4952 if (Hardware->stopIsr)
4953 {
4954 gcmkONERROR(Hardware->stopIsr(Hardware->isrContext));
4955 }
4956 }
4957
4958 /* Flush Cache before Power Off. */
4959 if (flag & gcvPOWER_FLAG_POWER_OFF)
4960 {
4961 if (Hardware->clockState == gcvFALSE)
4962 {
4963 /* Turn off the GPU power. */
4964 gcmkONERROR(
4965 gckOS_SetGPUPower(os,
4966 Hardware->core,
4967 gcvTRUE,
4968 gcvTRUE));
4969
4970 Hardware->clockState = gcvTRUE;
4971
4972 if (gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_DYNAMIC_FREQUENCY_SCALING) != gcvTRUE)
4973 {
4974 /* Write the clock control register. */
4975 gcmkONERROR(gckOS_WriteRegisterEx(os,
4976 Hardware->core,
4977 0x00000,
4978 clocks[0]));
4979
4980 /* Done loading the frequency scaler. */
4981 gcmkONERROR(gckOS_WriteRegisterEx(os,
4982 Hardware->core,
4983 0x00000,
4984 ((((gctUINT32) (clocks[0])) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)))));
4985 }
4986 }
4987
4988 gcmkONERROR(gckCOMMAND_Start(command));
4989
4990 gcmkONERROR(_FlushCache(Hardware, command));
4991
4992 gckOS_Delay(gcvNULL, 1);
4993
4994 /* Stop the command parser. */
4995 gcmkONERROR(gckCOMMAND_Stop(command, gcvFALSE));
4996
4997 flag |= gcvPOWER_FLAG_CLOCK_OFF;
4998 }
4999
5000 /* Get time until stopped. */
5001 gcmkPROFILE_QUERY(time, stopTime);
5002
5003 /* Only process this when hardware is enabled. */
5004 if (Hardware->clockState && Hardware->powerState
5005 /* Don't touch clock control if dynamic frequency scaling is available. */
5006 && gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_DYNAMIC_FREQUENCY_SCALING) != gcvTRUE
5007 )
5008 {
5009 if (flag & (gcvPOWER_FLAG_POWER_OFF | gcvPOWER_FLAG_CLOCK_OFF))
5010 {
5011 if (Hardware->identity.chipModel == gcv4000
5012 && ((Hardware->identity.chipRevision == 0x5208) || (Hardware->identity.chipRevision == 0x5222)))
5013 {
5014 clock &= ~2U;
5015 }
5016 }
5017
5018 /* Write the clock control register. */
5019 gcmkONERROR(gckOS_WriteRegisterEx(os,
5020 Hardware->core,
5021 0x00000,
5022 clock));
5023
5024 /* Done loading the frequency scaler. */
5025 gcmkONERROR(gckOS_WriteRegisterEx(os,
5026 Hardware->core,
5027 0x00000,
5028 ((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)))));
5029 }
5030
5031 if (flag & gcvPOWER_FLAG_DELAY)
5032 {
5033 /* Wait for the specified amount of time to settle coming back from
5034 ** power-off or suspend state. */
5035 gcmkONERROR(gckOS_Delay(os, gcdPOWER_CONTROL_DELAY));
5036 }
5037
5038 /* Get time until delayed. */
5039 gcmkPROFILE_QUERY(time, delayTime);
5040
5041 if (flag & gcvPOWER_FLAG_INITIALIZE)
5042 {
5043 /* Initialize hardware. */
5044 gcmkONERROR(gckHARDWARE_InitializeHardware(Hardware));
5045
5046 gcmkONERROR(gckHARDWARE_SetFastClear(Hardware,
5047 Hardware->allowFastClear,
5048 Hardware->allowCompression));
5049
5050 /* Force the command queue to reload the next context. */
5051 command->currContext = gcvNULL;
5052
5053 /* Need to config mmu after command start. */
5054 configMmu = gcvTRUE;
5055 }
5056
5057 /* Get time until initialized. */
5058 gcmkPROFILE_QUERY(time, initTime);
5059
5060 if (flag & (gcvPOWER_FLAG_POWER_OFF | gcvPOWER_FLAG_CLOCK_OFF))
5061 {
5062 /* Turn off the GPU power. */
5063 gcmkONERROR(
5064 gckOS_SetGPUPower(os,
5065 Hardware->core,
5066 (flag & gcvPOWER_FLAG_CLOCK_OFF) ? gcvFALSE
5067 : gcvTRUE,
5068 (flag & gcvPOWER_FLAG_POWER_OFF) ? gcvFALSE
5069 : gcvTRUE));
5070
5071 /* Save current hardware power and clock states. */
5072 Hardware->clockState = (flag & gcvPOWER_FLAG_CLOCK_OFF) ? gcvFALSE
5073 : gcvTRUE;
5074 Hardware->powerState = (flag & gcvPOWER_FLAG_POWER_OFF) ? gcvFALSE
5075 : gcvTRUE;
5076 }
5077
5078 /* Get time until off. */
5079 gcmkPROFILE_QUERY(time, offTime);
5080
5081 if (flag & gcvPOWER_FLAG_START)
5082 {
5083 /* Start the command processor. */
5084 gcmkONERROR(gckCOMMAND_Start(command));
5085 commandStarted = gcvTRUE;
5086
5087 if (Hardware->startIsr)
5088 {
5089 /* Start the Isr. */
5090 gcmkONERROR(Hardware->startIsr(Hardware->isrContext));
5091 isrStarted = gcvTRUE;
5092 }
5093 }
5094
5095 /* Get time until started. */
5096 gcmkPROFILE_QUERY(time, startTime);
5097
5098 if (flag & gcvPOWER_FLAG_RELEASE)
5099 {
5100 /* Release the power management semaphore. */
5101 gcmkONERROR(gckOS_ReleaseSemaphore(os, command->powerSemaphore));
5102 acquired = gcvFALSE;
5103
5104 if (global)
5105 {
5106 /* Verify global semaphore has been acquired already before
5107 ** we release it.
5108 ** If it was acquired, gckOS_TryAcquireSemaphore will return
5109 ** gcvSTATUS_TIMEOUT and we release it. Otherwise, global
5110 ** semaphore will be acquried now, but it still is released
5111 ** immediately. */
5112 status = gckOS_TryAcquireSemaphore(os, Hardware->globalSemaphore);
5113 if (status != gcvSTATUS_TIMEOUT)
5114 {
5115 gcmkONERROR(status);
5116 }
5117
5118 /* Release the global semaphore. */
5119 gcmkONERROR(gckOS_ReleaseSemaphore(os, Hardware->globalSemaphore));
5120 globalAcquired = gcvFALSE;
5121 }
5122 }
5123
5124 gckSTATETIMER_Accumulate(&Hardware->powerStateTimer, Hardware->chipPowerState);
5125
5126 /* Save the new power state. */
5127 Hardware->chipPowerState = State;
5128
5129#if gcdDVFS
5130 if (State == gcvPOWER_ON && Hardware->kernel->dvfs)
5131 {
5132 gckDVFS_Start(Hardware->kernel->dvfs);
5133 }
5134#endif
5135
5136#if gcdPOWEROFF_TIMEOUT
5137 /* Reset power off time */
5138 gcmkONERROR(gckOS_GetTicks(&currentTime));
5139
5140 Hardware->powerOffTime = currentTime + Hardware->powerOffTimeout;
5141
5142 if (State == gcvPOWER_IDLE || State == gcvPOWER_SUSPEND)
5143 {
5144 /* Start a timer to power off GPU when GPU enters IDLE or SUSPEND. */
5145 gcmkVERIFY_OK(gckOS_StartTimer(os,
5146 Hardware->powerOffTimer,
5147 Hardware->powerOffTimeout));
5148 }
5149 else
5150 {
5151 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE, "Cancel powerOfftimer");
5152
5153 /* Cancel running timer when GPU enters ON or OFF. */
5154 gcmkVERIFY_OK(gckOS_StopTimer(os, Hardware->powerOffTimer));
5155 }
5156#endif
5157
5158 /* Release the power mutex. */
5159 gcmkONERROR(gckOS_ReleaseMutex(os, Hardware->powerMutex));
5160
5161 /* Get total time. */
5162 gcmkPROFILE_QUERY(time, totalTime);
5163#if gcdENABLE_PROFILING
5164 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
5165 "PROF(%llu): mutex:%llu on:%llu stall:%llu stop:%llu",
5166 freq, mutexTime, onTime, stallTime, stopTime);
5167 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
5168 " delay:%llu init:%llu off:%llu start:%llu total:%llu",
5169 delayTime, initTime, offTime, startTime, totalTime);
5170#endif
5171
5172 /* Success. */
5173 gcmkFOOTER_NO();
5174 return gcvSTATUS_OK;
5175
5176OnError:
5177 if (commandStarted)
5178 {
5179 gcmkVERIFY_OK(gckCOMMAND_Stop(command, gcvFALSE));
5180 }
5181
5182 if (isrStarted)
5183 {
5184 gcmkVERIFY_OK(Hardware->stopIsr(Hardware->isrContext));
5185 }
5186
5187 if (commitEntered)
5188 {
5189 /* Release the command queue mutex. */
5190 gcmkVERIFY_OK(gckCOMMAND_ExitCommit(command, gcvTRUE));
5191 }
5192
5193 if (acquired)
5194 {
5195 /* Release semaphore. */
5196 gcmkVERIFY_OK(gckOS_ReleaseSemaphore(Hardware->os,
5197 command->powerSemaphore));
5198 }
5199
5200 if (globalAcquired)
5201 {
5202 gcmkVERIFY_OK(gckOS_ReleaseSemaphore(Hardware->os,
5203 Hardware->globalSemaphore));
5204 }
5205
5206 if (mutexAcquired)
5207 {
5208 gcmkVERIFY_OK(gckOS_ReleaseMutex(Hardware->os, Hardware->powerMutex));
5209 }
5210
5211 /* Return the status. */
5212 gcmkFOOTER();
5213 return status;
5214}
5215
5216/*******************************************************************************
5217**
5218** gckHARDWARE_QueryPowerManagementState
5219**
5220** Get GPU power state.
5221**
5222** INPUT:
5223**
5224** gckHARDWARE Harwdare
5225** Pointer to an gckHARDWARE object.
5226**
5227** gceCHIPPOWERSTATE* State
5228** Power State.
5229**
5230*/
5231gceSTATUS
5232gckHARDWARE_QueryPowerManagementState(
5233 IN gckHARDWARE Hardware,
5234 OUT gceCHIPPOWERSTATE* State
5235 )
5236{
5237 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
5238
5239 /* Verify the arguments. */
5240 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
5241 gcmkVERIFY_ARGUMENT(State != gcvNULL);
5242
5243 /* Return the statue. */
5244 *State = Hardware->chipPowerState;
5245
5246 /* Success. */
5247 gcmkFOOTER_ARG("*State=%d", *State);
5248 return gcvSTATUS_OK;
5249}
5250
5251/*******************************************************************************
5252**
5253** gckHARDWARE_SetPowerManagement
5254**
5255** Configure GPU power management function.
5256** Only used in driver initialization stage.
5257**
5258** INPUT:
5259**
5260** gckHARDWARE Harwdare
5261** Pointer to an gckHARDWARE object.
5262**
5263** gctBOOL PowerManagement
5264** Power Mangement State.
5265**
5266*/
5267gceSTATUS
5268gckHARDWARE_SetPowerManagement(
5269 IN gckHARDWARE Hardware,
5270 IN gctBOOL PowerManagement
5271 )
5272{
5273 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
5274
5275 /* Verify the arguments. */
5276 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
5277
5278 gcmkVERIFY_OK(
5279 gckOS_AcquireMutex(Hardware->os, Hardware->powerMutex, gcvINFINITE));
5280
5281 Hardware->powerManagement = PowerManagement;
5282
5283 gcmkVERIFY_OK(gckOS_ReleaseMutex(Hardware->os, Hardware->powerMutex));
5284
5285 /* Success. */
5286 gcmkFOOTER_NO();
5287 return gcvSTATUS_OK;
5288}
5289
5290/*******************************************************************************
5291**
5292** gckHARDWARE_SetGpuProfiler
5293**
5294** Configure GPU profiler function.
5295** Only used in driver initialization stage.
5296**
5297** INPUT:
5298**
5299** gckHARDWARE Harwdare
5300** Pointer to an gckHARDWARE object.
5301**
5302** gctBOOL GpuProfiler
5303** GOU Profiler State.
5304**
5305*/
5306gceSTATUS
5307gckHARDWARE_SetGpuProfiler(
5308 IN gckHARDWARE Hardware,
5309 IN gctBOOL GpuProfiler
5310 )
5311{
5312 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
5313
5314 /* Verify the arguments. */
5315 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
5316
5317 if (GpuProfiler == gcvTRUE)
5318 {
5319 gctUINT32 data = 0;
5320
5321 /* Need to disable clock gating when doing profiling. */
5322 gcmkVERIFY_OK(
5323 gckOS_ReadRegisterEx(Hardware->os,
5324 Hardware->core,
5325 Hardware->powerBaseAddress +
5326 0x00100,
5327 &data));
5328
5329 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)));
5330
5331
5332 gcmkVERIFY_OK(
5333 gckOS_WriteRegisterEx(Hardware->os,
5334 Hardware->core,
5335 Hardware->powerBaseAddress
5336 + 0x00100,
5337 data));
5338 }
5339
5340 Hardware->gpuProfiler = GpuProfiler;
5341
5342 /* Success. */
5343 gcmkFOOTER_NO();
5344 return gcvSTATUS_OK;
5345}
5346
5347#if gcdENABLE_FSCALE_VAL_ADJUST
5348gceSTATUS
5349gckHARDWARE_SetFscaleValue(
5350 IN gckHARDWARE Hardware,
5351 IN gctUINT32 FscaleValue
5352 )
5353{
5354 gceSTATUS status;
5355 gctUINT32 clock;
5356 gctBOOL acquired = gcvFALSE;
5357
5358 gcmkHEADER_ARG("Hardware=0x%x FscaleValue=%d", Hardware, FscaleValue);
5359
5360 gcmkVERIFY_ARGUMENT(FscaleValue > 0 && FscaleValue <= 64);
5361
5362 gcmkONERROR(
5363 gckOS_AcquireMutex(Hardware->os, Hardware->powerMutex, gcvINFINITE));
5364 acquired = gcvTRUE;
5365
5366 Hardware->powerOnFscaleVal = FscaleValue;
5367
5368 if (Hardware->chipPowerState == gcvPOWER_ON)
5369 {
5370 gctUINT32 data;
5371
5372 gcmkONERROR(
5373 gckOS_ReadRegisterEx(Hardware->os,
5374 Hardware->core,
5375 Hardware->powerBaseAddress
5376 + 0x00104,
5377 &data));
5378
5379 /* Disable all clock gating. */
5380 gcmkONERROR(
5381 gckOS_WriteRegisterEx(Hardware->os,
5382 Hardware->core,
5383 Hardware->powerBaseAddress
5384 + 0x00104,
5385 ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
5386 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))
5387 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1))))))) << (0 ? 2:2)))
5388 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1))))))) << (0 ? 3:3)))
5389 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1))))))) << (0 ? 4:4)))
5390 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1))))))) << (0 ? 5:5)))
5391 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1))))))) << (0 ? 6:6)))
5392 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1))))))) << (0 ? 7:7)))
5393 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1))))))) << (0 ? 8:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1))))))) << (0 ? 8:8)))
5394 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)))
5395 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:11) - (0 ? 11:11) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:11) - (0 ? 11:11) + 1))))))) << (0 ? 11:11))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 11:11) - (0 ? 11:11) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:11) - (0 ? 11:11) + 1))))))) << (0 ? 11:11)))));
5396
5397 clock = ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))
5398 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1))))))) << (0 ? 1:1)))
5399 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2))) | (((gctUINT32) ((gctUINT32) (FscaleValue) & ((gctUINT32) ((((1 ? 8:2) - (0 ? 8:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:2) - (0 ? 8:2) + 1))))))) << (0 ? 8:2)))
5400 | ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)));
5401
5402 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
5403 Hardware->core,
5404 0x00000,
5405 clock));
5406
5407 /* Done loading the frequency scaler. */
5408 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
5409 Hardware->core,
5410 0x00000,
5411 ((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)))));
5412
5413 /* Restore all clock gating. */
5414 gcmkONERROR(
5415 gckOS_WriteRegisterEx(Hardware->os,
5416 Hardware->core,
5417 Hardware->powerBaseAddress
5418 + 0x00104,
5419 data));
5420 }
5421
5422 gcmkVERIFY(gckOS_ReleaseMutex(Hardware->os, Hardware->powerMutex));
5423
5424 gcmkFOOTER_NO();
5425 return gcvSTATUS_OK;
5426
5427OnError:
5428 if (acquired)
5429 {
5430 gcmkVERIFY(gckOS_ReleaseMutex(Hardware->os, Hardware->powerMutex));
5431 }
5432
5433 gcmkFOOTER();
5434 return status;
5435}
5436
5437gceSTATUS
5438gckHARDWARE_GetFscaleValue(
5439 IN gckHARDWARE Hardware,
5440 IN gctUINT * FscaleValue,
5441 IN gctUINT * MinFscaleValue,
5442 IN gctUINT * MaxFscaleValue
5443 )
5444{
5445 *FscaleValue = Hardware->powerOnFscaleVal;
5446 *MinFscaleValue = Hardware->minFscaleValue;
5447 *MaxFscaleValue = 64;
5448
5449 return gcvSTATUS_OK;
5450}
5451
5452gceSTATUS
5453gckHARDWARE_SetMinFscaleValue(
5454 IN gckHARDWARE Hardware,
5455 IN gctUINT MinFscaleValue
5456 )
5457{
5458 if (MinFscaleValue >= 1 && MinFscaleValue <= 64)
5459 {
5460 Hardware->minFscaleValue = MinFscaleValue;
5461 }
5462
5463 return gcvSTATUS_OK;
5464}
5465#endif
5466
5467#if gcdPOWEROFF_TIMEOUT
5468gceSTATUS
5469gckHARDWARE_SetPowerOffTimeout(
5470 IN gckHARDWARE Hardware,
5471 IN gctUINT32 Timeout
5472)
5473{
5474 gcmkHEADER_ARG("Hardware=0x%x Timeout=%d", Hardware, Timeout);
5475
5476 Hardware->powerOffTimeout = Timeout;
5477
5478 gcmkFOOTER_NO();
5479 return gcvSTATUS_OK;
5480}
5481
5482
5483gceSTATUS
5484gckHARDWARE_QueryPowerOffTimeout(
5485 IN gckHARDWARE Hardware,
5486 OUT gctUINT32* Timeout
5487)
5488{
5489 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
5490
5491 *Timeout = Hardware->powerOffTimeout;
5492
5493 gcmkFOOTER_ARG("*Timeout=%d", *Timeout);
5494 return gcvSTATUS_OK;
5495}
5496#endif
5497
5498gceSTATUS
5499gckHARDWARE_QueryIdle(
5500 IN gckHARDWARE Hardware,
5501 OUT gctBOOL_PTR IsIdle
5502 )
5503{
5504 gceSTATUS status;
5505 gctUINT32 idle, address;
5506 gctBOOL isIdle;
5507
5508#if gcdINTERRUPT_STATISTIC
5509 gctINT32 pendingInterrupt;
5510#endif
5511
5512 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
5513
5514 /* Verify the arguments. */
5515 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
5516 gcmkVERIFY_ARGUMENT(IsIdle != gcvNULL);
5517
5518 /* We are idle when the power is not ON. */
5519 if (Hardware->chipPowerState != gcvPOWER_ON)
5520 {
5521 isIdle = gcvTRUE;
5522 }
5523
5524 else
5525 {
5526 /* Read idle register. */
5527 gcmkONERROR(
5528 gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00004, &idle));
5529
5530
5531 /* Pipe must be idle. */
5532 if (((((((gctUINT32) (idle)) >> (0 ? 1:1)) & ((gctUINT32) ((((1 ? 1:1) - (0 ? 1:1) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 1:1) - (0 ? 1:1) + 1)))))) ) != 1)
5533 || ((((((gctUINT32) (idle)) >> (0 ? 3:3)) & ((gctUINT32) ((((1 ? 3:3) - (0 ? 3:3) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 3:3) - (0 ? 3:3) + 1)))))) ) != 1)
5534 || ((((((gctUINT32) (idle)) >> (0 ? 4:4)) & ((gctUINT32) ((((1 ? 4:4) - (0 ? 4:4) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 4:4) - (0 ? 4:4) + 1)))))) ) != 1)
5535 || ((((((gctUINT32) (idle)) >> (0 ? 5:5)) & ((gctUINT32) ((((1 ? 5:5) - (0 ? 5:5) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 5:5) - (0 ? 5:5) + 1)))))) ) != 1)
5536 || ((((((gctUINT32) (idle)) >> (0 ? 6:6)) & ((gctUINT32) ((((1 ? 6:6) - (0 ? 6:6) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 6:6) - (0 ? 6:6) + 1)))))) ) != 1)
5537 || ((((((gctUINT32) (idle)) >> (0 ? 7:7)) & ((gctUINT32) ((((1 ? 7:7) - (0 ? 7:7) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:7) - (0 ? 7:7) + 1)))))) ) != 1)
5538 || ((((((gctUINT32) (idle)) >> (0 ? 2:2)) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))) ) != 1)
5539 )
5540 {
5541 /* Something is busy. */
5542 isIdle = gcvFALSE;
5543 }
5544
5545 else
5546 {
5547 /* Read the current FE address. */
5548 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
5549 Hardware->core,
5550 0x00664,
5551 &address));
5552
5553 /* Test if address is inside the last WAIT/LINK sequence. */
5554 if ((address >= Hardware->lastWaitLink)
5555 && (address <= Hardware->lastWaitLink + 16)
5556 )
5557 {
5558 /* FE is in last WAIT/LINK and the pipe is idle. */
5559 isIdle = gcvTRUE;
5560 }
5561 else
5562 {
5563 /* FE is not in WAIT/LINK yet. */
5564 isIdle = gcvFALSE;
5565 }
5566 }
5567
5568
5569 }
5570
5571#if gcdINTERRUPT_STATISTIC
5572 gcmkONERROR(gckOS_AtomGet(
5573 Hardware->os,
5574 Hardware->kernel->eventObj->interruptCount,
5575 &pendingInterrupt
5576 ));
5577
5578 if (pendingInterrupt)
5579 {
5580 isIdle = gcvFALSE;
5581 }
5582#endif
5583
5584 {
5585 *IsIdle = isIdle;
5586 }
5587
5588 /* Success. */
5589 gcmkFOOTER_NO();
5590 return gcvSTATUS_OK;
5591
5592OnError:
5593 /* Return the status. */
5594 gcmkFOOTER();
5595 return status;
5596}
5597
5598/*******************************************************************************
5599** Handy macros that will help in reading those debug registers.
5600*/
5601
5602#define gcmkREAD_DEBUG_REGISTER(control, block, index, data) \
5603 gcmkONERROR(\
5604 gckOS_WriteRegisterEx(Hardware->os, \
5605 Hardware->core, \
5606 GC_DEBUG_CONTROL##control##_Address, \
5607 gcmSETFIELD(0, \
5608 GC_DEBUG_CONTROL##control, \
5609 block, \
5610 index))); \
5611 gcmkONERROR(\
5612 gckOS_ReadRegisterEx(Hardware->os, \
5613 Hardware->core, \
5614 GC_DEBUG_SIGNALS_##block##_Address, \
5615 &profiler->data))
5616
5617#define gcmkREAD_DEBUG_REGISTER_N(control, block, index, data) \
5618 gcmkONERROR(\
5619 gckOS_WriteRegisterEx(Hardware->os, \
5620 Hardware->core, \
5621 GC_DEBUG_CONTROL##control##_Address, \
5622 gcmSETFIELD(0, \
5623 GC_DEBUG_CONTROL##control, \
5624 block, \
5625 index))); \
5626 gcmkONERROR(\
5627 gckOS_ReadRegisterEx(Hardware->os, \
5628 Hardware->core, \
5629 GC_DEBUG_SIGNALS_##block##_Address, \
5630 &data))
5631
5632#define gcmkRESET_DEBUG_REGISTER(control, block, value) \
5633 gcmkONERROR(\
5634 gckOS_WriteRegisterEx(Hardware->os, \
5635 Hardware->core, \
5636 GC_DEBUG_CONTROL##control##_Address, \
5637 gcmSETFIELD(0, \
5638 GC_DEBUG_CONTROL##control, \
5639 block, \
5640 value))); \
5641 gcmkONERROR(\
5642 gckOS_WriteRegisterEx(Hardware->os, \
5643 Hardware->core, \
5644 GC_DEBUG_CONTROL##control##_Address, \
5645 gcmSETFIELD(0, \
5646 GC_DEBUG_CONTROL##control, \
5647 block, \
5648 0)))
5649
5650/*******************************************************************************
5651**
5652** gckHARDWARE_ProfileEngine2D
5653**
5654** Read the profile registers available in the 2D engine and sets them in the
5655** profile. The function will also reset the pixelsRendered counter every time.
5656**
5657** INPUT:
5658**
5659** gckHARDWARE Hardware
5660** Pointer to an gckHARDWARE object.
5661**
5662** OPTIONAL gcs2D_PROFILE_PTR Profile
5663** Pointer to a gcs2D_Profile structure.
5664**
5665** OUTPUT:
5666**
5667** Nothing.
5668*/
5669gceSTATUS
5670gckHARDWARE_ProfileEngine2D(
5671 IN gckHARDWARE Hardware,
5672 OPTIONAL gcs2D_PROFILE_PTR Profile
5673 )
5674{
5675 gceSTATUS status;
5676 gcs2D_PROFILE_PTR profiler = Profile;
5677
5678 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
5679
5680 /* Verify the arguments. */
5681 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
5682
5683 if (Profile != gcvNULL)
5684 {
5685 /* Read the cycle count. */
5686 gcmkONERROR(
5687 gckOS_ReadRegisterEx(Hardware->os,
5688 Hardware->core,
5689 0x00438,
5690 &Profile->cycleCount));
5691
5692 /* Read pixels rendered by 2D engine. */
5693 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (11) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
5694gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &profiler->pixelsRendered));
5695
5696 /* Reset counter. */
5697 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (15) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
5698gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))
5699));
5700 }
5701
5702 /* Success. */
5703 gcmkFOOTER_NO();
5704 return gcvSTATUS_OK;
5705
5706OnError:
5707 /* Return the status. */
5708 gcmkFOOTER();
5709 return status;
5710}
5711
5712#if VIVANTE_PROFILER
5713gceSTATUS
5714gckHARDWARE_QueryProfileRegisters(
5715 IN gckHARDWARE Hardware,
5716 IN gctBOOL Reset,
5717 OUT gcsPROFILER_COUNTERS * Counters
5718 )
5719{
5720 gceSTATUS status;
5721 gcsPROFILER_COUNTERS * profiler = Counters;
5722 gctUINT i, clock;
5723 gctUINT32 colorKilled, colorDrawn, depthKilled, depthDrawn;
5724 gctUINT32 totalRead, totalWrite;
5725 gceCHIPMODEL chipModel;
5726 gctUINT32 chipRevision;
5727 gctUINT32 resetValue = 0xF;
5728
5729 gcmkHEADER_ARG("Hardware=0x%x Counters=0x%x", Hardware, Counters);
5730
5731 /* Verify the arguments. */
5732 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
5733
5734 chipModel = Hardware->identity.chipModel;
5735 chipRevision = Hardware->identity.chipRevision;
5736 if ((chipModel == gcv5000 && chipRevision == 0x5434) || (chipModel == gcv3000 && chipRevision == 0x5435))
5737 {
5738 resetValue = 0xFF;
5739 }
5740
5741 /* Read the counters. */
5742 gcmkONERROR(
5743 gckOS_ReadRegisterEx(Hardware->os,
5744 Hardware->core,
5745 0x00438,
5746 &profiler->gpuCyclesCounter));
5747
5748 gcmkONERROR(
5749 gckOS_ReadRegisterEx(Hardware->os,
5750 Hardware->core,
5751 0x00078,
5752 &profiler->gpuTotalCyclesCounter));
5753
5754 gcmkONERROR(
5755 gckOS_ReadRegisterEx(Hardware->os,
5756 Hardware->core,
5757 0x0007C,
5758 &profiler->gpuIdleCyclesCounter));
5759
5760
5761 /* Read clock control register. */
5762 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
5763 Hardware->core,
5764 0x00000,
5765 &clock));
5766
5767 profiler->gpuTotalRead64BytesPerFrame = 0;
5768 profiler->gpuTotalWrite64BytesPerFrame = 0;
5769 profiler->pe_pixel_count_killed_by_color_pipe = 0;
5770 profiler->pe_pixel_count_killed_by_depth_pipe = 0;
5771 profiler->pe_pixel_count_drawn_by_color_pipe = 0;
5772 profiler->pe_pixel_count_drawn_by_depth_pipe = 0;
5773
5774 /* Walk through all avaiable pixel pipes. */
5775 for (i = 0; i < Hardware->identity.pixelPipes; ++i)
5776 {
5777 /* Select proper pipe. */
5778 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
5779 Hardware->core,
5780 0x00000,
5781 ((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20))) | (((gctUINT32) ((gctUINT32) (i) & ((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20)))));
5782
5783 /* BW */
5784 gcmkONERROR(
5785 gckOS_ReadRegisterEx(Hardware->os,
5786 Hardware->core,
5787 0x00040,
5788 &totalRead));
5789 gcmkONERROR(
5790 gckOS_ReadRegisterEx(Hardware->os,
5791 Hardware->core,
5792 0x00044,
5793 &totalWrite));
5794
5795 profiler->gpuTotalRead64BytesPerFrame += totalRead;
5796 profiler->gpuTotalWrite64BytesPerFrame += totalWrite;
5797
5798 /* PE */
5799 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &colorKilled));
5800 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &depthKilled));
5801 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &colorDrawn));
5802 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &depthDrawn));
5803
5804 profiler->pe_pixel_count_killed_by_color_pipe += colorKilled;
5805 profiler->pe_pixel_count_killed_by_depth_pipe += depthKilled;
5806 profiler->pe_pixel_count_drawn_by_color_pipe += colorDrawn;
5807 profiler->pe_pixel_count_drawn_by_depth_pipe += depthDrawn;
5808 }
5809
5810 /* Reset clock control register. */
5811 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
5812 Hardware->core,
5813 0x00000,
5814 clock));
5815
5816 /* Reset counters. */
5817 gcmkONERROR(
5818 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x0003C, 1));
5819 gcmkONERROR(
5820 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x0003C, 0));
5821 gcmkONERROR(
5822 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00438, 0));
5823 gcmkONERROR(
5824 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00078, 0));
5825 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
5826gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))
5827));
5828
5829 /* SH */
5830 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5831gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->ps_inst_counter));
5832 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5833gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->rendered_pixel_counter));
5834 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5835gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vs_inst_counter));
5836 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5837gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->rendered_vertice_counter));
5838 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (11) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5839gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vtx_branch_inst_counter));
5840 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (12) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5841gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vtx_texld_inst_counter));
5842 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (13) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5843gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->pxl_branch_inst_counter));
5844 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (14) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5845gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->pxl_texld_inst_counter));
5846 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5847gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24)))
5848));
5849
5850 /* PA */
5851 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
5852gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_input_vtx_counter));
5853 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (4) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
5854gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_input_prim_counter));
5855 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
5856gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_output_prim_counter));
5857 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
5858gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_depth_clipped_counter));
5859 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
5860gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_trivial_rejected_counter));
5861 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
5862gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_culled_counter));
5863 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
5864gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0)))
5865));
5866
5867 /* SE */
5868 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
5869gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00464, &profiler->se_culled_triangle_count));
5870 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
5871gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00464, &profiler->se_culled_lines_count));
5872 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
5873gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8)))
5874));
5875
5876 /* RA */
5877 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
5878gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_valid_pixel_count));
5879 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
5880gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_total_quad_count));
5881 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
5882gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_valid_quad_count_after_early_z));
5883 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
5884gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_total_primitive_count));
5885 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
5886gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_pipe_cache_miss_counter));
5887 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
5888gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_prefetch_cache_miss_counter));
5889 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
5890gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))
5891));
5892
5893 /* TX */
5894 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5895gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_bilinear_requests));
5896 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5897gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_trilinear_requests));
5898 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5899gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_discarded_texture_requests));
5900 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5901gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_texture_requests));
5902 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5903gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_mem_read_count));
5904 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5905gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_mem_read_in_8B_count));
5906 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5907gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_miss_count));
5908 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5909gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_hit_texel_count));
5910 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5911gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_miss_texel_count));
5912 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
5913gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24)))
5914));
5915
5916 /* MC */
5917 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
5918gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_read_req_8B_from_pipeline));
5919 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
5920gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_read_req_8B_from_IP));
5921 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
5922gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_write_req_8B_from_pipeline));
5923 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
5924gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0)))
5925));
5926
5927 /* HI */
5928 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
5929gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_read_request_stalled));
5930 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
5931gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_write_request_stalled));
5932 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
5933gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_write_data_stalled));
5934 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
5935gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8)))
5936));
5937
5938 /* Success. */
5939 gcmkFOOTER_NO();
5940 return gcvSTATUS_OK;
5941
5942OnError:
5943 /* Return the status. */
5944 gcmkFOOTER();
5945 return status;
5946}
5947#endif
5948
5949
5950#if VIVANTE_PROFILER_CONTEXT
5951#define gcmkUPDATE_PROFILE_DATA(data) \
5952 profilerHistroy->data += profiler->data
5953
5954gceSTATUS
5955gckHARDWARE_QueryContextProfile(
5956 IN gckHARDWARE Hardware,
5957 IN gctBOOL Reset,
5958 IN gckCONTEXT Context,
5959 OUT gcsPROFILER_COUNTERS * Counters
5960 )
5961{
5962 gceSTATUS status;
5963 gckCOMMAND command = Hardware->kernel->command;
5964 gcsPROFILER_COUNTERS * profiler = Counters;
5965
5966 gcmkHEADER_ARG("Hardware=0x%x Counters=0x%x", Hardware, Counters);
5967
5968 /* Verify the arguments. */
5969 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
5970
5971 /* Acquire the context sequnence mutex. */
5972 gcmkONERROR(gckOS_AcquireMutex(
5973 command->os, command->mutexContextSeq, gcvINFINITE
5974 ));
5975
5976 /* Read the counters. */
5977 gcmkVERIFY_OK(gckOS_MemCopy(
5978 profiler, &Context->histroyProfiler, gcmSIZEOF(gcsPROFILER_COUNTERS)
5979 ));
5980
5981 /* Reset counters. */
5982 gcmkVERIFY_OK(gckOS_ZeroMemory(
5983 &Context->histroyProfiler, gcmSIZEOF(gcsPROFILER_COUNTERS)
5984 ));
5985
5986 gcmkVERIFY_OK(gckOS_ReleaseMutex(
5987 command->os, command->mutexContextSeq
5988 ));
5989
5990 /* Success. */
5991 gcmkFOOTER_NO();
5992 return gcvSTATUS_OK;
5993
5994OnError:
5995 /* Return the status. */
5996 gcmkFOOTER();
5997 return status;
5998}
5999
6000static gctUINT32
6001CalcDelta(
6002 IN gctUINT32 new,
6003 IN gctUINT32 old
6004 )
6005{
6006 if (new >= old)
6007 {
6008 return new - old;
6009 }
6010 else
6011 {
6012 return (gctUINT32)((gctUINT64)new + 0x100000000ll - old);
6013 }
6014}
6015
6016#if USE_SW_RESET
6017#define gcmkRESET_PROFILE_DATA(counterName, prevCounterName) \
6018 temp = profiler->counterName; \
6019 profiler->counterName = CalcDelta(temp, Context->prevCounterName); \
6020 Context->prevCounterName = temp
6021
6022#endif
6023
6024gceSTATUS
6025gckHARDWARE_UpdateContextProfile(
6026 IN gckHARDWARE Hardware,
6027 IN gckCONTEXT Context
6028 )
6029{
6030 gceSTATUS status;
6031 gcsPROFILER_COUNTERS * profiler = &Context->latestProfiler;
6032 gcsPROFILER_COUNTERS * profilerHistroy = &Context->histroyProfiler;
6033 gctUINT i, clock;
6034 gctUINT32 colorKilled = 0, colorDrawn = 0, depthKilled = 0, depthDrawn = 0;
6035 gctUINT32 totalRead, totalWrite;
6036 gceCHIPMODEL chipModel;
6037 gctUINT32 chipRevision;
6038 gctUINT32 temp;
6039 gctUINT32 resetValue = 0xF;
6040
6041 gcmkHEADER_ARG("Hardware=0x%x Context=0x%x", Hardware, Context);
6042
6043 /* Verify the arguments. */
6044 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
6045 gcmkVERIFY_OBJECT(Context, gcvOBJ_CONTEXT);
6046
6047 chipModel = Hardware->identity.chipModel;
6048 chipRevision = Hardware->identity.chipRevision;
6049 if ((chipModel == gcv5000 && chipRevision == 0x5434) || (chipModel == gcv3000 && chipRevision == 0x5435))
6050 {
6051 resetValue = 0xFF;
6052 }
6053
6054 /* Read the counters. */
6055 gcmkONERROR(
6056 gckOS_ReadRegisterEx(Hardware->os,
6057 Hardware->core,
6058 0x00438,
6059 &profiler->gpuCyclesCounter));
6060 gcmkUPDATE_PROFILE_DATA(gpuCyclesCounter);
6061
6062 gcmkONERROR(
6063 gckOS_ReadRegisterEx(Hardware->os,
6064 Hardware->core,
6065 0x00078,
6066 &profiler->gpuTotalCyclesCounter));
6067 gcmkUPDATE_PROFILE_DATA(gpuTotalCyclesCounter);
6068
6069 if (chipModel == gcv2100 || chipModel == gcv2000 || chipModel == gcv880)
6070 {
6071 gcmkONERROR(
6072 gckOS_ReadRegisterEx(Hardware->os,
6073 Hardware->core,
6074 0x00078,
6075 &profiler->gpuIdleCyclesCounter));
6076 }
6077 else
6078 {
6079 gcmkONERROR(
6080 gckOS_ReadRegisterEx(Hardware->os,
6081 Hardware->core,
6082 0x0007C,
6083 &profiler->gpuIdleCyclesCounter));
6084 }
6085 gcmkUPDATE_PROFILE_DATA(gpuIdleCyclesCounter);
6086
6087 /* Read clock control register. */
6088 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
6089 Hardware->core,
6090 0x00000,
6091 &clock));
6092
6093 profiler->gpuTotalRead64BytesPerFrame = 0;
6094 profiler->gpuTotalWrite64BytesPerFrame = 0;
6095 profiler->pe_pixel_count_killed_by_color_pipe = 0;
6096 profiler->pe_pixel_count_killed_by_depth_pipe = 0;
6097 profiler->pe_pixel_count_drawn_by_color_pipe = 0;
6098 profiler->pe_pixel_count_drawn_by_depth_pipe = 0;
6099
6100 /* Walk through all avaiable pixel pipes. */
6101 for (i = 0; i < Hardware->identity.pixelPipes; ++i)
6102 {
6103 /* Select proper pipe. */
6104 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
6105 Hardware->core,
6106 0x00000,
6107 ((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20))) | (((gctUINT32) ((gctUINT32) (i) & ((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20)))));
6108
6109 /* BW */
6110 gcmkONERROR(
6111 gckOS_ReadRegisterEx(Hardware->os,
6112 Hardware->core,
6113 0x00040,
6114 &totalRead));
6115 gcmkONERROR(
6116 gckOS_ReadRegisterEx(Hardware->os,
6117 Hardware->core,
6118 0x00044,
6119 &totalWrite));
6120
6121 profiler->gpuTotalRead64BytesPerFrame += totalRead;
6122 profiler->gpuTotalWrite64BytesPerFrame += totalWrite;
6123
6124 /* PE */
6125 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &colorKilled));
6126 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &depthKilled));
6127 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &colorDrawn));
6128 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))));gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00454, &depthDrawn));
6129
6130 profiler->pe_pixel_count_killed_by_color_pipe += colorKilled;
6131 profiler->pe_pixel_count_killed_by_depth_pipe += depthKilled;
6132 profiler->pe_pixel_count_drawn_by_color_pipe += colorDrawn;
6133 profiler->pe_pixel_count_drawn_by_depth_pipe += depthDrawn;
6134 }
6135
6136 gcmkUPDATE_PROFILE_DATA(gpuTotalRead64BytesPerFrame);
6137 gcmkUPDATE_PROFILE_DATA(gpuTotalWrite64BytesPerFrame);
6138#if USE_SW_RESET
6139 gcmkRESET_PROFILE_DATA(pe_pixel_count_killed_by_color_pipe, prevPePixelCountKilledByColorPipe);
6140 gcmkRESET_PROFILE_DATA(pe_pixel_count_killed_by_depth_pipe, prevPePixelCountKilledByDepthPipe);
6141 gcmkRESET_PROFILE_DATA(pe_pixel_count_drawn_by_color_pipe, prevPePixelCountDrawnByColorPipe);
6142 gcmkRESET_PROFILE_DATA(pe_pixel_count_drawn_by_depth_pipe, prevPePixelCountDrawnByDepthPipe);
6143#endif
6144 gcmkUPDATE_PROFILE_DATA(pe_pixel_count_killed_by_color_pipe);
6145 gcmkUPDATE_PROFILE_DATA(pe_pixel_count_killed_by_depth_pipe);
6146 gcmkUPDATE_PROFILE_DATA(pe_pixel_count_drawn_by_color_pipe);
6147 gcmkUPDATE_PROFILE_DATA(pe_pixel_count_drawn_by_depth_pipe);
6148
6149 /* Reset clock control register. */
6150 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
6151 Hardware->core,
6152 0x00000,
6153 clock));
6154
6155 /* Reset counters. */
6156 gcmkONERROR(
6157 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x0003C, 1));
6158 gcmkONERROR(
6159 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x0003C, 0));
6160 gcmkONERROR(
6161 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00438, 0));
6162 gcmkONERROR(
6163 gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00078, 0));
6164#if !USE_SW_RESET
6165 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
6166gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))
6167));
6168#endif
6169 /* SH */
6170 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6171gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->ps_inst_counter));
6172 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6173gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->rendered_pixel_counter));
6174 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6175gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vs_inst_counter));
6176 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6177gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->rendered_vertice_counter));
6178 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (11) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6179gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vtx_branch_inst_counter));
6180 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (12) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6181gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->vtx_texld_inst_counter));
6182 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (13) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6183gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->pxl_branch_inst_counter));
6184 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (14) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6185gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0045C, &profiler->pxl_texld_inst_counter));
6186
6187#if USE_SW_RESET
6188 gcmkRESET_PROFILE_DATA(ps_inst_counter, prevPSInstCount);
6189 gcmkRESET_PROFILE_DATA(rendered_pixel_counter, prevPSPixelCount);
6190 gcmkRESET_PROFILE_DATA(vs_inst_counter, prevVSInstCount);
6191 gcmkRESET_PROFILE_DATA(rendered_vertice_counter, prevVSVertexCount);
6192 gcmkRESET_PROFILE_DATA(vtx_branch_inst_counter, prevVSBranchInstCount);
6193 gcmkRESET_PROFILE_DATA(vtx_texld_inst_counter, prevVSTexInstCount);
6194 gcmkRESET_PROFILE_DATA(pxl_branch_inst_counter, prevPSBranchInstCount);
6195 gcmkRESET_PROFILE_DATA(pxl_texld_inst_counter, prevPSTexInstCount);
6196#endif
6197
6198 gcmkUPDATE_PROFILE_DATA(ps_inst_counter);
6199 gcmkUPDATE_PROFILE_DATA(rendered_pixel_counter);
6200 gcmkUPDATE_PROFILE_DATA(vs_inst_counter);
6201 gcmkUPDATE_PROFILE_DATA(rendered_vertice_counter);
6202 gcmkUPDATE_PROFILE_DATA(vtx_branch_inst_counter);
6203 gcmkUPDATE_PROFILE_DATA(vtx_texld_inst_counter);
6204 gcmkUPDATE_PROFILE_DATA(pxl_branch_inst_counter);
6205 gcmkUPDATE_PROFILE_DATA(pxl_texld_inst_counter);
6206
6207#if !USE_SW_RESET
6208 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6209gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00470, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24)))
6210));
6211#endif
6212
6213 /* PA */
6214 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
6215gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_input_vtx_counter));
6216 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (4) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
6217gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_input_prim_counter));
6218 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
6219gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_output_prim_counter));
6220 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
6221gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_depth_clipped_counter));
6222 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
6223gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_trivial_rejected_counter));
6224 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
6225gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00460, &profiler->pa_culled_counter));
6226#if USE_SW_RESET
6227 gcmkRESET_PROFILE_DATA(pa_input_vtx_counter, prevPaInputVtxCounter);
6228 gcmkRESET_PROFILE_DATA(pa_input_prim_counter, prevPaInputPrimCounter);
6229 gcmkRESET_PROFILE_DATA(pa_output_prim_counter, prevPaOutputPrimCounter);
6230 gcmkRESET_PROFILE_DATA(pa_depth_clipped_counter, prevPaDepthClippedCounter);
6231 gcmkRESET_PROFILE_DATA(pa_trivial_rejected_counter, prevPaTrivialRejectedCounter);
6232 gcmkRESET_PROFILE_DATA(pa_culled_counter, prevPaCulledCounter);
6233#endif
6234 gcmkUPDATE_PROFILE_DATA(pa_input_vtx_counter);
6235 gcmkUPDATE_PROFILE_DATA(pa_input_prim_counter);
6236 gcmkUPDATE_PROFILE_DATA(pa_output_prim_counter);
6237 gcmkUPDATE_PROFILE_DATA(pa_depth_clipped_counter);
6238 gcmkUPDATE_PROFILE_DATA(pa_trivial_rejected_counter);
6239 gcmkUPDATE_PROFILE_DATA(pa_culled_counter);
6240#if !USE_SW_RESET
6241 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
6242gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0)))
6243));
6244#endif
6245
6246 /* SE */
6247 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
6248gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00464, &profiler->se_culled_triangle_count));
6249 gcmkUPDATE_PROFILE_DATA(se_culled_triangle_count);
6250 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
6251gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00464, &profiler->se_culled_lines_count));
6252 gcmkUPDATE_PROFILE_DATA(se_culled_lines_count);
6253 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
6254gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8)))
6255));
6256
6257 /* RA */
6258 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
6259gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_valid_pixel_count));
6260 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
6261gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_total_quad_count));
6262 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
6263gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_valid_quad_count_after_early_z));
6264 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
6265gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_total_primitive_count));
6266 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
6267gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_pipe_cache_miss_counter));
6268 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (10) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
6269gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00448, &profiler->ra_prefetch_cache_miss_counter));
6270#if USE_SW_RESET
6271 gcmkRESET_PROFILE_DATA(ra_valid_pixel_count, prevRaValidPixelCount);
6272 gcmkRESET_PROFILE_DATA(ra_total_quad_count, prevRaTotalQuadCount);
6273 gcmkRESET_PROFILE_DATA(ra_valid_quad_count_after_early_z, prevRaValidQuadCountAfterEarlyZ);
6274 gcmkRESET_PROFILE_DATA(ra_total_primitive_count, prevRaTotalPrimitiveCount);
6275 gcmkRESET_PROFILE_DATA(ra_pipe_cache_miss_counter, prevRaPipeCacheMissCounter);
6276 gcmkRESET_PROFILE_DATA(ra_prefetch_cache_miss_counter, prevRaPrefetchCacheMissCounter);
6277#endif
6278 gcmkUPDATE_PROFILE_DATA(ra_valid_pixel_count);
6279 gcmkUPDATE_PROFILE_DATA(ra_total_quad_count);
6280 gcmkUPDATE_PROFILE_DATA(ra_valid_quad_count_after_early_z);
6281 gcmkUPDATE_PROFILE_DATA(ra_total_primitive_count);
6282 gcmkUPDATE_PROFILE_DATA(ra_pipe_cache_miss_counter);
6283 gcmkUPDATE_PROFILE_DATA(ra_prefetch_cache_miss_counter);
6284#if !USE_SW_RESET
6285 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) ));
6286gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 23:16) - (0 ? 23:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:16) - (0 ? 23:16) + 1))))))) << (0 ? 23:16)))
6287));
6288#endif
6289
6290 /* TX */
6291 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6292gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_bilinear_requests));
6293 gcmkUPDATE_PROFILE_DATA(tx_total_bilinear_requests);
6294 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6295gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_trilinear_requests));
6296 gcmkUPDATE_PROFILE_DATA(tx_total_trilinear_requests);
6297 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6298gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_discarded_texture_requests));
6299 gcmkUPDATE_PROFILE_DATA(tx_total_discarded_texture_requests);
6300 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6301gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_total_texture_requests));
6302 gcmkUPDATE_PROFILE_DATA(tx_total_texture_requests);
6303 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (5) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6304gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_mem_read_count));
6305 gcmkUPDATE_PROFILE_DATA(tx_mem_read_count);
6306 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (6) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6307gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_mem_read_in_8B_count));
6308 gcmkUPDATE_PROFILE_DATA(tx_mem_read_in_8B_count);
6309 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (7) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6310gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_miss_count));
6311 gcmkUPDATE_PROFILE_DATA(tx_cache_miss_count);
6312 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (8) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6313gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_hit_texel_count));
6314 gcmkUPDATE_PROFILE_DATA(tx_cache_hit_texel_count);
6315 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (9) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6316gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0044C, &profiler->tx_cache_miss_texel_count));
6317 gcmkUPDATE_PROFILE_DATA(tx_cache_miss_texel_count);
6318 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) ));
6319gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00474, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 31:24) - (0 ? 31:24) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:24) - (0 ? 31:24) + 1))))))) << (0 ? 31:24)))
6320));
6321
6322 /* MC */
6323 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
6324gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_read_req_8B_from_pipeline));
6325 gcmkUPDATE_PROFILE_DATA(mc_total_read_req_8B_from_pipeline);
6326 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
6327gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_read_req_8B_from_IP));
6328 gcmkUPDATE_PROFILE_DATA(mc_total_read_req_8B_from_IP);
6329 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (3) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
6330gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x00468, &profiler->mc_total_write_req_8B_from_pipeline));
6331 gcmkUPDATE_PROFILE_DATA(mc_total_write_req_8B_from_pipeline);
6332 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) ));
6333gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 7:0) - (0 ? 7:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 7:0) - (0 ? 7:0) + 1))))))) << (0 ? 7:0)))
6334));
6335
6336 /* HI */
6337 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
6338gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_read_request_stalled));
6339 gcmkUPDATE_PROFILE_DATA(hi_axi_cycles_read_request_stalled);
6340 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
6341gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_write_request_stalled));
6342 gcmkUPDATE_PROFILE_DATA(hi_axi_cycles_write_request_stalled);
6343 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (2) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
6344gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os, Hardware->core, 0x0046C, &profiler->hi_axi_cycles_write_data_stalled));
6345 gcmkUPDATE_PROFILE_DATA(hi_axi_cycles_write_data_stalled);
6346 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (resetValue) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) ));
6347gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, 0x00478, ((((gctUINT32) (0)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8)))
6348));
6349
6350 /* Success. */
6351 gcmkFOOTER_NO();
6352 return gcvSTATUS_OK;
6353
6354OnError:
6355 /* Return the status. */
6356 gcmkFOOTER();
6357 return status;
6358}
6359#endif
6360
6361
6362gceSTATUS
6363gckHARDWARE_InitProfiler(
6364 IN gckHARDWARE Hardware
6365 )
6366{
6367 gceSTATUS status;
6368 gctUINT32 control;
6369
6370 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
6371 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
6372 Hardware->core,
6373 0x00000,
6374 &control));
6375 /* Enable debug register. */
6376 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
6377 Hardware->core,
6378 0x00000,
6379 ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 11:11) - (0 ? 11:11) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:11) - (0 ? 11:11) + 1))))))) << (0 ? 11:11))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 11:11) - (0 ? 11:11) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 11:11) - (0 ? 11:11) + 1))))))) << (0 ? 11:11)))));
6380
6381OnError:
6382 /* Return the status. */
6383 gcmkFOOTER();
6384 return status;
6385}
6386
6387static gceSTATUS
6388_ResetGPU(
6389 IN gckHARDWARE Hardware,
6390 IN gckOS Os,
6391 IN gceCORE Core
6392 )
6393{
6394 gctUINT32 control, idle;
6395 gceSTATUS status;
6396
6397 for (;;)
6398 {
6399 /* Disable clock gating. */
6400 gcmkONERROR(gckOS_WriteRegisterEx(Os,
6401 Core,
6402 Hardware->powerBaseAddress +
6403 0x00104,
6404 0x00000000));
6405
6406 control = ((((gctUINT32) (0x01590880)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1))))))) << (0 ? 17:17)));
6407
6408 /* Disable pulse-eater. */
6409 gcmkONERROR(gckOS_WriteRegisterEx(Os,
6410 Core,
6411 0x0010C,
6412 control));
6413
6414 gcmkONERROR(gckOS_WriteRegisterEx(Os,
6415 Core,
6416 0x0010C,
6417 ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1))))))) << (0 ? 0:0)))));
6418
6419 gcmkONERROR(gckOS_WriteRegisterEx(Os,
6420 Core,
6421 0x0010C,
6422 control));
6423
6424 gcmkONERROR(gckOS_WriteRegisterEx(Os,
6425 Core,
6426 0x00000,
6427 ((((gctUINT32) (0x00000900)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1))))))) << (0 ? 9:9)))));
6428
6429 gcmkONERROR(gckOS_WriteRegisterEx(Os,
6430 Core,
6431 0x00000,
6432 0x00000900));
6433
6434 /* Wait for clock being stable. */
6435 gcmkONERROR(gckOS_Delay(Os, 1));
6436
6437 /* Isolate the GPU. */
6438 control = ((((gctUINT32) (0x00000900)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)));
6439
6440 gcmkONERROR(gckOS_WriteRegisterEx(Os,
6441 Core,
6442 0x00000,
6443 control));
6444
6445 /* Set soft reset. */
6446 gcmkONERROR(gckOS_WriteRegisterEx(Os,
6447 Core,
6448 0x00000,
6449 ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12)))));
6450
6451 /* Wait for reset. */
6452 gcmkONERROR(gckOS_Delay(Os, 1));
6453
6454 /* Reset soft reset bit. */
6455 gcmkONERROR(gckOS_WriteRegisterEx(Os,
6456 Core,
6457 0x00000,
6458 ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 12:12) - (0 ? 12:12) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 12:12) - (0 ? 12:12) + 1))))))) << (0 ? 12:12)))));
6459
6460 /* Reset GPU isolation. */
6461 control = ((((gctUINT32) (control)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)));
6462
6463 gcmkONERROR(gckOS_WriteRegisterEx(Os,
6464 Core,
6465 0x00000,
6466 control));
6467
6468 /* Read idle register. */
6469 gcmkONERROR(gckOS_ReadRegisterEx(Os,
6470 Core,
6471 0x00004,
6472 &idle));
6473
6474 if ((((((gctUINT32) (idle)) >> (0 ? 0:0)) & ((gctUINT32) ((((1 ? 0:0) - (0 ? 0:0) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 0:0) - (0 ? 0:0) + 1)))))) ) == 0)
6475 {
6476 continue;
6477 }
6478
6479 /* Read reset register. */
6480 gcmkONERROR(gckOS_ReadRegisterEx(Os,
6481 Core,
6482 0x00000,
6483 &control));
6484
6485 if (((((((gctUINT32) (control)) >> (0 ? 16:16)) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) ) == 0)
6486 || ((((((gctUINT32) (control)) >> (0 ? 17:17)) & ((gctUINT32) ((((1 ? 17:17) - (0 ? 17:17) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 17:17) - (0 ? 17:17) + 1)))))) ) == 0)
6487 )
6488 {
6489 continue;
6490 }
6491
6492 /* GPU is idle. */
6493 break;
6494 }
6495
6496 /* Success. */
6497 return gcvSTATUS_OK;
6498
6499OnError:
6500
6501 /* Return the error. */
6502 return status;
6503}
6504
6505gceSTATUS
6506gckHARDWARE_Reset(
6507 IN gckHARDWARE Hardware
6508 )
6509{
6510 gceSTATUS status;
6511
6512 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
6513
6514 /* Verify the arguments. */
6515 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
6516 gcmkVERIFY_OBJECT(Hardware->kernel, gcvOBJ_KERNEL);
6517
6518 /* Hardware reset. */
6519 status = gckOS_ResetGPU(Hardware->os, Hardware->core);
6520
6521 if (gcmIS_ERROR(status))
6522 {
6523 if (Hardware->identity.chipRevision < 0x4600)
6524 {
6525 /* Not supported - we need the isolation bit. */
6526 gcmkONERROR(gcvSTATUS_NOT_SUPPORTED);
6527 }
6528
6529 /* Soft reset. */
6530 gcmkONERROR(_ResetGPU(Hardware, Hardware->os, Hardware->core));
6531 }
6532
6533 /* Initialize hardware. */
6534 gcmkONERROR(gckHARDWARE_InitializeHardware(Hardware));
6535
6536 /* Jump to address into which GPU should run if it doesn't stuck. */
6537 gcmkONERROR(gckHARDWARE_Execute(Hardware, Hardware->kernel->restoreAddress, 16));
6538
6539 gcmkPRINT("[galcore]: recovery done");
6540
6541 /* Success. */
6542 gcmkFOOTER_NO();
6543 return gcvSTATUS_OK;
6544
6545OnError:
6546 gcmkPRINT("[galcore]: Hardware not reset successfully, give up");
6547
6548 /* Return the error. */
6549 gcmkFOOTER();
6550 return status;
6551}
6552
6553gceSTATUS
6554gckHARDWARE_GetBaseAddress(
6555 IN gckHARDWARE Hardware,
6556 OUT gctUINT32_PTR BaseAddress
6557 )
6558{
6559 gceSTATUS status;
6560
6561 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
6562
6563 /* Verify the arguments. */
6564 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
6565 gcmkVERIFY_ARGUMENT(BaseAddress != gcvNULL);
6566
6567 /* Test if we have a new Memory Controller. */
6568 if (((((gctUINT32) (Hardware->identity.chipMinorFeatures)) >> (0 ? 22:22) & ((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1))))))))
6569 {
6570 /* No base address required. */
6571 *BaseAddress = 0;
6572 }
6573 else
6574 {
6575 /* Get the base address from the OS. */
6576 gcmkONERROR(gckOS_GetBaseAddress(Hardware->os, BaseAddress));
6577 }
6578
6579 /* Success. */
6580 gcmkFOOTER_ARG("*BaseAddress=0x%08x", *BaseAddress);
6581 return gcvSTATUS_OK;
6582
6583OnError:
6584 /* Return the status. */
6585 gcmkFOOTER();
6586 return status;
6587}
6588
6589gceSTATUS
6590gckHARDWARE_NeedBaseAddress(
6591 IN gckHARDWARE Hardware,
6592 IN gctUINT32 State,
6593 OUT gctBOOL_PTR NeedBase
6594 )
6595{
6596 gctBOOL need = gcvFALSE;
6597
6598 gcmkHEADER_ARG("Hardware=0x%x State=0x%08x", Hardware, State);
6599
6600 /* Verify the arguments. */
6601 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
6602 gcmkVERIFY_ARGUMENT(NeedBase != gcvNULL);
6603
6604 /* Make sure this is a load state. */
6605 if (((((gctUINT32) (State)) >> (0 ? 31:27) & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1)))))) == (0x01 & ((gctUINT32) ((((1 ? 31:27) - (0 ? 31:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:27) - (0 ? 31:27) + 1))))))))
6606 {
6607 /* 2D addresses don't need a base address. */
6608 }
6609
6610 /* Return the flag. */
6611 *NeedBase = need;
6612
6613 /* Success. */
6614 gcmkFOOTER_ARG("*NeedBase=%d", *NeedBase);
6615 return gcvSTATUS_OK;
6616}
6617
6618gceSTATUS
6619gckHARDWARE_SetIsrManager(
6620 IN gckHARDWARE Hardware,
6621 IN gctISRMANAGERFUNC StartIsr,
6622 IN gctISRMANAGERFUNC StopIsr,
6623 IN gctPOINTER Context
6624 )
6625{
6626 gceSTATUS status = gcvSTATUS_OK;
6627
6628 gcmkHEADER_ARG("Hardware=0x%x, StartIsr=0x%x, StopIsr=0x%x, Context=0x%x",
6629 Hardware, StartIsr, StopIsr, Context);
6630
6631 /* Verify the arguments. */
6632 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
6633
6634 if (StartIsr == gcvNULL ||
6635 StopIsr == gcvNULL ||
6636 Context == gcvNULL)
6637 {
6638 status = gcvSTATUS_INVALID_ARGUMENT;
6639
6640 gcmkFOOTER();
6641 return status;
6642 }
6643
6644 Hardware->startIsr = StartIsr;
6645 Hardware->stopIsr = StopIsr;
6646 Hardware->isrContext = Context;
6647
6648 /* Success. */
6649 gcmkFOOTER();
6650
6651 return status;
6652}
6653
6654/*******************************************************************************
6655**
6656** gckHARDWARE_Compose
6657**
6658** Start a composition.
6659**
6660** INPUT:
6661**
6662** gckHARDWARE Hardware
6663** Pointer to the gckHARDWARE object.
6664**
6665** OUTPUT:
6666**
6667** Nothing.
6668*/
6669gceSTATUS
6670gckHARDWARE_Compose(
6671 IN gckHARDWARE Hardware,
6672 IN gctUINT32 ProcessID,
6673 IN gctPHYS_ADDR Physical,
6674 IN gctPOINTER Logical,
6675 IN gctSIZE_T Offset,
6676 IN gctSIZE_T Size,
6677 IN gctUINT8 EventID
6678 )
6679{
6680 /* Return the status. */
6681 return gcvSTATUS_NOT_SUPPORTED;
6682}
6683
6684/*******************************************************************************
6685**
6686** gckHARDWARE_IsFeatureAvailable
6687**
6688** Verifies whether the specified feature is available in hardware.
6689**
6690** INPUT:
6691**
6692** gckHARDWARE Hardware
6693** Pointer to an gckHARDWARE object.
6694**
6695** gceFEATURE Feature
6696** Feature to be verified.
6697*/
6698gceSTATUS
6699gckHARDWARE_IsFeatureAvailable(
6700 IN gckHARDWARE Hardware,
6701 IN gceFEATURE Feature
6702 )
6703{
6704 gctBOOL available;
6705
6706 gcmkHEADER_ARG("Hardware=0x%x Feature=%d", Hardware, Feature);
6707
6708 /* Verify the arguments. */
6709 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
6710
6711 /* Only features needed by common kernel logic added here. */
6712 switch (Feature)
6713 {
6714 case gcvFEATURE_END_EVENT:
6715 /*available = gcmVERIFYFIELDVALUE(Hardware->identity.chipMinorFeatures2,
6716 GC_MINOR_FEATURES2, END_EVENT, AVAILABLE
6717 );*/
6718 available = gcvFALSE;
6719 break;
6720
6721 case gcvFEATURE_MC20:
6722 available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures)) >> (0 ? 22:22) & ((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1)))))));
6723 break;
6724
6725 case gcvFEATURE_EARLY_Z:
6726 available = ((((gctUINT32) (Hardware->identity.chipFeatures)) >> (0 ? 16:16) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) == (0x0 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))));
6727 break;
6728
6729 case gcvFEATURE_HZ:
6730 available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures)) >> (0 ? 27:27) & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 27:27) - (0 ? 27:27) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 27:27) - (0 ? 27:27) + 1)))))));
6731 break;
6732
6733 case gcvFEATURE_NEW_HZ:
6734 available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures3)) >> (0 ? 26:26) & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 26:26) - (0 ? 26:26) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 26:26) - (0 ? 26:26) + 1)))))));
6735 break;
6736
6737 case gcvFEATURE_FAST_MSAA:
6738 available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures3)) >> (0 ? 8:8) & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 8:8) - (0 ? 8:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 8:8) - (0 ? 8:8) + 1)))))));
6739 break;
6740
6741 case gcvFEATURE_SMALL_MSAA:
6742 available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures4)) >> (0 ? 18:18) & ((gctUINT32) ((((1 ? 18:18) - (0 ? 18:18) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 18:18) - (0 ? 18:18) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 18:18) - (0 ? 18:18) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 18:18) - (0 ? 18:18) + 1)))))));
6743 break;
6744
6745 case gcvFEATURE_DYNAMIC_FREQUENCY_SCALING:
6746 /* This feature doesn't apply for 2D cores. */
6747 available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures2)) >> (0 ? 14:14) & ((gctUINT32) ((((1 ? 14:14) - (0 ? 14:14) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 14:14) - (0 ? 14:14) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 14:14) - (0 ? 14:14) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 14:14) - (0 ? 14:14) + 1)))))))
6748 && ((((gctUINT32) (Hardware->identity.chipFeatures)) >> (0 ? 2:2) & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 2:2) - (0 ? 2:2) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 2:2) - (0 ? 2:2) + 1)))))));
6749
6750 if (Hardware->identity.chipModel == gcv1000 &&
6751 (Hardware->identity.chipRevision == 0x5039 ||
6752 Hardware->identity.chipRevision == 0x5040))
6753 {
6754 available = gcvFALSE;
6755 }
6756 break;
6757
6758 case gcvFEATURE_ACE:
6759 available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures3)) >> (0 ? 18:18) & ((gctUINT32) ((((1 ? 18:18) - (0 ? 18:18) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 18:18) - (0 ? 18:18) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 18:18) - (0 ? 18:18) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 18:18) - (0 ? 18:18) + 1)))))));
6760 break;
6761
6762 case gcvFEATURE_HALTI2:
6763 available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures4)) >> (0 ? 16:16) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1)))))));
6764 break;
6765
6766 case gcvFEATURE_PIPE_2D:
6767 available = ((((gctUINT32) (Hardware->identity.chipFeatures)) >> (0 ? 9:9) & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 9:9) - (0 ? 9:9) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 9:9) - (0 ? 9:9) + 1)))))));
6768 break;
6769
6770 case gcvFEATURE_PIPE_3D:
6771 available = gcvFALSE;
6772 break;
6773
6774 case gcvFEATURE_FC_FLUSH_STALL:
6775 available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures1)) >> (0 ? 31:31) & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 31:31) - (0 ? 31:31) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:31) - (0 ? 31:31) + 1)))))));
6776 break;
6777
6778 case gcvFEATURE_TEX_CACHE_FLUSH_FIX:
6779 available = ((((gctUINT32) (Hardware->identity.chipMinorFeatures5)) >> (0 ? 14:14) & ((gctUINT32) ((((1 ? 14:14) - (0 ? 14:14) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 14:14) - (0 ? 14:14) + 1)))))) == (0x1 & ((gctUINT32) ((((1 ? 14:14) - (0 ? 14:14) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 14:14) - (0 ? 14:14) + 1)))))));
6780 break;
6781
6782 default:
6783 gcmkFATAL("Invalid feature has been requested.");
6784 available = gcvFALSE;
6785 }
6786
6787 /* Return result. */
6788 gcmkFOOTER_ARG("%d", available ? gcvSTATUS_TRUE : gcvSTATUS_FALSE);
6789 return available ? gcvSTATUS_TRUE : gcvSTATUS_FALSE;
6790}
6791
6792/*******************************************************************************
6793**
6794** gckHARDWARE_DumpMMUException
6795**
6796** Dump the MMU debug info on an MMU exception.
6797**
6798** INPUT:
6799**
6800** gckHARDWARE Harwdare
6801** Pointer to an gckHARDWARE object.
6802**
6803** OUTPUT:
6804**
6805** Nothing.
6806*/
6807gceSTATUS
6808gckHARDWARE_DumpMMUException(
6809 IN gckHARDWARE Hardware
6810 )
6811{
6812 gctUINT32 mmu = 0;
6813 gctUINT32 mmuStatus = 0;
6814 gctUINT32 address = 0;
6815 gctUINT32 i = 0;
6816 gctUINT32 mtlb = 0;
6817 gctUINT32 stlb = 0;
6818 gctUINT32 offset = 0;
6819#if gcdPROCESS_ADDRESS_SPACE
6820 gcsDATABASE_PTR database;
6821#endif
6822
6823 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
6824
6825 /* Verify the arguments. */
6826 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
6827
6828 gcmkPRINT("GPU[%d](ChipModel=0x%x ChipRevision=0x%x):\n",
6829 Hardware->core,
6830 Hardware->identity.chipModel,
6831 Hardware->identity.chipRevision);
6832
6833 gcmkPRINT("**************************\n");
6834 gcmkPRINT("*** MMU ERROR DUMP ***\n");
6835 gcmkPRINT("**************************\n");
6836
6837 gcmkVERIFY_OK(
6838 gckOS_ReadRegisterEx(Hardware->os,
6839 Hardware->core,
6840 0x00188,
6841 &mmuStatus));
6842
6843 gcmkPRINT(" MMU status = 0x%08X\n", mmuStatus);
6844
6845 for (i = 0; i < 4; i += 1)
6846 {
6847 mmu = mmuStatus & 0xF;
6848 mmuStatus >>= 4;
6849
6850 if (mmu == 0)
6851 {
6852 continue;
6853 }
6854
6855 switch (mmu)
6856 {
6857 case 1:
6858 gcmkPRINT(" MMU%d: slave not present\n", i);
6859 break;
6860
6861 case 2:
6862 gcmkPRINT(" MMU%d: page not present\n", i);
6863 break;
6864
6865 case 3:
6866 gcmkPRINT(" MMU%d: write violation\n", i);
6867 break;
6868
6869 default:
6870 gcmkPRINT(" MMU%d: unknown state\n", i);
6871 }
6872
6873 gcmkVERIFY_OK(
6874 gckOS_ReadRegisterEx(Hardware->os,
6875 Hardware->core,
6876 0x00190 + i * 4,
6877 &address));
6878
6879 mtlb = (address & gcdMMU_MTLB_MASK) >> gcdMMU_MTLB_SHIFT;
6880 stlb = (address & gcdMMU_STLB_4K_MASK) >> gcdMMU_STLB_4K_SHIFT;
6881 offset = address & gcdMMU_OFFSET_4K_MASK;
6882
6883 gcmkPRINT(" MMU%d: exception address = 0x%08X\n", i, address);
6884
6885 gcmkPRINT(" MTLB entry = %d\n", mtlb);
6886
6887 gcmkPRINT(" STLB entry = %d\n", stlb);
6888
6889 gcmkPRINT(" Offset = 0x%08X (%d)\n", offset, offset);
6890
6891 gckMMU_DumpPageTableEntry(Hardware->kernel->mmu, address);
6892
6893#if gcdPROCESS_ADDRESS_SPACE
6894 for (i = 0; i < gcmCOUNTOF(Hardware->kernel->db->db); ++i)
6895 {
6896 for (database = Hardware->kernel->db->db[i];
6897 database != gcvNULL;
6898 database = database->next)
6899 {
6900 gcmkPRINT(" database [%d] :", database->processID);
6901 gckMMU_DumpPageTableEntry(database->mmu, address);
6902 }
6903 }
6904#endif
6905 }
6906
6907 gcmkFOOTER_NO();
6908 return gcvSTATUS_OK;
6909}
6910
6911/*******************************************************************************
6912**
6913** gckHARDWARE_DumpGPUState
6914**
6915** Dump the GPU debug registers.
6916**
6917** INPUT:
6918**
6919** gckHARDWARE Harwdare
6920** Pointer to an gckHARDWARE object.
6921**
6922** OUTPUT:
6923**
6924** Nothing.
6925*/
6926gceSTATUS
6927gckHARDWARE_DumpGPUState(
6928 IN gckHARDWARE Hardware
6929 )
6930{
6931 static gctCONST_STRING _cmdState[] =
6932 {
6933 "PAR_IDLE_ST", "PAR_DEC_ST", "PAR_ADR0_ST", "PAR_LOAD0_ST",
6934 "PAR_ADR1_ST", "PAR_LOAD1_ST", "PAR_3DADR_ST", "PAR_3DCMD_ST",
6935 "PAR_3DCNTL_ST", "PAR_3DIDXCNTL_ST", "PAR_INITREQDMA_ST",
6936 "PAR_DRAWIDX_ST", "PAR_DRAW_ST", "PAR_2DRECT0_ST", "PAR_2DRECT1_ST",
6937 "PAR_2DDATA0_ST", "PAR_2DDATA1_ST", "PAR_WAITFIFO_ST", "PAR_WAIT_ST",
6938 "PAR_LINK_ST", "PAR_END_ST", "PAR_STALL_ST"
6939 };
6940
6941 static gctCONST_STRING _cmdDmaState[] =
6942 {
6943 "CMD_IDLE_ST", "CMD_START_ST", "CMD_REQ_ST", "CMD_END_ST"
6944 };
6945
6946 static gctCONST_STRING _cmdFetState[] =
6947 {
6948 "FET_IDLE_ST", "FET_RAMVALID_ST", "FET_VALID_ST"
6949 };
6950
6951 static gctCONST_STRING _reqDmaState[] =
6952 {
6953 "REQ_IDLE_ST", "REQ_WAITIDX_ST", "REQ_CAL_ST"
6954 };
6955
6956 static gctCONST_STRING _calState[] =
6957 {
6958 "CAL_IDLE_ST", "CAL_LDADR_ST", "CAL_IDXCALC_ST"
6959 };
6960
6961 static gctCONST_STRING _veReqState[] =
6962 {
6963 "VER_IDLE_ST", "VER_CKCACHE_ST", "VER_MISS_ST"
6964 };
6965
6966 static gcsiDEBUG_REGISTERS _dbgRegs[] =
6967 {
6968 { "RA", 0x474, 16, 0x448, 32, 0x12344321 },
6969 { "TX", 0x474, 24, 0x44C, 32, 0x12211221 },
6970 { "FE", 0x470, 0, 0x450, 32, 0xBABEF00D },
6971 { "PE", 0x470, 16, 0x454, 48, 0xBABEF00D },
6972 { "DE", 0x470, 8, 0x458, 32, 0xBABEF00D },
6973 { "SH", 0x470, 24, 0x45C, 32, 0xDEADBEEF },
6974 { "PA", 0x474, 0, 0x460, 32, 0x0000AAAA },
6975 { "SE", 0x474, 8, 0x464, 32, 0x5E5E5E5E },
6976 { "MC", 0x478, 0, 0x468, 32, 0x12345678 },
6977 { "HI", 0x478, 8, 0x46C, 32, 0xAAAAAAAA }
6978 };
6979
6980 static gctUINT32 _otherRegs[] =
6981 {
6982 0x040, 0x044, 0x04C, 0x050, 0x054, 0x058, 0x05C, 0x060,
6983 0x43c, 0x440, 0x444, 0x414,
6984 };
6985
6986 gceSTATUS status;
6987 gckKERNEL kernel = gcvNULL;
6988 gctUINT32 idle = 0, axi = 0;
6989 gctUINT32 dmaAddress1 = 0, dmaAddress2 = 0;
6990 gctUINT32 dmaState1 = 0, dmaState2 = 0;
6991 gctUINT32 dmaLow = 0, dmaHigh = 0;
6992 gctUINT32 cmdState = 0, cmdDmaState = 0, cmdFetState = 0;
6993 gctUINT32 dmaReqState = 0, calState = 0, veReqState = 0;
6994 gctUINT i;
6995 gctUINT pipe = 0, pixelPipes = 0;
6996 gctUINT32 control = 0, oldControl = 0;
6997 gckOS os = Hardware->os;
6998 gceCORE core = Hardware->core;
6999
7000 gcmkHEADER_ARG("Hardware=0x%X", Hardware);
7001
7002 kernel = Hardware->kernel;
7003
7004 gcmkPRINT_N(12, "GPU[%d](ChipModel=0x%x ChipRevision=0x%x):\n",
7005 core,
7006 Hardware->identity.chipModel,
7007 Hardware->identity.chipRevision);
7008
7009 pixelPipes = Hardware->identity.pixelPipes
7010 ? Hardware->identity.pixelPipes
7011 : 1;
7012
7013 /* Reset register values. */
7014 idle = axi =
7015 dmaState1 = dmaState2 =
7016 dmaAddress1 = dmaAddress2 =
7017 dmaLow = dmaHigh = 0;
7018
7019 /* Verify whether DMA is running. */
7020 gcmkONERROR(_VerifyDMA(
7021 os, core, &dmaAddress1, &dmaAddress2, &dmaState1, &dmaState2
7022 ));
7023
7024 cmdState = dmaState2 & 0x1F;
7025 cmdDmaState = (dmaState2 >> 8) & 0x03;
7026 cmdFetState = (dmaState2 >> 10) & 0x03;
7027 dmaReqState = (dmaState2 >> 12) & 0x03;
7028 calState = (dmaState2 >> 14) & 0x03;
7029 veReqState = (dmaState2 >> 16) & 0x03;
7030
7031 gcmkONERROR(gckOS_ReadRegisterEx(os, core, 0x004, &idle));
7032 gcmkONERROR(gckOS_ReadRegisterEx(os, core, 0x00C, &axi));
7033 gcmkONERROR(gckOS_ReadRegisterEx(os, core, 0x668, &dmaLow));
7034 gcmkONERROR(gckOS_ReadRegisterEx(os, core, 0x66C, &dmaHigh));
7035
7036 gcmkPRINT_N(0, "**************************\n");
7037 gcmkPRINT_N(0, "*** GPU STATE DUMP ***\n");
7038 gcmkPRINT_N(0, "**************************\n");
7039
7040 gcmkPRINT_N(4, " axi = 0x%08X\n", axi);
7041
7042 gcmkPRINT_N(4, " idle = 0x%08X\n", idle);
7043 if ((idle & 0x00000001) == 0) gcmkPRINT_N(0, " FE not idle\n");
7044 if ((idle & 0x00000002) == 0) gcmkPRINT_N(0, " DE not idle\n");
7045 if ((idle & 0x00000004) == 0) gcmkPRINT_N(0, " PE not idle\n");
7046 if ((idle & 0x00000008) == 0) gcmkPRINT_N(0, " SH not idle\n");
7047 if ((idle & 0x00000010) == 0) gcmkPRINT_N(0, " PA not idle\n");
7048 if ((idle & 0x00000020) == 0) gcmkPRINT_N(0, " SE not idle\n");
7049 if ((idle & 0x00000040) == 0) gcmkPRINT_N(0, " RA not idle\n");
7050 if ((idle & 0x00000080) == 0) gcmkPRINT_N(0, " TX not idle\n");
7051 if ((idle & 0x00000100) == 0) gcmkPRINT_N(0, " VG not idle\n");
7052 if ((idle & 0x00000200) == 0) gcmkPRINT_N(0, " IM not idle\n");
7053 if ((idle & 0x00000400) == 0) gcmkPRINT_N(0, " FP not idle\n");
7054 if ((idle & 0x00000800) == 0) gcmkPRINT_N(0, " TS not idle\n");
7055 if ((idle & 0x80000000) != 0) gcmkPRINT_N(0, " AXI low power mode\n");
7056
7057 if (
7058 (dmaAddress1 == dmaAddress2)
7059 && (dmaState1 == dmaState2)
7060 )
7061 {
7062 gcmkPRINT_N(0, " DMA appears to be stuck at this address:\n");
7063 gcmkPRINT_N(4, " 0x%08X\n", dmaAddress1);
7064 }
7065 else
7066 {
7067 if (dmaAddress1 == dmaAddress2)
7068 {
7069 gcmkPRINT_N(0, " DMA address is constant, but state is changing:\n");
7070 gcmkPRINT_N(4, " 0x%08X\n", dmaState1);
7071 gcmkPRINT_N(4, " 0x%08X\n", dmaState2);
7072 }
7073 else
7074 {
7075 gcmkPRINT_N(0, " DMA is running; known addresses are:\n");
7076 gcmkPRINT_N(4, " 0x%08X\n", dmaAddress1);
7077 gcmkPRINT_N(4, " 0x%08X\n", dmaAddress2);
7078 }
7079 }
7080
7081 gcmkPRINT_N(4, " dmaLow = 0x%08X\n", dmaLow);
7082 gcmkPRINT_N(4, " dmaHigh = 0x%08X\n", dmaHigh);
7083 gcmkPRINT_N(4, " dmaState = 0x%08X\n", dmaState2);
7084 gcmkPRINT_N(8, " command state = %d (%s)\n", cmdState, _cmdState [cmdState]);
7085 gcmkPRINT_N(8, " command DMA state = %d (%s)\n", cmdDmaState, _cmdDmaState[cmdDmaState]);
7086 gcmkPRINT_N(8, " command fetch state = %d (%s)\n", cmdFetState, _cmdFetState[cmdFetState]);
7087 gcmkPRINT_N(8, " DMA request state = %d (%s)\n", dmaReqState, _reqDmaState[dmaReqState]);
7088 gcmkPRINT_N(8, " cal state = %d (%s)\n", calState, _calState [calState]);
7089 gcmkPRINT_N(8, " VE request state = %d (%s)\n", veReqState, _veReqState [veReqState]);
7090
7091 /* Record control. */
7092 gckOS_ReadRegisterEx(os, core, 0x0, &oldControl);
7093
7094 for (pipe = 0; pipe < pixelPipes; pipe++)
7095 {
7096 gcmkPRINT_N(4, " Debug registers of pipe[%d]:\n", pipe);
7097
7098 /* Switch pipe. */
7099 gcmkONERROR(gckOS_ReadRegisterEx(os, core, 0x0, &control));
7100 control &= ~(0xF << 20);
7101 control |= (pipe << 20);
7102 gcmkONERROR(gckOS_WriteRegisterEx(os, core, 0x0, control));
7103
7104 for (i = 0; i < gcmCOUNTOF(_dbgRegs); i += 1)
7105 {
7106 gcmkONERROR(_DumpDebugRegisters(os, core, &_dbgRegs[i]));
7107 }
7108
7109 gcmkPRINT_N(0, " Other Registers:\n");
7110 for (i = 0; i < gcmCOUNTOF(_otherRegs); i += 1)
7111 {
7112 gctUINT32 read;
7113 gcmkONERROR(gckOS_ReadRegisterEx(os, core, _otherRegs[i], &read));
7114 gcmkPRINT_N(12, " [0x%04X] 0x%08X\n", _otherRegs[i], read);
7115 }
7116
7117 if (Hardware->mmuVersion)
7118 {
7119 gcmkPRINT(" MMU status from MC[%d]:", pipe);
7120
7121 gckHARDWARE_DumpMMUException(Hardware);
7122 }
7123 }
7124
7125 if (kernel->hardware->identity.chipFeatures & (1 << 4))
7126 {
7127 gctUINT32 read0, read1, write;
7128
7129 read0 = read1 = write = 0;
7130
7131 gcmkONERROR(gckOS_ReadRegisterEx(os, core, 0x43C, &read0));
7132 gcmkONERROR(gckOS_ReadRegisterEx(os, core, 0x440, &read1));
7133 gcmkONERROR(gckOS_ReadRegisterEx(os, core, 0x444, &write));
7134
7135 gcmkPRINT_N(4, " read0 = 0x%08X\n", read0);
7136 gcmkPRINT_N(4, " read1 = 0x%08X\n", read1);
7137 gcmkPRINT_N(4, " write = 0x%08X\n", write);
7138 }
7139
7140 /* Restore control. */
7141 gcmkONERROR(gckOS_WriteRegisterEx(os, core, 0x0, oldControl));
7142
7143 gcmkPRINT_N(0, "**************************\n");
7144 gcmkPRINT_N(0, "***** SW COUNTERS *****\n");
7145 gcmkPRINT_N(0, "**************************\n");
7146 gcmkPRINT_N(4, " Execute Count = 0x%08X\n", Hardware->executeCount);
7147 gcmkPRINT_N(4, " Execute Addr = 0x%08X\n", Hardware->lastExecuteAddress);
7148 gcmkPRINT_N(4, " End Addr = 0x%08X\n", Hardware->lastEnd);
7149
7150 /* dump stack. */
7151 gckOS_DumpCallStack(os);
7152
7153OnError:
7154
7155 /* Return the error. */
7156 gcmkFOOTER();
7157 return status;
7158}
7159
7160static gceSTATUS
7161gckHARDWARE_ReadPerformanceRegister(
7162 IN gckHARDWARE Hardware,
7163 IN gctUINT PerformanceAddress,
7164 IN gctUINT IndexAddress,
7165 IN gctUINT IndexShift,
7166 IN gctUINT Index,
7167 OUT gctUINT32_PTR Value
7168 )
7169{
7170 gceSTATUS status;
7171
7172 gcmkHEADER_ARG("Hardware=0x%x PerformanceAddress=0x%x IndexAddress=0x%x "
7173 "IndexShift=%u Index=%u",
7174 Hardware, PerformanceAddress, IndexAddress, IndexShift,
7175 Index);
7176
7177 /* Write the index. */
7178 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
7179 Hardware->core,
7180 IndexAddress,
7181 Index << IndexShift));
7182
7183 /* Read the register. */
7184 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7185 Hardware->core,
7186 PerformanceAddress,
7187 Value));
7188
7189 /* Test for reset. */
7190 if (Index == 15)
7191 {
7192 /* Index another register to get out of reset. */
7193 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os, Hardware->core, IndexAddress, 0));
7194 }
7195
7196 /* Success. */
7197 gcmkFOOTER_ARG("*Value=0x%x", *Value);
7198 return gcvSTATUS_OK;
7199
7200OnError:
7201 /* Return the status. */
7202 gcmkFOOTER();
7203 return status;
7204}
7205
7206gceSTATUS
7207gckHARDWARE_GetFrameInfo(
7208 IN gckHARDWARE Hardware,
7209 OUT gcsHAL_FRAME_INFO * FrameInfo
7210 )
7211{
7212 gceSTATUS status;
7213 gctUINT i, clock;
7214 gcsHAL_FRAME_INFO info;
7215#if gcdFRAME_DB_RESET
7216 gctUINT reset;
7217#endif
7218
7219 gcmkHEADER_ARG("Hardware=0x%x", Hardware);
7220
7221 /* Get profile tick. */
7222 gcmkONERROR(gckOS_GetProfileTick(&info.ticks));
7223
7224 /* Read SH counters and reset them. */
7225 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7226 Hardware,
7227 0x0045C,
7228 0x00470,
7229 24,
7230 4,
7231 &info.shaderCycles));
7232 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7233 Hardware,
7234 0x0045C,
7235 0x00470,
7236 24,
7237 9,
7238 &info.vsInstructionCount));
7239 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7240 Hardware,
7241 0x0045C,
7242 0x00470,
7243 24,
7244 12,
7245 &info.vsTextureCount));
7246 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7247 Hardware,
7248 0x0045C,
7249 0x00470,
7250 24,
7251 7,
7252 &info.psInstructionCount));
7253 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7254 Hardware,
7255 0x0045C,
7256 0x00470,
7257 24,
7258 14,
7259 &info.psTextureCount));
7260#if gcdFRAME_DB_RESET
7261 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7262 Hardware,
7263 0x0045C,
7264 0x00470,
7265 24,
7266 15,
7267 &reset));
7268#endif
7269
7270 /* Read PA counters and reset them. */
7271 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7272 Hardware,
7273 0x00460,
7274 0x00474,
7275 0,
7276 3,
7277 &info.vertexCount));
7278 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7279 Hardware,
7280 0x00460,
7281 0x00474,
7282 0,
7283 4,
7284 &info.primitiveCount));
7285 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7286 Hardware,
7287 0x00460,
7288 0x00474,
7289 0,
7290 7,
7291 &info.rejectedPrimitives));
7292 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7293 Hardware,
7294 0x00460,
7295 0x00474,
7296 0,
7297 8,
7298 &info.culledPrimitives));
7299 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7300 Hardware,
7301 0x00460,
7302 0x00474,
7303 0,
7304 6,
7305 &info.clippedPrimitives));
7306 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7307 Hardware,
7308 0x00460,
7309 0x00474,
7310 0,
7311 5,
7312 &info.outPrimitives));
7313#if gcdFRAME_DB_RESET
7314 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7315 Hardware,
7316 0x00460,
7317 0x00474,
7318 0,
7319 15,
7320 &reset));
7321#endif
7322
7323 /* Read RA counters and reset them. */
7324 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7325 Hardware,
7326 0x00448,
7327 0x00474,
7328 16,
7329 3,
7330 &info.inPrimitives));
7331 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7332 Hardware,
7333 0x00448,
7334 0x00474,
7335 16,
7336 11,
7337 &info.culledQuadCount));
7338 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7339 Hardware,
7340 0x00448,
7341 0x00474,
7342 16,
7343 1,
7344 &info.totalQuadCount));
7345 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7346 Hardware,
7347 0x00448,
7348 0x00474,
7349 16,
7350 2,
7351 &info.quadCount));
7352 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7353 Hardware,
7354 0x00448,
7355 0x00474,
7356 16,
7357 0,
7358 &info.totalPixelCount));
7359#if gcdFRAME_DB_RESET
7360 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7361 Hardware,
7362 0x00448,
7363 0x00474,
7364 16,
7365 15,
7366 &reset));
7367#endif
7368
7369 /* Read TX counters and reset them. */
7370 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7371 Hardware,
7372 0x0044C,
7373 0x00474,
7374 24,
7375 0,
7376 &info.bilinearRequests));
7377 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7378 Hardware,
7379 0x0044C,
7380 0x00474,
7381 24,
7382 1,
7383 &info.trilinearRequests));
7384 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7385 Hardware,
7386 0x0044C,
7387 0x00474,
7388 24,
7389 8,
7390 &info.txHitCount));
7391 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7392 Hardware,
7393 0x0044C,
7394 0x00474,
7395 24,
7396 9,
7397 &info.txMissCount));
7398 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7399 Hardware,
7400 0x0044C,
7401 0x00474,
7402 24,
7403 6,
7404 &info.txBytes8));
7405#if gcdFRAME_DB_RESET
7406 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7407 Hardware,
7408 0x0044C,
7409 0x00474,
7410 24,
7411 15,
7412 &reset));
7413#endif
7414
7415 /* Read clock control register. */
7416 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7417 Hardware->core,
7418 0x00000,
7419 &clock));
7420
7421 /* Walk through all avaiable pixel pipes. */
7422 for (i = 0; i < Hardware->identity.pixelPipes; ++i)
7423 {
7424 /* Select proper pipe. */
7425 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
7426 Hardware->core,
7427 0x00000,
7428 ((((gctUINT32) (clock)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20))) | (((gctUINT32) ((gctUINT32) (i) & ((gctUINT32) ((((1 ? 23:20) - (0 ? 23:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:20) - (0 ? 23:20) + 1))))))) << (0 ? 23:20)))));
7429
7430 /* Read cycle registers. */
7431 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7432 Hardware->core,
7433 0x00078,
7434 &info.cycles[i]));
7435 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7436 Hardware->core,
7437 0x0007C,
7438 &info.idleCycles[i]));
7439 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7440 Hardware->core,
7441 0x00438,
7442 &info.mcCycles[i]));
7443
7444 /* Read bandwidth registers. */
7445 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7446 Hardware->core,
7447 0x0005C,
7448 &info.readRequests[i]));
7449 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7450 Hardware->core,
7451 0x00040,
7452 &info.readBytes8[i]));
7453 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7454 Hardware->core,
7455 0x00050,
7456 &info.writeRequests[i]));
7457 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7458 Hardware->core,
7459 0x00044,
7460 &info.writeBytes8[i]));
7461
7462 /* Read PE counters. */
7463 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7464 Hardware,
7465 0x00454,
7466 0x00470,
7467 16,
7468 0,
7469 &info.colorKilled[i]));
7470 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7471 Hardware,
7472 0x00454,
7473 0x00470,
7474 16,
7475 2,
7476 &info.colorDrawn[i]));
7477 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7478 Hardware,
7479 0x00454,
7480 0x00470,
7481 16,
7482 1,
7483 &info.depthKilled[i]));
7484 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7485 Hardware,
7486 0x00454,
7487 0x00470,
7488 16,
7489 3,
7490 &info.depthDrawn[i]));
7491 }
7492
7493 /* Zero out remaning reserved counters. */
7494 for (; i < 8; ++i)
7495 {
7496 info.readBytes8[i] = 0;
7497 info.writeBytes8[i] = 0;
7498 info.cycles[i] = 0;
7499 info.idleCycles[i] = 0;
7500 info.mcCycles[i] = 0;
7501 info.readRequests[i] = 0;
7502 info.writeRequests[i] = 0;
7503 info.colorKilled[i] = 0;
7504 info.colorDrawn[i] = 0;
7505 info.depthKilled[i] = 0;
7506 info.depthDrawn[i] = 0;
7507 }
7508
7509 /* Reset clock control register. */
7510 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
7511 Hardware->core,
7512 0x00000,
7513 clock));
7514
7515 /* Reset cycle and bandwidth counters. */
7516 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
7517 Hardware->core,
7518 0x0003C,
7519 1));
7520 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
7521 Hardware->core,
7522 0x0003C,
7523 0));
7524 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
7525 Hardware->core,
7526 0x00078,
7527 0));
7528
7529#if gcdFRAME_DB_RESET
7530 /* Reset PE counters. */
7531 gcmkONERROR(gckHARDWARE_ReadPerformanceRegister(
7532 Hardware,
7533 0x00454,
7534 0x00470,
7535 16,
7536 15,
7537 &reset));
7538#endif
7539
7540 /* Copy to user. */
7541 gcmkONERROR(gckOS_CopyToUserData(Hardware->os,
7542 &info,
7543 FrameInfo,
7544 gcmSIZEOF(info)));
7545
7546 /* Success. */
7547 gcmkFOOTER_NO();
7548 return gcvSTATUS_OK;
7549
7550OnError:
7551 /* Return the status. */
7552 gcmkFOOTER();
7553 return status;
7554}
7555
7556#if gcdDVFS
7557#define READ_FROM_EATER1 0
7558
7559gceSTATUS
7560gckHARDWARE_QueryLoad(
7561 IN gckHARDWARE Hardware,
7562 OUT gctUINT32 * Load
7563 )
7564{
7565 gctUINT32 debug1;
7566 gceSTATUS status;
7567 gcmkHEADER_ARG("Hardware=0x%X", Hardware);
7568
7569 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
7570 gcmkVERIFY_ARGUMENT(Load != gcvNULL);
7571
7572 gckOS_AcquireMutex(Hardware->os, Hardware->powerMutex, gcvINFINITE);
7573
7574 if (Hardware->chipPowerState == gcvPOWER_ON)
7575 {
7576 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7577 Hardware->core,
7578 0x00110,
7579 Load));
7580#if READ_FROM_EATER1
7581 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7582 Hardware->core,
7583 0x00134,
7584 Load));
7585#endif
7586
7587 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7588 Hardware->core,
7589 0x00114,
7590 &debug1));
7591
7592 /* Patch result of 0x110 with result of 0x114. */
7593 if ((debug1 & 0xFF) == 1)
7594 {
7595 *Load &= ~0xFF;
7596 *Load |= 1;
7597 }
7598
7599 if (((debug1 & 0xFF00) >> 8) == 1)
7600 {
7601 *Load &= ~(0xFF << 8);
7602 *Load |= 1 << 8;
7603 }
7604
7605 if (((debug1 & 0xFF0000) >> 16) == 1)
7606 {
7607 *Load &= ~(0xFF << 16);
7608 *Load |= 1 << 16;
7609 }
7610
7611 if (((debug1 & 0xFF000000) >> 24) == 1)
7612 {
7613 *Load &= ~(0xFF << 24);
7614 *Load |= 1 << 24;
7615 }
7616 }
7617 else
7618 {
7619 status = gcvSTATUS_INVALID_REQUEST;
7620 }
7621
7622OnError:
7623
7624 gckOS_ReleaseMutex(Hardware->os, Hardware->powerMutex);
7625
7626 gcmkFOOTER();
7627 return status;
7628}
7629
7630gceSTATUS
7631gckHARDWARE_SetDVFSPeroid(
7632 IN gckHARDWARE Hardware,
7633 OUT gctUINT32 Frequency
7634 )
7635{
7636 gceSTATUS status;
7637 gctUINT32 period;
7638 gctUINT32 eater;
7639
7640#if READ_FROM_EATER1
7641 gctUINT32 period1;
7642 gctUINT32 eater1;
7643#endif
7644
7645 gcmkHEADER_ARG("Hardware=0x%X Frequency=%d", Hardware, Frequency);
7646
7647 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
7648
7649 period = 0;
7650
7651 while((64 << period) < (gcdDVFS_ANAYLSE_WINDOW * Frequency * 1000) )
7652 {
7653 period++;
7654 }
7655
7656#if READ_FROM_EATER1
7657 /*
7658 * Peroid = F * 1000 * 1000 / (60 * 16 * 1024);
7659 */
7660 period1 = Frequency * 6250 / 6114;
7661#endif
7662
7663 gckOS_AcquireMutex(Hardware->os, Hardware->powerMutex, gcvINFINITE);
7664
7665 if (Hardware->chipPowerState == gcvPOWER_ON)
7666 {
7667 /* Get current configure. */
7668 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7669 Hardware->core,
7670 0x0010C,
7671 &eater));
7672
7673 /* Change peroid. */
7674 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
7675 Hardware->core,
7676 0x0010C,
7677 ((((gctUINT32) (eater)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8))) | (((gctUINT32) ((gctUINT32) (period) & ((gctUINT32) ((((1 ? 15:8) - (0 ? 15:8) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 15:8) - (0 ? 15:8) + 1))))))) << (0 ? 15:8)))));
7678
7679#if READ_FROM_EATER1
7680 /* Config eater1. */
7681 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7682 Hardware->core,
7683 0x00130,
7684 &eater1));
7685
7686 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
7687 Hardware->core,
7688 0x00130,
7689 ((((gctUINT32) (eater1)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 31:16) - (0 ? 31:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:16) - (0 ? 31:16) + 1))))))) << (0 ? 31:16))) | (((gctUINT32) ((gctUINT32) (period1) & ((gctUINT32) ((((1 ? 31:16) - (0 ? 31:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 31:16) - (0 ? 31:16) + 1))))))) << (0 ? 31:16)))));
7690#endif
7691 }
7692 else
7693 {
7694 status = gcvSTATUS_INVALID_REQUEST;
7695 }
7696
7697OnError:
7698 gckOS_ReleaseMutex(Hardware->os, Hardware->powerMutex);
7699
7700 gcmkFOOTER();
7701 return status;
7702}
7703
7704gceSTATUS
7705gckHARDWARE_InitDVFS(
7706 IN gckHARDWARE Hardware
7707 )
7708{
7709 gceSTATUS status;
7710 gctUINT32 data;
7711
7712 gcmkHEADER_ARG("Hardware=0x%X", Hardware);
7713
7714 gcmkVERIFY_OBJECT(Hardware, gcvOBJ_HARDWARE);
7715
7716 gcmkONERROR(gckOS_ReadRegisterEx(Hardware->os,
7717 Hardware->core,
7718 0x0010C,
7719 &data));
7720
7721 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 16:16) - (0 ? 16:16) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 16:16) - (0 ? 16:16) + 1))))))) << (0 ? 16:16)));
7722 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 18:18) - (0 ? 18:18) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 18:18) - (0 ? 18:18) + 1))))))) << (0 ? 18:18))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 18:18) - (0 ? 18:18) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 18:18) - (0 ? 18:18) + 1))))))) << (0 ? 18:18)));
7723 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 19:19) - (0 ? 19:19) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 19:19) - (0 ? 19:19) + 1))))))) << (0 ? 19:19)));
7724 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 20:20) - (0 ? 20:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:20) - (0 ? 20:20) + 1))))))) << (0 ? 20:20))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 20:20) - (0 ? 20:20) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 20:20) - (0 ? 20:20) + 1))))))) << (0 ? 20:20)));
7725 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))) << (0 ? 23:23))) | (((gctUINT32) ((gctUINT32) (1) & ((gctUINT32) ((((1 ? 23:23) - (0 ? 23:23) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 23:23) - (0 ? 23:23) + 1))))))) << (0 ? 23:23)));
7726 data = ((((gctUINT32) (data)) & ~(((gctUINT32) (((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1))))))) << (0 ? 22:22))) | (((gctUINT32) ((gctUINT32) (0) & ((gctUINT32) ((((1 ? 22:22) - (0 ? 22:22) + 1) == 32) ? ~0 : (~(~0 << ((1 ? 22:22) - (0 ? 22:22) + 1))))))) << (0 ? 22:22)));
7727
7728 gcmkTRACE_ZONE(gcvLEVEL_INFO, gcvZONE_HARDWARE,
7729 "DVFS Configure=0x%X",
7730 data);
7731
7732 gcmkONERROR(gckOS_WriteRegisterEx(Hardware->os,
7733 Hardware->core,
7734 0x0010C,
7735 data));
7736
7737 gcmkFOOTER_NO();
7738 return gcvSTATUS_OK;
7739
7740OnError:
7741 gcmkFOOTER();
7742 return status;
7743}
7744#endif
7745
7746/*******************************************************************************
7747**
7748** gckHARDWARE_PrepareFunctions
7749**
7750** Generate command buffer snippets which will be used by gckHARDWARE, by which
7751** gckHARDWARE can manipulate GPU by FE command without using gckCOMMAND to avoid
7752** race condition and deadlock.
7753**
7754** Notice:
7755** 1. Each snippet can only be executed when GPU is idle.
7756** 2. Execution is triggered by AHB (0x658)
7757** 3. Each snippet followed by END so software can sync with GPU by checking GPU
7758** idle
7759** 4. It is transparent to gckCOMMAND command buffer.
7760**
7761** Existing Snippets:
7762** 1. MMU Configure
7763** For new MMU, after GPU is reset, FE execute this command sequence to enble MMU.
7764*/
7765gceSTATUS
7766gckHARDWARE_PrepareFunctions(
7767 gckHARDWARE Hardware
7768 )
7769{
7770 gceSTATUS status;
7771 gckOS os;
7772 gctUINT32 offset = 0;
7773 gctUINT32 mmuBytes;
7774 gctUINT32 endBytes;
7775 gctUINT8_PTR logical;
7776 gctPHYS_ADDR_T physical;
7777
7778 gcmkHEADER_ARG("%x", Hardware);
7779
7780 os = Hardware->os;
7781
7782 gcmkVERIFY_OK(gckOS_GetPageSize(os, &Hardware->functionBytes));
7783
7784 /* Allocate a command buffer. */
7785 gcmkONERROR(gckOS_AllocateNonPagedMemory(
7786 os,
7787 gcvFALSE,
7788 &Hardware->functionBytes,
7789 &Hardware->functionPhysical,
7790 &Hardware->functionLogical
7791 ));
7792
7793 gcmkONERROR(gckOS_GetPhysicalAddress(
7794 os,
7795 Hardware->functionLogical,
7796 &physical
7797 ));
7798
7799 gcmkSAFECASTPHYSADDRT(Hardware->functionAddress, physical);
7800
7801 if (Hardware->mmuVersion > 0)
7802 {
7803 /* MMU configure command sequence. */
7804 logical = (gctUINT8_PTR)Hardware->functionLogical + offset;
7805
7806 Hardware->functions[gcvHARDWARE_FUNCTION_MMU].address
7807 = Hardware->functionAddress + offset;
7808
7809 gcmkONERROR(gckHARDWARE_SetMMUStates(
7810 Hardware,
7811 Hardware->kernel->mmu->mtlbLogical,
7812 gcvMMU_MODE_4K,
7813 (gctUINT8_PTR)Hardware->kernel->mmu->mtlbLogical + gcdMMU_MTLB_SIZE,
7814 logical,
7815 &mmuBytes
7816 ));
7817
7818 offset += mmuBytes;
7819
7820 logical = (gctUINT8_PTR)Hardware->functionLogical + offset;
7821
7822 gcmkONERROR(gckHARDWARE_End(
7823 Hardware,
7824 gcvNULL,
7825 &endBytes
7826 ));
7827
7828 gcmkONERROR(gckHARDWARE_End(
7829 Hardware,
7830 logical,
7831 &endBytes
7832 ));
7833
7834 offset += endBytes;
7835
7836 Hardware->functions[gcvHARDWARE_FUNCTION_MMU].bytes = mmuBytes + endBytes;
7837
7838 Hardware->functions[gcvHARDWARE_FUNCTION_MMU].endAddress =
7839 Hardware->functions[gcvHARDWARE_FUNCTION_MMU].address + mmuBytes;
7840
7841 Hardware->functions[gcvHARDWARE_FUNCTION_MMU].endLogical =
7842 logical + mmuBytes;
7843 }
7844
7845 gcmkASSERT(offset < Hardware->functionBytes);
7846
7847 gcmkFOOTER_NO();
7848 return gcvSTATUS_OK;
7849
7850OnError:
7851 gcmkFOOTER();
7852 return status;
7853}
7854
7855gceSTATUS
7856gckHARDWARE_AddressInHardwareFuncions(
7857 IN gckHARDWARE Hardware,
7858 IN gctUINT32 Address,
7859 OUT gctPOINTER *Pointer
7860 )
7861{
7862 if (Address >= Hardware->functionAddress && Address <= Hardware->functionAddress - 1 + Hardware->functionBytes)
7863 {
7864 *Pointer = (gctUINT8_PTR)Hardware->functionLogical
7865 + (Address - Hardware->functionAddress)
7866 ;
7867
7868 return gcvSTATUS_OK;
7869 }
7870
7871 return gcvSTATUS_NOT_FOUND;
7872}
7873
7874gceSTATUS
7875gckHARDWARE_QueryStateTimer(
7876 IN gckHARDWARE Hardware,
7877 OUT gctUINT64_PTR Start,
7878 OUT gctUINT64_PTR End,
7879 OUT gctUINT64_PTR On,
7880 OUT gctUINT64_PTR Off,
7881 OUT gctUINT64_PTR Idle,
7882 OUT gctUINT64_PTR Suspend
7883 )
7884{
7885 gckOS_AcquireMutex(Hardware->os, Hardware->powerMutex, gcvINFINITE);
7886
7887 gckSTATETIMER_Query(
7888 &Hardware->powerStateTimer, Hardware->chipPowerState, Start, End, On, Off, Idle, Suspend);
7889
7890 gckOS_ReleaseMutex(Hardware->os, Hardware->powerMutex);
7891
7892 return gcvSTATUS_OK;
7893}
7894
generated by cgit v1.2.3 (git 2.39.2)