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Diffstat (limited to 'Basic-Test-Package/MSP432/Test_MSP432_3wSPI_SlaveIRQ_CC2650_Master/I3MSP432P401R.cmd')
-rw-r--r--Basic-Test-Package/MSP432/Test_MSP432_3wSPI_SlaveIRQ_CC2650_Master/I3MSP432P401R.cmd66
1 files changed, 66 insertions, 0 deletions
diff --git a/Basic-Test-Package/MSP432/Test_MSP432_3wSPI_SlaveIRQ_CC2650_Master/I3MSP432P401R.cmd b/Basic-Test-Package/MSP432/Test_MSP432_3wSPI_SlaveIRQ_CC2650_Master/I3MSP432P401R.cmd
new file mode 100644
index 0000000..b781143
--- /dev/null
+++ b/Basic-Test-Package/MSP432/Test_MSP432_3wSPI_SlaveIRQ_CC2650_Master/I3MSP432P401R.cmd
@@ -0,0 +1,66 @@
1/*
2 * Copyright (c) 2015-2016, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32/*
33 * ======== MSP_EXP432P401R.cmd ========
34 * Define the memory block start/length for the MSP_EXP432P401R M4
35 */
36
37MEMORY
38{
39 MAIN (RX) : origin = 0x00000000, length = 0x00040000
40 INFO (RX) : origin = 0x00200000, length = 0x00004000
41 SRAM_CODE (RWX): origin = 0x01000000, length = 0x00010000
42 SRAM_DATA (RW) : origin = 0x20000000, length = 0x00010000
43}
44
45/* Section allocation in memory */
46
47SECTIONS
48{
49 .text : > MAIN
50 .const : > MAIN
51 .cinit : > MAIN
52 .pinit : > MAIN
53
54#ifdef __TI_COMPILER_VERSION__
55#if __TI_COMPILER_VERSION__ >= 15009000
56 .TI.ramfunc : {} load=MAIN, run=SRAM_CODE, table(BINIT)
57#endif
58#endif
59 .data : > SRAM_DATA
60 .bss : > SRAM_DATA
61 .sysmem : > SRAM_DATA
62 .stack : > SRAM_DATA (HIGH)
63}
64
65/* Symbolic definition of the WDTCTL register for RTS */
66WDTCTL_SYM = 0x4000480C;