Before IPU2 crashed, performs crash_reset to reset IVA-HD

When BIOS detected a crash, adding a callback into System.abortFxn
to call crash_reset.
In crash_reset, it will perform clean up and release the IVA
subsystem resets by asserting reset for RST_LOGIC (IVA Logic and SL2),
RST_SEQ2 (IVA Sequencer CPU2) and RST_SEQ1 (IVA Sequencer CPU1).

When IPU comes back up, ivahd_init() will perform the iva_boot().
The RM_IVA_RSTCTRL will be the same as when it is power on boot.

Change-Id: Ice1b0a318fd00a3a88cbd5ce0cf1c54130823c4c
Signed-off-by: Buddy Liong <a0270631@ti.com>

3 files changed, 62 insertions, 2 deletions

diff --git a/platform/ti/configs/omap54xx/IpcCommon.cfg.xs b/platform/ti/configs/omap54xx/IpcCommon.cfg.xs
index a322b0c..28c90cd 100644
--- a/platform/ti/configs/omap54xx/IpcCommon.cfg.xs
+++ b/platform/ti/configs/omap54xx/IpcCommon.cfg.xs
@@ -38,6 +38,7 @@ var System      = xdc.useModule('xdc.runtime.System');
 var SysMin      = xdc.useModule('ti.trace.SysMin');
 System.SupportProxy = SysMin;
 SysMin.bufSize  = 0x8000;
+System.abortFxn = "&crash_reset";
 
 /* Define default memory heap properties */
 var Memory      = xdc.useModule('xdc.runtime.Memory');
diff --git a/platform/ti/configs/vayu/IpcCommon.cfg.xs b/platform/ti/configs/vayu/IpcCommon.cfg.xs
index 5fcccf4..c70bdc5 100644
--- a/platform/ti/configs/vayu/IpcCommon.cfg.xs
+++ b/platform/ti/configs/vayu/IpcCommon.cfg.xs
@@ -38,6 +38,7 @@ var System      = xdc.useModule('xdc.runtime.System');
 var SysMin      = xdc.useModule('ti.trace.SysMin');
 System.SupportProxy = SysMin;
 SysMin.bufSize  = 0x8000;
+System.abortFxn = "&crash_reset";
 
 /* Define default memory heap properties */
 var Memory      = xdc.useModule('xdc.runtime.Memory');
diff --git a/src/ti/framework/dce/ivahd.c b/src/ti/framework/dce/ivahd.c
index 1262ff5..6d74646 100644
--- a/src/ti/framework/dce/ivahd.c
+++ b/src/ti/framework/dce/ivahd.c
@@ -223,6 +223,8 @@ void ivahd_boot(void)
     while(((CM_IVAHD_CLKSTCTRL) & 0x100) & ~0x100 ) {
         ;
     }
+
+    DEBUG("ivahd_boot() CM_IVAHD_CLKCTRL 0x%x CM_IVAHD_CLKSTCTRL 0x%x", CM_IVAHD_CLKCTRL, CM_IVAHD_CLKSTCTRL);
 }
 
 int ivahd_reset(void *handle, void *iresHandle)
@@ -231,7 +233,8 @@ int ivahd_reset(void *handle, void *iresHandle)
      * Reset IVA HD, SL2 and ICONTs
      */
 
-    DEBUG("Resetting IVAHD...");
+    DEBUG("Resetting IVAHD START CM_IVAHD_CLKCTRL 0x%x CM_IVAHD_CLKSTCTRL 0x%x", CM_IVAHD_CLKCTRL, CM_IVAHD_CLKSTCTRL);
+
 
     /* First put IVA into HW Auto mode */
     CM_IVAHD_CLKSTCTRL |= 0x00000003;
@@ -245,7 +248,7 @@ int ivahd_reset(void *handle, void *iresHandle)
     CM_IVAHD_CLKCTRL = 0x00000000;
     CM_IVAHD_SL2_CLKCTRL = 0x00000000;
 
-    /* Ensure that IVAHD and SL2 are disabled */
+    /* Ensure that IVAHD and SL2 are enabled */
     while( !(CM_IVAHD_CLKCTRL & 0x00030000)) {
         ;
     }
@@ -254,6 +257,21 @@ int ivahd_reset(void *handle, void *iresHandle)
         ;
     }
 
+    /* Precondition - TRM DRA7xx Sec. 3.5.6.5 IVA Subsystem Software Warm Reset Sequence
+     * 1. IVA Sequencer CPUS are in IDLE state: CM_IVAHD_CLKCTRL[17:16] IDLEST - has a value 0x2.
+     * 2. IVA subsystem is in STANDBY state: CM_IVAHD_CLKCTRL[18] STBYST - has a value of 0x1.
+     */
+    while( !(CM_IVAHD_CLKCTRL & 0x00060000) ) {
+        ;
+    }
+
+    /* 3. The functional clock to the IVA subsystem has been gated by the PRCM module
+     * CM_IVA_CLKSTCTRL[8] - has a value of 0x0
+     */
+    while( CM_IVAHD_CLKSTCTRL & 0x100) {
+        ;
+    }
+
     /* Reset IVAHD sequencers and SL2 */
     RM_IVAHD_RSTCTRL |= 0x00000007;
 
@@ -288,9 +306,49 @@ int ivahd_reset(void *handle, void *iresHandle)
         ;
     }
 
+    DEBUG("Resetting IVAHD COMPLETED");
     return (TRUE);
 }
 
+void crash_reset() {
+    ERROR("Received crash_reset");
+
+    IRES_Status ret;
+
+    /* RMAN_unregister IRESMAN_TILEDMEMORY */
+    ret = RMAN_unregister(&IRESMAN_TILEDMEMORY);
+    if( ret != IRES_OK ) {
+        ERROR("RMAN_unregister on IRESMAN_TILEDMEMORY fail with ret %d", ret);
+    }
+
+    /* RMAN_unregister IRESMAN_HDVICP */
+    ret = RMAN_unregister(&IRESMAN_HDVICP);
+    if( ret != IRES_OK ) {
+        ERROR("RMAN_unregister on IRESMAN_HDVICP fail with ret %d", ret);
+    }
+
+    /* RMAN_exit */
+    ret = RMAN_exit();
+    if( ret != IRES_OK ) {
+        ERROR("RMAN_exit fail with ret %d", ret);
+    }
+
+    CERuntime_exit();
+
+    ERROR("crash_reset() CM_IVAHD_CLKCTRL 0x%x CM_IVAHD_CLKSTCTRL 0x%x", CM_IVAHD_CLKCTRL, CM_IVAHD_CLKSTCTRL);
+
+    if( CM_IVAHD_CLKSTCTRL & 0x100 ) {
+        ERROR("crash_report detects IVA_GCLK is running or gate transition on-going");
+    }
+
+    /* RESET RST_LOGIC, RST_SEQ2, and RST_SEQ1 before crashing */
+    RM_IVAHD_RSTCTRL = 0x00000007;
+
+    ERROR("crash_reset() RM_IVAHD_RSTCTRL 0x%x - calling abort NOW", RM_IVAHD_RSTCTRL);
+    abort();
+}
+
+
 static int    ivahd_use_cnt = 0;
 
 #ifdef ENABLE_DEAD_CODE