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authorDave Gerlach2020-09-28 23:57:04 -0500
committerDave Gerlach2020-12-14 12:26:25 -0600
commit11a1ec133dab0f7c86551300b406a680156bfc55 (patch)
tree57d21d2d15a4c966f3f4784f2264711de7ba7d79
parentd3e9292f1b83389efcf51f1a5428a4eaad536057 (diff)
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scripts: sysfw_boardcfg_*: Update scripts and rules to latest
Update to the latest boardcfg validator script and rules corresponding to System Firmware v2020.08b Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
-rw-r--r--scripts/sysfw_boardcfg_rules.json870
-rwxr-xr-xscripts/sysfw_boardcfg_validator.py5
2 files changed, 871 insertions, 4 deletions
diff --git a/scripts/sysfw_boardcfg_rules.json b/scripts/sysfw_boardcfg_rules.json
index 082aab93c..284b9646a 100644
--- a/scripts/sysfw_boardcfg_rules.json
+++ b/scripts/sysfw_boardcfg_rules.json
@@ -1366,6 +1366,417 @@
1366 } 1366 }
1367 ] 1367 ]
1368 }, 1368 },
1369 "j721e_legacy": {
1370 "values": [
1371 {
1372 "name": "RESASG_UTYPE(J721E_DEV_C66SS0_INTROUTER0, RESASG_SUBTYPE_IR_OUTPUT)",
1373 "type": 7744,
1374 "start_resource": 4,
1375 "num_resource": 93
1376 },
1377 {
1378 "name": "RESASG_UTYPE(J721E_DEV_C66SS1_INTROUTER0, RESASG_SUBTYPE_IR_OUTPUT)",
1379 "type": 7808,
1380 "start_resource": 4,
1381 "num_resource": 93
1382 },
1383 {
1384 "name": "RESASG_UTYPE(J721E_DEV_CMPEVENT_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1385 "type": 7872,
1386 "start_resource": 0,
1387 "num_resource": 32
1388 },
1389 {
1390 "name": "RESASG_UTYPE(J721E_DEV_MAIN2MCU_LVL_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1391 "type": 8192,
1392 "start_resource": 0,
1393 "num_resource": 64
1394 },
1395 {
1396 "name": "RESASG_UTYPE(J721E_DEV_MAIN2MCU_PLS_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1397 "type": 8320,
1398 "start_resource": 0,
1399 "num_resource": 48
1400 },
1401 {
1402 "name": "RESASG_UTYPE(J721E_DEV_GPIOMUX_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1403 "type": 8384,
1404 "start_resource": 0,
1405 "num_resource": 64
1406 },
1407 {
1408 "name": "RESASG_UTYPE(J721E_DEV_R5FSS0_INTROUTER0, RESASG_SUBTYPE_IR_OUTPUT)",
1409 "type": 8576,
1410 "start_resource": 0,
1411 "num_resource": 256
1412 },
1413 {
1414 "name": "RESASG_UTYPE(J721E_DEV_R5FSS1_INTROUTER0, RESASG_SUBTYPE_IR_OUTPUT)",
1415 "type": 8640,
1416 "start_resource": 0,
1417 "num_resource": 256
1418 },
1419 {
1420 "name": "RESASG_UTYPE(J721E_DEV_TIMESYNC_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1421 "type": 8704,
1422 "start_resource": 0,
1423 "num_resource": 48
1424 },
1425 {
1426 "name": "RESASG_UTYPE(J721E_DEV_WKUP_GPIOMUX_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1427 "type": 8768,
1428 "start_resource": 0,
1429 "num_resource": 32
1430 },
1431 {
1432 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_MODSS_INTAGGR_0, RESASG_SUBTYPE_IA_VINT)",
1433 "type": 13258,
1434 "start_resource": 0,
1435 "num_resource": 64
1436 },
1437 {
1438 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_MODSS_INTAGGR_0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
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1440 "start_resource": 20480,
1441 "num_resource": 1024
1442 },
1443 {
1444 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_MODSS_INTAGGR_1, RESASG_SUBTYPE_IA_VINT)",
1445 "type": 13322,
1446 "start_resource": 0,
1447 "num_resource": 64
1448 },
1449 {
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1451 "type": 13325,
1452 "start_resource": 22528,
1453 "num_resource": 1024
1454 },
1455 {
1456 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, RESASG_SUBTYPE_IA_VINT)",
1457 "type": 13386,
1458 "start_resource": 38,
1459 "num_resource": 218
1460 },
1461 {
1462 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
1463 "type": 13389,
1464 "start_resource": 38,
1465 "num_resource": 4570
1466 },
1467 {
1468 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_PROXY_0, RESASG_SUBTYPE_PROXY_PROXIES)",
1469 "type": 13440,
1470 "start_resource": 0,
1471 "num_resource": 64
1472 },
1473 {
1474 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_ERROR_OES)",
1475 "type": 13504,
1476 "start_resource": 0,
1477 "num_resource": 1
1478 },
1479 {
1480 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_GP)",
1481 "type": 13505,
1482 "start_resource": 440,
1483 "num_resource": 534
1484 },
1485 {
1486 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_RX)",
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1488 "start_resource": 316,
1489 "num_resource": 124
1490 },
1491 {
1492 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_TX)",
1493 "type": 13507,
1494 "start_resource": 16,
1495 "num_resource": 124
1496 },
1497 {
1498 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_TX_EXT)",
1499 "type": 13508,
1500 "start_resource": 140,
1501 "num_resource": 160
1502 },
1503 {
1504 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_RX_H)",
1505 "type": 13509,
1506 "start_resource": 304,
1507 "num_resource": 12
1508 },
1509 {
1510 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_RX_UH)",
1511 "type": 13510,
1512 "start_resource": 300,
1513 "num_resource": 4
1514 },
1515 {
1516 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_TX_H)",
1517 "type": 13511,
1518 "start_resource": 4,
1519 "num_resource": 12
1520 },
1521 {
1522 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_TX_UH)",
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1524 "start_resource": 0,
1525 "num_resource": 4
1526 },
1527 {
1528 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_VIRTID)",
1529 "type": 13514,
1530 "start_resource": 0,
1531 "num_resource": 4096
1532 },
1533 {
1534 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_MONITORS)",
1535 "type": 13515,
1536 "start_resource": 0,
1537 "num_resource": 32
1538 },
1539 {
1540 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON)",
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1542 "start_resource": 140,
1543 "num_resource": 160
1544 },
1545 {
1546 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES)",
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1548 "start_resource": 0,
1549 "num_resource": 1
1550 },
1551 {
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1553 "type": 13570,
1554 "start_resource": 49152,
1555 "num_resource": 1024
1556 },
1557 {
1558 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG)",
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1560 "start_resource": 0,
1561 "num_resource": 1
1562 },
1563 {
1564 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_CHAN)",
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1566 "start_resource": 16,
1567 "num_resource": 124
1568 },
1569 {
1570 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_HCHAN)",
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1572 "start_resource": 4,
1573 "num_resource": 12
1574 },
1575 {
1576 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_UHCHAN)",
1577 "type": 13580,
1578 "start_resource": 0,
1579 "num_resource": 4
1580 },
1581 {
1582 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_TX_CHAN)",
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1584 "start_resource": 16,
1585 "num_resource": 124
1586 },
1587 {
1588 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_TX_ECHAN)",
1589 "type": 13582,
1590 "start_resource": 140,
1591 "num_resource": 160
1592 },
1593 {
1594 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_TX_HCHAN)",
1595 "type": 13583,
1596 "start_resource": 4,
1597 "num_resource": 12
1598 },
1599 {
1600 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_TX_UHCHAN)",
1601 "type": 13584,
1602 "start_resource": 0,
1603 "num_resource": 4
1604 },
1605 {
1606 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
1607 "type": 13632,
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1609 "num_resource": 178
1610 },
1611 {
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1614 "start_resource": 196,
1615 "num_resource": 28
1616 },
1617 {
1618 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
1619 "type": 13632,
1620 "start_resource": 228,
1621 "num_resource": 28
1622 },
1623 {
1624 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
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1626 "start_resource": 260,
1627 "num_resource": 28
1628 },
1629 {
1630 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
1631 "type": 13632,
1632 "start_resource": 292,
1633 "num_resource": 52
1634 },
1635 {
1636 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
1637 "type": 13632,
1638 "start_resource": 348,
1639 "num_resource": 28
1640 },
1641 {
1642 "name": "RESASG_UTYPE(J721E_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
1643 "type": 13632,
1644 "start_resource": 380,
1645 "num_resource": 132
1646 },
1647 {
1648 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0, RESASG_SUBTYPE_IA_VINT)",
1649 "type": 14922,
1650 "start_resource": 8,
1651 "num_resource": 248
1652 },
1653 {
1654 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_UDMASS_INTA_0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
1655 "type": 14925,
1656 "start_resource": 16392,
1657 "num_resource": 1528
1658 },
1659 {
1660 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_PROXY0, RESASG_SUBTYPE_PROXY_PROXIES)",
1661 "type": 14976,
1662 "start_resource": 1,
1663 "num_resource": 63
1664 },
1665 {
1666 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_ERROR_OES)",
1667 "type": 15040,
1668 "start_resource": 0,
1669 "num_resource": 1
1670 },
1671 {
1672 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_GP)",
1673 "type": 15041,
1674 "start_resource": 96,
1675 "num_resource": 156
1676 },
1677 {
1678 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX)",
1679 "type": 15042,
1680 "start_resource": 50,
1681 "num_resource": 43
1682 },
1683 {
1684 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX)",
1685 "type": 15043,
1686 "start_resource": 2,
1687 "num_resource": 44
1688 },
1689 {
1690 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX_H)",
1691 "type": 15045,
1692 "start_resource": 48,
1693 "num_resource": 2
1694 },
1695 {
1696 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_H)",
1697 "type": 15047,
1698 "start_resource": 0,
1699 "num_resource": 2
1700 },
1701 {
1702 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_VIRTID)",
1703 "type": 15050,
1704 "start_resource": 0,
1705 "num_resource": 4096
1706 },
1707 {
1708 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_MONITORS)",
1709 "type": 15051,
1710 "start_resource": 0,
1711 "num_resource": 32
1712 },
1713 {
1714 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON)",
1715 "type": 15104,
1716 "start_resource": 48,
1717 "num_resource": 48
1718 },
1719 {
1720 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES)",
1721 "type": 15105,
1722 "start_resource": 0,
1723 "num_resource": 1
1724 },
1725 {
1726 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER)",
1727 "type": 15106,
1728 "start_resource": 56320,
1729 "num_resource": 256
1730 },
1731 {
1732 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG)",
1733 "type": 15107,
1734 "start_resource": 0,
1735 "num_resource": 1
1736 },
1737 {
1738 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_CHAN)",
1739 "type": 15114,
1740 "start_resource": 2,
1741 "num_resource": 43
1742 },
1743 {
1744 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_HCHAN)",
1745 "type": 15115,
1746 "start_resource": 0,
1747 "num_resource": 2
1748 },
1749 {
1750 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_TX_CHAN)",
1751 "type": 15117,
1752 "start_resource": 2,
1753 "num_resource": 44
1754 },
1755 {
1756 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_TX_HCHAN)",
1757 "type": 15119,
1758 "start_resource": 0,
1759 "num_resource": 2
1760 },
1761 {
1762 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_INTR_0, RESASG_SUBTYPE_IR_OUTPUT)",
1763 "type": 15168,
1764 "start_resource": 4,
1765 "num_resource": 28
1766 },
1767 {
1768 "name": "RESASG_UTYPE(J721E_DEV_MCU_NAVSS0_INTR_0, RESASG_SUBTYPE_IR_OUTPUT)",
1769 "type": 15168,
1770 "start_resource": 36,
1771 "num_resource": 28
1772 }
1773 ],
1774 "constraints": [
1775 {
1776 "max_resource_entries": 600
1777 }
1778 ]
1779 },
1369 "j7200": { 1780 "j7200": {
1370 "values": [ 1781 "values": [
1371 { 1782 {
@@ -1716,6 +2127,465 @@
1716 "max_resource_entries": 540 2127 "max_resource_entries": 540
1717 } 2128 }
1718 ] 2129 ]
2130 },
2131 "am64x": {
2132 "values": [
2133 {
2134 "name": "RESASG_UTYPE(AM64X_DEV_CMP_EVENT_INTROUTER0, RESASG_SUBTYPE_IR_OUTPUT)",
2135 "type": 64,
2136 "start_resource": 0,
2137 "num_resource": 43
2138 },
2139 {
2140 "name": "RESASG_UTYPE(AM64X_DEV_MAIN_GPIOMUX_INTROUTER0, RESASG_SUBTYPE_IR_OUTPUT)",
2141 "type": 192,
2142 "start_resource": 0,
2143 "num_resource": 54
2144 },
2145 {
2146 "name": "RESASG_UTYPE(AM64X_DEV_MCU_MCU_GPIOMUX_INTROUTER0, RESASG_SUBTYPE_IR_OUTPUT)",
2147 "type": 320,
2148 "start_resource": 0,
2149 "num_resource": 12
2150 },
2151 {
2152 "name": "RESASG_UTYPE(AM64X_DEV_TIMESYNC_EVENT_INTROUTER0, RESASG_SUBTYPE_IR_OUTPUT)",
2153 "type": 384,
2154 "start_resource": 0,
2155 "num_resource": 41
2156 },
2157 {
2158 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_BCDMA_0, RESASG_SUBTYPE_RA_ERROR_OES)",
2159 "type": 1664,
2160 "start_resource": 0,
2161 "num_resource": 1
2162 },
2163 {
2164 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_BCDMA_0, RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER)",
2165 "type": 1666,
2166 "start_resource": 50176,
2167 "num_resource": 136
2168 },
2169 {
2170 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_BCDMA_0, RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG)",
2171 "type": 1667,
2172 "start_resource": 0,
2173 "num_resource": 1
2174 },
2175 {
2176 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_BCDMA_0, RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN)",
2177 "type": 1677,
2178 "start_resource": 0,
2179 "num_resource": 28
2180 },
2181 {
2182 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_BCDMA_0, RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN)",
2183 "type": 1678,
2184 "start_resource": 48,
2185 "num_resource": 20
2186 },
2187 {
2188 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_BCDMA_0, RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN)",
2189 "type": 1679,
2190 "start_resource": 28,
2191 "num_resource": 20
2192 },
2193 {
2194 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_BCDMA_0, RESASG_SUBTYPE_BCDMA_BLOCK_COPY_CHAN)",
2195 "type": 1696,
2196 "start_resource": 0,
2197 "num_resource": 28
2198 },
2199 {
2200 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_BCDMA_0, RESASG_SUBTYPE_BCDMA_SPLIT_TR_RX_CHAN)",
2201 "type": 1697,
2202 "start_resource": 0,
2203 "num_resource": 20
2204 },
2205 {
2206 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_BCDMA_0, RESASG_SUBTYPE_BCDMA_SPLIT_TR_TX_CHAN)",
2207 "type": 1698,
2208 "start_resource": 0,
2209 "num_resource": 20
2210 },
2211 {
2212 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_VINT)",
2213 "type": 1802,
2214 "start_resource": 4,
2215 "num_resource": 36
2216 },
2217 {
2218 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_VINT)",
2219 "type": 1802,
2220 "start_resource": 44,
2221 "num_resource": 44
2222 },
2223 {
2224 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_VINT)",
2225 "type": 1802,
2226 "start_resource": 92,
2227 "num_resource": 44
2228 },
2229 {
2230 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_VINT)",
2231 "type": 1802,
2232 "start_resource": 139,
2233 "num_resource": 45
2234 },
2235 {
2236 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
2237 "type": 1805,
2238 "start_resource": 15,
2239 "num_resource": 1521
2240 },
2241 {
2242 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_TIMERMGR_EVT_OES)",
2243 "type": 1807,
2244 "start_resource": 0,
2245 "num_resource": 1024
2246 },
2247 {
2248 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_PKTDMA_TX_CHAN_ERROR_OES)",
2249 "type": 1808,
2250 "start_resource": 4096,
2251 "num_resource": 42
2252 },
2253 {
2254 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_PKTDMA_TX_FLOW_COMPLETION_OES)",
2255 "type": 1809,
2256 "start_resource": 4608,
2257 "num_resource": 112
2258 },
2259 {
2260 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_PKTDMA_RX_CHAN_ERROR_OES)",
2261 "type": 1810,
2262 "start_resource": 5120,
2263 "num_resource": 29
2264 },
2265 {
2266 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_COMPLETION_OES)",
2267 "type": 1811,
2268 "start_resource": 5632,
2269 "num_resource": 176
2270 },
2271 {
2272 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_STARVATION_OES)",
2273 "type": 1812,
2274 "start_resource": 6144,
2275 "num_resource": 176
2276 },
2277 {
2278 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_FIREWALL_OES)",
2279 "type": 1813,
2280 "start_resource": 6656,
2281 "num_resource": 176
2282 },
2283 {
2284 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_BCDMA_CHAN_ERROR_OES)",
2285 "type": 1814,
2286 "start_resource": 8192,
2287 "num_resource": 28
2288 },
2289 {
2290 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_BCDMA_CHAN_DATA_COMPLETION_OES)",
2291 "type": 1815,
2292 "start_resource": 8704,
2293 "num_resource": 28
2294 },
2295 {
2296 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_BCDMA_CHAN_RING_COMPLETION_OES)",
2297 "type": 1816,
2298 "start_resource": 9216,
2299 "num_resource": 28
2300 },
2301 {
2302 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_ERROR_OES)",
2303 "type": 1817,
2304 "start_resource": 9728,
2305 "num_resource": 20
2306 },
2307 {
2308 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_DATA_COMPLETION_OES)",
2309 "type": 1818,
2310 "start_resource": 10240,
2311 "num_resource": 20
2312 },
2313 {
2314 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_RING_COMPLETION_OES)",
2315 "type": 1819,
2316 "start_resource": 10752,
2317 "num_resource": 20
2318 },
2319 {
2320 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_ERROR_OES)",
2321 "type": 1820,
2322 "start_resource": 11264,
2323 "num_resource": 20
2324 },
2325 {
2326 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_DATA_COMPLETION_OES)",
2327 "type": 1821,
2328 "start_resource": 11776,
2329 "num_resource": 20
2330 },
2331 {
2332 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_INTAGGR_0, RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_RING_COMPLETION_OES)",
2333 "type": 1822,
2334 "start_resource": 12288,
2335 "num_resource": 20
2336 },
2337 {
2338 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_RA_ERROR_OES)",
2339 "type": 1920,
2340 "start_resource": 0,
2341 "num_resource": 1
2342 },
2343 {
2344 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG)",
2345 "type": 1923,
2346 "start_resource": 0,
2347 "num_resource": 1
2348 },
2349 {
2350 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_TX_CHAN)",
2351 "type": 1936,
2352 "start_resource": 0,
2353 "num_resource": 16
2354 },
2355 {
2356 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_CPSW_TX_CHAN)",
2357 "type": 1937,
2358 "start_resource": 16,
2359 "num_resource": 64
2360 },
2361 {
2362 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_0_CHAN)",
2363 "type": 1938,
2364 "start_resource": 81,
2365 "num_resource": 7
2366 },
2367 {
2368 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_1_CHAN)",
2369 "type": 1939,
2370 "start_resource": 88,
2371 "num_resource": 8
2372 },
2373 {
2374 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_ICSSG_0_TX_CHAN)",
2375 "type": 1940,
2376 "start_resource": 96,
2377 "num_resource": 8
2378 },
2379 {
2380 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_ICSSG_1_TX_CHAN)",
2381 "type": 1941,
2382 "start_resource": 104,
2383 "num_resource": 8
2384 },
2385 {
2386 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_RX_CHAN)",
2387 "type": 1942,
2388 "start_resource": 112,
2389 "num_resource": 16
2390 },
2391 {
2392 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_CPSW_RX_CHAN)",
2393 "type": 1943,
2394 "start_resource": 128,
2395 "num_resource": 16
2396 },
2397 {
2398 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_0_CHAN)",
2399 "type": 1944,
2400 "start_resource": 145,
2401 "num_resource": 7
2402 },
2403 {
2404 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_1_CHAN)",
2405 "type": 1945,
2406 "start_resource": 144,
2407 "num_resource": 8
2408 },
2409 {
2410 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_2_CHAN)",
2411 "type": 1946,
2412 "start_resource": 152,
2413 "num_resource": 8
2414 },
2415 {
2416 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_3_CHAN)",
2417 "type": 1947,
2418 "start_resource": 152,
2419 "num_resource": 8
2420 },
2421 {
2422 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_ICSSG_0_RX_CHAN)",
2423 "type": 1948,
2424 "start_resource": 160,
2425 "num_resource": 64
2426 },
2427 {
2428 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_RING_ICSSG_1_RX_CHAN)",
2429 "type": 1949,
2430 "start_resource": 224,
2431 "num_resource": 64
2432 },
2433 {
2434 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_UNMAPPED_TX_CHAN)",
2435 "type": 1955,
2436 "start_resource": 0,
2437 "num_resource": 16
2438 },
2439 {
2440 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_CPSW_TX_CHAN)",
2441 "type": 1956,
2442 "start_resource": 16,
2443 "num_resource": 8
2444 },
2445 {
2446 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_SAUL_TX_0_CHAN)",
2447 "type": 1957,
2448 "start_resource": 25,
2449 "num_resource": 0
2450 },
2451 {
2452 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_SAUL_TX_1_CHAN)",
2453 "type": 1958,
2454 "start_resource": 25,
2455 "num_resource": 1
2456 },
2457 {
2458 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_ICSSG_0_TX_CHAN)",
2459 "type": 1959,
2460 "start_resource": 26,
2461 "num_resource": 8
2462 },
2463 {
2464 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_ICSSG_1_TX_CHAN)",
2465 "type": 1960,
2466 "start_resource": 34,
2467 "num_resource": 8
2468 },
2469 {
2470 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_UNMAPPED_RX_CHAN)",
2471 "type": 1961,
2472 "start_resource": 0,
2473 "num_resource": 16
2474 },
2475 {
2476 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_FLOW_UNMAPPED_RX_CHAN)",
2477 "type": 1962,
2478 "start_resource": 0,
2479 "num_resource": 16
2480 },
2481 {
2482 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_CPSW_RX_CHAN)",
2483 "type": 1963,
2484 "start_resource": 16,
2485 "num_resource": 1
2486 },
2487 {
2488 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_FLOW_CPSW_RX_CHAN)",
2489 "type": 1964,
2490 "start_resource": 16,
2491 "num_resource": 16
2492 },
2493 {
2494 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_SAUL_RX_0_CHAN)",
2495 "type": 1965,
2496 "start_resource": 18,
2497 "num_resource": 0
2498 },
2499 {
2500 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_0_CHAN)",
2501 "type": 1966,
2502 "start_resource": 32,
2503 "num_resource": 8
2504 },
2505 {
2506 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_SAUL_RX_1_CHAN)",
2507 "type": 1967,
2508 "start_resource": 19,
2509 "num_resource": 0
2510 },
2511 {
2512 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_1_CHAN)",
2513 "type": 1968,
2514 "start_resource": 32,
2515 "num_resource": 8
2516 },
2517 {
2518 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_SAUL_RX_2_CHAN)",
2519 "type": 1969,
2520 "start_resource": 19,
2521 "num_resource": 1
2522 },
2523 {
2524 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_2_CHAN)",
2525 "type": 1970,
2526 "start_resource": 40,
2527 "num_resource": 8
2528 },
2529 {
2530 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_SAUL_RX_3_CHAN)",
2531 "type": 1971,
2532 "start_resource": 20,
2533 "num_resource": 1
2534 },
2535 {
2536 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_3_CHAN)",
2537 "type": 1972,
2538 "start_resource": 40,
2539 "num_resource": 8
2540 },
2541 {
2542 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_ICSSG_0_RX_CHAN)",
2543 "type": 1973,
2544 "start_resource": 21,
2545 "num_resource": 4
2546 },
2547 {
2548 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_0_RX_CHAN)",
2549 "type": 1974,
2550 "start_resource": 48,
2551 "num_resource": 64
2552 },
2553 {
2554 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_ICSSG_1_RX_CHAN)",
2555 "type": 1975,
2556 "start_resource": 25,
2557 "num_resource": 4
2558 },
2559 {
2560 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_PKTDMA_0, RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_1_RX_CHAN)",
2561 "type": 1976,
2562 "start_resource": 112,
2563 "num_resource": 64
2564 },
2565 {
2566 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_RINGACC_0, RESASG_SUBTYPE_RA_ERROR_OES)",
2567 "type": 2112,
2568 "start_resource": 0,
2569 "num_resource": 1
2570 },
2571 {
2572 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_RINGACC_0, RESASG_SUBTYPE_RA_VIRTID)",
2573 "type": 2122,
2574 "start_resource": 0,
2575 "num_resource": 4096
2576 },
2577 {
2578 "name": "RESASG_UTYPE(AM64X_DEV_DMASS0_RINGACC_0, RESASG_SUBTYPE_RA_GENERIC_IPC)",
2579 "type": 2124,
2580 "start_resource": 20,
2581 "num_resource": 12
2582 }
2583 ],
2584 "constraints": [
2585 {
2586 "max_resource_entries": 360
2587 }
2588 ]
1719 } 2589 }
1720 } 2590 }
1721 } 2591 }
diff --git a/scripts/sysfw_boardcfg_validator.py b/scripts/sysfw_boardcfg_validator.py
index 2401d45ab..9eed5bc6b 100755
--- a/scripts/sysfw_boardcfg_validator.py
+++ b/scripts/sysfw_boardcfg_validator.py
@@ -539,7 +539,7 @@ class sysfw_trace_cli:
539 help="SoC supported by input binary", 539 help="SoC supported by input binary",
540 action="store", 540 action="store",
541 type=str, 541 type=str,
542 choices={'am65x', 'am65x_sr2', 'j721e', 'j7200'}, 542 choices={'am65x', 'am65x_sr2', 'am64x', 'j721e', 'j721e_legacy', 'j7200'},
543 required=True) 543 required=True)
544 544
545 # Required output arguments 545 # Required output arguments
@@ -601,9 +601,6 @@ class sysfw_trace_cli:
601 self.output_class = sysfw_validation_output_file( 601 self.output_class = sysfw_validation_output_file(
602 self.cmd_args.log_output_file) 602 self.cmd_args.log_output_file)
603 603
604 if self.cmd_args.soc == 'am65x':
605 self.cmd_args.soc = 'am6'
606
607 def process_data(self): 604 def process_data(self):
608 self.rules.process_data( 605 self.rules.process_data(
609 self.cmd_args.soc, 606 self.cmd_args.soc,