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authorSuman Anna2020-05-04 16:08:43 -0500
committerDave Gerlach2020-05-05 13:15:15 -0500
commit6a56ee37885c7f0dcc198339a735d2670962f2c7 (patch)
tree9685a982daa4240eb495ec78a55e1b46131f816e
parent88220262fd84fcedfec1d906aa1f1e580e0bf5fc (diff)
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j721e: rm-cfg: Add NavSS IR resources for R5Fs and C66x DSPs
The ABI 3.0 resource updates haven't added any Main NavSS IR output lines for the MCU and MAIN domain R5Fs, and the MAIN domain C66x remote processors. Add the corresponding resource entries to restore the IPC functionality with these cores. Following is the main summary of resource partitioning: - The 8 interrupts from Main NavSS IR towards MCU domain are split equally between the MCU R5F0 and MCU R5F1. - The first 4 interrupts from each group of 32 interrupts from Main NavSS IR towards a MAIN R5F core are reserved for System Firmware, so the remaining 28 interrupts are added for the corresponding non-secure R5F host contexts. - The 32 interrupts from Main NavSS IR towards each of the C66x DSP cores are split into two sets of 24 interrupts and 8 interrupts, with the first 4 interrupts from the latter set reserved for System Firmware. Add the remaining interrupts from each set to each of the corresponding C66x non-secure contexts. Signed-off-by: Suman Anna <s-anna@ti.com>
-rw-r--r--soc/j721e/evm/rm-cfg.c72
-rw-r--r--soc/j721e/evm/sysfw_img_cfg.h2
2 files changed, 72 insertions, 2 deletions
diff --git a/soc/j721e/evm/rm-cfg.c b/soc/j721e/evm/rm-cfg.c
index 4767ebfab..6c79b8256 100644
--- a/soc/j721e/evm/rm-cfg.c
+++ b/soc/j721e/evm/rm-cfg.c
@@ -1285,7 +1285,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1285 .host_id = HOST_ID_MAIN_0_R5_2, 1285 .host_id = HOST_ID_MAIN_0_R5_2,
1286 }, 1286 },
1287 1287
1288 /* NAVSS IR for others - Unassigned */ 1288 /* Main NAVSS IR */
1289 { 1289 {
1290 .start_resource = 10, 1290 .start_resource = 10,
1291 .num_resource = 100, 1291 .num_resource = 100,
@@ -1307,6 +1307,76 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1307 RESASG_SUBTYPE_IR_OUTPUT), 1307 RESASG_SUBTYPE_IR_OUTPUT),
1308 .host_id = HOST_ID_C7X_1, 1308 .host_id = HOST_ID_C7X_1,
1309 }, 1309 },
1310 {
1311 .start_resource = 196,
1312 .num_resource = 28,
1313 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1314 RESASG_SUBTYPE_IR_OUTPUT),
1315 .host_id = HOST_ID_MAIN_0_R5_0,
1316 },
1317 {
1318 .start_resource = 228,
1319 .num_resource = 28,
1320 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1321 RESASG_SUBTYPE_IR_OUTPUT),
1322 .host_id = HOST_ID_MAIN_0_R5_2,
1323 },
1324 {
1325 .start_resource = 260,
1326 .num_resource = 28,
1327 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1328 RESASG_SUBTYPE_IR_OUTPUT),
1329 .host_id = HOST_ID_MAIN_1_R5_0,
1330 },
1331 {
1332 .start_resource = 292,
1333 .num_resource = 28,
1334 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1335 RESASG_SUBTYPE_IR_OUTPUT),
1336 .host_id = HOST_ID_MAIN_1_R5_2,
1337 },
1338 {
1339 .start_resource = 320,
1340 .num_resource = 24,
1341 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1342 RESASG_SUBTYPE_IR_OUTPUT),
1343 .host_id = HOST_ID_C6X_0_1,
1344 },
1345 {
1346 .start_resource = 348,
1347 .num_resource = 4,
1348 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1349 RESASG_SUBTYPE_IR_OUTPUT),
1350 .host_id = HOST_ID_C6X_0_1,
1351 },
1352 {
1353 .start_resource = 352,
1354 .num_resource = 24,
1355 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1356 RESASG_SUBTYPE_IR_OUTPUT),
1357 .host_id = HOST_ID_C6X_1_1,
1358 },
1359 {
1360 .start_resource = 380,
1361 .num_resource = 4,
1362 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1363 RESASG_SUBTYPE_IR_OUTPUT),
1364 .host_id = HOST_ID_C6X_1_1,
1365 },
1366 {
1367 .start_resource = 400,
1368 .num_resource = 4,
1369 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1370 RESASG_SUBTYPE_IR_OUTPUT),
1371 .host_id = HOST_ID_MCU_0_R5_0,
1372 },
1373 {
1374 .start_resource = 404,
1375 .num_resource = 4,
1376 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1377 RESASG_SUBTYPE_IR_OUTPUT),
1378 .host_id = HOST_ID_MCU_0_R5_2,
1379 },
1310 1380
1311 /* MCU Nav IA VINT */ 1381 /* MCU Nav IA VINT */
1312 { 1382 {
diff --git a/soc/j721e/evm/sysfw_img_cfg.h b/soc/j721e/evm/sysfw_img_cfg.h
index 02fbd0563..06b04df9b 100644
--- a/soc/j721e/evm/sysfw_img_cfg.h
+++ b/soc/j721e/evm/sysfw_img_cfg.h
@@ -35,6 +35,6 @@
35#ifndef SYSFW_IMG_CFG_H 35#ifndef SYSFW_IMG_CFG_H
36#define SYSFW_IMG_CFG_H 36#define SYSFW_IMG_CFG_H
37 37
38#define BOARDCFG_RM_RESASG_ENTRIES 292 38#define BOARDCFG_RM_RESASG_ENTRIES 302
39 39
40#endif /* SYSFW_IMG_CFG_H */ 40#endif /* SYSFW_IMG_CFG_H */