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authorNikhil Devshatwar2020-10-19 10:41:07 -0500
committerDave Gerlach2020-10-19 11:25:42 -0500
commit6d85d589f1b1c0917bd42281f46ff74833bcf264 (patch)
tree2d3fc7fca598bd9e6a9414047706875825597b5c
parentab4400fa5cfe61760881cbace8b7fcdd1e703426 (diff)
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soc: j721e: Update block copy allocation for UDMA channels
To use UDMA channels for block copy, the Tx and Rx channel number has to be the same. When UDMA channels are allocated with just a single range, sometimes it is not possible to allocate the ranges such that the channels can be used for block copy usecase. Fix this by allocating the channels in two ranges, first range for block copy and second range for other usage. When there are no channels for block copy, an entry with 0 count is added. This is to maintain consistency when querying SYSFW about the ranges allocated for a host. Also adjust the MCU NAVSS interrupt router allocation after the HSM re architecture Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Diffstat
-rw-r--r--soc/j721e/evm/rm-cfg.c1112
-rw-r--r--soc/j721e/evm/sysfw_img_cfg.h2
2 files changed, 935 insertions, 179 deletions
diff --git a/soc/j721e/evm/rm-cfg.c b/soc/j721e/evm/rm-cfg.c
index 3330a7dd3..211db3277 100644
--- a/soc/j721e/evm/rm-cfg.c
+++ b/soc/j721e/evm/rm-cfg.c
@@ -784,176 +784,302 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
784 /* Main NAVSS Rings for Normal capacity Rx channels */ 784 /* Main NAVSS Rings for Normal capacity Rx channels */
785 { 785 {
786 .start_resource = 316, 786 .start_resource = 316,
787 .num_resource = 36, 787 .num_resource = 8,
788 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 788 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
789 RESASG_SUBTYPE_RA_UDMAP_RX), 789 RESASG_SUBTYPE_RA_UDMAP_RX),
790 .host_id = HOST_ID_A72_2, 790 .host_id = HOST_ID_A72_2,
791 }, 791 },
792 { 792 {
793 .start_resource = 352, 793 .start_resource = 324,
794 .num_resource = 20, 794 .num_resource = 2,
795 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 795 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
796 RESASG_SUBTYPE_RA_UDMAP_RX), 796 RESASG_SUBTYPE_RA_UDMAP_RX),
797 .host_id = HOST_ID_A72_3, 797 .host_id = HOST_ID_MCU_0_R5_0,
798 }, 798 },
799 { 799 {
800 .start_resource = 372, 800 .start_resource = 324,
801 .num_resource = 2, 801 .num_resource = 2,
802 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 802 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
803 RESASG_SUBTYPE_RA_UDMAP_RX), 803 RESASG_SUBTYPE_RA_UDMAP_RX),
804 .host_id = HOST_ID_MCU_0_R5_0, 804 .host_id = HOST_ID_MCU_0_R5_1,
805 }, 805 },
806 { 806 {
807 .start_resource = 372, 807 .start_resource = 324,
808 .num_resource = 2, 808 .num_resource = 0,
809 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 809 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
810 RESASG_SUBTYPE_RA_UDMAP_RX), 810 RESASG_SUBTYPE_RA_UDMAP_RX),
811 .host_id = HOST_ID_MCU_0_R5_1, 811 .host_id = HOST_ID_A72_3,
812 }, 812 },
813 { 813 {
814 .start_resource = 374, 814 .start_resource = 326,
815 .num_resource = 2, 815 .num_resource = 2,
816 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 816 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
817 RESASG_SUBTYPE_RA_UDMAP_RX), 817 RESASG_SUBTYPE_RA_UDMAP_RX),
818 .host_id = HOST_ID_MCU_0_R5_2, 818 .host_id = HOST_ID_MCU_0_R5_2,
819 }, 819 },
820 { 820 {
821 .start_resource = 376, 821 .start_resource = 328,
822 .num_resource = 6, 822 .num_resource = 2,
823 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 823 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
824 RESASG_SUBTYPE_RA_UDMAP_RX), 824 RESASG_SUBTYPE_RA_UDMAP_RX),
825 .host_id = HOST_ID_MAIN_1_R5_0, 825 .host_id = HOST_ID_MAIN_1_R5_0,
826 }, 826 },
827 { 827 {
828 .start_resource = 382, 828 .start_resource = 330,
829 .num_resource = 6, 829 .num_resource = 2,
830 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 830 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
831 RESASG_SUBTYPE_RA_UDMAP_RX), 831 RESASG_SUBTYPE_RA_UDMAP_RX),
832 .host_id = HOST_ID_MAIN_1_R5_2, 832 .host_id = HOST_ID_MAIN_1_R5_2,
833 }, 833 },
834 { 834 {
835 .start_resource = 388, 835 .start_resource = 332,
836 .num_resource = 6, 836 .num_resource = 2,
837 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 837 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
838 RESASG_SUBTYPE_RA_UDMAP_RX), 838 RESASG_SUBTYPE_RA_UDMAP_RX),
839 .host_id = HOST_ID_C7X_1, 839 .host_id = HOST_ID_C7X_1,
840 }, 840 },
841 { 841 {
842 .start_resource = 394, 842 .start_resource = 334,
843 .num_resource = 16, 843 .num_resource = 8,
844 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 844 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
845 RESASG_SUBTYPE_RA_UDMAP_RX), 845 RESASG_SUBTYPE_RA_UDMAP_RX),
846 .host_id = HOST_ID_C6X_0_1, 846 .host_id = HOST_ID_C6X_0_1,
847 }, 847 },
848 { 848 {
849 .start_resource = 410, 849 .start_resource = 342,
850 .num_resource = 8, 850 .num_resource = 2,
851 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 851 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
852 RESASG_SUBTYPE_RA_UDMAP_RX), 852 RESASG_SUBTYPE_RA_UDMAP_RX),
853 .host_id = HOST_ID_C6X_1_1, 853 .host_id = HOST_ID_C6X_1_1,
854 }, 854 },
855 { 855 {
856 .start_resource = 418, 856 .start_resource = 344,
857 .num_resource = 20, 857 .num_resource = 4,
858 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 858 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
859 RESASG_SUBTYPE_RA_UDMAP_RX), 859 RESASG_SUBTYPE_RA_UDMAP_RX),
860 .host_id = HOST_ID_MAIN_0_R5_0, 860 .host_id = HOST_ID_MAIN_0_R5_0,
861 }, 861 },
862 { 862 {
863 .start_resource = 438, 863 .start_resource = 348,
864 .num_resource = 2, 864 .num_resource = 1,
865 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 865 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
866 RESASG_SUBTYPE_RA_UDMAP_RX), 866 RESASG_SUBTYPE_RA_UDMAP_RX),
867 .host_id = HOST_ID_MAIN_0_R5_2, 867 .host_id = HOST_ID_MAIN_0_R5_2,
868 }, 868 },
869 /* Main NAVSS Rings for Normal capacity Tx channels */
870 { 869 {
871 .start_resource = 16, 870 .start_resource = 349,
872 .num_resource = 36, 871 .num_resource = 28,
873 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 872 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
874 RESASG_SUBTYPE_RA_UDMAP_TX), 873 RESASG_SUBTYPE_RA_UDMAP_RX),
875 .host_id = HOST_ID_A72_2, 874 .host_id = HOST_ID_A72_2,
876 }, 875 },
877 { 876 {
878 .start_resource = 52, 877 .start_resource = 377,
879 .num_resource = 20, 878 .num_resource = 20,
880 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 879 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
881 RESASG_SUBTYPE_RA_UDMAP_TX), 880 RESASG_SUBTYPE_RA_UDMAP_RX),
882 .host_id = HOST_ID_A72_3, 881 .host_id = HOST_ID_A72_3,
883 }, 882 },
884 { 883 {
885 .start_resource = 72, 884 .start_resource = 397,
885 .num_resource = 4,
886 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
887 RESASG_SUBTYPE_RA_UDMAP_RX),
888 .host_id = HOST_ID_MAIN_1_R5_0,
889 },
890 {
891 .start_resource = 401,
892 .num_resource = 4,
893 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
894 RESASG_SUBTYPE_RA_UDMAP_RX),
895 .host_id = HOST_ID_MAIN_1_R5_2,
896 },
897 {
898 .start_resource = 405,
899 .num_resource = 4,
900 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
901 RESASG_SUBTYPE_RA_UDMAP_RX),
902 .host_id = HOST_ID_C7X_1,
903 },
904 {
905 .start_resource = 409,
906 .num_resource = 8,
907 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
908 RESASG_SUBTYPE_RA_UDMAP_RX),
909 .host_id = HOST_ID_C6X_0_1,
910 },
911 {
912 .start_resource = 417,
913 .num_resource = 6,
914 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
915 RESASG_SUBTYPE_RA_UDMAP_RX),
916 .host_id = HOST_ID_C6X_1_1,
917 },
918 {
919 .start_resource = 423,
920 .num_resource = 16,
921 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
922 RESASG_SUBTYPE_RA_UDMAP_RX),
923 .host_id = HOST_ID_MAIN_0_R5_0,
924 },
925 {
926 .start_resource = 439,
927 .num_resource = 1,
928 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
929 RESASG_SUBTYPE_RA_UDMAP_RX),
930 .host_id = HOST_ID_MAIN_0_R5_2,
931 },
932 /* Main NAVSS Rings for Normal capacity Tx channels */
933 {
934 .start_resource = 16,
935 .num_resource = 8,
936 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
937 RESASG_SUBTYPE_RA_UDMAP_TX),
938 .host_id = HOST_ID_A72_2,
939 },
940 {
941 .start_resource = 24,
886 .num_resource = 2, 942 .num_resource = 2,
887 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 943 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
888 RESASG_SUBTYPE_RA_UDMAP_TX), 944 RESASG_SUBTYPE_RA_UDMAP_TX),
889 .host_id = HOST_ID_MCU_0_R5_0, 945 .host_id = HOST_ID_MCU_0_R5_0,
890 }, 946 },
891 { 947 {
892 .start_resource = 72, 948 .start_resource = 24,
893 .num_resource = 2, 949 .num_resource = 2,
894 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 950 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
895 RESASG_SUBTYPE_RA_UDMAP_TX), 951 RESASG_SUBTYPE_RA_UDMAP_TX),
896 .host_id = HOST_ID_MCU_0_R5_1, 952 .host_id = HOST_ID_MCU_0_R5_1,
897 }, 953 },
898 { 954 {
899 .start_resource = 74, 955 .start_resource = 24,
956 .num_resource = 0,
957 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
958 RESASG_SUBTYPE_RA_UDMAP_TX),
959 .host_id = HOST_ID_A72_3,
960 },
961 {
962 .start_resource = 26,
900 .num_resource = 2, 963 .num_resource = 2,
901 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 964 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
902 RESASG_SUBTYPE_RA_UDMAP_TX), 965 RESASG_SUBTYPE_RA_UDMAP_TX),
903 .host_id = HOST_ID_MCU_0_R5_2, 966 .host_id = HOST_ID_MCU_0_R5_2,
904 }, 967 },
905 { 968 {
906 .start_resource = 76, 969 .start_resource = 28,
907 .num_resource = 6, 970 .num_resource = 2,
908 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 971 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
909 RESASG_SUBTYPE_RA_UDMAP_TX), 972 RESASG_SUBTYPE_RA_UDMAP_TX),
910 .host_id = HOST_ID_MAIN_1_R5_0, 973 .host_id = HOST_ID_MAIN_1_R5_0,
911 }, 974 },
912 { 975 {
913 .start_resource = 82, 976 .start_resource = 30,
914 .num_resource = 6, 977 .num_resource = 2,
915 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 978 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
916 RESASG_SUBTYPE_RA_UDMAP_TX), 979 RESASG_SUBTYPE_RA_UDMAP_TX),
917 .host_id = HOST_ID_MAIN_1_R5_2, 980 .host_id = HOST_ID_MAIN_1_R5_2,
918 }, 981 },
919 { 982 {
920 .start_resource = 88, 983 .start_resource = 32,
921 .num_resource = 6, 984 .num_resource = 2,
922 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 985 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
923 RESASG_SUBTYPE_RA_UDMAP_TX), 986 RESASG_SUBTYPE_RA_UDMAP_TX),
924 .host_id = HOST_ID_C7X_1, 987 .host_id = HOST_ID_C7X_1,
925 }, 988 },
926 { 989 {
927 .start_resource = 94, 990 .start_resource = 34,
928 .num_resource = 16, 991 .num_resource = 8,
929 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 992 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
930 RESASG_SUBTYPE_RA_UDMAP_TX), 993 RESASG_SUBTYPE_RA_UDMAP_TX),
931 .host_id = HOST_ID_C6X_0_1, 994 .host_id = HOST_ID_C6X_0_1,
932 }, 995 },
933 { 996 {
934 .start_resource = 110, 997 .start_resource = 42,
998 .num_resource = 2,
999 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1000 RESASG_SUBTYPE_RA_UDMAP_TX),
1001 .host_id = HOST_ID_C6X_1_1,
1002 },
1003 {
1004 .start_resource = 44,
1005 .num_resource = 4,
1006 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1007 RESASG_SUBTYPE_RA_UDMAP_TX),
1008 .host_id = HOST_ID_MAIN_0_R5_0,
1009 },
1010 {
1011 .start_resource = 48,
1012 .num_resource = 1,
1013 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1014 RESASG_SUBTYPE_RA_UDMAP_TX),
1015 .host_id = HOST_ID_MAIN_0_R5_2,
1016 },
1017 {
1018 .start_resource = 49,
1019 .num_resource = 28,
1020 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1021 RESASG_SUBTYPE_RA_UDMAP_TX),
1022 .host_id = HOST_ID_A72_2,
1023 },
1024 {
1025 .start_resource = 77,
1026 .num_resource = 20,
1027 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1028 RESASG_SUBTYPE_RA_UDMAP_TX),
1029 .host_id = HOST_ID_A72_3,
1030 },
1031 {
1032 .start_resource = 97,
1033 .num_resource = 4,
1034 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1035 RESASG_SUBTYPE_RA_UDMAP_TX),
1036 .host_id = HOST_ID_MAIN_1_R5_0,
1037 },
1038 {
1039 .start_resource = 101,
1040 .num_resource = 4,
1041 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1042 RESASG_SUBTYPE_RA_UDMAP_TX),
1043 .host_id = HOST_ID_MAIN_1_R5_2,
1044 },
1045 {
1046 .start_resource = 105,
1047 .num_resource = 4,
1048 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1049 RESASG_SUBTYPE_RA_UDMAP_TX),
1050 .host_id = HOST_ID_C7X_1,
1051 },
1052 {
1053 .start_resource = 109,
935 .num_resource = 8, 1054 .num_resource = 8,
936 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1055 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
937 RESASG_SUBTYPE_RA_UDMAP_TX), 1056 RESASG_SUBTYPE_RA_UDMAP_TX),
1057 .host_id = HOST_ID_C6X_0_1,
1058 },
1059 {
1060 .start_resource = 117,
1061 .num_resource = 6,
1062 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1063 RESASG_SUBTYPE_RA_UDMAP_TX),
938 .host_id = HOST_ID_C6X_1_1, 1064 .host_id = HOST_ID_C6X_1_1,
939 }, 1065 },
940 { 1066 {
941 .start_resource = 118, 1067 .start_resource = 123,
942 .num_resource = 14, 1068 .num_resource = 10,
943 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1069 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
944 RESASG_SUBTYPE_RA_UDMAP_TX), 1070 RESASG_SUBTYPE_RA_UDMAP_TX),
945 .host_id = HOST_ID_MAIN_0_R5_0, 1071 .host_id = HOST_ID_MAIN_0_R5_0,
946 }, 1072 },
947 { 1073 {
948 .start_resource = 132, 1074 .start_resource = 133,
949 .num_resource = 6, 1075 .num_resource = 6,
950 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1076 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
951 RESASG_SUBTYPE_RA_UDMAP_TX), 1077 RESASG_SUBTYPE_RA_UDMAP_TX),
952 .host_id = HOST_ID_MAIN_0_R5_2, 1078 .host_id = HOST_ID_MAIN_0_R5_2,
953 }, 1079 },
954 { 1080 {
955 .start_resource = 138, 1081 .start_resource = 139,
956 .num_resource = 2, 1082 .num_resource = 1,
957 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1083 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
958 RESASG_SUBTYPE_RA_UDMAP_TX), 1084 RESASG_SUBTYPE_RA_UDMAP_TX),
959 .host_id = HOST_ID_ALL, 1085 .host_id = HOST_ID_ALL,
@@ -1012,12 +1138,26 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1012 /* Main NAVSS Rings for High capacity Rx channels */ 1138 /* Main NAVSS Rings for High capacity Rx channels */
1013 { 1139 {
1014 .start_resource = 304, 1140 .start_resource = 304,
1141 .num_resource = 0,
1142 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1143 RESASG_SUBTYPE_RA_UDMAP_RX_H),
1144 .host_id = HOST_ID_A72_2,
1145 },
1146 {
1147 .start_resource = 304,
1015 .num_resource = 4, 1148 .num_resource = 4,
1016 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1149 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1017 RESASG_SUBTYPE_RA_UDMAP_RX_H), 1150 RESASG_SUBTYPE_RA_UDMAP_RX_H),
1018 .host_id = HOST_ID_A72_2, 1151 .host_id = HOST_ID_A72_2,
1019 }, 1152 },
1020 { 1153 {
1154 .start_resource = 304,
1155 .num_resource = 0,
1156 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1157 RESASG_SUBTYPE_RA_UDMAP_RX_H),
1158 .host_id = HOST_ID_MAIN_0_R5_0,
1159 },
1160 {
1021 .start_resource = 308, 1161 .start_resource = 308,
1022 .num_resource = 6, 1162 .num_resource = 6,
1023 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1163 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
@@ -1034,12 +1174,26 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1034 /* Main NAVSS Rings for Ultra high capacity Rx channels */ 1174 /* Main NAVSS Rings for Ultra high capacity Rx channels */
1035 { 1175 {
1036 .start_resource = 300, 1176 .start_resource = 300,
1177 .num_resource = 0,
1178 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1179 RESASG_SUBTYPE_RA_UDMAP_RX_UH),
1180 .host_id = HOST_ID_A72_2,
1181 },
1182 {
1183 .start_resource = 300,
1037 .num_resource = 2, 1184 .num_resource = 2,
1038 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1185 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1039 RESASG_SUBTYPE_RA_UDMAP_RX_UH), 1186 RESASG_SUBTYPE_RA_UDMAP_RX_UH),
1040 .host_id = HOST_ID_A72_2, 1187 .host_id = HOST_ID_A72_2,
1041 }, 1188 },
1042 { 1189 {
1190 .start_resource = 300,
1191 .num_resource = 0,
1192 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1193 RESASG_SUBTYPE_RA_UDMAP_RX_UH),
1194 .host_id = HOST_ID_MAIN_0_R5_0,
1195 },
1196 {
1043 .start_resource = 302, 1197 .start_resource = 302,
1044 .num_resource = 2, 1198 .num_resource = 2,
1045 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1199 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
@@ -1049,12 +1203,26 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1049 /* Main NAVSS Rings for High capacity Tx channels */ 1203 /* Main NAVSS Rings for High capacity Tx channels */
1050 { 1204 {
1051 .start_resource = 4, 1205 .start_resource = 4,
1206 .num_resource = 0,
1207 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1208 RESASG_SUBTYPE_RA_UDMAP_TX_H),
1209 .host_id = HOST_ID_A72_2,
1210 },
1211 {
1212 .start_resource = 4,
1052 .num_resource = 4, 1213 .num_resource = 4,
1053 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1214 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1054 RESASG_SUBTYPE_RA_UDMAP_TX_H), 1215 RESASG_SUBTYPE_RA_UDMAP_TX_H),
1055 .host_id = HOST_ID_A72_2, 1216 .host_id = HOST_ID_A72_2,
1056 }, 1217 },
1057 { 1218 {
1219 .start_resource = 4,
1220 .num_resource = 0,
1221 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1222 RESASG_SUBTYPE_RA_UDMAP_TX_H),
1223 .host_id = HOST_ID_MAIN_0_R5_0,
1224 },
1225 {
1058 .start_resource = 8, 1226 .start_resource = 8,
1059 .num_resource = 6, 1227 .num_resource = 6,
1060 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1228 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
@@ -1071,12 +1239,26 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1071 /* Main NAVSS Rings for Ultra high capacity Tx channels */ 1239 /* Main NAVSS Rings for Ultra high capacity Tx channels */
1072 { 1240 {
1073 .start_resource = 0, 1241 .start_resource = 0,
1242 .num_resource = 0,
1243 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1244 RESASG_SUBTYPE_RA_UDMAP_TX_UH),
1245 .host_id = HOST_ID_A72_2,
1246 },
1247 {
1248 .start_resource = 0,
1074 .num_resource = 2, 1249 .num_resource = 2,
1075 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1250 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1076 RESASG_SUBTYPE_RA_UDMAP_TX_UH), 1251 RESASG_SUBTYPE_RA_UDMAP_TX_UH),
1077 .host_id = HOST_ID_A72_2, 1252 .host_id = HOST_ID_A72_2,
1078 }, 1253 },
1079 { 1254 {
1255 .start_resource = 0,
1256 .num_resource = 0,
1257 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1258 RESASG_SUBTYPE_RA_UDMAP_TX_UH),
1259 .host_id = HOST_ID_MAIN_0_R5_0,
1260 },
1261 {
1080 .start_resource = 2, 1262 .start_resource = 2,
1081 .num_resource = 2, 1263 .num_resource = 2,
1082 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1264 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
@@ -1239,84 +1421,147 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1239 /* Main NAVSS UDMA Normal capacity Rx channels */ 1421 /* Main NAVSS UDMA Normal capacity Rx channels */
1240 { 1422 {
1241 .start_resource = 16, 1423 .start_resource = 16,
1242 .num_resource = 36, 1424 .num_resource = 8,
1243 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1425 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1244 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1426 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1245 .host_id = HOST_ID_A72_2, 1427 .host_id = HOST_ID_A72_2,
1246 }, 1428 },
1247 { 1429 {
1248 .start_resource = 52, 1430 .start_resource = 24,
1249 .num_resource = 20, 1431 .num_resource = 2,
1250 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1432 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1251 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1433 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1252 .host_id = HOST_ID_A72_3, 1434 .host_id = HOST_ID_MCU_0_R5_0,
1253 }, 1435 },
1254 { 1436 {
1255 .start_resource = 72, 1437 .start_resource = 24,
1256 .num_resource = 2, 1438 .num_resource = 2,
1257 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1439 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1258 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1440 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1259 .host_id = HOST_ID_MCU_0_R5_0, 1441 .host_id = HOST_ID_MCU_0_R5_1,
1260 }, 1442 },
1261 { 1443 {
1262 .start_resource = 72, 1444 .start_resource = 24,
1263 .num_resource = 2, 1445 .num_resource = 0,
1264 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1446 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1265 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1447 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1266 .host_id = HOST_ID_MCU_0_R5_1, 1448 .host_id = HOST_ID_A72_3,
1267 }, 1449 },
1268 { 1450 {
1269 .start_resource = 74, 1451 .start_resource = 26,
1270 .num_resource = 2, 1452 .num_resource = 2,
1271 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1453 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1272 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1454 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1273 .host_id = HOST_ID_MCU_0_R5_2, 1455 .host_id = HOST_ID_MCU_0_R5_2,
1274 }, 1456 },
1275 { 1457 {
1276 .start_resource = 76, 1458 .start_resource = 28,
1277 .num_resource = 6, 1459 .num_resource = 2,
1278 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1460 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1279 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1461 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1280 .host_id = HOST_ID_MAIN_1_R5_0, 1462 .host_id = HOST_ID_MAIN_1_R5_0,
1281 }, 1463 },
1282 { 1464 {
1283 .start_resource = 82, 1465 .start_resource = 30,
1284 .num_resource = 6, 1466 .num_resource = 2,
1285 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1467 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1286 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1468 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1287 .host_id = HOST_ID_MAIN_1_R5_2, 1469 .host_id = HOST_ID_MAIN_1_R5_2,
1288 }, 1470 },
1289 { 1471 {
1290 .start_resource = 88, 1472 .start_resource = 32,
1291 .num_resource = 6, 1473 .num_resource = 2,
1292 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1474 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1293 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1475 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1294 .host_id = HOST_ID_C7X_1, 1476 .host_id = HOST_ID_C7X_1,
1295 }, 1477 },
1296 { 1478 {
1297 .start_resource = 94, 1479 .start_resource = 34,
1298 .num_resource = 16, 1480 .num_resource = 8,
1299 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1481 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1300 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1482 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1301 .host_id = HOST_ID_C6X_0_1, 1483 .host_id = HOST_ID_C6X_0_1,
1302 }, 1484 },
1303 { 1485 {
1304 .start_resource = 110, 1486 .start_resource = 42,
1305 .num_resource = 8, 1487 .num_resource = 2,
1306 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1488 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1307 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1489 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1308 .host_id = HOST_ID_C6X_1_1, 1490 .host_id = HOST_ID_C6X_1_1,
1309 }, 1491 },
1310 { 1492 {
1311 .start_resource = 118, 1493 .start_resource = 44,
1494 .num_resource = 4,
1495 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1496 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1497 .host_id = HOST_ID_MAIN_0_R5_0,
1498 },
1499 {
1500 .start_resource = 48,
1501 .num_resource = 1,
1502 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1503 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1504 .host_id = HOST_ID_MAIN_0_R5_2,
1505 },
1506 {
1507 .start_resource = 49,
1508 .num_resource = 28,
1509 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1510 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1511 .host_id = HOST_ID_A72_2,
1512 },
1513 {
1514 .start_resource = 77,
1312 .num_resource = 20, 1515 .num_resource = 20,
1313 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1516 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1314 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1517 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1518 .host_id = HOST_ID_A72_3,
1519 },
1520 {
1521 .start_resource = 97,
1522 .num_resource = 4,
1523 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1524 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1525 .host_id = HOST_ID_MAIN_1_R5_0,
1526 },
1527 {
1528 .start_resource = 101,
1529 .num_resource = 4,
1530 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1531 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1532 .host_id = HOST_ID_MAIN_1_R5_2,
1533 },
1534 {
1535 .start_resource = 105,
1536 .num_resource = 4,
1537 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1538 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1539 .host_id = HOST_ID_C7X_1,
1540 },
1541 {
1542 .start_resource = 109,
1543 .num_resource = 8,
1544 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1545 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1546 .host_id = HOST_ID_C6X_0_1,
1547 },
1548 {
1549 .start_resource = 117,
1550 .num_resource = 6,
1551 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1552 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1553 .host_id = HOST_ID_C6X_1_1,
1554 },
1555 {
1556 .start_resource = 123,
1557 .num_resource = 16,
1558 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1559 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1315 .host_id = HOST_ID_MAIN_0_R5_0, 1560 .host_id = HOST_ID_MAIN_0_R5_0,
1316 }, 1561 },
1317 { 1562 {
1318 .start_resource = 138, 1563 .start_resource = 139,
1319 .num_resource = 2, 1564 .num_resource = 1,
1320 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1565 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1321 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1566 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1322 .host_id = HOST_ID_MAIN_0_R5_2, 1567 .host_id = HOST_ID_MAIN_0_R5_2,
@@ -1324,12 +1569,26 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1324 /* Main NAVSS UDMA High capacity Rx channels */ 1569 /* Main NAVSS UDMA High capacity Rx channels */
1325 { 1570 {
1326 .start_resource = 4, 1571 .start_resource = 4,
1572 .num_resource = 0,
1573 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1574 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
1575 .host_id = HOST_ID_A72_2,
1576 },
1577 {
1578 .start_resource = 4,
1327 .num_resource = 4, 1579 .num_resource = 4,
1328 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1580 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1329 RESASG_SUBTYPE_UDMAP_RX_HCHAN), 1581 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
1330 .host_id = HOST_ID_A72_2, 1582 .host_id = HOST_ID_A72_2,
1331 }, 1583 },
1332 { 1584 {
1585 .start_resource = 4,
1586 .num_resource = 0,
1587 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1588 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
1589 .host_id = HOST_ID_MAIN_0_R5_0,
1590 },
1591 {
1333 .start_resource = 8, 1592 .start_resource = 8,
1334 .num_resource = 6, 1593 .num_resource = 6,
1335 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1594 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
@@ -1346,12 +1605,26 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1346 /* Main NAVSS UDMA Ultra high capacity Rx channels */ 1605 /* Main NAVSS UDMA Ultra high capacity Rx channels */
1347 { 1606 {
1348 .start_resource = 0, 1607 .start_resource = 0,
1608 .num_resource = 0,
1609 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1610 RESASG_SUBTYPE_UDMAP_RX_UHCHAN),
1611 .host_id = HOST_ID_A72_2,
1612 },
1613 {
1614 .start_resource = 0,
1349 .num_resource = 2, 1615 .num_resource = 2,
1350 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1616 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1351 RESASG_SUBTYPE_UDMAP_RX_UHCHAN), 1617 RESASG_SUBTYPE_UDMAP_RX_UHCHAN),
1352 .host_id = HOST_ID_A72_2, 1618 .host_id = HOST_ID_A72_2,
1353 }, 1619 },
1354 { 1620 {
1621 .start_resource = 0,
1622 .num_resource = 0,
1623 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1624 RESASG_SUBTYPE_UDMAP_RX_UHCHAN),
1625 .host_id = HOST_ID_MAIN_0_R5_0,
1626 },
1627 {
1355 .start_resource = 2, 1628 .start_resource = 2,
1356 .num_resource = 2, 1629 .num_resource = 2,
1357 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1630 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
@@ -1361,91 +1634,154 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1361 /* Main NAVSS UDMA Normal capacity Tx channels */ 1634 /* Main NAVSS UDMA Normal capacity Tx channels */
1362 { 1635 {
1363 .start_resource = 16, 1636 .start_resource = 16,
1364 .num_resource = 36, 1637 .num_resource = 8,
1365 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1638 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1366 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1639 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1367 .host_id = HOST_ID_A72_2, 1640 .host_id = HOST_ID_A72_2,
1368 }, 1641 },
1369 { 1642 {
1370 .start_resource = 52, 1643 .start_resource = 24,
1371 .num_resource = 20, 1644 .num_resource = 2,
1372 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1645 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1373 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1646 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1374 .host_id = HOST_ID_A72_3, 1647 .host_id = HOST_ID_MCU_0_R5_0,
1375 }, 1648 },
1376 { 1649 {
1377 .start_resource = 72, 1650 .start_resource = 24,
1378 .num_resource = 2, 1651 .num_resource = 2,
1379 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1652 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1380 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1653 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1381 .host_id = HOST_ID_MCU_0_R5_0, 1654 .host_id = HOST_ID_MCU_0_R5_1,
1382 }, 1655 },
1383 { 1656 {
1384 .start_resource = 72, 1657 .start_resource = 24,
1385 .num_resource = 2, 1658 .num_resource = 0,
1386 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1659 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1387 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1660 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1388 .host_id = HOST_ID_MCU_0_R5_1, 1661 .host_id = HOST_ID_A72_3,
1389 }, 1662 },
1390 { 1663 {
1391 .start_resource = 74, 1664 .start_resource = 26,
1392 .num_resource = 2, 1665 .num_resource = 2,
1393 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1666 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1394 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1667 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1395 .host_id = HOST_ID_MCU_0_R5_2, 1668 .host_id = HOST_ID_MCU_0_R5_2,
1396 }, 1669 },
1397 { 1670 {
1398 .start_resource = 76, 1671 .start_resource = 28,
1399 .num_resource = 6, 1672 .num_resource = 2,
1400 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1673 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1401 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1674 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1402 .host_id = HOST_ID_MAIN_1_R5_0, 1675 .host_id = HOST_ID_MAIN_1_R5_0,
1403 }, 1676 },
1404 { 1677 {
1405 .start_resource = 82, 1678 .start_resource = 30,
1406 .num_resource = 6, 1679 .num_resource = 2,
1407 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1680 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1408 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1681 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1409 .host_id = HOST_ID_MAIN_1_R5_2, 1682 .host_id = HOST_ID_MAIN_1_R5_2,
1410 }, 1683 },
1411 { 1684 {
1412 .start_resource = 88, 1685 .start_resource = 32,
1413 .num_resource = 6, 1686 .num_resource = 2,
1414 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1687 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1415 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1688 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1416 .host_id = HOST_ID_C7X_1, 1689 .host_id = HOST_ID_C7X_1,
1417 }, 1690 },
1418 { 1691 {
1419 .start_resource = 94, 1692 .start_resource = 34,
1420 .num_resource = 16, 1693 .num_resource = 8,
1421 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1694 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1422 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1695 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1423 .host_id = HOST_ID_C6X_0_1, 1696 .host_id = HOST_ID_C6X_0_1,
1424 }, 1697 },
1425 { 1698 {
1426 .start_resource = 110, 1699 .start_resource = 42,
1700 .num_resource = 2,
1701 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1702 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1703 .host_id = HOST_ID_C6X_1_1,
1704 },
1705 {
1706 .start_resource = 44,
1707 .num_resource = 4,
1708 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1709 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1710 .host_id = HOST_ID_MAIN_0_R5_0,
1711 },
1712 {
1713 .start_resource = 48,
1714 .num_resource = 1,
1715 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1716 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1717 .host_id = HOST_ID_MAIN_0_R5_2,
1718 },
1719 {
1720 .start_resource = 49,
1721 .num_resource = 28,
1722 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1723 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1724 .host_id = HOST_ID_A72_2,
1725 },
1726 {
1727 .start_resource = 77,
1728 .num_resource = 20,
1729 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1730 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1731 .host_id = HOST_ID_A72_3,
1732 },
1733 {
1734 .start_resource = 97,
1735 .num_resource = 4,
1736 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1737 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1738 .host_id = HOST_ID_MAIN_1_R5_0,
1739 },
1740 {
1741 .start_resource = 101,
1742 .num_resource = 4,
1743 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1744 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1745 .host_id = HOST_ID_MAIN_1_R5_2,
1746 },
1747 {
1748 .start_resource = 105,
1749 .num_resource = 4,
1750 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1751 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1752 .host_id = HOST_ID_C7X_1,
1753 },
1754 {
1755 .start_resource = 109,
1427 .num_resource = 8, 1756 .num_resource = 8,
1428 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1757 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1429 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1758 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1759 .host_id = HOST_ID_C6X_0_1,
1760 },
1761 {
1762 .start_resource = 117,
1763 .num_resource = 6,
1764 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1765 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1430 .host_id = HOST_ID_C6X_1_1, 1766 .host_id = HOST_ID_C6X_1_1,
1431 }, 1767 },
1432 { 1768 {
1433 .start_resource = 118, 1769 .start_resource = 123,
1434 .num_resource = 14, 1770 .num_resource = 10,
1435 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1771 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1436 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1772 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1437 .host_id = HOST_ID_MAIN_0_R5_0, 1773 .host_id = HOST_ID_MAIN_0_R5_0,
1438 }, 1774 },
1439 { 1775 {
1440 .start_resource = 132, 1776 .start_resource = 133,
1441 .num_resource = 6, 1777 .num_resource = 6,
1442 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1778 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1443 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1779 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1444 .host_id = HOST_ID_MAIN_0_R5_2, 1780 .host_id = HOST_ID_MAIN_0_R5_2,
1445 }, 1781 },
1446 { 1782 {
1447 .start_resource = 138, 1783 .start_resource = 139,
1448 .num_resource = 2, 1784 .num_resource = 1,
1449 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1785 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1450 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1786 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1451 .host_id = HOST_ID_ALL, 1787 .host_id = HOST_ID_ALL,
@@ -1504,12 +1840,26 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1504 /* Main NAVSS UDMA High capacity Tx channels */ 1840 /* Main NAVSS UDMA High capacity Tx channels */
1505 { 1841 {
1506 .start_resource = 4, 1842 .start_resource = 4,
1843 .num_resource = 0,
1844 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1845 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
1846 .host_id = HOST_ID_A72_2,
1847 },
1848 {
1849 .start_resource = 4,
1507 .num_resource = 4, 1850 .num_resource = 4,
1508 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1851 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1509 RESASG_SUBTYPE_UDMAP_TX_HCHAN), 1852 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
1510 .host_id = HOST_ID_A72_2, 1853 .host_id = HOST_ID_A72_2,
1511 }, 1854 },
1512 { 1855 {
1856 .start_resource = 4,
1857 .num_resource = 0,
1858 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1859 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
1860 .host_id = HOST_ID_MAIN_0_R5_0,
1861 },
1862 {
1513 .start_resource = 8, 1863 .start_resource = 8,
1514 .num_resource = 6, 1864 .num_resource = 6,
1515 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1865 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
@@ -1526,12 +1876,26 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1526 /* Main NAVSS UDMA Ultra high capacity Tx channels */ 1876 /* Main NAVSS UDMA Ultra high capacity Tx channels */
1527 { 1877 {
1528 .start_resource = 0, 1878 .start_resource = 0,
1879 .num_resource = 0,
1880 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1881 RESASG_SUBTYPE_UDMAP_TX_UHCHAN),
1882 .host_id = HOST_ID_A72_2,
1883 },
1884 {
1885 .start_resource = 0,
1529 .num_resource = 2, 1886 .num_resource = 2,
1530 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1887 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1531 RESASG_SUBTYPE_UDMAP_TX_UHCHAN), 1888 RESASG_SUBTYPE_UDMAP_TX_UHCHAN),
1532 .host_id = HOST_ID_A72_2, 1889 .host_id = HOST_ID_A72_2,
1533 }, 1890 },
1534 { 1891 {
1892 .start_resource = 0,
1893 .num_resource = 0,
1894 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1895 RESASG_SUBTYPE_UDMAP_TX_UHCHAN),
1896 .host_id = HOST_ID_MAIN_0_R5_0,
1897 },
1898 {
1535 .start_resource = 2, 1899 .start_resource = 2,
1536 .num_resource = 2, 1900 .num_resource = 2,
1537 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1901 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
@@ -2002,84 +2366,168 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2002 /* MCU NAVSS Rings for Normal capacity Rx channels */ 2366 /* MCU NAVSS Rings for Normal capacity Rx channels */
2003 { 2367 {
2004 .start_resource = 50, 2368 .start_resource = 50,
2005 .num_resource = 12, 2369 .num_resource = 3,
2006 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2370 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2007 RESASG_SUBTYPE_RA_UDMAP_RX), 2371 RESASG_SUBTYPE_RA_UDMAP_RX),
2008 .host_id = HOST_ID_A72_2, 2372 .host_id = HOST_ID_A72_2,
2009 }, 2373 },
2010 { 2374 {
2375 .start_resource = 53,
2376 .num_resource = 2,
2377 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2378 RESASG_SUBTYPE_RA_UDMAP_RX),
2379 .host_id = HOST_ID_MCU_0_R5_0,
2380 },
2381 {
2382 .start_resource = 53,
2383 .num_resource = 2,
2384 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2385 RESASG_SUBTYPE_RA_UDMAP_RX),
2386 .host_id = HOST_ID_MCU_0_R5_1,
2387 },
2388 {
2389 .start_resource = 53,
2390 .num_resource = 0,
2391 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2392 RESASG_SUBTYPE_RA_UDMAP_RX),
2393 .host_id = HOST_ID_A72_3,
2394 },
2395 {
2396 .start_resource = 55,
2397 .num_resource = 0,
2398 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2399 RESASG_SUBTYPE_RA_UDMAP_RX),
2400 .host_id = HOST_ID_MCU_0_R5_2,
2401 },
2402 {
2403 .start_resource = 55,
2404 .num_resource = 1,
2405 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2406 RESASG_SUBTYPE_RA_UDMAP_RX),
2407 .host_id = HOST_ID_MAIN_1_R5_0,
2408 },
2409 {
2410 .start_resource = 56,
2411 .num_resource = 1,
2412 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2413 RESASG_SUBTYPE_RA_UDMAP_RX),
2414 .host_id = HOST_ID_MAIN_1_R5_2,
2415 },
2416 {
2417 .start_resource = 57,
2418 .num_resource = 1,
2419 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2420 RESASG_SUBTYPE_RA_UDMAP_RX),
2421 .host_id = HOST_ID_C7X_1,
2422 },
2423 {
2424 .start_resource = 58,
2425 .num_resource = 1,
2426 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2427 RESASG_SUBTYPE_RA_UDMAP_RX),
2428 .host_id = HOST_ID_C6X_0_1,
2429 },
2430 {
2431 .start_resource = 59,
2432 .num_resource = 1,
2433 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2434 RESASG_SUBTYPE_RA_UDMAP_RX),
2435 .host_id = HOST_ID_C6X_1_1,
2436 },
2437 {
2438 .start_resource = 60,
2439 .num_resource = 1,
2440 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2441 RESASG_SUBTYPE_RA_UDMAP_RX),
2442 .host_id = HOST_ID_MAIN_0_R5_0,
2443 },
2444 {
2445 .start_resource = 61,
2446 .num_resource = 1,
2447 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2448 RESASG_SUBTYPE_RA_UDMAP_RX),
2449 .host_id = HOST_ID_MAIN_0_R5_2,
2450 },
2451 {
2011 .start_resource = 62, 2452 .start_resource = 62,
2453 .num_resource = 9,
2454 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2455 RESASG_SUBTYPE_RA_UDMAP_RX),
2456 .host_id = HOST_ID_A72_2,
2457 },
2458 {
2459 .start_resource = 71,
2012 .num_resource = 6, 2460 .num_resource = 6,
2013 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2461 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2014 RESASG_SUBTYPE_RA_UDMAP_RX), 2462 RESASG_SUBTYPE_RA_UDMAP_RX),
2015 .host_id = HOST_ID_A72_3, 2463 .host_id = HOST_ID_A72_3,
2016 }, 2464 },
2017 { 2465 {
2018 .start_resource = 68, 2466 .start_resource = 77,
2019 .num_resource = 5, 2467 .num_resource = 3,
2020 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2468 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2021 RESASG_SUBTYPE_RA_UDMAP_RX), 2469 RESASG_SUBTYPE_RA_UDMAP_RX),
2022 .host_id = HOST_ID_MCU_0_R5_0, 2470 .host_id = HOST_ID_MCU_0_R5_0,
2023 }, 2471 },
2024 { 2472 {
2025 .start_resource = 68, 2473 .start_resource = 77,
2026 .num_resource = 5, 2474 .num_resource = 3,
2027 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2475 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2028 RESASG_SUBTYPE_RA_UDMAP_RX), 2476 RESASG_SUBTYPE_RA_UDMAP_RX),
2029 .host_id = HOST_ID_MCU_0_R5_1, 2477 .host_id = HOST_ID_MCU_0_R5_1,
2030 }, 2478 },
2031 { 2479 {
2032 .start_resource = 73, 2480 .start_resource = 80,
2033 .num_resource = 2, 2481 .num_resource = 2,
2034 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2482 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2035 RESASG_SUBTYPE_RA_UDMAP_RX), 2483 RESASG_SUBTYPE_RA_UDMAP_RX),
2036 .host_id = HOST_ID_MCU_0_R5_2, 2484 .host_id = HOST_ID_MCU_0_R5_2,
2037 }, 2485 },
2038 { 2486 {
2039 .start_resource = 75, 2487 .start_resource = 82,
2040 .num_resource = 2, 2488 .num_resource = 1,
2041 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2489 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2042 RESASG_SUBTYPE_RA_UDMAP_RX), 2490 RESASG_SUBTYPE_RA_UDMAP_RX),
2043 .host_id = HOST_ID_MAIN_1_R5_0, 2491 .host_id = HOST_ID_MAIN_1_R5_0,
2044 }, 2492 },
2045 { 2493 {
2046 .start_resource = 77, 2494 .start_resource = 83,
2047 .num_resource = 2, 2495 .num_resource = 1,
2048 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2496 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2049 RESASG_SUBTYPE_RA_UDMAP_RX), 2497 RESASG_SUBTYPE_RA_UDMAP_RX),
2050 .host_id = HOST_ID_MAIN_1_R5_2, 2498 .host_id = HOST_ID_MAIN_1_R5_2,
2051 }, 2499 },
2052 { 2500 {
2053 .start_resource = 79, 2501 .start_resource = 84,
2054 .num_resource = 2, 2502 .num_resource = 1,
2055 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2503 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2056 RESASG_SUBTYPE_RA_UDMAP_RX), 2504 RESASG_SUBTYPE_RA_UDMAP_RX),
2057 .host_id = HOST_ID_C7X_1, 2505 .host_id = HOST_ID_C7X_1,
2058 }, 2506 },
2059 { 2507 {
2060 .start_resource = 81, 2508 .start_resource = 85,
2061 .num_resource = 2, 2509 .num_resource = 1,
2062 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2510 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2063 RESASG_SUBTYPE_RA_UDMAP_RX), 2511 RESASG_SUBTYPE_RA_UDMAP_RX),
2064 .host_id = HOST_ID_C6X_0_1, 2512 .host_id = HOST_ID_C6X_0_1,
2065 }, 2513 },
2066 { 2514 {
2067 .start_resource = 83, 2515 .start_resource = 86,
2068 .num_resource = 2, 2516 .num_resource = 1,
2069 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2517 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2070 RESASG_SUBTYPE_RA_UDMAP_RX), 2518 RESASG_SUBTYPE_RA_UDMAP_RX),
2071 .host_id = HOST_ID_C6X_1_1, 2519 .host_id = HOST_ID_C6X_1_1,
2072 }, 2520 },
2073 { 2521 {
2074 .start_resource = 85, 2522 .start_resource = 87,
2075 .num_resource = 3, 2523 .num_resource = 2,
2076 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2524 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2077 RESASG_SUBTYPE_RA_UDMAP_RX), 2525 RESASG_SUBTYPE_RA_UDMAP_RX),
2078 .host_id = HOST_ID_MAIN_0_R5_0, 2526 .host_id = HOST_ID_MAIN_0_R5_0,
2079 }, 2527 },
2080 { 2528 {
2081 .start_resource = 88, 2529 .start_resource = 89,
2082 .num_resource = 2, 2530 .num_resource = 1,
2083 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2531 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2084 RESASG_SUBTYPE_RA_UDMAP_RX), 2532 RESASG_SUBTYPE_RA_UDMAP_RX),
2085 .host_id = HOST_ID_MAIN_0_R5_2, 2533 .host_id = HOST_ID_MAIN_0_R5_2,
@@ -2094,84 +2542,168 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2094 /* MCU NAVSS Rings for Normal capacity Tx channels */ 2542 /* MCU NAVSS Rings for Normal capacity Tx channels */
2095 { 2543 {
2096 .start_resource = 2, 2544 .start_resource = 2,
2097 .num_resource = 12, 2545 .num_resource = 3,
2098 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2546 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2099 RESASG_SUBTYPE_RA_UDMAP_TX), 2547 RESASG_SUBTYPE_RA_UDMAP_TX),
2100 .host_id = HOST_ID_A72_2, 2548 .host_id = HOST_ID_A72_2,
2101 }, 2549 },
2102 { 2550 {
2551 .start_resource = 5,
2552 .num_resource = 2,
2553 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2554 RESASG_SUBTYPE_RA_UDMAP_TX),
2555 .host_id = HOST_ID_MCU_0_R5_0,
2556 },
2557 {
2558 .start_resource = 5,
2559 .num_resource = 2,
2560 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2561 RESASG_SUBTYPE_RA_UDMAP_TX),
2562 .host_id = HOST_ID_MCU_0_R5_1,
2563 },
2564 {
2565 .start_resource = 5,
2566 .num_resource = 0,
2567 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2568 RESASG_SUBTYPE_RA_UDMAP_TX),
2569 .host_id = HOST_ID_A72_3,
2570 },
2571 {
2572 .start_resource = 7,
2573 .num_resource = 0,
2574 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2575 RESASG_SUBTYPE_RA_UDMAP_TX),
2576 .host_id = HOST_ID_MCU_0_R5_2,
2577 },
2578 {
2579 .start_resource = 7,
2580 .num_resource = 1,
2581 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2582 RESASG_SUBTYPE_RA_UDMAP_TX),
2583 .host_id = HOST_ID_MAIN_1_R5_0,
2584 },
2585 {
2586 .start_resource = 8,
2587 .num_resource = 1,
2588 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2589 RESASG_SUBTYPE_RA_UDMAP_TX),
2590 .host_id = HOST_ID_MAIN_1_R5_2,
2591 },
2592 {
2593 .start_resource = 9,
2594 .num_resource = 1,
2595 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2596 RESASG_SUBTYPE_RA_UDMAP_TX),
2597 .host_id = HOST_ID_C7X_1,
2598 },
2599 {
2600 .start_resource = 10,
2601 .num_resource = 1,
2602 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2603 RESASG_SUBTYPE_RA_UDMAP_TX),
2604 .host_id = HOST_ID_C6X_0_1,
2605 },
2606 {
2607 .start_resource = 11,
2608 .num_resource = 1,
2609 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2610 RESASG_SUBTYPE_RA_UDMAP_TX),
2611 .host_id = HOST_ID_C6X_1_1,
2612 },
2613 {
2614 .start_resource = 12,
2615 .num_resource = 1,
2616 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2617 RESASG_SUBTYPE_RA_UDMAP_TX),
2618 .host_id = HOST_ID_MAIN_0_R5_0,
2619 },
2620 {
2621 .start_resource = 13,
2622 .num_resource = 1,
2623 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2624 RESASG_SUBTYPE_RA_UDMAP_TX),
2625 .host_id = HOST_ID_MAIN_0_R5_2,
2626 },
2627 {
2103 .start_resource = 14, 2628 .start_resource = 14,
2629 .num_resource = 9,
2630 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2631 RESASG_SUBTYPE_RA_UDMAP_TX),
2632 .host_id = HOST_ID_A72_2,
2633 },
2634 {
2635 .start_resource = 23,
2104 .num_resource = 6, 2636 .num_resource = 6,
2105 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2637 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2106 RESASG_SUBTYPE_RA_UDMAP_TX), 2638 RESASG_SUBTYPE_RA_UDMAP_TX),
2107 .host_id = HOST_ID_A72_3, 2639 .host_id = HOST_ID_A72_3,
2108 }, 2640 },
2109 { 2641 {
2110 .start_resource = 20, 2642 .start_resource = 29,
2111 .num_resource = 5, 2643 .num_resource = 3,
2112 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2644 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2113 RESASG_SUBTYPE_RA_UDMAP_TX), 2645 RESASG_SUBTYPE_RA_UDMAP_TX),
2114 .host_id = HOST_ID_MCU_0_R5_0, 2646 .host_id = HOST_ID_MCU_0_R5_0,
2115 }, 2647 },
2116 { 2648 {
2117 .start_resource = 20, 2649 .start_resource = 29,
2118 .num_resource = 5, 2650 .num_resource = 3,
2119 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2651 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2120 RESASG_SUBTYPE_RA_UDMAP_TX), 2652 RESASG_SUBTYPE_RA_UDMAP_TX),
2121 .host_id = HOST_ID_MCU_0_R5_1, 2653 .host_id = HOST_ID_MCU_0_R5_1,
2122 }, 2654 },
2123 { 2655 {
2124 .start_resource = 25, 2656 .start_resource = 32,
2125 .num_resource = 2, 2657 .num_resource = 2,
2126 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2658 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2127 RESASG_SUBTYPE_RA_UDMAP_TX), 2659 RESASG_SUBTYPE_RA_UDMAP_TX),
2128 .host_id = HOST_ID_MCU_0_R5_2, 2660 .host_id = HOST_ID_MCU_0_R5_2,
2129 }, 2661 },
2130 { 2662 {
2131 .start_resource = 27, 2663 .start_resource = 34,
2132 .num_resource = 2, 2664 .num_resource = 1,
2133 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2665 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2134 RESASG_SUBTYPE_RA_UDMAP_TX), 2666 RESASG_SUBTYPE_RA_UDMAP_TX),
2135 .host_id = HOST_ID_MAIN_1_R5_0, 2667 .host_id = HOST_ID_MAIN_1_R5_0,
2136 }, 2668 },
2137 { 2669 {
2138 .start_resource = 29, 2670 .start_resource = 35,
2139 .num_resource = 2, 2671 .num_resource = 1,
2140 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2672 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2141 RESASG_SUBTYPE_RA_UDMAP_TX), 2673 RESASG_SUBTYPE_RA_UDMAP_TX),
2142 .host_id = HOST_ID_MAIN_1_R5_2, 2674 .host_id = HOST_ID_MAIN_1_R5_2,
2143 }, 2675 },
2144 { 2676 {
2145 .start_resource = 31, 2677 .start_resource = 36,
2146 .num_resource = 2, 2678 .num_resource = 1,
2147 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2679 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2148 RESASG_SUBTYPE_RA_UDMAP_TX), 2680 RESASG_SUBTYPE_RA_UDMAP_TX),
2149 .host_id = HOST_ID_C7X_1, 2681 .host_id = HOST_ID_C7X_1,
2150 }, 2682 },
2151 { 2683 {
2152 .start_resource = 33, 2684 .start_resource = 37,
2153 .num_resource = 2, 2685 .num_resource = 1,
2154 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2686 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2155 RESASG_SUBTYPE_RA_UDMAP_TX), 2687 RESASG_SUBTYPE_RA_UDMAP_TX),
2156 .host_id = HOST_ID_C6X_0_1, 2688 .host_id = HOST_ID_C6X_0_1,
2157 }, 2689 },
2158 { 2690 {
2159 .start_resource = 35, 2691 .start_resource = 38,
2160 .num_resource = 2, 2692 .num_resource = 1,
2161 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2693 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2162 RESASG_SUBTYPE_RA_UDMAP_TX), 2694 RESASG_SUBTYPE_RA_UDMAP_TX),
2163 .host_id = HOST_ID_C6X_1_1, 2695 .host_id = HOST_ID_C6X_1_1,
2164 }, 2696 },
2165 { 2697 {
2166 .start_resource = 37, 2698 .start_resource = 39,
2167 .num_resource = 3, 2699 .num_resource = 2,
2168 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2700 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2169 RESASG_SUBTYPE_RA_UDMAP_TX), 2701 RESASG_SUBTYPE_RA_UDMAP_TX),
2170 .host_id = HOST_ID_MAIN_0_R5_0, 2702 .host_id = HOST_ID_MAIN_0_R5_0,
2171 }, 2703 },
2172 { 2704 {
2173 .start_resource = 40, 2705 .start_resource = 41,
2174 .num_resource = 2, 2706 .num_resource = 1,
2175 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2707 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2176 RESASG_SUBTYPE_RA_UDMAP_TX), 2708 RESASG_SUBTYPE_RA_UDMAP_TX),
2177 .host_id = HOST_ID_MAIN_0_R5_2, 2709 .host_id = HOST_ID_MAIN_0_R5_2,
@@ -2186,6 +2718,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2186 /* MCU NAVSS Rings for High capacity Rx channels */ 2718 /* MCU NAVSS Rings for High capacity Rx channels */
2187 { 2719 {
2188 .start_resource = 48, 2720 .start_resource = 48,
2721 .num_resource = 0,
2722 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2723 RESASG_SUBTYPE_RA_UDMAP_RX_H),
2724 .host_id = HOST_ID_MCU_0_R5_0,
2725 },
2726 {
2727 .start_resource = 48,
2189 .num_resource = 2, 2728 .num_resource = 2,
2190 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2729 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2191 RESASG_SUBTYPE_RA_UDMAP_RX_H), 2730 RESASG_SUBTYPE_RA_UDMAP_RX_H),
@@ -2193,6 +2732,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2193 }, 2732 },
2194 { 2733 {
2195 .start_resource = 48, 2734 .start_resource = 48,
2735 .num_resource = 0,
2736 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2737 RESASG_SUBTYPE_RA_UDMAP_RX_H),
2738 .host_id = HOST_ID_MCU_0_R5_1,
2739 },
2740 {
2741 .start_resource = 48,
2196 .num_resource = 2, 2742 .num_resource = 2,
2197 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2743 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2198 RESASG_SUBTYPE_RA_UDMAP_RX_H), 2744 RESASG_SUBTYPE_RA_UDMAP_RX_H),
@@ -2201,6 +2747,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2201 /* MCU NAVSS Rings for High capacity Tx channels */ 2747 /* MCU NAVSS Rings for High capacity Tx channels */
2202 { 2748 {
2203 .start_resource = 0, 2749 .start_resource = 0,
2750 .num_resource = 0,
2751 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2752 RESASG_SUBTYPE_RA_UDMAP_TX_H),
2753 .host_id = HOST_ID_MCU_0_R5_0,
2754 },
2755 {
2756 .start_resource = 0,
2204 .num_resource = 2, 2757 .num_resource = 2,
2205 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2758 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2206 RESASG_SUBTYPE_RA_UDMAP_TX_H), 2759 RESASG_SUBTYPE_RA_UDMAP_TX_H),
@@ -2208,6 +2761,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2208 }, 2761 },
2209 { 2762 {
2210 .start_resource = 0, 2763 .start_resource = 0,
2764 .num_resource = 0,
2765 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2766 RESASG_SUBTYPE_RA_UDMAP_TX_H),
2767 .host_id = HOST_ID_MCU_0_R5_1,
2768 },
2769 {
2770 .start_resource = 0,
2211 .num_resource = 2, 2771 .num_resource = 2,
2212 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0, 2772 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC0,
2213 RESASG_SUBTYPE_RA_UDMAP_TX_H), 2773 RESASG_SUBTYPE_RA_UDMAP_TX_H),
@@ -2411,84 +2971,168 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2411 /* MCU NAVSS UDMA Normal capacity Rx channels */ 2971 /* MCU NAVSS UDMA Normal capacity Rx channels */
2412 { 2972 {
2413 .start_resource = 2, 2973 .start_resource = 2,
2414 .num_resource = 12, 2974 .num_resource = 3,
2415 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 2975 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2416 RESASG_SUBTYPE_UDMAP_RX_CHAN), 2976 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2417 .host_id = HOST_ID_A72_2, 2977 .host_id = HOST_ID_A72_2,
2418 }, 2978 },
2419 { 2979 {
2980 .start_resource = 5,
2981 .num_resource = 2,
2982 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2983 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2984 .host_id = HOST_ID_MCU_0_R5_0,
2985 },
2986 {
2987 .start_resource = 5,
2988 .num_resource = 2,
2989 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2990 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2991 .host_id = HOST_ID_MCU_0_R5_1,
2992 },
2993 {
2994 .start_resource = 5,
2995 .num_resource = 0,
2996 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2997 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2998 .host_id = HOST_ID_A72_3,
2999 },
3000 {
3001 .start_resource = 7,
3002 .num_resource = 0,
3003 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3004 RESASG_SUBTYPE_UDMAP_RX_CHAN),
3005 .host_id = HOST_ID_MCU_0_R5_2,
3006 },
3007 {
3008 .start_resource = 7,
3009 .num_resource = 1,
3010 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3011 RESASG_SUBTYPE_UDMAP_RX_CHAN),
3012 .host_id = HOST_ID_MAIN_1_R5_0,
3013 },
3014 {
3015 .start_resource = 8,
3016 .num_resource = 1,
3017 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3018 RESASG_SUBTYPE_UDMAP_RX_CHAN),
3019 .host_id = HOST_ID_MAIN_1_R5_2,
3020 },
3021 {
3022 .start_resource = 9,
3023 .num_resource = 1,
3024 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3025 RESASG_SUBTYPE_UDMAP_RX_CHAN),
3026 .host_id = HOST_ID_C7X_1,
3027 },
3028 {
3029 .start_resource = 10,
3030 .num_resource = 1,
3031 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3032 RESASG_SUBTYPE_UDMAP_RX_CHAN),
3033 .host_id = HOST_ID_C6X_0_1,
3034 },
3035 {
3036 .start_resource = 11,
3037 .num_resource = 1,
3038 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3039 RESASG_SUBTYPE_UDMAP_RX_CHAN),
3040 .host_id = HOST_ID_C6X_1_1,
3041 },
3042 {
3043 .start_resource = 12,
3044 .num_resource = 1,
3045 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3046 RESASG_SUBTYPE_UDMAP_RX_CHAN),
3047 .host_id = HOST_ID_MAIN_0_R5_0,
3048 },
3049 {
3050 .start_resource = 13,
3051 .num_resource = 1,
3052 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3053 RESASG_SUBTYPE_UDMAP_RX_CHAN),
3054 .host_id = HOST_ID_MAIN_0_R5_2,
3055 },
3056 {
2420 .start_resource = 14, 3057 .start_resource = 14,
3058 .num_resource = 9,
3059 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3060 RESASG_SUBTYPE_UDMAP_RX_CHAN),
3061 .host_id = HOST_ID_A72_2,
3062 },
3063 {
3064 .start_resource = 23,
2421 .num_resource = 6, 3065 .num_resource = 6,
2422 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3066 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2423 RESASG_SUBTYPE_UDMAP_RX_CHAN), 3067 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2424 .host_id = HOST_ID_A72_3, 3068 .host_id = HOST_ID_A72_3,
2425 }, 3069 },
2426 { 3070 {
2427 .start_resource = 20, 3071 .start_resource = 29,
2428 .num_resource = 5, 3072 .num_resource = 3,
2429 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3073 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2430 RESASG_SUBTYPE_UDMAP_RX_CHAN), 3074 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2431 .host_id = HOST_ID_MCU_0_R5_0, 3075 .host_id = HOST_ID_MCU_0_R5_0,
2432 }, 3076 },
2433 { 3077 {
2434 .start_resource = 20, 3078 .start_resource = 29,
2435 .num_resource = 5, 3079 .num_resource = 3,
2436 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3080 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2437 RESASG_SUBTYPE_UDMAP_RX_CHAN), 3081 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2438 .host_id = HOST_ID_MCU_0_R5_1, 3082 .host_id = HOST_ID_MCU_0_R5_1,
2439 }, 3083 },
2440 { 3084 {
2441 .start_resource = 25, 3085 .start_resource = 32,
2442 .num_resource = 2, 3086 .num_resource = 2,
2443 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3087 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2444 RESASG_SUBTYPE_UDMAP_RX_CHAN), 3088 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2445 .host_id = HOST_ID_MCU_0_R5_2, 3089 .host_id = HOST_ID_MCU_0_R5_2,
2446 }, 3090 },
2447 { 3091 {
2448 .start_resource = 27, 3092 .start_resource = 34,
2449 .num_resource = 2, 3093 .num_resource = 1,
2450 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3094 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2451 RESASG_SUBTYPE_UDMAP_RX_CHAN), 3095 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2452 .host_id = HOST_ID_MAIN_1_R5_0, 3096 .host_id = HOST_ID_MAIN_1_R5_0,
2453 }, 3097 },
2454 { 3098 {
2455 .start_resource = 29, 3099 .start_resource = 35,
2456 .num_resource = 2, 3100 .num_resource = 1,
2457 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3101 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2458 RESASG_SUBTYPE_UDMAP_RX_CHAN), 3102 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2459 .host_id = HOST_ID_MAIN_1_R5_2, 3103 .host_id = HOST_ID_MAIN_1_R5_2,
2460 }, 3104 },
2461 { 3105 {
2462 .start_resource = 31, 3106 .start_resource = 36,
2463 .num_resource = 2, 3107 .num_resource = 1,
2464 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3108 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2465 RESASG_SUBTYPE_UDMAP_RX_CHAN), 3109 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2466 .host_id = HOST_ID_C7X_1, 3110 .host_id = HOST_ID_C7X_1,
2467 }, 3111 },
2468 { 3112 {
2469 .start_resource = 33, 3113 .start_resource = 37,
2470 .num_resource = 2, 3114 .num_resource = 1,
2471 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3115 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2472 RESASG_SUBTYPE_UDMAP_RX_CHAN), 3116 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2473 .host_id = HOST_ID_C6X_0_1, 3117 .host_id = HOST_ID_C6X_0_1,
2474 }, 3118 },
2475 { 3119 {
2476 .start_resource = 35, 3120 .start_resource = 38,
2477 .num_resource = 2, 3121 .num_resource = 1,
2478 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3122 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2479 RESASG_SUBTYPE_UDMAP_RX_CHAN), 3123 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2480 .host_id = HOST_ID_C6X_1_1, 3124 .host_id = HOST_ID_C6X_1_1,
2481 }, 3125 },
2482 { 3126 {
2483 .start_resource = 37, 3127 .start_resource = 39,
2484 .num_resource = 3, 3128 .num_resource = 2,
2485 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3129 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2486 RESASG_SUBTYPE_UDMAP_RX_CHAN), 3130 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2487 .host_id = HOST_ID_MAIN_0_R5_0, 3131 .host_id = HOST_ID_MAIN_0_R5_0,
2488 }, 3132 },
2489 { 3133 {
2490 .start_resource = 40, 3134 .start_resource = 41,
2491 .num_resource = 2, 3135 .num_resource = 1,
2492 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3136 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2493 RESASG_SUBTYPE_UDMAP_RX_CHAN), 3137 RESASG_SUBTYPE_UDMAP_RX_CHAN),
2494 .host_id = HOST_ID_MAIN_0_R5_2, 3138 .host_id = HOST_ID_MAIN_0_R5_2,
@@ -2503,6 +3147,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2503 /* MCU NAVSS UDMA High capacity Rx channels */ 3147 /* MCU NAVSS UDMA High capacity Rx channels */
2504 { 3148 {
2505 .start_resource = 0, 3149 .start_resource = 0,
3150 .num_resource = 0,
3151 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3152 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
3153 .host_id = HOST_ID_MCU_0_R5_0,
3154 },
3155 {
3156 .start_resource = 0,
2506 .num_resource = 2, 3157 .num_resource = 2,
2507 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3158 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2508 RESASG_SUBTYPE_UDMAP_RX_HCHAN), 3159 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
@@ -2510,6 +3161,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2510 }, 3161 },
2511 { 3162 {
2512 .start_resource = 0, 3163 .start_resource = 0,
3164 .num_resource = 0,
3165 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3166 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
3167 .host_id = HOST_ID_MCU_0_R5_1,
3168 },
3169 {
3170 .start_resource = 0,
2513 .num_resource = 2, 3171 .num_resource = 2,
2514 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3172 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2515 RESASG_SUBTYPE_UDMAP_RX_HCHAN), 3173 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
@@ -2518,84 +3176,168 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2518 /* MCU NAVSS UDMA Normal capacity Tx channels */ 3176 /* MCU NAVSS UDMA Normal capacity Tx channels */
2519 { 3177 {
2520 .start_resource = 2, 3178 .start_resource = 2,
2521 .num_resource = 12, 3179 .num_resource = 3,
2522 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3180 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2523 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3181 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2524 .host_id = HOST_ID_A72_2, 3182 .host_id = HOST_ID_A72_2,
2525 }, 3183 },
2526 { 3184 {
3185 .start_resource = 5,
3186 .num_resource = 2,
3187 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3188 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3189 .host_id = HOST_ID_MCU_0_R5_0,
3190 },
3191 {
3192 .start_resource = 5,
3193 .num_resource = 2,
3194 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3195 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3196 .host_id = HOST_ID_MCU_0_R5_1,
3197 },
3198 {
3199 .start_resource = 5,
3200 .num_resource = 0,
3201 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3202 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3203 .host_id = HOST_ID_A72_3,
3204 },
3205 {
3206 .start_resource = 7,
3207 .num_resource = 0,
3208 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3209 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3210 .host_id = HOST_ID_MCU_0_R5_2,
3211 },
3212 {
3213 .start_resource = 7,
3214 .num_resource = 1,
3215 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3216 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3217 .host_id = HOST_ID_MAIN_1_R5_0,
3218 },
3219 {
3220 .start_resource = 8,
3221 .num_resource = 1,
3222 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3223 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3224 .host_id = HOST_ID_MAIN_1_R5_2,
3225 },
3226 {
3227 .start_resource = 9,
3228 .num_resource = 1,
3229 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3230 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3231 .host_id = HOST_ID_C7X_1,
3232 },
3233 {
3234 .start_resource = 10,
3235 .num_resource = 1,
3236 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3237 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3238 .host_id = HOST_ID_C6X_0_1,
3239 },
3240 {
3241 .start_resource = 11,
3242 .num_resource = 1,
3243 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3244 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3245 .host_id = HOST_ID_C6X_1_1,
3246 },
3247 {
3248 .start_resource = 12,
3249 .num_resource = 1,
3250 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3251 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3252 .host_id = HOST_ID_MAIN_0_R5_0,
3253 },
3254 {
3255 .start_resource = 13,
3256 .num_resource = 1,
3257 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3258 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3259 .host_id = HOST_ID_MAIN_0_R5_2,
3260 },
3261 {
2527 .start_resource = 14, 3262 .start_resource = 14,
3263 .num_resource = 9,
3264 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3265 RESASG_SUBTYPE_UDMAP_TX_CHAN),
3266 .host_id = HOST_ID_A72_2,
3267 },
3268 {
3269 .start_resource = 23,
2528 .num_resource = 6, 3270 .num_resource = 6,
2529 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3271 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2530 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3272 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2531 .host_id = HOST_ID_A72_3, 3273 .host_id = HOST_ID_A72_3,
2532 }, 3274 },
2533 { 3275 {
2534 .start_resource = 20, 3276 .start_resource = 29,
2535 .num_resource = 5, 3277 .num_resource = 3,
2536 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3278 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2537 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3279 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2538 .host_id = HOST_ID_MCU_0_R5_0, 3280 .host_id = HOST_ID_MCU_0_R5_0,
2539 }, 3281 },
2540 { 3282 {
2541 .start_resource = 20, 3283 .start_resource = 29,
2542 .num_resource = 5, 3284 .num_resource = 3,
2543 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3285 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2544 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3286 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2545 .host_id = HOST_ID_MCU_0_R5_1, 3287 .host_id = HOST_ID_MCU_0_R5_1,
2546 }, 3288 },
2547 { 3289 {
2548 .start_resource = 25, 3290 .start_resource = 32,
2549 .num_resource = 2, 3291 .num_resource = 2,
2550 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3292 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2551 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3293 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2552 .host_id = HOST_ID_MCU_0_R5_2, 3294 .host_id = HOST_ID_MCU_0_R5_2,
2553 }, 3295 },
2554 { 3296 {
2555 .start_resource = 27, 3297 .start_resource = 34,
2556 .num_resource = 2, 3298 .num_resource = 1,
2557 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3299 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2558 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3300 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2559 .host_id = HOST_ID_MAIN_1_R5_0, 3301 .host_id = HOST_ID_MAIN_1_R5_0,
2560 }, 3302 },
2561 { 3303 {
2562 .start_resource = 29, 3304 .start_resource = 35,
2563 .num_resource = 2, 3305 .num_resource = 1,
2564 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3306 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2565 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3307 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2566 .host_id = HOST_ID_MAIN_1_R5_2, 3308 .host_id = HOST_ID_MAIN_1_R5_2,
2567 }, 3309 },
2568 { 3310 {
2569 .start_resource = 31, 3311 .start_resource = 36,
2570 .num_resource = 2, 3312 .num_resource = 1,
2571 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3313 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2572 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3314 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2573 .host_id = HOST_ID_C7X_1, 3315 .host_id = HOST_ID_C7X_1,
2574 }, 3316 },
2575 { 3317 {
2576 .start_resource = 33, 3318 .start_resource = 37,
2577 .num_resource = 2, 3319 .num_resource = 1,
2578 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3320 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2579 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3321 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2580 .host_id = HOST_ID_C6X_0_1, 3322 .host_id = HOST_ID_C6X_0_1,
2581 }, 3323 },
2582 { 3324 {
2583 .start_resource = 35, 3325 .start_resource = 38,
2584 .num_resource = 2, 3326 .num_resource = 1,
2585 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3327 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2586 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3328 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2587 .host_id = HOST_ID_C6X_1_1, 3329 .host_id = HOST_ID_C6X_1_1,
2588 }, 3330 },
2589 { 3331 {
2590 .start_resource = 37, 3332 .start_resource = 39,
2591 .num_resource = 3, 3333 .num_resource = 2,
2592 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3334 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2593 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3335 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2594 .host_id = HOST_ID_MAIN_0_R5_0, 3336 .host_id = HOST_ID_MAIN_0_R5_0,
2595 }, 3337 },
2596 { 3338 {
2597 .start_resource = 40, 3339 .start_resource = 41,
2598 .num_resource = 2, 3340 .num_resource = 1,
2599 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3341 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2600 RESASG_SUBTYPE_UDMAP_TX_CHAN), 3342 RESASG_SUBTYPE_UDMAP_TX_CHAN),
2601 .host_id = HOST_ID_MAIN_0_R5_2, 3343 .host_id = HOST_ID_MAIN_0_R5_2,
@@ -2610,6 +3352,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2610 /* MCU NAVSS UDMA High capacity Tx channels */ 3352 /* MCU NAVSS UDMA High capacity Tx channels */
2611 { 3353 {
2612 .start_resource = 0, 3354 .start_resource = 0,
3355 .num_resource = 0,
3356 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3357 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
3358 .host_id = HOST_ID_MCU_0_R5_0,
3359 },
3360 {
3361 .start_resource = 0,
2613 .num_resource = 2, 3362 .num_resource = 2,
2614 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3363 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2615 RESASG_SUBTYPE_UDMAP_TX_HCHAN), 3364 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
@@ -2617,6 +3366,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2617 }, 3366 },
2618 { 3367 {
2619 .start_resource = 0, 3368 .start_resource = 0,
3369 .num_resource = 0,
3370 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
3371 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
3372 .host_id = HOST_ID_MCU_0_R5_1,
3373 },
3374 {
3375 .start_resource = 0,
2620 .num_resource = 2, 3376 .num_resource = 2,
2621 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, 3377 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2622 RESASG_SUBTYPE_UDMAP_TX_HCHAN), 3378 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
@@ -2624,15 +3380,15 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2624 }, 3380 },
2625 /* MCU NAVSS Interrupt router */ 3381 /* MCU NAVSS Interrupt router */
2626 { 3382 {
2627 .start_resource = 4, 3383 .start_resource = 12,
2628 .num_resource = 28, 3384 .num_resource = 20,
2629 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_0, 3385 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_0,
2630 RESASG_SUBTYPE_IR_OUTPUT), 3386 RESASG_SUBTYPE_IR_OUTPUT),
2631 .host_id = HOST_ID_MCU_0_R5_0, 3387 .host_id = HOST_ID_MCU_0_R5_0,
2632 }, 3388 },
2633 { 3389 {
2634 .start_resource = 4, 3390 .start_resource = 12,
2635 .num_resource = 28, 3391 .num_resource = 20,
2636 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_0, 3392 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_0,
2637 RESASG_SUBTYPE_IR_OUTPUT), 3393 RESASG_SUBTYPE_IR_OUTPUT),
2638 .host_id = HOST_ID_MCU_0_R5_1, 3394 .host_id = HOST_ID_MCU_0_R5_1,
diff --git a/soc/j721e/evm/sysfw_img_cfg.h b/soc/j721e/evm/sysfw_img_cfg.h
index bfcab2d1a..b0f65281b 100644
--- a/soc/j721e/evm/sysfw_img_cfg.h
+++ b/soc/j721e/evm/sysfw_img_cfg.h
@@ -37,6 +37,6 @@
37#ifndef SYSFW_IMG_CFG_H 37#ifndef SYSFW_IMG_CFG_H
38#define SYSFW_IMG_CFG_H 38#define SYSFW_IMG_CFG_H
39 39
40#define BOARDCFG_RM_RESASG_ENTRIES 346 40#define BOARDCFG_RM_RESASG_ENTRIES 454
41 41
42#endif /* SYSFW_IMG_CFG_H */ 42#endif /* SYSFW_IMG_CFG_H */
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