diff options
author | Nikhil Devshatwar | 2020-01-20 12:51:14 -0600 |
---|---|---|
committer | Lokesh Vutla | 2020-01-21 23:47:05 -0600 |
commit | 95b73566071ec00e0002bd34acfe5c4d0c4a3b10 (patch) | |
tree | 159306d6d9fb75792f02f4ae468606ee66b29a28 | |
parent | e2eadcb4c856a241b227a0b91a1cb955c2d086a1 (diff) | |
download | k3-image-gen-95b73566071ec00e0002bd34acfe5c4d0c4a3b10.tar.gz k3-image-gen-95b73566071ec00e0002bd34acfe5c4d0c4a3b10.tar.xz k3-image-gen-95b73566071ec00e0002bd34acfe5c4d0c4a3b10.zip |
j721e: am65x: sec-cfg: Add otp_config section
Update the common.h headers to add new defines from SYSFW 2019.12.
Starting from SYSFW v2019.12, an otp_config section is mandatory in
the security config. Otherwise the boot fails.
Fix this by adding a section for opt_config with no other host
having permission to OTP array.
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
-rw-r--r-- | include/common.h | 17 | ||||
-rw-r--r-- | soc/am65x/evm/sec-cfg.c | 14 | ||||
-rw-r--r-- | soc/j721e/evm/sec-cfg.c | 14 |
3 files changed, 42 insertions, 3 deletions
diff --git a/include/common.h b/include/common.h index 83c900cab..03e88e2a9 100644 --- a/include/common.h +++ b/include/common.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * K3 System Firmware Board Configuration Data Structures | 2 | * K3 System Firmware Board Configuration Data Structures |
3 | * | 3 | * |
4 | * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ | 4 | * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com/ |
5 | * Andreas Dannenberg <dannenberg@ti.com> | 5 | * Andreas Dannenberg <dannenberg@ti.com> |
6 | * | 6 | * |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without |
@@ -79,6 +79,7 @@ typedef u8 ftbool; | |||
79 | #define BOARDCFG_RESASG_MAGIC_NUM 0x4C41 | 79 | #define BOARDCFG_RESASG_MAGIC_NUM 0x4C41 |
80 | #define BOARDCFG_DBG_CFG_MAGIC_NUM 0x020C | 80 | #define BOARDCFG_DBG_CFG_MAGIC_NUM 0x020C |
81 | #define BOARDCFG_PMIC_CFG_MAGIC_NUM 0x3172 | 81 | #define BOARDCFG_PMIC_CFG_MAGIC_NUM 0x3172 |
82 | #define BOARDCFG_OTP_CFG_MAGIC_NUM 0x4081 | ||
82 | 83 | ||
83 | struct boardcfg_substructure_header { | 84 | struct boardcfg_substructure_header { |
84 | u16 magic; | 85 | u16 magic; |
@@ -217,10 +218,24 @@ struct boardcfg_host_hierarchy { | |||
217 | host_hierarchy_entries[HOST_HIERARCHY_ENTRIES]; | 218 | host_hierarchy_entries[HOST_HIERARCHY_ENTRIES]; |
218 | } __attribute__((__packed__)); | 219 | } __attribute__((__packed__)); |
219 | 220 | ||
221 | struct boardcfg_extended_otp_entry { | ||
222 | u8 host_id; | ||
223 | u8 host_perms; | ||
224 | } __attribute__((__packed__)); | ||
225 | |||
226 | #define MAX_NUM_EXT_OTP_MMRS 32 | ||
227 | |||
228 | struct boardcfg_extended_otp { | ||
229 | struct boardcfg_substructure_header subhdr; | ||
230 | struct boardcfg_extended_otp_entry otp_entry[MAX_NUM_EXT_OTP_MMRS]; | ||
231 | u8 write_host_id; | ||
232 | } __attribute__((__packed__)); | ||
233 | |||
220 | struct boardcfg_security { | 234 | struct boardcfg_security { |
221 | struct boardcfg_abi_rev rev; | 235 | struct boardcfg_abi_rev rev; |
222 | struct boardcfg_proc_acl processor_acl_list; | 236 | struct boardcfg_proc_acl processor_acl_list; |
223 | struct boardcfg_host_hierarchy host_hierarchy; | 237 | struct boardcfg_host_hierarchy host_hierarchy; |
238 | struct boardcfg_extended_otp otp_config; | ||
224 | } __attribute__((__packed__)); | 239 | } __attribute__((__packed__)); |
225 | 240 | ||
226 | /** | 241 | /** |
diff --git a/soc/am65x/evm/sec-cfg.c b/soc/am65x/evm/sec-cfg.c index 055eb8eda..291b2af65 100644 --- a/soc/am65x/evm/sec-cfg.c +++ b/soc/am65x/evm/sec-cfg.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * K3 System Firmware Security Configuration Data | 2 | * K3 System Firmware Security Configuration Data |
3 | * | 3 | * |
4 | * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ | 4 | * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com/ |
5 | * Andreas Dannenberg <dannenberg@ti.com> | 5 | * Andreas Dannenberg <dannenberg@ti.com> |
6 | * | 6 | * |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without |
@@ -59,4 +59,16 @@ const struct boardcfg_security am65_boardcfg_security_data = { | |||
59 | }, | 59 | }, |
60 | .host_hierarchy_entries = {{ 0 } }, | 60 | .host_hierarchy_entries = {{ 0 } }, |
61 | }, | 61 | }, |
62 | |||
63 | /* OTP access configuration */ | ||
64 | .otp_config = { | ||
65 | .subhdr = { | ||
66 | .magic = BOARDCFG_OTP_CFG_MAGIC_NUM, | ||
67 | .size = sizeof(struct boardcfg_extended_otp), | ||
68 | }, | ||
69 | /* Host ID 0 is DMSC. This means no host has write access to OTP array */ | ||
70 | .write_host_id = 0, | ||
71 | /* This is an array with 32 entries */ | ||
72 | .otp_entry = {{ 0 } }, | ||
73 | }, | ||
62 | }; | 74 | }; |
diff --git a/soc/j721e/evm/sec-cfg.c b/soc/j721e/evm/sec-cfg.c index b628d8b34..4392a3188 100644 --- a/soc/j721e/evm/sec-cfg.c +++ b/soc/j721e/evm/sec-cfg.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * K3 System Firmware Security Configuration Data | 2 | * K3 System Firmware Security Configuration Data |
3 | * | 3 | * |
4 | * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ | 4 | * Copyright (C) 2019-2020 Texas Instruments Incorporated - http://www.ti.com/ |
5 | * Andreas Dannenberg <dannenberg@ti.com> | 5 | * Andreas Dannenberg <dannenberg@ti.com> |
6 | * | 6 | * |
7 | * Redistribution and use in source and binary forms, with or without | 7 | * Redistribution and use in source and binary forms, with or without |
@@ -59,4 +59,16 @@ const struct boardcfg_security j721e_boardcfg_security_data = { | |||
59 | }, | 59 | }, |
60 | .host_hierarchy_entries = {{ 0 } }, | 60 | .host_hierarchy_entries = {{ 0 } }, |
61 | }, | 61 | }, |
62 | |||
63 | /* OTP access configuration */ | ||
64 | .otp_config = { | ||
65 | .subhdr = { | ||
66 | .magic = BOARDCFG_OTP_CFG_MAGIC_NUM, | ||
67 | .size = sizeof(struct boardcfg_extended_otp), | ||
68 | }, | ||
69 | /* Host ID 0 is DMSC. This means no host has write access to OTP array */ | ||
70 | .write_host_id = 0, | ||
71 | /* This is an array with 32 entries */ | ||
72 | .otp_entry = {{ 0 } }, | ||
73 | }, | ||
62 | }; | 74 | }; |