summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorNikhil Devshatwar2020-05-06 15:38:35 -0500
committerDave Gerlach2020-05-06 15:42:22 -0500
commita7d3909ed8ae23a7c90f7ef821713a8b0c3c061d (patch)
treed545768550b9a994c16e89d6ddd76a8028fd81b8
parentc2efdef0ae16ebda38667b7c10e9ad173be73a6d (diff)
downloadk3-image-gen-a7d3909ed8ae23a7c90f7ef821713a8b0c3c061d.tar.gz
k3-image-gen-a7d3909ed8ae23a7c90f7ef821713a8b0c3c061d.tar.xz
k3-image-gen-a7d3909ed8ae23a7c90f7ef821713a8b0c3c061d.zip
j721e: rm-cfg: Reassign resources for Main R5FSS0ti2020.01.0007.00.00.00307.00.00.002
Auto generated from https://git.ti.com/cgit/glsdk/host-tools Ethernet firmware and PSDKRA will be merged into single image running on Main R5FSS0 core0 leaving the core1 unused for customer. To accomodate this, update the resource partitioning to combine the resources and adjust few to be left free for Main R5FSS0 core1. Also add non secure proxy allocation for both MCU and Main, the C7x resources are also switched to using the secure context. Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
Diffstat
-rw-r--r--soc/j721e/evm/rm-cfg.c573
-rw-r--r--soc/j721e/evm/sysfw_img_cfg.h2
2 files changed, 468 insertions, 107 deletions
diff --git a/soc/j721e/evm/rm-cfg.c b/soc/j721e/evm/rm-cfg.c
index 76e05169f..e0beedbd4 100644
--- a/soc/j721e/evm/rm-cfg.c
+++ b/soc/j721e/evm/rm-cfg.c
@@ -72,7 +72,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
72 /* This is actually part of .resasg */ 72 /* This is actually part of .resasg */
73 .resasg_entries = { 73 .resasg_entries = {
74 74
75 /* C6x_0 IR */ 75 /* Interrupt router for C6x_0 */
76 { 76 {
77 .start_resource = 4, 77 .start_resource = 4,
78 .num_resource = 93, 78 .num_resource = 93,
@@ -81,7 +81,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
81 .host_id = HOST_ID_C6X_0_1, 81 .host_id = HOST_ID_C6X_0_1,
82 }, 82 },
83 83
84 /* C6x_1 IR */ 84 /* Interrupt router for C6x_1 */
85 { 85 {
86 .start_resource = 4, 86 .start_resource = 4,
87 .num_resource = 93, 87 .num_resource = 93,
@@ -90,7 +90,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
90 .host_id = HOST_ID_C6X_1_1, 90 .host_id = HOST_ID_C6X_1_1,
91 }, 91 },
92 92
93 /* */ 93 /* compare event IR */
94 { 94 {
95 .start_resource = 0, 95 .start_resource = 0,
96 .num_resource = 32, 96 .num_resource = 32,
@@ -145,7 +145,28 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
145 .host_id = HOST_ID_MCU_0_R5_2, 145 .host_id = HOST_ID_MCU_0_R5_2,
146 }, 146 },
147 147
148 /* Main GPIO IR for Compute cluster */ 148 /* Main GPIO IR */
149 {
150 .start_resource = 0,
151 .num_resource = 8,
152 .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0,
153 RESASG_SUBTYPE_IR_OUTPUT),
154 .host_id = HOST_ID_MCU_0_R5_0,
155 },
156 {
157 .start_resource = 0,
158 .num_resource = 8,
159 .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0,
160 RESASG_SUBTYPE_IR_OUTPUT),
161 .host_id = HOST_ID_MCU_0_R5_1,
162 },
163 {
164 .start_resource = 8,
165 .num_resource = 8,
166 .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0,
167 RESASG_SUBTYPE_IR_OUTPUT),
168 .host_id = HOST_ID_MCU_0_R5_2,
169 },
149 { 170 {
150 .start_resource = 16, 171 .start_resource = 16,
151 .num_resource = 4, 172 .num_resource = 4,
@@ -210,7 +231,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
210 .host_id = HOST_ID_C7X_0, 231 .host_id = HOST_ID_C7X_0,
211 }, 232 },
212 233
213 /* Main R5FSS0 IR */ 234 /* Interrupt router for R5FSS0 cluster */
214 { 235 {
215 .start_resource = 0, 236 .start_resource = 0,
216 .num_resource = 128, 237 .num_resource = 128,
@@ -226,7 +247,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
226 .host_id = HOST_ID_MAIN_0_R5_2, 247 .host_id = HOST_ID_MAIN_0_R5_2,
227 }, 248 },
228 249
229 /* Main R5FSS1 IR */ 250 /* Interrupt router for R5FSS1 cluster */
230 { 251 {
231 .start_resource = 0, 252 .start_resource = 0,
232 .num_resource = 128, 253 .num_resource = 128,
@@ -242,7 +263,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
242 .host_id = HOST_ID_MAIN_1_R5_2, 263 .host_id = HOST_ID_MAIN_1_R5_2,
243 }, 264 },
244 265
245 /* */ 266 /* Timesync Router */
246 { 267 {
247 .start_resource = 0, 268 .start_resource = 0,
248 .num_resource = 48, 269 .num_resource = 48,
@@ -251,7 +272,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
251 .host_id = HOST_ID_ALL, 272 .host_id = HOST_ID_ALL,
252 }, 273 },
253 274
254 /* WKUP GPIO IR for others */ 275 /* WKUP GPIO IR */
255 { 276 {
256 .start_resource = 0, 277 .start_resource = 0,
257 .num_resource = 8, 278 .num_resource = 8,
@@ -275,23 +296,87 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
275 }, 296 },
276 { 297 {
277 .start_resource = 16, 298 .start_resource = 16,
278 .num_resource = 8, 299 .num_resource = 4,
279 .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0, 300 .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0,
280 RESASG_SUBTYPE_IR_OUTPUT), 301 RESASG_SUBTYPE_IR_OUTPUT),
281 .host_id = HOST_ID_A72_2, 302 .host_id = HOST_ID_A72_2,
282 }, 303 },
283 { 304 {
284 .start_resource = 24, 305 .start_resource = 20,
285 .num_resource = 4, 306 .num_resource = 2,
286 .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0, 307 .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0,
287 RESASG_SUBTYPE_IR_OUTPUT), 308 RESASG_SUBTYPE_IR_OUTPUT),
288 .host_id = HOST_ID_A72_3, 309 .host_id = HOST_ID_A72_3,
289 }, 310 },
290 { 311 {
312 .start_resource = 22,
313 .num_resource = 2,
314 .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0,
315 RESASG_SUBTYPE_IR_OUTPUT),
316 .host_id = HOST_ID_MAIN_1_R5_0,
317 },
318 {
319 .start_resource = 24,
320 .num_resource = 2,
321 .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0,
322 RESASG_SUBTYPE_IR_OUTPUT),
323 .host_id = HOST_ID_MAIN_1_R5_2,
324 },
325 {
326 .start_resource = 26,
327 .num_resource = 2,
328 .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0,
329 RESASG_SUBTYPE_IR_OUTPUT),
330 .host_id = HOST_ID_C7X_0,
331 },
332 {
291 .start_resource = 28, 333 .start_resource = 28,
292 .num_resource = 4, 334 .num_resource = 2,
335 .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0,
336 RESASG_SUBTYPE_IR_OUTPUT),
337 .host_id = HOST_ID_MAIN_0_R5_0,
338 },
339 {
340 .start_resource = 30,
341 .num_resource = 2,
293 .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0, 342 .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0,
294 RESASG_SUBTYPE_IR_OUTPUT), 343 RESASG_SUBTYPE_IR_OUTPUT),
344 .host_id = HOST_ID_MAIN_0_R5_2,
345 },
346
347 /* MODSS INTA0 VINT */
348 {
349 .start_resource = 0,
350 .num_resource = 64,
351 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_MODSS_INTAGGR_0,
352 RESASG_SUBTYPE_IA_VINT),
353 .host_id = HOST_ID_ALL,
354 },
355
356 /* MODSS INTA0 global events */
357 {
358 .start_resource = 20480,
359 .num_resource = 1024,
360 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_MODSS_INTAGGR_0,
361 RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
362 .host_id = HOST_ID_ALL,
363 },
364
365 /* MODSS INTA1 VINT */
366 {
367 .start_resource = 0,
368 .num_resource = 64,
369 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_MODSS_INTAGGR_1,
370 RESASG_SUBTYPE_IA_VINT),
371 .host_id = HOST_ID_ALL,
372 },
373
374 /* MODSS INTA1 global events */
375 {
376 .start_resource = 22528,
377 .num_resource = 1024,
378 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_MODSS_INTAGGR_1,
379 RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
295 .host_id = HOST_ID_ALL, 380 .host_id = HOST_ID_ALL,
296 }, 381 },
297 382
@@ -347,27 +432,27 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
347 }, 432 },
348 { 433 {
349 .start_resource = 216, 434 .start_resource = 216,
350 .num_resource = 8, 435 .num_resource = 28,
351 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, 436 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0,
352 RESASG_SUBTYPE_IA_VINT), 437 RESASG_SUBTYPE_IA_VINT),
353 .host_id = HOST_ID_MAIN_0_R5_0, 438 .host_id = HOST_ID_MAIN_0_R5_0,
354 }, 439 },
355 { 440 {
356 .start_resource = 224, 441 .start_resource = 244,
357 .num_resource = 24, 442 .num_resource = 8,
358 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, 443 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0,
359 RESASG_SUBTYPE_IA_VINT), 444 RESASG_SUBTYPE_IA_VINT),
360 .host_id = HOST_ID_MAIN_0_R5_2, 445 .host_id = HOST_ID_MAIN_0_R5_2,
361 }, 446 },
362 { 447 {
363 .start_resource = 248, 448 .start_resource = 252,
364 .num_resource = 8, 449 .num_resource = 4,
365 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, 450 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0,
366 RESASG_SUBTYPE_IA_VINT), 451 RESASG_SUBTYPE_IA_VINT),
367 .host_id = HOST_ID_ALL, 452 .host_id = HOST_ID_ALL,
368 }, 453 },
369 454
370 /* Main Nav IA SEVT */ 455 /* Main Nav IA global events */
371 { 456 {
372 .start_resource = 38, 457 .start_resource = 38,
373 .num_resource = 1024, 458 .num_resource = 1024,
@@ -440,14 +525,14 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
440 }, 525 },
441 { 526 {
442 .start_resource = 2918, 527 .start_resource = 2918,
443 .num_resource = 256, 528 .num_resource = 512,
444 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, 529 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0,
445 RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), 530 RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
446 .host_id = HOST_ID_MAIN_0_R5_0, 531 .host_id = HOST_ID_MAIN_0_R5_0,
447 }, 532 },
448 { 533 {
449 .start_resource = 3174, 534 .start_resource = 3430,
450 .num_resource = 512, 535 .num_resource = 256,
451 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, 536 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0,
452 RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), 537 RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
453 .host_id = HOST_ID_MAIN_0_R5_2, 538 .host_id = HOST_ID_MAIN_0_R5_2,
@@ -460,7 +545,109 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
460 .host_id = HOST_ID_ALL, 545 .host_id = HOST_ID_ALL,
461 }, 546 },
462 547
463 /* Main Nav Free Ring */ 548 /* Main Nav nonsecure proxies */
549 {
550 .start_resource = 0,
551 .num_resource = 4,
552 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
553 RESASG_SUBTYPE_PROXY_PROXIES),
554 .host_id = HOST_ID_A72_2,
555 },
556 {
557 .start_resource = 4,
558 .num_resource = 4,
559 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
560 RESASG_SUBTYPE_PROXY_PROXIES),
561 .host_id = HOST_ID_A72_3,
562 },
563 {
564 .start_resource = 8,
565 .num_resource = 4,
566 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
567 RESASG_SUBTYPE_PROXY_PROXIES),
568 .host_id = HOST_ID_MCU_0_R5_0,
569 },
570 {
571 .start_resource = 8,
572 .num_resource = 4,
573 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
574 RESASG_SUBTYPE_PROXY_PROXIES),
575 .host_id = HOST_ID_MCU_0_R5_1,
576 },
577 {
578 .start_resource = 12,
579 .num_resource = 4,
580 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
581 RESASG_SUBTYPE_PROXY_PROXIES),
582 .host_id = HOST_ID_MCU_0_R5_2,
583 },
584 {
585 .start_resource = 16,
586 .num_resource = 4,
587 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
588 RESASG_SUBTYPE_PROXY_PROXIES),
589 .host_id = HOST_ID_MAIN_1_R5_0,
590 },
591 {
592 .start_resource = 20,
593 .num_resource = 4,
594 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
595 RESASG_SUBTYPE_PROXY_PROXIES),
596 .host_id = HOST_ID_MAIN_1_R5_2,
597 },
598 {
599 .start_resource = 24,
600 .num_resource = 4,
601 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
602 RESASG_SUBTYPE_PROXY_PROXIES),
603 .host_id = HOST_ID_C7X_0,
604 },
605 {
606 .start_resource = 28,
607 .num_resource = 4,
608 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
609 RESASG_SUBTYPE_PROXY_PROXIES),
610 .host_id = HOST_ID_C6X_0_1,
611 },
612 {
613 .start_resource = 32,
614 .num_resource = 4,
615 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
616 RESASG_SUBTYPE_PROXY_PROXIES),
617 .host_id = HOST_ID_C6X_1_1,
618 },
619 {
620 .start_resource = 36,
621 .num_resource = 12,
622 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
623 RESASG_SUBTYPE_PROXY_PROXIES),
624 .host_id = HOST_ID_MAIN_0_R5_0,
625 },
626 {
627 .start_resource = 48,
628 .num_resource = 4,
629 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
630 RESASG_SUBTYPE_PROXY_PROXIES),
631 .host_id = HOST_ID_MAIN_0_R5_2,
632 },
633 {
634 .start_resource = 52,
635 .num_resource = 12,
636 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0,
637 RESASG_SUBTYPE_PROXY_PROXIES),
638 .host_id = HOST_ID_ALL,
639 },
640
641 /* Main Nav Ring Error OES */
642 {
643 .start_resource = 0,
644 .num_resource = 1,
645 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
646 RESASG_SUBTYPE_RA_ERROR_OES),
647 .host_id = HOST_ID_ALL,
648 },
649
650 /* Main Nav GP Ring / Free Ring */
464 { 651 {
465 .start_resource = 440, 652 .start_resource = 440,
466 .num_resource = 150, 653 .num_resource = 150,
@@ -533,14 +720,14 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
533 }, 720 },
534 { 721 {
535 .start_resource = 744, 722 .start_resource = 744,
536 .num_resource = 40, 723 .num_resource = 182,
537 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 724 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
538 RESASG_SUBTYPE_RA_GP), 725 RESASG_SUBTYPE_RA_GP),
539 .host_id = HOST_ID_MAIN_0_R5_0, 726 .host_id = HOST_ID_MAIN_0_R5_0,
540 }, 727 },
541 { 728 {
542 .start_resource = 784, 729 .start_resource = 926,
543 .num_resource = 182, 730 .num_resource = 40,
544 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 731 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
545 RESASG_SUBTYPE_RA_GP), 732 RESASG_SUBTYPE_RA_GP),
546 .host_id = HOST_ID_MAIN_0_R5_2, 733 .host_id = HOST_ID_MAIN_0_R5_2,
@@ -626,14 +813,14 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
626 }, 813 },
627 { 814 {
628 .start_resource = 418, 815 .start_resource = 418,
629 .num_resource = 7, 816 .num_resource = 20,
630 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 817 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
631 RESASG_SUBTYPE_RA_UDMAP_RX), 818 RESASG_SUBTYPE_RA_UDMAP_RX),
632 .host_id = HOST_ID_MAIN_0_R5_0, 819 .host_id = HOST_ID_MAIN_0_R5_0,
633 }, 820 },
634 { 821 {
635 .start_resource = 425, 822 .start_resource = 438,
636 .num_resource = 15, 823 .num_resource = 2,
637 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 824 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
638 RESASG_SUBTYPE_RA_UDMAP_RX), 825 RESASG_SUBTYPE_RA_UDMAP_RX),
639 .host_id = HOST_ID_MAIN_0_R5_2, 826 .host_id = HOST_ID_MAIN_0_R5_2,
@@ -712,27 +899,27 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
712 }, 899 },
713 { 900 {
714 .start_resource = 118, 901 .start_resource = 118,
715 .num_resource = 7, 902 .num_resource = 14,
716 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 903 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
717 RESASG_SUBTYPE_RA_UDMAP_TX), 904 RESASG_SUBTYPE_RA_UDMAP_TX),
718 .host_id = HOST_ID_MAIN_0_R5_0, 905 .host_id = HOST_ID_MAIN_0_R5_0,
719 }, 906 },
720 { 907 {
721 .start_resource = 125, 908 .start_resource = 132,
722 .num_resource = 8, 909 .num_resource = 6,
723 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 910 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
724 RESASG_SUBTYPE_RA_UDMAP_TX), 911 RESASG_SUBTYPE_RA_UDMAP_TX),
725 .host_id = HOST_ID_MAIN_0_R5_2, 912 .host_id = HOST_ID_MAIN_0_R5_2,
726 }, 913 },
727 { 914 {
728 .start_resource = 133, 915 .start_resource = 138,
729 .num_resource = 7, 916 .num_resource = 2,
730 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 917 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
731 RESASG_SUBTYPE_RA_UDMAP_TX), 918 RESASG_SUBTYPE_RA_UDMAP_TX),
732 .host_id = HOST_ID_ALL, 919 .host_id = HOST_ID_ALL,
733 }, 920 },
734 921
735 /* Main Nav TX Extended channel rings */ 922 /* Main Nav TX rings for extended channels */
736 { 923 {
737 .start_resource = 140, 924 .start_resource = 140,
738 .num_resource = 16, 925 .num_resource = 16,
@@ -759,7 +946,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
759 .num_resource = 132, 946 .num_resource = 132,
760 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 947 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
761 RESASG_SUBTYPE_RA_UDMAP_TX_EXT), 948 RESASG_SUBTYPE_RA_UDMAP_TX_EXT),
762 .host_id = HOST_ID_MAIN_0_R5_2, 949 .host_id = HOST_ID_MAIN_0_R5_0,
763 }, 950 },
764 951
765 /* Main Nav High Capacity RX ring */ 952 /* Main Nav High Capacity RX ring */
@@ -772,19 +959,12 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
772 }, 959 },
773 { 960 {
774 .start_resource = 308, 961 .start_resource = 308,
775 .num_resource = 2, 962 .num_resource = 6,
776 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 963 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
777 RESASG_SUBTYPE_RA_UDMAP_RX_H), 964 RESASG_SUBTYPE_RA_UDMAP_RX_H),
778 .host_id = HOST_ID_MAIN_0_R5_0, 965 .host_id = HOST_ID_MAIN_0_R5_0,
779 }, 966 },
780 { 967 {
781 .start_resource = 310,
782 .num_resource = 4,
783 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
784 RESASG_SUBTYPE_RA_UDMAP_RX_H),
785 .host_id = HOST_ID_MAIN_0_R5_2,
786 },
787 {
788 .start_resource = 314, 968 .start_resource = 314,
789 .num_resource = 2, 969 .num_resource = 2,
790 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 970 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
@@ -805,7 +985,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
805 .num_resource = 2, 985 .num_resource = 2,
806 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 986 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
807 RESASG_SUBTYPE_RA_UDMAP_RX_UH), 987 RESASG_SUBTYPE_RA_UDMAP_RX_UH),
808 .host_id = HOST_ID_MAIN_0_R5_2, 988 .host_id = HOST_ID_MAIN_0_R5_0,
809 }, 989 },
810 990
811 /* Main Nav High Capacity TX ring */ 991 /* Main Nav High Capacity TX ring */
@@ -818,19 +998,12 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
818 }, 998 },
819 { 999 {
820 .start_resource = 8, 1000 .start_resource = 8,
821 .num_resource = 2, 1001 .num_resource = 6,
822 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1002 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
823 RESASG_SUBTYPE_RA_UDMAP_TX_H), 1003 RESASG_SUBTYPE_RA_UDMAP_TX_H),
824 .host_id = HOST_ID_MAIN_0_R5_0, 1004 .host_id = HOST_ID_MAIN_0_R5_0,
825 }, 1005 },
826 { 1006 {
827 .start_resource = 10,
828 .num_resource = 4,
829 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
830 RESASG_SUBTYPE_RA_UDMAP_TX_H),
831 .host_id = HOST_ID_MAIN_0_R5_2,
832 },
833 {
834 .start_resource = 14, 1007 .start_resource = 14,
835 .num_resource = 2, 1008 .num_resource = 2,
836 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1009 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
@@ -851,7 +1024,30 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
851 .num_resource = 2, 1024 .num_resource = 2,
852 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, 1025 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
853 RESASG_SUBTYPE_RA_UDMAP_TX_UH), 1026 RESASG_SUBTYPE_RA_UDMAP_TX_UH),
854 .host_id = HOST_ID_MAIN_0_R5_2, 1027 .host_id = HOST_ID_MAIN_0_R5_0,
1028 },
1029
1030 /* virt_id range */
1031 {
1032 .start_resource = 2,
1033 .num_resource = 1,
1034 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1035 RESASG_SUBTYPE_RA_VIRTID),
1036 .host_id = HOST_ID_A72_2,
1037 },
1038 {
1039 .start_resource = 3,
1040 .num_resource = 1,
1041 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1042 RESASG_SUBTYPE_RA_VIRTID),
1043 .host_id = HOST_ID_A72_3,
1044 },
1045 {
1046 .start_resource = 4,
1047 .num_resource = 4,
1048 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0,
1049 RESASG_SUBTYPE_RA_VIRTID),
1050 .host_id = HOST_ID_ALL,
855 }, 1051 },
856 1052
857 /* Main Nav ring monitors */ 1053 /* Main Nav ring monitors */
@@ -964,27 +1160,40 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
964 }, 1160 },
965 { 1161 {
966 .start_resource = 172, 1162 .start_resource = 172,
967 .num_resource = 64, 1163 .num_resource = 128,
968 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1164 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
969 RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), 1165 RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON),
970 .host_id = HOST_ID_MAIN_0_R5_0, 1166 .host_id = HOST_ID_ALL,
971 }, 1167 },
1168
1169 /* Main Nav invalid flow OES */
972 { 1170 {
973 .start_resource = 236, 1171 .start_resource = 0,
974 .num_resource = 8, 1172 .num_resource = 1,
975 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1173 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
976 RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), 1174 RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES),
977 .host_id = HOST_ID_MAIN_0_R5_2, 1175 .host_id = HOST_ID_ALL,
978 }, 1176 },
1177
1178 /* Main Nav UDMA global event trigger */
979 { 1179 {
980 .start_resource = 244, 1180 .start_resource = 49152,
981 .num_resource = 56, 1181 .num_resource = 1024,
982 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1182 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
983 RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), 1183 RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER),
1184 .host_id = HOST_ID_ALL,
1185 },
1186
1187 /* Main Nav UDMA global event config */
1188 {
1189 .start_resource = 0,
1190 .num_resource = 1,
1191 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1192 RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG),
984 .host_id = HOST_ID_ALL, 1193 .host_id = HOST_ID_ALL,
985 }, 1194 },
986 1195
987 /* Main Nav Total RX channel */ 1196 /* Main Nav Normal Capacity RX channel */
988 { 1197 {
989 .start_resource = 16, 1198 .start_resource = 16,
990 .num_resource = 36, 1199 .num_resource = 36,
@@ -1057,14 +1266,14 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1057 }, 1266 },
1058 { 1267 {
1059 .start_resource = 118, 1268 .start_resource = 118,
1060 .num_resource = 7, 1269 .num_resource = 20,
1061 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1270 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1062 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1271 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1063 .host_id = HOST_ID_MAIN_0_R5_0, 1272 .host_id = HOST_ID_MAIN_0_R5_0,
1064 }, 1273 },
1065 { 1274 {
1066 .start_resource = 125, 1275 .start_resource = 138,
1067 .num_resource = 15, 1276 .num_resource = 2,
1068 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1277 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1069 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1278 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1070 .host_id = HOST_ID_MAIN_0_R5_2, 1279 .host_id = HOST_ID_MAIN_0_R5_2,
@@ -1080,19 +1289,12 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1080 }, 1289 },
1081 { 1290 {
1082 .start_resource = 8, 1291 .start_resource = 8,
1083 .num_resource = 2, 1292 .num_resource = 6,
1084 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1293 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1085 RESASG_SUBTYPE_UDMAP_RX_HCHAN), 1294 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
1086 .host_id = HOST_ID_MAIN_0_R5_0, 1295 .host_id = HOST_ID_MAIN_0_R5_0,
1087 }, 1296 },
1088 { 1297 {
1089 .start_resource = 10,
1090 .num_resource = 4,
1091 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1092 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
1093 .host_id = HOST_ID_MAIN_0_R5_2,
1094 },
1095 {
1096 .start_resource = 14, 1298 .start_resource = 14,
1097 .num_resource = 2, 1299 .num_resource = 2,
1098 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1300 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
@@ -1113,10 +1315,10 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1113 .num_resource = 2, 1315 .num_resource = 2,
1114 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1316 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1115 RESASG_SUBTYPE_UDMAP_RX_UHCHAN), 1317 RESASG_SUBTYPE_UDMAP_RX_UHCHAN),
1116 .host_id = HOST_ID_MAIN_0_R5_2, 1318 .host_id = HOST_ID_MAIN_0_R5_0,
1117 }, 1319 },
1118 1320
1119 /* Main Nav Total TX channel */ 1321 /* Main Nav Normal Capacity TX channel */
1120 { 1322 {
1121 .start_resource = 16, 1323 .start_resource = 16,
1122 .num_resource = 36, 1324 .num_resource = 36,
@@ -1189,21 +1391,21 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1189 }, 1391 },
1190 { 1392 {
1191 .start_resource = 118, 1393 .start_resource = 118,
1192 .num_resource = 7, 1394 .num_resource = 14,
1193 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1395 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1194 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1396 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1195 .host_id = HOST_ID_MAIN_0_R5_0, 1397 .host_id = HOST_ID_MAIN_0_R5_0,
1196 }, 1398 },
1197 { 1399 {
1198 .start_resource = 125, 1400 .start_resource = 132,
1199 .num_resource = 8, 1401 .num_resource = 6,
1200 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1402 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1201 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1403 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1202 .host_id = HOST_ID_MAIN_0_R5_2, 1404 .host_id = HOST_ID_MAIN_0_R5_2,
1203 }, 1405 },
1204 { 1406 {
1205 .start_resource = 133, 1407 .start_resource = 138,
1206 .num_resource = 7, 1408 .num_resource = 2,
1207 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1409 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1208 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1410 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1209 .host_id = HOST_ID_ALL, 1411 .host_id = HOST_ID_ALL,
@@ -1236,7 +1438,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1236 .num_resource = 132, 1438 .num_resource = 132,
1237 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1439 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1238 RESASG_SUBTYPE_UDMAP_TX_ECHAN), 1440 RESASG_SUBTYPE_UDMAP_TX_ECHAN),
1239 .host_id = HOST_ID_MAIN_0_R5_2, 1441 .host_id = HOST_ID_MAIN_0_R5_0,
1240 }, 1442 },
1241 1443
1242 /* Main Nav High Capacity TX channel */ 1444 /* Main Nav High Capacity TX channel */
@@ -1249,19 +1451,12 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1249 }, 1451 },
1250 { 1452 {
1251 .start_resource = 8, 1453 .start_resource = 8,
1252 .num_resource = 2, 1454 .num_resource = 6,
1253 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1455 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1254 RESASG_SUBTYPE_UDMAP_TX_HCHAN), 1456 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
1255 .host_id = HOST_ID_MAIN_0_R5_0, 1457 .host_id = HOST_ID_MAIN_0_R5_0,
1256 }, 1458 },
1257 { 1459 {
1258 .start_resource = 10,
1259 .num_resource = 4,
1260 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1261 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
1262 .host_id = HOST_ID_MAIN_0_R5_2,
1263 },
1264 {
1265 .start_resource = 14, 1460 .start_resource = 14,
1266 .num_resource = 2, 1461 .num_resource = 2,
1267 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1462 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
@@ -1282,10 +1477,10 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1282 .num_resource = 2, 1477 .num_resource = 2,
1283 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, 1478 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0,
1284 RESASG_SUBTYPE_UDMAP_TX_UHCHAN), 1479 RESASG_SUBTYPE_UDMAP_TX_UHCHAN),
1285 .host_id = HOST_ID_MAIN_0_R5_2, 1480 .host_id = HOST_ID_MAIN_0_R5_0,
1286 }, 1481 },
1287 1482
1288 /* Main NAVSS IR */ 1483 /* Main Nav IR */
1289 { 1484 {
1290 .start_resource = 10, 1485 .start_resource = 10,
1291 .num_resource = 100, 1486 .num_resource = 100,
@@ -1371,12 +1566,26 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1371 .host_id = HOST_ID_MCU_0_R5_0, 1566 .host_id = HOST_ID_MCU_0_R5_0,
1372 }, 1567 },
1373 { 1568 {
1569 .start_resource = 400,
1570 .num_resource = 4,
1571 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1572 RESASG_SUBTYPE_IR_OUTPUT),
1573 .host_id = HOST_ID_MCU_0_R5_1,
1574 },
1575 {
1374 .start_resource = 404, 1576 .start_resource = 404,
1375 .num_resource = 4, 1577 .num_resource = 4,
1376 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0, 1578 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1377 RESASG_SUBTYPE_IR_OUTPUT), 1579 RESASG_SUBTYPE_IR_OUTPUT),
1378 .host_id = HOST_ID_MCU_0_R5_2, 1580 .host_id = HOST_ID_MCU_0_R5_2,
1379 }, 1581 },
1582 {
1583 .start_resource = 408,
1584 .num_resource = 104,
1585 .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0,
1586 RESASG_SUBTYPE_IR_OUTPUT),
1587 .host_id = HOST_ID_ALL,
1588 },
1380 1589
1381 /* MCU Nav IA VINT */ 1590 /* MCU Nav IA VINT */
1382 { 1591 {
@@ -1451,14 +1660,14 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1451 }, 1660 },
1452 { 1661 {
1453 .start_resource = 180, 1662 .start_resource = 180,
1454 .num_resource = 16, 1663 .num_resource = 24,
1455 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, 1664 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0,
1456 RESASG_SUBTYPE_IA_VINT), 1665 RESASG_SUBTYPE_IA_VINT),
1457 .host_id = HOST_ID_MAIN_0_R5_0, 1666 .host_id = HOST_ID_MAIN_0_R5_0,
1458 }, 1667 },
1459 { 1668 {
1460 .start_resource = 196, 1669 .start_resource = 204,
1461 .num_resource = 16, 1670 .num_resource = 8,
1462 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, 1671 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0,
1463 RESASG_SUBTYPE_IA_VINT), 1672 RESASG_SUBTYPE_IA_VINT),
1464 .host_id = HOST_ID_MAIN_0_R5_2, 1673 .host_id = HOST_ID_MAIN_0_R5_2,
@@ -1471,7 +1680,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1471 .host_id = HOST_ID_ALL, 1680 .host_id = HOST_ID_ALL,
1472 }, 1681 },
1473 1682
1474 /* MCU Nav IA SEVT */ 1683 /* MCU Nav IA global events */
1475 { 1684 {
1476 .start_resource = 16392, 1685 .start_resource = 16392,
1477 .num_resource = 128, 1686 .num_resource = 128,
@@ -1564,7 +1773,109 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1564 .host_id = HOST_ID_ALL, 1773 .host_id = HOST_ID_ALL,
1565 }, 1774 },
1566 1775
1567 /* MCU Nav Free Ring */ 1776 /* MCU Nav nonsecure proxies */
1777 {
1778 .start_resource = 1,
1779 .num_resource = 4,
1780 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1781 RESASG_SUBTYPE_PROXY_PROXIES),
1782 .host_id = HOST_ID_A72_2,
1783 },
1784 {
1785 .start_resource = 5,
1786 .num_resource = 4,
1787 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1788 RESASG_SUBTYPE_PROXY_PROXIES),
1789 .host_id = HOST_ID_A72_3,
1790 },
1791 {
1792 .start_resource = 9,
1793 .num_resource = 4,
1794 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1795 RESASG_SUBTYPE_PROXY_PROXIES),
1796 .host_id = HOST_ID_MCU_0_R5_0,
1797 },
1798 {
1799 .start_resource = 9,
1800 .num_resource = 4,
1801 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1802 RESASG_SUBTYPE_PROXY_PROXIES),
1803 .host_id = HOST_ID_MCU_0_R5_1,
1804 },
1805 {
1806 .start_resource = 13,
1807 .num_resource = 4,
1808 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1809 RESASG_SUBTYPE_PROXY_PROXIES),
1810 .host_id = HOST_ID_MCU_0_R5_2,
1811 },
1812 {
1813 .start_resource = 17,
1814 .num_resource = 4,
1815 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1816 RESASG_SUBTYPE_PROXY_PROXIES),
1817 .host_id = HOST_ID_MAIN_1_R5_0,
1818 },
1819 {
1820 .start_resource = 21,
1821 .num_resource = 4,
1822 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1823 RESASG_SUBTYPE_PROXY_PROXIES),
1824 .host_id = HOST_ID_MAIN_1_R5_2,
1825 },
1826 {
1827 .start_resource = 25,
1828 .num_resource = 4,
1829 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1830 RESASG_SUBTYPE_PROXY_PROXIES),
1831 .host_id = HOST_ID_C7X_0,
1832 },
1833 {
1834 .start_resource = 29,
1835 .num_resource = 4,
1836 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1837 RESASG_SUBTYPE_PROXY_PROXIES),
1838 .host_id = HOST_ID_C6X_0_1,
1839 },
1840 {
1841 .start_resource = 33,
1842 .num_resource = 4,
1843 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1844 RESASG_SUBTYPE_PROXY_PROXIES),
1845 .host_id = HOST_ID_C6X_1_1,
1846 },
1847 {
1848 .start_resource = 37,
1849 .num_resource = 16,
1850 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1851 RESASG_SUBTYPE_PROXY_PROXIES),
1852 .host_id = HOST_ID_MAIN_0_R5_0,
1853 },
1854 {
1855 .start_resource = 53,
1856 .num_resource = 4,
1857 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1858 RESASG_SUBTYPE_PROXY_PROXIES),
1859 .host_id = HOST_ID_MAIN_0_R5_2,
1860 },
1861 {
1862 .start_resource = 57,
1863 .num_resource = 7,
1864 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0,
1865 RESASG_SUBTYPE_PROXY_PROXIES),
1866 .host_id = HOST_ID_ALL,
1867 },
1868
1869 /* MCU Nav Ring Error OES */
1870 {
1871 .start_resource = 0,
1872 .num_resource = 1,
1873 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0,
1874 RESASG_SUBTYPE_RA_ERROR_OES),
1875 .host_id = HOST_ID_ALL,
1876 },
1877
1878 /* MCU Nav GP Ring / Free Ring */
1568 { 1879 {
1569 .start_resource = 96, 1880 .start_resource = 96,
1570 .num_resource = 20, 1881 .num_resource = 20,
@@ -1657,7 +1968,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1657 .host_id = HOST_ID_ALL, 1968 .host_id = HOST_ID_ALL,
1658 }, 1969 },
1659 1970
1660 /* MCU Nav Rx ring */ 1971 /* MCU Nav Normal Capacity Rx ring */
1661 { 1972 {
1662 .start_resource = 50, 1973 .start_resource = 50,
1663 .num_resource = 12, 1974 .num_resource = 12,
@@ -1750,7 +2061,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1750 .host_id = HOST_ID_ALL, 2061 .host_id = HOST_ID_ALL,
1751 }, 2062 },
1752 2063
1753 /* MCU Nav Tx ring */ 2064 /* MCU Nav Normal Capacity Tx ring */
1754 { 2065 {
1755 .start_resource = 2, 2066 .start_resource = 2,
1756 .num_resource = 12, 2067 .num_resource = 12,
@@ -1875,6 +2186,29 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
1875 .host_id = HOST_ID_MCU_0_R5_1, 2186 .host_id = HOST_ID_MCU_0_R5_1,
1876 }, 2187 },
1877 2188
2189 /* virt_id range */
2190 {
2191 .start_resource = 2,
2192 .num_resource = 1,
2193 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0,
2194 RESASG_SUBTYPE_RA_VIRTID),
2195 .host_id = HOST_ID_A72_2,
2196 },
2197 {
2198 .start_resource = 3,
2199 .num_resource = 1,
2200 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0,
2201 RESASG_SUBTYPE_RA_VIRTID),
2202 .host_id = HOST_ID_A72_3,
2203 },
2204 {
2205 .start_resource = 4,
2206 .num_resource = 4,
2207 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0,
2208 RESASG_SUBTYPE_RA_VIRTID),
2209 .host_id = HOST_ID_ALL,
2210 },
2211
1878 /* MCU Nav ring monitors */ 2212 /* MCU Nav ring monitors */
1879 { 2213 {
1880 .start_resource = 0, 2214 .start_resource = 0,
@@ -2033,7 +2367,34 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2033 .host_id = HOST_ID_ALL, 2367 .host_id = HOST_ID_ALL,
2034 }, 2368 },
2035 2369
2036 /* MCU Nav Total RX channel */ 2370 /* MCU Nav invalid flow OES */
2371 {
2372 .start_resource = 0,
2373 .num_resource = 1,
2374 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2375 RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES),
2376 .host_id = HOST_ID_ALL,
2377 },
2378
2379 /* MCU Nav UDMA global event trigger */
2380 {
2381 .start_resource = 56320,
2382 .num_resource = 256,
2383 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2384 RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER),
2385 .host_id = HOST_ID_ALL,
2386 },
2387
2388 /* MCU Nav UDMA global event config */
2389 {
2390 .start_resource = 0,
2391 .num_resource = 1,
2392 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0,
2393 RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG),
2394 .host_id = HOST_ID_ALL,
2395 },
2396
2397 /* MCU Nav Normal Capacity RX channel */
2037 { 2398 {
2038 .start_resource = 2, 2399 .start_resource = 2,
2039 .num_resource = 12, 2400 .num_resource = 12,
@@ -2142,7 +2503,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2142 .host_id = HOST_ID_MCU_0_R5_1, 2503 .host_id = HOST_ID_MCU_0_R5_1,
2143 }, 2504 },
2144 2505
2145 /* MCU Nav Total TX channel */ 2506 /* MCU Nav Normal Capacity TX channel */
2146 { 2507 {
2147 .start_resource = 2, 2508 .start_resource = 2,
2148 .num_resource = 12, 2509 .num_resource = 12,
@@ -2251,24 +2612,24 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = {
2251 .host_id = HOST_ID_MCU_0_R5_1, 2612 .host_id = HOST_ID_MCU_0_R5_1,
2252 }, 2613 },
2253 2614
2254 /* MCU NAVSS IR for MCU R5 */ 2615 /* MCU Nav IR */
2255 { 2616 {
2256 .start_resource = 4, 2617 .start_resource = 4,
2257 .num_resource = 14, 2618 .num_resource = 28,
2258 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_ROUTER_0, 2619 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_ROUTER_0,
2259 RESASG_SUBTYPE_IR_OUTPUT), 2620 RESASG_SUBTYPE_IR_OUTPUT),
2260 .host_id = HOST_ID_MCU_0_R5_0, 2621 .host_id = HOST_ID_MCU_0_R5_0,
2261 }, 2622 },
2262 { 2623 {
2263 .start_resource = 4, 2624 .start_resource = 4,
2264 .num_resource = 14, 2625 .num_resource = 28,
2265 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_ROUTER_0, 2626 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_ROUTER_0,
2266 RESASG_SUBTYPE_IR_OUTPUT), 2627 RESASG_SUBTYPE_IR_OUTPUT),
2267 .host_id = HOST_ID_MCU_0_R5_1, 2628 .host_id = HOST_ID_MCU_0_R5_1,
2268 }, 2629 },
2269 { 2630 {
2270 .start_resource = 18, 2631 .start_resource = 36,
2271 .num_resource = 14, 2632 .num_resource = 28,
2272 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_ROUTER_0, 2633 .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_ROUTER_0,
2273 RESASG_SUBTYPE_IR_OUTPUT), 2634 RESASG_SUBTYPE_IR_OUTPUT),
2274 .host_id = HOST_ID_MCU_0_R5_2, 2635 .host_id = HOST_ID_MCU_0_R5_2,
diff --git a/soc/j721e/evm/sysfw_img_cfg.h b/soc/j721e/evm/sysfw_img_cfg.h
index 06b04df9b..8b8988b96 100644
--- a/soc/j721e/evm/sysfw_img_cfg.h
+++ b/soc/j721e/evm/sysfw_img_cfg.h
@@ -35,6 +35,6 @@
35#ifndef SYSFW_IMG_CFG_H 35#ifndef SYSFW_IMG_CFG_H
36#define SYSFW_IMG_CFG_H 36#define SYSFW_IMG_CFG_H
37 37
38#define BOARDCFG_RM_RESASG_ENTRIES 302 38#define BOARDCFG_RM_RESASG_ENTRIES 349
39 39
40#endif /* SYSFW_IMG_CFG_H */ 40#endif /* SYSFW_IMG_CFG_H */
generated by cgit v1.2.3 (git 2.39.2)