diff options
author | Suman Anna | 2020-08-11 16:33:00 -0500 |
---|---|---|
committer | Dave Gerlach | 2020-08-14 12:11:07 -0500 |
commit | d2af2398933151864f4868acc88a49cfb5878d45 (patch) | |
tree | 399537bace7154cc9e96c7c26e79bb7e1384dfba | |
parent | 10fa19cc8aec899b2fd3690a4104a5af60e18cdb (diff) | |
download | k3-image-gen-d2af2398933151864f4868acc88a49cfb5878d45.tar.gz k3-image-gen-d2af2398933151864f4868acc88a49cfb5878d45.tar.xz k3-image-gen-d2af2398933151864f4868acc88a49cfb5878d45.zip |
am65x,am65x_sr2: Fix Main NavSS Rings for UDMAP HC Rx channels
The number of Main NavSS rings reserved by DMSC for High capacity Rx
channels is off by one. Update the board configuration validation
script and fix the RM cfg resource entries for the same on both AM65x
and AM65x SR2.0 SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
-rw-r--r-- | scripts/sysfw_boardcfg_rules.json | 8 | ||||
-rw-r--r-- | soc/am65x/evm/rm-cfg.c | 4 | ||||
-rw-r--r-- | soc/am65x_sr2/evm/rm-cfg.c | 4 |
3 files changed, 8 insertions, 8 deletions
diff --git a/scripts/sysfw_boardcfg_rules.json b/scripts/sysfw_boardcfg_rules.json index 7247c15be..09da3d8aa 100644 --- a/scripts/sysfw_boardcfg_rules.json +++ b/scripts/sysfw_boardcfg_rules.json | |||
@@ -420,8 +420,8 @@ | |||
420 | { | 420 | { |
421 | "name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX_H)", | 421 | "name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX_H)", |
422 | "type": 11973, | 422 | "type": 11973, |
423 | "start_resource": 153, | 423 | "start_resource": 154, |
424 | "num_resource": 7 | 424 | "num_resource": 6 |
425 | }, | 425 | }, |
426 | { | 426 | { |
427 | "name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_H)", | 427 | "name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_H)", |
@@ -742,8 +742,8 @@ | |||
742 | { | 742 | { |
743 | "name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX_H)", | 743 | "name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX_H)", |
744 | "type": 11973, | 744 | "type": 11973, |
745 | "start_resource": 153, | 745 | "start_resource": 154, |
746 | "num_resource": 7 | 746 | "num_resource": 6 |
747 | }, | 747 | }, |
748 | { | 748 | { |
749 | "name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_H)", | 749 | "name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_H)", |
diff --git a/soc/am65x/evm/rm-cfg.c b/soc/am65x/evm/rm-cfg.c index f14e969d8..0a4f13a5f 100644 --- a/soc/am65x/evm/rm-cfg.c +++ b/soc/am65x/evm/rm-cfg.c | |||
@@ -271,8 +271,8 @@ const struct boardcfg_rm_local am65_boardcfg_rm_data = { | |||
271 | .host_id = HOST_ID_A53_2, | 271 | .host_id = HOST_ID_A53_2, |
272 | }, | 272 | }, |
273 | { | 273 | { |
274 | .start_resource = 153, | 274 | .start_resource = 154, |
275 | .num_resource = 7, | 275 | .num_resource = 6, |
276 | .type = RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, | 276 | .type = RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, |
277 | RESASG_SUBTYPE_RA_UDMAP_RX_H), | 277 | RESASG_SUBTYPE_RA_UDMAP_RX_H), |
278 | .host_id = HOST_ID_A53_2, | 278 | .host_id = HOST_ID_A53_2, |
diff --git a/soc/am65x_sr2/evm/rm-cfg.c b/soc/am65x_sr2/evm/rm-cfg.c index f14e969d8..0a4f13a5f 100644 --- a/soc/am65x_sr2/evm/rm-cfg.c +++ b/soc/am65x_sr2/evm/rm-cfg.c | |||
@@ -271,8 +271,8 @@ const struct boardcfg_rm_local am65_boardcfg_rm_data = { | |||
271 | .host_id = HOST_ID_A53_2, | 271 | .host_id = HOST_ID_A53_2, |
272 | }, | 272 | }, |
273 | { | 273 | { |
274 | .start_resource = 153, | 274 | .start_resource = 154, |
275 | .num_resource = 7, | 275 | .num_resource = 6, |
276 | .type = RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, | 276 | .type = RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, |
277 | RESASG_SUBTYPE_RA_UDMAP_RX_H), | 277 | RESASG_SUBTYPE_RA_UDMAP_RX_H), |
278 | .host_id = HOST_ID_A53_2, | 278 | .host_id = HOST_ID_A53_2, |