aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLokesh Vutla2020-08-11 16:33:05 -0500
committerDave Gerlach2020-08-14 12:11:07 -0500
commitbbc59bcc2d004ffa9ea7ff53532f85caf888ee99 (patch)
treec27c472e303a266aa7c71c7470319be0d09b4305
parentc0768f96f248ec6a001d2e5fbac574e6de60e7f5 (diff)
downloadk3-image-gen-bbc59bcc2d004ffa9ea7ff53532f85caf888ee99.tar.gz
k3-image-gen-bbc59bcc2d004ffa9ea7ff53532f85caf888ee99.tar.xz
k3-image-gen-bbc59bcc2d004ffa9ea7ff53532f85caf888ee99.zip
scripts: Update board configuration validation files for J7200
Add the SoC data for J7200 SoCs to the sysfw_boardcfg_rules file, and update the the validator script to include the checking for J7200 SoCs. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
-rw-r--r--scripts/sysfw_boardcfg_rules.json351
-rwxr-xr-xscripts/sysfw_boardcfg_validator.py2
2 files changed, 352 insertions, 1 deletions
diff --git a/scripts/sysfw_boardcfg_rules.json b/scripts/sysfw_boardcfg_rules.json
index f11da6e..a71e286 100644
--- a/scripts/sysfw_boardcfg_rules.json
+++ b/scripts/sysfw_boardcfg_rules.json
@@ -1365,6 +1365,357 @@
1365 "max_resource_entries": 420 1365 "max_resource_entries": 420
1366 } 1366 }
1367 ] 1367 ]
1368 },
1369 "j7200": {
1370 "values": [
1371 {
1372 "name": "RESASG_UTYPE(J7200_DEV_CMPEVENT_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1373 "type": 7872,
1374 "start_resource": 0,
1375 "num_resource": 16
1376 },
1377 {
1378 "name": "RESASG_UTYPE(J7200_DEV_MAIN2MCU_LVL_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1379 "type": 8192,
1380 "start_resource": 0,
1381 "num_resource": 64
1382 },
1383 {
1384 "name": "RESASG_UTYPE(J7200_DEV_MAIN2MCU_PLS_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1385 "type": 8320,
1386 "start_resource": 0,
1387 "num_resource": 48
1388 },
1389 {
1390 "name": "RESASG_UTYPE(J7200_DEV_GPIOMUX_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1391 "type": 8384,
1392 "start_resource": 0,
1393 "num_resource": 64
1394 },
1395 {
1396 "name": "RESASG_UTYPE(J7200_DEV_TIMESYNC_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1397 "type": 8704,
1398 "start_resource": 0,
1399 "num_resource": 48
1400 },
1401 {
1402 "name": "RESASG_UTYPE(J7200_DEV_WKUP_GPIOMUX_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
1403 "type": 8768,
1404 "start_resource": 0,
1405 "num_resource": 32
1406 },
1407 {
1408 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_MODSS_INTA_0, RESASG_SUBTYPE_IA_VINT)",
1409 "type": 13258,
1410 "start_resource": 0,
1411 "num_resource": 64
1412 },
1413 {
1414 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_MODSS_INTA_0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
1415 "type": 13261,
1416 "start_resource": 20480,
1417 "num_resource": 1024
1418 },
1419 {
1420 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_MODSS_INTA_1, RESASG_SUBTYPE_IA_VINT)",
1421 "type": 13322,
1422 "start_resource": 0,
1423 "num_resource": 64
1424 },
1425 {
1426 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_MODSS_INTA_1, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
1427 "type": 13325,
1428 "start_resource": 22528,
1429 "num_resource": 1024
1430 },
1431 {
1432 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMASS_INTA_0, RESASG_SUBTYPE_IA_VINT)",
1433 "type": 13386,
1434 "start_resource": 18,
1435 "num_resource": 238
1436 },
1437 {
1438 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMASS_INTA_0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
1439 "type": 13389,
1440 "start_resource": 18,
1441 "num_resource": 4590
1442 },
1443 {
1444 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_PROXY_0, RESASG_SUBTYPE_PROXY_PROXIES)",
1445 "type": 13440,
1446 "start_resource": 0,
1447 "num_resource": 64
1448 },
1449 {
1450 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_ERROR_OES)",
1451 "type": 13504,
1452 "start_resource": 0,
1453 "num_resource": 1
1454 },
1455 {
1456 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_GP)",
1457 "type": 13505,
1458 "start_resource": 120,
1459 "num_resource": 854
1460 },
1461 {
1462 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_RX)",
1463 "type": 13506,
1464 "start_resource": 64,
1465 "num_resource": 56
1466 },
1467 {
1468 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_TX)",
1469 "type": 13507,
1470 "start_resource": 4,
1471 "num_resource": 56
1472 },
1473 {
1474 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_RX_H)",
1475 "type": 13509,
1476 "start_resource": 62,
1477 "num_resource": 2
1478 },
1479 {
1480 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_RX_UH)",
1481 "type": 13510,
1482 "start_resource": 60,
1483 "num_resource": 2
1484 },
1485 {
1486 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_TX_H)",
1487 "type": 13511,
1488 "start_resource": 2,
1489 "num_resource": 2
1490 },
1491 {
1492 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_UDMAP_TX_UH)",
1493 "type": 13512,
1494 "start_resource": 0,
1495 "num_resource": 2
1496 },
1497 {
1498 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_VIRTID)",
1499 "type": 13514,
1500 "start_resource": 0,
1501 "num_resource": 4096
1502 },
1503 {
1504 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_RINGACC_0, RESASG_SUBTYPE_RA_MONITORS)",
1505 "type": 13515,
1506 "start_resource": 0,
1507 "num_resource": 32
1508 },
1509 {
1510 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON)",
1511 "type": 13568,
1512 "start_resource": 60,
1513 "num_resource": 90
1514 },
1515 {
1516 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES)",
1517 "type": 13569,
1518 "start_resource": 0,
1519 "num_resource": 1
1520 },
1521 {
1522 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER)",
1523 "type": 13570,
1524 "start_resource": 49152,
1525 "num_resource": 1024
1526 },
1527 {
1528 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG)",
1529 "type": 13571,
1530 "start_resource": 0,
1531 "num_resource": 1
1532 },
1533 {
1534 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_CHAN)",
1535 "type": 13578,
1536 "start_resource": 4,
1537 "num_resource": 56
1538 },
1539 {
1540 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_HCHAN)",
1541 "type": 13579,
1542 "start_resource": 2,
1543 "num_resource": 2
1544 },
1545 {
1546 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_UHCHAN)",
1547 "type": 13580,
1548 "start_resource": 0,
1549 "num_resource": 2
1550 },
1551 {
1552 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_TX_CHAN)",
1553 "type": 13581,
1554 "start_resource": 4,
1555 "num_resource": 56
1556 },
1557 {
1558 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_TX_HCHAN)",
1559 "type": 13583,
1560 "start_resource": 2,
1561 "num_resource": 2
1562 },
1563 {
1564 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_TX_UHCHAN)",
1565 "type": 13584,
1566 "start_resource": 0,
1567 "num_resource": 2
1568 },
1569 {
1570 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
1571 "type": 13632,
1572 "start_resource": 10,
1573 "num_resource": 182
1574 },
1575 {
1576 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
1577 "type": 13632,
1578 "start_resource": 196,
1579 "num_resource": 28
1580 },
1581 {
1582 "name": "RESASG_UTYPE(J7200_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
1583 "type": 13632,
1584 "start_resource": 228,
1585 "num_resource": 284
1586 },
1587 {
1588 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_UDMASS_INTA_0, RESASG_SUBTYPE_IA_VINT)",
1589 "type": 14922,
1590 "start_resource": 8,
1591 "num_resource": 248
1592 },
1593 {
1594 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_UDMASS_INTA_0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
1595 "type": 14925,
1596 "start_resource": 16392,
1597 "num_resource": 1528
1598 },
1599 {
1600 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_PROXY0, RESASG_SUBTYPE_PROXY_PROXIES)",
1601 "type": 14976,
1602 "start_resource": 1,
1603 "num_resource": 63
1604 },
1605 {
1606 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_ERROR_OES)",
1607 "type": 15040,
1608 "start_resource": 0,
1609 "num_resource": 1
1610 },
1611 {
1612 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_GP)",
1613 "type": 15041,
1614 "start_resource": 96,
1615 "num_resource": 156
1616 },
1617 {
1618 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX)",
1619 "type": 15042,
1620 "start_resource": 50,
1621 "num_resource": 43
1622 },
1623 {
1624 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX)",
1625 "type": 15043,
1626 "start_resource": 2,
1627 "num_resource": 44
1628 },
1629 {
1630 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX_H)",
1631 "type": 15045,
1632 "start_resource": 48,
1633 "num_resource": 2
1634 },
1635 {
1636 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_H)",
1637 "type": 15047,
1638 "start_resource": 0,
1639 "num_resource": 2
1640 },
1641 {
1642 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_VIRTID)",
1643 "type": 15050,
1644 "start_resource": 0,
1645 "num_resource": 4096
1646 },
1647 {
1648 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_MONITORS)",
1649 "type": 15051,
1650 "start_resource": 0,
1651 "num_resource": 32
1652 },
1653 {
1654 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON)",
1655 "type": 15104,
1656 "start_resource": 48,
1657 "num_resource": 48
1658 },
1659 {
1660 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES)",
1661 "type": 15105,
1662 "start_resource": 0,
1663 "num_resource": 1
1664 },
1665 {
1666 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER)",
1667 "type": 15106,
1668 "start_resource": 56320,
1669 "num_resource": 256
1670 },
1671 {
1672 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG)",
1673 "type": 15107,
1674 "start_resource": 0,
1675 "num_resource": 1
1676 },
1677 {
1678 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_CHAN)",
1679 "type": 15114,
1680 "start_resource": 2,
1681 "num_resource": 43
1682 },
1683 {
1684 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_RX_HCHAN)",
1685 "type": 15115,
1686 "start_resource": 0,
1687 "num_resource": 2
1688 },
1689 {
1690 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_TX_CHAN)",
1691 "type": 15117,
1692 "start_resource": 2,
1693 "num_resource": 44
1694 },
1695 {
1696 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_UDMAP_0, RESASG_SUBTYPE_UDMAP_TX_HCHAN)",
1697 "type": 15119,
1698 "start_resource": 0,
1699 "num_resource": 2
1700 },
1701 {
1702 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_INTR_0, RESASG_SUBTYPE_IR_OUTPUT)",
1703 "type": 15168,
1704 "start_resource": 4,
1705 "num_resource": 28
1706 },
1707 {
1708 "name": "RESASG_UTYPE(J7200_DEV_MCU_NAVSS0_INTR_0, RESASG_SUBTYPE_IR_OUTPUT)",
1709 "type": 15168,
1710 "start_resource": 36,
1711 "num_resource": 28
1712 }
1713 ],
1714 "constraints": [
1715 {
1716 "max_resource_entries": 270
1717 }
1718 ]
1368 } 1719 }
1369 } 1720 }
1370 } 1721 }
diff --git a/scripts/sysfw_boardcfg_validator.py b/scripts/sysfw_boardcfg_validator.py
index 6f9f37d..3d8bc90 100755
--- a/scripts/sysfw_boardcfg_validator.py
+++ b/scripts/sysfw_boardcfg_validator.py
@@ -530,7 +530,7 @@ class sysfw_trace_cli:
530 help="SoC supported by input binary", 530 help="SoC supported by input binary",
531 action="store", 531 action="store",
532 type=str, 532 type=str,
533 choices={'am65x', 'am65x_sr2', 'j721e'}, 533 choices={'am65x', 'am65x_sr2', 'j721e', 'j7200'},
534 required=True) 534 required=True)
535 535
536 # Required output arguments 536 # Required output arguments