am65x,am65x_sr2: rm-cfg: Fix Main NavSS IR outputs after ABI 3.0

The Main NavSS IR on AM65x SoCs has a total of 152 output interrupt
lines, out of which the first 16 are reserved for System Firmware.
The ABI 3.0 resource updates have assigned all the remaining IR
output lines to the A53 host context HOST_ID_A53_2, which is wrong.
The Main NavSS IR also supports some interrupt lines for the MCU
R5F cores (connected through MAIN2MCU LVL IR) and for each of the
3 ICSSG subsystems.

Fix up the Main NavSS IR outputs properly by adding resources for
each of the processor subsystems. The output lines [120:127] are
split equally for each of the MCU R5F cores (to support Split-mode),
leaving only 104 usable interrupts for the A53 core. The output
lines [128:151] are associated with the ICSSG subsystems.

Signed-off-by: Suman Anna <s-anna@ti.com>

2 files changed, 34 insertions, 4 deletions

diff --git a/soc/am65x/evm/rm-cfg.c b/soc/am65x/evm/rm-cfg.c
index 1894ac1c1..5abb3c31c 100644
--- a/soc/am65x/evm/rm-cfg.c
+++ b/soc/am65x/evm/rm-cfg.c
@@ -1,7 +1,7 @@
 /*
  * K3 System Firmware Resource Management Configuration Data
  *
- * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2018-2020 Texas Instruments Incorporated - http://www.ti.com/
  *      Andreas Dannenberg <dannenberg@ti.com>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -400,10 +400,40 @@ const struct boardcfg_rm_local am65_boardcfg_rm_data = {
                 {
                         .type = RESASG_UTYPE(AM6_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT),
                         .start_resource = 16,
-                        .num_resource = 136,
+                        .num_resource = 104,
                         .host_id = HOST_ID_A53_2,
                 },
                 {
+                        .type = RESASG_UTYPE(AM6_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT),
+                        .start_resource = 120,
+                        .num_resource = 4,
+                        .host_id = HOST_ID_R5_0,
+                },
+                {
+                        .type = RESASG_UTYPE(AM6_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT),
+                        .start_resource = 124,
+                        .num_resource = 4,
+                        .host_id = HOST_ID_R5_2,
+                },
+                {
+                        .type = RESASG_UTYPE(AM6_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT),
+                        .start_resource = 128,
+                        .num_resource = 8,
+                        .host_id = HOST_ID_ICSSG_0,
+                },
+                {
+                        .type = RESASG_UTYPE(AM6_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT),
+                        .start_resource = 136,
+                        .num_resource = 8,
+                        .host_id = HOST_ID_ICSSG_1,
+                },
+                {
+                        .type = RESASG_UTYPE(AM6_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT),
+                        .start_resource = 144,
+                        .num_resource = 8,
+                        .host_id = HOST_ID_ICSSG_2,
+                },
+                {
                         .type = RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT),
                         .start_resource = 4,
                         .num_resource = 28,
diff --git a/soc/am65x/evm/sysfw_img_cfg.h b/soc/am65x/evm/sysfw_img_cfg.h
index d517fca9d..4dfd85879 100644
--- a/soc/am65x/evm/sysfw_img_cfg.h
+++ b/soc/am65x/evm/sysfw_img_cfg.h
@@ -1,7 +1,7 @@
 /*
  * K3 System Firmware Configuration Data
  *
- * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2019-2020 Texas Instruments Incorporated - http://www.ti.com/
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
@@ -35,6 +35,6 @@
 #ifndef SYSFW_IMG_CFG_H
 #define SYSFW_IMG_CFG_H
 
-#define BOARDCFG_RM_RESASG_ENTRIES      50
+#define BOARDCFG_RM_RESASG_ENTRIES      55
 
 #endif /* SYSFW_IMG_CFG_H */