am65x,am65x_sr2: Fix MAIN2MCU interrupt routers for both R5F cores

Each of the MCU R5F cores are represented by different HOST_IDs, and
the ABI 3.0 RM changes have reassigned all the MAIN2MCU interrupt router
outputs back to only the MCU R5F Core0. This breaks the IPC use-cases
when the MCU R5FSS cluster is configured for Split-mode.

Partition both the MAIN2MCU_LVL and MAIN2MCU_PLS Interrupt Router
outputs equally between the non-secure contexts of both the MCU
R5F cores.

Signed-off-by: Suman Anna <s-anna@ti.com>

2 files changed, 17 insertions, 3 deletions

diff --git a/soc/am65x/evm/rm-cfg.c b/soc/am65x/evm/rm-cfg.c
index 5abb3c31c..f14e969d8 100644
--- a/soc/am65x/evm/rm-cfg.c
+++ b/soc/am65x/evm/rm-cfg.c
@@ -367,19 +367,33 @@ const struct boardcfg_rm_local am65_boardcfg_rm_data = {
                         .num_resource = 32,
                         .host_id = HOST_ID_A53_2,
                 },
+                /* Main 2 MCU level IRQ IR */
                 {
                         .type = RESASG_UTYPE(AM6_DEV_MAIN2MCU_LVL_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT),
                         .start_resource = 0,
-                        .num_resource = 64,
+                        .num_resource = 32,
                         .host_id = HOST_ID_R5_0,
                 },
                 {
+                        .type = RESASG_UTYPE(AM6_DEV_MAIN2MCU_LVL_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT),
+                        .start_resource = 32,
+                        .num_resource = 32,
+                        .host_id = HOST_ID_R5_2,
+                },
+                /* Main 2 MCU Pulse IRQ IR */
+                {
                         .type = RESASG_UTYPE(AM6_DEV_MAIN2MCU_PLS_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT),
                         .start_resource = 0,
-                        .num_resource = 48,
+                        .num_resource = 24,
                         .host_id = HOST_ID_R5_0,
                 },
                 {
+                        .type = RESASG_UTYPE(AM6_DEV_MAIN2MCU_PLS_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT),
+                        .start_resource = 24,
+                        .num_resource = 24,
+                        .host_id = HOST_ID_R5_2,
+                },
+                {
                         .type = RESASG_UTYPE(AM6_DEV_GPIOMUX_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT),
                         .start_resource = 0,
                         .num_resource = 32,
diff --git a/soc/am65x/evm/sysfw_img_cfg.h b/soc/am65x/evm/sysfw_img_cfg.h
index 4dfd85879..c651fcecd 100644
--- a/soc/am65x/evm/sysfw_img_cfg.h
+++ b/soc/am65x/evm/sysfw_img_cfg.h
@@ -35,6 +35,6 @@
 #ifndef SYSFW_IMG_CFG_H
 #define SYSFW_IMG_CFG_H
 
-#define BOARDCFG_RM_RESASG_ENTRIES      55
+#define BOARDCFG_RM_RESASG_ENTRIES      57
 
 #endif /* SYSFW_IMG_CFG_H */