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authorVignesh Raghavendra2021-06-07 01:05:13 -0500
committerVignesh Raghavendra2021-06-08 01:09:25 -0500
commit8fdd698df36e4701f2442420daed9b41249c67c7 (patch)
tree63bd442d3ad219cccecf4ebefea630bad2750a12 /soc/am65x
parent0a3b41652a36edeee031ae5e843ea393fe1d26bc (diff)
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soc: am65x: rm-cfg: Allocate resources for MCU R5_1
R5 SPL on AM65x still uses MCU R5_1 as host ID for requesting DMA resources. Therefore mark resources b/w MCU R5_0 as shared with MCU R5_1. In order to keep number of entries under 260, drop Ring_monitors allocation fro A53_3 Without this OSPI boot cannot use DMA in R5 SPL stage Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'soc/am65x')
-rw-r--r--soc/am65x/evm/rm-cfg.c392
-rw-r--r--soc/am65x/evm/sysfw_img_cfg.h2
2 files changed, 379 insertions, 15 deletions
diff --git a/soc/am65x/evm/rm-cfg.c b/soc/am65x/evm/rm-cfg.c
index eb0111b43..2ac407c72 100644
--- a/soc/am65x/evm/rm-cfg.c
+++ b/soc/am65x/evm/rm-cfg.c
@@ -127,6 +127,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
127 .host_id = HOST_ID_R5_0, 127 .host_id = HOST_ID_R5_0,
128 }, 128 },
129 { 129 {
130 .start_resource = 16,
131 .num_resource = 8,
132 .type = RESASG_UTYPE (AM6_DEV_CMPEVENT_INTRTR0,
133 RESASG_SUBTYPE_IR_OUTPUT),
134 .host_id = HOST_ID_R5_1,
135 },
136 {
130 .start_resource = 24, 137 .start_resource = 24,
131 .num_resource = 8, 138 .num_resource = 8,
132 .type = RESASG_UTYPE (AM6_DEV_CMPEVENT_INTRTR0, 139 .type = RESASG_UTYPE (AM6_DEV_CMPEVENT_INTRTR0,
@@ -142,6 +149,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
142 .host_id = HOST_ID_R5_0, 149 .host_id = HOST_ID_R5_0,
143 }, 150 },
144 { 151 {
152 .start_resource = 0,
153 .num_resource = 32,
154 .type = RESASG_UTYPE (AM6_DEV_MAIN2MCU_LVL_INTRTR0,
155 RESASG_SUBTYPE_IR_OUTPUT),
156 .host_id = HOST_ID_R5_1,
157 },
158 {
145 .start_resource = 32, 159 .start_resource = 32,
146 .num_resource = 32, 160 .num_resource = 32,
147 .type = RESASG_UTYPE (AM6_DEV_MAIN2MCU_LVL_INTRTR0, 161 .type = RESASG_UTYPE (AM6_DEV_MAIN2MCU_LVL_INTRTR0,
@@ -157,6 +171,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
157 .host_id = HOST_ID_R5_0, 171 .host_id = HOST_ID_R5_0,
158 }, 172 },
159 { 173 {
174 .start_resource = 0,
175 .num_resource = 24,
176 .type = RESASG_UTYPE (AM6_DEV_MAIN2MCU_PLS_INTRTR0,
177 RESASG_SUBTYPE_IR_OUTPUT),
178 .host_id = HOST_ID_R5_1,
179 },
180 {
160 .start_resource = 24, 181 .start_resource = 24,
161 .num_resource = 24, 182 .num_resource = 24,
162 .type = RESASG_UTYPE (AM6_DEV_MAIN2MCU_PLS_INTRTR0, 183 .type = RESASG_UTYPE (AM6_DEV_MAIN2MCU_PLS_INTRTR0,
@@ -186,6 +207,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
186 .host_id = HOST_ID_R5_0, 207 .host_id = HOST_ID_R5_0,
187 }, 208 },
188 { 209 {
210 .start_resource = 24,
211 .num_resource = 4,
212 .type = RESASG_UTYPE (AM6_DEV_GPIOMUX_INTRTR0,
213 RESASG_SUBTYPE_IR_OUTPUT),
214 .host_id = HOST_ID_R5_1,
215 },
216 {
189 .start_resource = 28, 217 .start_resource = 28,
190 .num_resource = 4, 218 .num_resource = 4,
191 .type = RESASG_UTYPE (AM6_DEV_GPIOMUX_INTRTR0, 219 .type = RESASG_UTYPE (AM6_DEV_GPIOMUX_INTRTR0,
@@ -201,6 +229,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
201 .host_id = HOST_ID_R5_0, 229 .host_id = HOST_ID_R5_0,
202 }, 230 },
203 { 231 {
232 .start_resource = 0,
233 .num_resource = 16,
234 .type = RESASG_UTYPE (AM6_DEV_TIMESYNC_INTRTR0,
235 RESASG_SUBTYPE_IR_OUTPUT),
236 .host_id = HOST_ID_R5_1,
237 },
238 {
204 .start_resource = 16, 239 .start_resource = 16,
205 .num_resource = 16, 240 .num_resource = 16,
206 .type = RESASG_UTYPE (AM6_DEV_TIMESYNC_INTRTR0, 241 .type = RESASG_UTYPE (AM6_DEV_TIMESYNC_INTRTR0,
@@ -237,6 +272,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
237 .host_id = HOST_ID_R5_0, 272 .host_id = HOST_ID_R5_0,
238 }, 273 },
239 { 274 {
275 .start_resource = 8,
276 .num_resource = 4,
277 .type = RESASG_UTYPE (AM6_DEV_WKUP_GPIOMUX_INTRTR0,
278 RESASG_SUBTYPE_IR_OUTPUT),
279 .host_id = HOST_ID_R5_1,
280 },
281 {
240 .start_resource = 12, 282 .start_resource = 12,
241 .num_resource = 4, 283 .num_resource = 4,
242 .type = RESASG_UTYPE (AM6_DEV_WKUP_GPIOMUX_INTRTR0, 284 .type = RESASG_UTYPE (AM6_DEV_WKUP_GPIOMUX_INTRTR0,
@@ -266,6 +308,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
266 .host_id = HOST_ID_R5_0, 308 .host_id = HOST_ID_R5_0,
267 }, 309 },
268 { 310 {
311 .start_resource = 126,
312 .num_resource = 50,
313 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMASS_INTA0,
314 RESASG_SUBTYPE_IA_VINT),
315 .host_id = HOST_ID_R5_1,
316 },
317 {
269 .start_resource = 176, 318 .start_resource = 176,
270 .num_resource = 50, 319 .num_resource = 50,
271 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMASS_INTA0, 320 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMASS_INTA0,
@@ -302,6 +351,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
302 .host_id = HOST_ID_R5_0, 351 .host_id = HOST_ID_R5_0,
303 }, 352 },
304 { 353 {
354 .start_resource = 1552,
355 .num_resource = 512,
356 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMASS_INTA0,
357 RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
358 .host_id = HOST_ID_R5_1,
359 },
360 {
305 .start_resource = 2064, 361 .start_resource = 2064,
306 .num_resource = 512, 362 .num_resource = 512,
307 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMASS_INTA0, 363 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMASS_INTA0,
@@ -370,6 +426,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
370 .host_id = HOST_ID_R5_0, 426 .host_id = HOST_ID_R5_0,
371 }, 427 },
372 { 428 {
429 .start_resource = 120,
430 .num_resource = 4,
431 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_INTR_ROUTER_0,
432 RESASG_SUBTYPE_IR_OUTPUT),
433 .host_id = HOST_ID_R5_1,
434 },
435 {
373 .start_resource = 124, 436 .start_resource = 124,
374 .num_resource = 4, 437 .num_resource = 4,
375 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_INTR_ROUTER_0, 438 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_INTR_ROUTER_0,
@@ -406,6 +469,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
406 .host_id = HOST_ID_R5_0, 469 .host_id = HOST_ID_R5_0,
407 }, 470 },
408 { 471 {
472 .start_resource = 17,
473 .num_resource = 16,
474 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_PROXY0,
475 RESASG_SUBTYPE_PROXY_PROXIES),
476 .host_id = HOST_ID_R5_1,
477 },
478 {
409 .start_resource = 33, 479 .start_resource = 33,
410 .num_resource = 16, 480 .num_resource = 16,
411 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_PROXY0, 481 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_PROXY0,
@@ -450,6 +520,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
450 .host_id = HOST_ID_R5_0, 520 .host_id = HOST_ID_R5_0,
451 }, 521 },
452 { 522 {
523 .start_resource = 454,
524 .num_resource = 256,
525 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
526 RESASG_SUBTYPE_RA_GP),
527 .host_id = HOST_ID_R5_1,
528 },
529 {
453 .start_resource = 710, 530 .start_resource = 710,
454 .num_resource = 32, 531 .num_resource = 32,
455 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 532 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
@@ -480,6 +557,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
480 }, 557 },
481 { 558 {
482 .start_resource = 172, 559 .start_resource = 172,
560 .num_resource = 4,
561 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
562 RESASG_SUBTYPE_RA_UDMAP_RX),
563 .host_id = HOST_ID_R5_1,
564 },
565 {
566 .start_resource = 172,
483 .num_resource = 0, 567 .num_resource = 0,
484 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 568 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
485 RESASG_SUBTYPE_RA_UDMAP_RX), 569 RESASG_SUBTYPE_RA_UDMAP_RX),
@@ -514,6 +598,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
514 .host_id = HOST_ID_R5_0, 598 .host_id = HOST_ID_R5_0,
515 }, 599 },
516 { 600 {
601 .start_resource = 238,
602 .num_resource = 32,
603 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
604 RESASG_SUBTYPE_RA_UDMAP_RX),
605 .host_id = HOST_ID_R5_1,
606 },
607 {
517 .start_resource = 270, 608 .start_resource = 270,
518 .num_resource = 14, 609 .num_resource = 14,
519 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 610 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
@@ -544,6 +635,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
544 }, 635 },
545 { 636 {
546 .start_resource = 20, 637 .start_resource = 20,
638 .num_resource = 4,
639 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
640 RESASG_SUBTYPE_RA_UDMAP_TX),
641 .host_id = HOST_ID_R5_1,
642 },
643 {
644 .start_resource = 20,
547 .num_resource = 0, 645 .num_resource = 0,
548 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 646 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
549 RESASG_SUBTYPE_RA_UDMAP_TX), 647 RESASG_SUBTYPE_RA_UDMAP_TX),
@@ -578,6 +676,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
578 .host_id = HOST_ID_R5_0, 676 .host_id = HOST_ID_R5_0,
579 }, 677 },
580 { 678 {
679 .start_resource = 72,
680 .num_resource = 32,
681 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
682 RESASG_SUBTYPE_RA_UDMAP_TX),
683 .host_id = HOST_ID_R5_1,
684 },
685 {
581 .start_resource = 104, 686 .start_resource = 104,
582 .num_resource = 14, 687 .num_resource = 14,
583 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 688 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
@@ -614,6 +719,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
614 .host_id = HOST_ID_R5_0, 719 .host_id = HOST_ID_R5_0,
615 }, 720 },
616 { 721 {
722 .start_resource = 128,
723 .num_resource = 12,
724 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
725 RESASG_SUBTYPE_RA_UDMAP_TX_EXT),
726 .host_id = HOST_ID_R5_1,
727 },
728 {
617 .start_resource = 140, 729 .start_resource = 140,
618 .num_resource = 12, 730 .num_resource = 12,
619 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 731 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
@@ -633,6 +745,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
633 .num_resource = 0, 745 .num_resource = 0,
634 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 746 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
635 RESASG_SUBTYPE_RA_UDMAP_RX_H), 747 RESASG_SUBTYPE_RA_UDMAP_RX_H),
748 .host_id = HOST_ID_R5_1,
749 },
750 {
751 .start_resource = 154,
752 .num_resource = 0,
753 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
754 RESASG_SUBTYPE_RA_UDMAP_RX_H),
636 .host_id = HOST_ID_R5_2, 755 .host_id = HOST_ID_R5_2,
637 }, 756 },
638 { 757 {
@@ -657,6 +776,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
657 .host_id = HOST_ID_R5_0, 776 .host_id = HOST_ID_R5_0,
658 }, 777 },
659 { 778 {
779 .start_resource = 156,
780 .num_resource = 2,
781 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
782 RESASG_SUBTYPE_RA_UDMAP_RX_H),
783 .host_id = HOST_ID_R5_1,
784 },
785 {
660 .start_resource = 158, 786 .start_resource = 158,
661 .num_resource = 2, 787 .num_resource = 2,
662 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 788 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
@@ -676,6 +802,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
676 .num_resource = 0, 802 .num_resource = 0,
677 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 803 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
678 RESASG_SUBTYPE_RA_UDMAP_TX_H), 804 RESASG_SUBTYPE_RA_UDMAP_TX_H),
805 .host_id = HOST_ID_R5_1,
806 },
807 {
808 .start_resource = 1,
809 .num_resource = 0,
810 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
811 RESASG_SUBTYPE_RA_UDMAP_TX_H),
679 .host_id = HOST_ID_R5_2, 812 .host_id = HOST_ID_R5_2,
680 }, 813 },
681 { 814 {
@@ -700,6 +833,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
700 .host_id = HOST_ID_R5_0, 833 .host_id = HOST_ID_R5_0,
701 }, 834 },
702 { 835 {
836 .start_resource = 4,
837 .num_resource = 2,
838 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
839 RESASG_SUBTYPE_RA_UDMAP_TX_H),
840 .host_id = HOST_ID_R5_1,
841 },
842 {
703 .start_resource = 6, 843 .start_resource = 6,
704 .num_resource = 2, 844 .num_resource = 2,
705 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 845 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
@@ -731,28 +871,28 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
731 }, 871 },
732 { 872 {
733 .start_resource = 8, 873 .start_resource = 8,
734 .num_resource = 4, 874 .num_resource = 8,
735 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 875 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
736 RESASG_SUBTYPE_RA_MONITORS), 876 RESASG_SUBTYPE_RA_MONITORS),
737 .host_id = HOST_ID_A53_3, 877 .host_id = HOST_ID_R5_0,
738 }, 878 },
739 { 879 {
740 .start_resource = 12, 880 .start_resource = 8,
741 .num_resource = 8, 881 .num_resource = 8,
742 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 882 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
743 RESASG_SUBTYPE_RA_MONITORS), 883 RESASG_SUBTYPE_RA_MONITORS),
744 .host_id = HOST_ID_R5_0, 884 .host_id = HOST_ID_R5_1,
745 }, 885 },
746 { 886 {
747 .start_resource = 20, 887 .start_resource = 16,
748 .num_resource = 8, 888 .num_resource = 8,
749 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 889 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
750 RESASG_SUBTYPE_RA_MONITORS), 890 RESASG_SUBTYPE_RA_MONITORS),
751 .host_id = HOST_ID_R5_2, 891 .host_id = HOST_ID_R5_2,
752 }, 892 },
753 { 893 {
754 .start_resource = 28, 894 .start_resource = 24,
755 .num_resource = 4, 895 .num_resource = 8,
756 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0, 896 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_RINGACC0,
757 RESASG_SUBTYPE_RA_MONITORS), 897 RESASG_SUBTYPE_RA_MONITORS),
758 .host_id = HOST_ID_ALL, 898 .host_id = HOST_ID_ALL,
@@ -780,6 +920,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
780 .host_id = HOST_ID_R5_0, 920 .host_id = HOST_ID_R5_0,
781 }, 921 },
782 { 922 {
923 .start_resource = 222,
924 .num_resource = 64,
925 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
926 RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON),
927 .host_id = HOST_ID_R5_1,
928 },
929 {
783 .start_resource = 286, 930 .start_resource = 286,
784 .num_resource = 8, 931 .num_resource = 8,
785 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0, 932 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
@@ -834,6 +981,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
834 }, 981 },
835 { 982 {
836 .start_resource = 20, 983 .start_resource = 20,
984 .num_resource = 4,
985 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
986 RESASG_SUBTYPE_UDMAP_RX_CHAN),
987 .host_id = HOST_ID_R5_1,
988 },
989 {
990 .start_resource = 20,
837 .num_resource = 0, 991 .num_resource = 0,
838 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0, 992 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
839 RESASG_SUBTYPE_UDMAP_RX_CHAN), 993 RESASG_SUBTYPE_UDMAP_RX_CHAN),
@@ -868,6 +1022,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
868 .host_id = HOST_ID_R5_0, 1022 .host_id = HOST_ID_R5_0,
869 }, 1023 },
870 { 1024 {
1025 .start_resource = 86,
1026 .num_resource = 32,
1027 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
1028 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1029 .host_id = HOST_ID_R5_1,
1030 },
1031 {
871 .start_resource = 118, 1032 .start_resource = 118,
872 .num_resource = 14, 1033 .num_resource = 14,
873 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0, 1034 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
@@ -894,6 +1055,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
894 .num_resource = 0, 1055 .num_resource = 0,
895 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0, 1056 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
896 RESASG_SUBTYPE_UDMAP_RX_HCHAN), 1057 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
1058 .host_id = HOST_ID_R5_1,
1059 },
1060 {
1061 .start_resource = 2,
1062 .num_resource = 0,
1063 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
1064 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
897 .host_id = HOST_ID_R5_2, 1065 .host_id = HOST_ID_R5_2,
898 }, 1066 },
899 { 1067 {
@@ -918,6 +1086,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
918 .host_id = HOST_ID_R5_0, 1086 .host_id = HOST_ID_R5_0,
919 }, 1087 },
920 { 1088 {
1089 .start_resource = 4,
1090 .num_resource = 2,
1091 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
1092 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
1093 .host_id = HOST_ID_R5_1,
1094 },
1095 {
921 .start_resource = 6, 1096 .start_resource = 6,
922 .num_resource = 2, 1097 .num_resource = 2,
923 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0, 1098 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
@@ -941,6 +1116,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
941 }, 1116 },
942 { 1117 {
943 .start_resource = 20, 1118 .start_resource = 20,
1119 .num_resource = 4,
1120 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
1121 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1122 .host_id = HOST_ID_R5_1,
1123 },
1124 {
1125 .start_resource = 20,
944 .num_resource = 0, 1126 .num_resource = 0,
945 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0, 1127 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
946 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1128 RESASG_SUBTYPE_UDMAP_TX_CHAN),
@@ -975,6 +1157,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
975 .host_id = HOST_ID_R5_0, 1157 .host_id = HOST_ID_R5_0,
976 }, 1158 },
977 { 1159 {
1160 .start_resource = 72,
1161 .num_resource = 32,
1162 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
1163 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1164 .host_id = HOST_ID_R5_1,
1165 },
1166 {
978 .start_resource = 104, 1167 .start_resource = 104,
979 .num_resource = 14, 1168 .num_resource = 14,
980 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0, 1169 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
@@ -1011,6 +1200,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1011 .host_id = HOST_ID_R5_0, 1200 .host_id = HOST_ID_R5_0,
1012 }, 1201 },
1013 { 1202 {
1203 .start_resource = 128,
1204 .num_resource = 12,
1205 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
1206 RESASG_SUBTYPE_UDMAP_TX_ECHAN),
1207 .host_id = HOST_ID_R5_1,
1208 },
1209 {
1014 .start_resource = 140, 1210 .start_resource = 140,
1015 .num_resource = 12, 1211 .num_resource = 12,
1016 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0, 1212 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
@@ -1030,6 +1226,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1030 .num_resource = 0, 1226 .num_resource = 0,
1031 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0, 1227 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
1032 RESASG_SUBTYPE_UDMAP_TX_HCHAN), 1228 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
1229 .host_id = HOST_ID_R5_1,
1230 },
1231 {
1232 .start_resource = 1,
1233 .num_resource = 0,
1234 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
1235 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
1033 .host_id = HOST_ID_R5_2, 1236 .host_id = HOST_ID_R5_2,
1034 }, 1237 },
1035 { 1238 {
@@ -1054,6 +1257,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1054 .host_id = HOST_ID_R5_0, 1257 .host_id = HOST_ID_R5_0,
1055 }, 1258 },
1056 { 1259 {
1260 .start_resource = 4,
1261 .num_resource = 2,
1262 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
1263 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
1264 .host_id = HOST_ID_R5_1,
1265 },
1266 {
1057 .start_resource = 6, 1267 .start_resource = 6,
1058 .num_resource = 2, 1268 .num_resource = 2,
1059 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0, 1269 .type = RESASG_UTYPE (AM6_DEV_NAVSS0_UDMAP0,
@@ -1083,6 +1293,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1083 .host_id = HOST_ID_R5_0, 1293 .host_id = HOST_ID_R5_0,
1084 }, 1294 },
1085 { 1295 {
1296 .start_resource = 118,
1297 .num_resource = 50,
1298 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_INTR_AGGR_0,
1299 RESASG_SUBTYPE_IA_VINT),
1300 .host_id = HOST_ID_R5_1,
1301 },
1302 {
1086 .start_resource = 168, 1303 .start_resource = 168,
1087 .num_resource = 50, 1304 .num_resource = 50,
1088 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_INTR_AGGR_0, 1305 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_INTR_AGGR_0,
@@ -1119,6 +1336,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1119 .host_id = HOST_ID_R5_0, 1336 .host_id = HOST_ID_R5_0,
1120 }, 1337 },
1121 { 1338 {
1339 .start_resource = 17032,
1340 .num_resource = 256,
1341 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_INTR_AGGR_0,
1342 RESASG_SUBTYPE_GLOBAL_EVENT_SEVT),
1343 .host_id = HOST_ID_R5_1,
1344 },
1345 {
1122 .start_resource = 17288, 1346 .start_resource = 17288,
1123 .num_resource = 256, 1347 .num_resource = 256,
1124 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_INTR_AGGR_0, 1348 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_INTR_AGGR_0,
@@ -1141,6 +1365,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1141 .host_id = HOST_ID_R5_0, 1365 .host_id = HOST_ID_R5_0,
1142 }, 1366 },
1143 { 1367 {
1368 .start_resource = 4,
1369 .num_resource = 28,
1370 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0,
1371 RESASG_SUBTYPE_IR_OUTPUT),
1372 .host_id = HOST_ID_R5_1,
1373 },
1374 {
1144 .start_resource = 36, 1375 .start_resource = 36,
1145 .num_resource = 28, 1376 .num_resource = 28,
1146 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0, 1377 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0,
@@ -1170,6 +1401,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1170 .host_id = HOST_ID_R5_0, 1401 .host_id = HOST_ID_R5_0,
1171 }, 1402 },
1172 { 1403 {
1404 .start_resource = 16,
1405 .num_resource = 24,
1406 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_PROXY0,
1407 RESASG_SUBTYPE_PROXY_PROXIES),
1408 .host_id = HOST_ID_R5_1,
1409 },
1410 {
1173 .start_resource = 40, 1411 .start_resource = 40,
1174 .num_resource = 24, 1412 .num_resource = 24,
1175 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_PROXY0, 1413 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_PROXY0,
@@ -1199,6 +1437,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1199 .host_id = HOST_ID_R5_0, 1437 .host_id = HOST_ID_R5_0,
1200 }, 1438 },
1201 { 1439 {
1440 .start_resource = 68,
1441 .num_resource = 16,
1442 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
1443 RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON),
1444 .host_id = HOST_ID_R5_1,
1445 },
1446 {
1202 .start_resource = 84, 1447 .start_resource = 84,
1203 .num_resource = 8, 1448 .num_resource = 8,
1204 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0, 1449 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
@@ -1253,6 +1498,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1253 }, 1498 },
1254 { 1499 {
1255 .start_resource = 4, 1500 .start_resource = 4,
1501 .num_resource = 4,
1502 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
1503 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1504 .host_id = HOST_ID_R5_1,
1505 },
1506 {
1507 .start_resource = 4,
1256 .num_resource = 0, 1508 .num_resource = 0,
1257 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0, 1509 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
1258 RESASG_SUBTYPE_UDMAP_RX_CHAN), 1510 RESASG_SUBTYPE_UDMAP_RX_CHAN),
@@ -1287,6 +1539,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1287 .host_id = HOST_ID_R5_0, 1539 .host_id = HOST_ID_R5_0,
1288 }, 1540 },
1289 { 1541 {
1542 .start_resource = 26,
1543 .num_resource = 10,
1544 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
1545 RESASG_SUBTYPE_UDMAP_RX_CHAN),
1546 .host_id = HOST_ID_R5_1,
1547 },
1548 {
1290 .start_resource = 36, 1549 .start_resource = 36,
1291 .num_resource = 12, 1550 .num_resource = 12,
1292 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0, 1551 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
@@ -1308,6 +1567,20 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1308 RESASG_SUBTYPE_UDMAP_RX_HCHAN), 1567 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
1309 .host_id = HOST_ID_R5_0, 1568 .host_id = HOST_ID_R5_0,
1310 }, 1569 },
1570 {
1571 .start_resource = 0,
1572 .num_resource = 0,
1573 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
1574 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
1575 .host_id = HOST_ID_R5_1,
1576 },
1577 {
1578 .start_resource = 0,
1579 .num_resource = 2,
1580 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
1581 RESASG_SUBTYPE_UDMAP_RX_HCHAN),
1582 .host_id = HOST_ID_R5_1,
1583 },
1311 /* MCU NAVSS UDMA Normal capacity Tx channels */ 1584 /* MCU NAVSS UDMA Normal capacity Tx channels */
1312 { 1585 {
1313 .start_resource = 2, 1586 .start_resource = 2,
@@ -1325,6 +1598,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1325 }, 1598 },
1326 { 1599 {
1327 .start_resource = 4, 1600 .start_resource = 4,
1601 .num_resource = 4,
1602 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
1603 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1604 .host_id = HOST_ID_R5_1,
1605 },
1606 {
1607 .start_resource = 4,
1328 .num_resource = 0, 1608 .num_resource = 0,
1329 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0, 1609 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
1330 RESASG_SUBTYPE_UDMAP_TX_CHAN), 1610 RESASG_SUBTYPE_UDMAP_TX_CHAN),
@@ -1359,6 +1639,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1359 .host_id = HOST_ID_R5_0, 1639 .host_id = HOST_ID_R5_0,
1360 }, 1640 },
1361 { 1641 {
1642 .start_resource = 26,
1643 .num_resource = 10,
1644 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
1645 RESASG_SUBTYPE_UDMAP_TX_CHAN),
1646 .host_id = HOST_ID_R5_1,
1647 },
1648 {
1362 .start_resource = 36, 1649 .start_resource = 36,
1363 .num_resource = 12, 1650 .num_resource = 12,
1364 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0, 1651 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
@@ -1380,6 +1667,20 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1380 RESASG_SUBTYPE_UDMAP_TX_HCHAN), 1667 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
1381 .host_id = HOST_ID_R5_0, 1668 .host_id = HOST_ID_R5_0,
1382 }, 1669 },
1670 {
1671 .start_resource = 0,
1672 .num_resource = 0,
1673 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
1674 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
1675 .host_id = HOST_ID_R5_1,
1676 },
1677 {
1678 .start_resource = 0,
1679 .num_resource = 2,
1680 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_UDMAP0,
1681 RESASG_SUBTYPE_UDMAP_TX_HCHAN),
1682 .host_id = HOST_ID_R5_1,
1683 },
1383 /* MCU NAVSS Ring accelerator error event config */ 1684 /* MCU NAVSS Ring accelerator error event config */
1384 { 1685 {
1385 .start_resource = 0, 1686 .start_resource = 0,
@@ -1411,6 +1712,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1411 .host_id = HOST_ID_R5_0, 1712 .host_id = HOST_ID_R5_0,
1412 }, 1713 },
1413 { 1714 {
1715 .start_resource = 136,
1716 .num_resource = 60,
1717 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1718 RESASG_SUBTYPE_RA_GP),
1719 .host_id = HOST_ID_R5_1,
1720 },
1721 {
1414 .start_resource = 196, 1722 .start_resource = 196,
1415 .num_resource = 60, 1723 .num_resource = 60,
1416 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0, 1724 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
@@ -1434,6 +1742,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1434 }, 1742 },
1435 { 1743 {
1436 .start_resource = 52, 1744 .start_resource = 52,
1745 .num_resource = 4,
1746 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1747 RESASG_SUBTYPE_RA_UDMAP_RX),
1748 .host_id = HOST_ID_R5_1,
1749 },
1750 {
1751 .start_resource = 52,
1437 .num_resource = 0, 1752 .num_resource = 0,
1438 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0, 1753 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1439 RESASG_SUBTYPE_RA_UDMAP_RX), 1754 RESASG_SUBTYPE_RA_UDMAP_RX),
@@ -1468,6 +1783,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1468 .host_id = HOST_ID_R5_0, 1783 .host_id = HOST_ID_R5_0,
1469 }, 1784 },
1470 { 1785 {
1786 .start_resource = 74,
1787 .num_resource = 10,
1788 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1789 RESASG_SUBTYPE_RA_UDMAP_RX),
1790 .host_id = HOST_ID_R5_1,
1791 },
1792 {
1471 .start_resource = 84, 1793 .start_resource = 84,
1472 .num_resource = 12, 1794 .num_resource = 12,
1473 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0, 1795 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
@@ -1491,6 +1813,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1491 }, 1813 },
1492 { 1814 {
1493 .start_resource = 4, 1815 .start_resource = 4,
1816 .num_resource = 4,
1817 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1818 RESASG_SUBTYPE_RA_UDMAP_TX),
1819 .host_id = HOST_ID_R5_1,
1820 },
1821 {
1822 .start_resource = 4,
1494 .num_resource = 0, 1823 .num_resource = 0,
1495 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0, 1824 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1496 RESASG_SUBTYPE_RA_UDMAP_TX), 1825 RESASG_SUBTYPE_RA_UDMAP_TX),
@@ -1525,6 +1854,13 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1525 .host_id = HOST_ID_R5_0, 1854 .host_id = HOST_ID_R5_0,
1526 }, 1855 },
1527 { 1856 {
1857 .start_resource = 26,
1858 .num_resource = 10,
1859 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1860 RESASG_SUBTYPE_RA_UDMAP_TX),
1861 .host_id = HOST_ID_R5_1,
1862 },
1863 {
1528 .start_resource = 36, 1864 .start_resource = 36,
1529 .num_resource = 12, 1865 .num_resource = 12,
1530 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0, 1866 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
@@ -1546,6 +1882,20 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1546 RESASG_SUBTYPE_RA_UDMAP_RX_H), 1882 RESASG_SUBTYPE_RA_UDMAP_RX_H),
1547 .host_id = HOST_ID_R5_0, 1883 .host_id = HOST_ID_R5_0,
1548 }, 1884 },
1885 {
1886 .start_resource = 48,
1887 .num_resource = 0,
1888 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1889 RESASG_SUBTYPE_RA_UDMAP_RX_H),
1890 .host_id = HOST_ID_R5_1,
1891 },
1892 {
1893 .start_resource = 48,
1894 .num_resource = 2,
1895 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1896 RESASG_SUBTYPE_RA_UDMAP_RX_H),
1897 .host_id = HOST_ID_R5_1,
1898 },
1549 /* MCU NAVSS Rings for High capacity Tx channels */ 1899 /* MCU NAVSS Rings for High capacity Tx channels */
1550 { 1900 {
1551 .start_resource = 0, 1901 .start_resource = 0,
@@ -1561,6 +1911,20 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1561 RESASG_SUBTYPE_RA_UDMAP_TX_H), 1911 RESASG_SUBTYPE_RA_UDMAP_TX_H),
1562 .host_id = HOST_ID_R5_0, 1912 .host_id = HOST_ID_R5_0,
1563 }, 1913 },
1914 {
1915 .start_resource = 0,
1916 .num_resource = 0,
1917 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1918 RESASG_SUBTYPE_RA_UDMAP_TX_H),
1919 .host_id = HOST_ID_R5_1,
1920 },
1921 {
1922 .start_resource = 0,
1923 .num_resource = 2,
1924 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1925 RESASG_SUBTYPE_RA_UDMAP_TX_H),
1926 .host_id = HOST_ID_R5_1,
1927 },
1564 /* MCU NAVSS Ring accelerator virt_id range */ 1928 /* MCU NAVSS Ring accelerator virt_id range */
1565 { 1929 {
1566 .start_resource = 2, 1930 .start_resource = 2,
@@ -1586,28 +1950,28 @@ const struct boardcfg_rm_local am65x_boardcfg_rm_data = {
1586 }, 1950 },
1587 { 1951 {
1588 .start_resource = 8, 1952 .start_resource = 8,
1589 .num_resource = 4, 1953 .num_resource = 8,
1590 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0, 1954 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1591 RESASG_SUBTYPE_RA_MONITORS), 1955 RESASG_SUBTYPE_RA_MONITORS),
1592 .host_id = HOST_ID_A53_3, 1956 .host_id = HOST_ID_R5_0,
1593 }, 1957 },
1594 { 1958 {
1595 .start_resource = 12, 1959 .start_resource = 8,
1596 .num_resource = 8, 1960 .num_resource = 8,
1597 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0, 1961 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1598 RESASG_SUBTYPE_RA_MONITORS), 1962 RESASG_SUBTYPE_RA_MONITORS),
1599 .host_id = HOST_ID_R5_0, 1963 .host_id = HOST_ID_R5_1,
1600 }, 1964 },
1601 { 1965 {
1602 .start_resource = 20, 1966 .start_resource = 16,
1603 .num_resource = 8, 1967 .num_resource = 8,
1604 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0, 1968 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1605 RESASG_SUBTYPE_RA_MONITORS), 1969 RESASG_SUBTYPE_RA_MONITORS),
1606 .host_id = HOST_ID_R5_2, 1970 .host_id = HOST_ID_R5_2,
1607 }, 1971 },
1608 { 1972 {
1609 .start_resource = 28, 1973 .start_resource = 24,
1610 .num_resource = 4, 1974 .num_resource = 8,
1611 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0, 1975 .type = RESASG_UTYPE (AM6_DEV_MCU_NAVSS0_RINGACC0,
1612 RESASG_SUBTYPE_RA_MONITORS), 1976 RESASG_SUBTYPE_RA_MONITORS),
1613 .host_id = HOST_ID_ALL, 1977 .host_id = HOST_ID_ALL,
diff --git a/soc/am65x/evm/sysfw_img_cfg.h b/soc/am65x/evm/sysfw_img_cfg.h
index e5eb40335..b27ad73b9 100644
--- a/soc/am65x/evm/sysfw_img_cfg.h
+++ b/soc/am65x/evm/sysfw_img_cfg.h
@@ -37,6 +37,6 @@
37#ifndef SYSFW_IMG_CFG_H 37#ifndef SYSFW_IMG_CFG_H
38#define SYSFW_IMG_CFG_H 38#define SYSFW_IMG_CFG_H
39 39
40#define BOARDCFG_RM_RESASG_ENTRIES 208 40#define BOARDCFG_RM_RESASG_ENTRIES 260
41 41
42#endif /* SYSFW_IMG_CFG_H */ 42#endif /* SYSFW_IMG_CFG_H */
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