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authorAndreas Dannenberg2019-06-07 14:21:08 -0500
committerAndreas Dannenberg2019-06-10 11:42:03 -0500
commit9010836c4af5408597c44c26547c066b08bff465 (patch)
treeb00fe6ff31b3af18e765931b934d06b2f1a146ad /soc/am65x
parent5664d5d1beb5b1222e283a561d352566c3e7dca8 (diff)
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Makefile: Allow for builds for multiple SoCs
Allow for multiple SoCs to be built and object file names per SoC. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com>
Diffstat (limited to 'soc/am65x')
-rw-r--r--soc/am65x/evm/board-cfg.c82
-rw-r--r--soc/am65x/evm/pm-cfg.c44
-rw-r--r--soc/am65x/evm/rm-cfg.c484
-rw-r--r--soc/am65x/evm/sec-cfg.c62
-rw-r--r--soc/am65x/evm/sysfw_img_cfg.h40
5 files changed, 712 insertions, 0 deletions
diff --git a/soc/am65x/evm/board-cfg.c b/soc/am65x/evm/board-cfg.c
new file mode 100644
index 000000000..5cec0e4c7
--- /dev/null
+++ b/soc/am65x/evm/board-cfg.c
@@ -0,0 +1,82 @@
1/*
2 * K3 System Firmware Board Configuration Data
3 *
4 * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
5 * Andreas Dannenberg <dannenberg@ti.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the
17 * distribution.
18 *
19 * Neither the name of Texas Instruments Incorporated nor the names of
20 * its contributors may be used to endorse or promote products derived
21 * from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
26 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
27 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
29 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#include "common.h"
37
38const struct boardcfg am65_boardcfg_data = {
39 /* boardcfg_abi_rev */
40 .rev = {
41 .boardcfg_abi_maj = 0x0,
42 .boardcfg_abi_min = 0x1,
43 },
44
45 /* boardcfg_control */
46 .control = {
47 .subhdr = {
48 .magic = BOARDCFG_CONTROL_MAGIC_NUM,
49 .size = sizeof(struct boardcfg_control),
50 },
51 .main_isolation_enable = 0x5A,
52 .main_isolation_hostid = 0x2,
53 },
54
55 /* boardcfg sec_proxy */
56 .secproxy = {
57 .subhdr = {
58 .magic = BOARDCFG_SECPROXY_MAGIC_NUM,
59 .size = sizeof(struct boardcfg_secproxy),
60 },
61 .scaling_factor = 0x1,
62 .scaling_profile = 0x1,
63 .disable_main_nav_secure_proxy = 0,
64 },
65
66 /* boardcfg_msmc */
67 .msmc = {
68 .subhdr = {
69 .magic = BOARDCFG_MSMC_MAGIC_NUM,
70 .size = sizeof(struct boardcfg_msmc),
71 },
72 .msmc_cache_size = 0x10,
73 },
74
75 /* boardcfg_dbg_cfg */
76 .debug_cfg = {
77 .subhdr = {
78 .magic = BOARDCFG_DBG_CFG_MAGIC_NUM,
79 .size = sizeof(struct boardcfg_dbg_cfg),
80 },
81 },
82};
diff --git a/soc/am65x/evm/pm-cfg.c b/soc/am65x/evm/pm-cfg.c
new file mode 100644
index 000000000..deaf67357
--- /dev/null
+++ b/soc/am65x/evm/pm-cfg.c
@@ -0,0 +1,44 @@
1/*
2 * K3 System Firmware Power Management Configuration Data
3 *
4 * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
5 * Andreas Dannenberg <dannenberg@ti.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the
17 * distribution.
18 *
19 * Neither the name of Texas Instruments Incorporated nor the names of
20 * its contributors may be used to endorse or promote products derived
21 * from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
26 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
27 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
29 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#include "common.h"
37
38const struct boardcfg_pm am65_boardcfg_pm_data = {
39 /* boardcfg_abi_rev */
40 .rev = {
41 .boardcfg_abi_maj = 0x0,
42 .boardcfg_abi_min = 0x1,
43 },
44};
diff --git a/soc/am65x/evm/rm-cfg.c b/soc/am65x/evm/rm-cfg.c
new file mode 100644
index 000000000..ac72f87fa
--- /dev/null
+++ b/soc/am65x/evm/rm-cfg.c
@@ -0,0 +1,484 @@
1/*
2 * K3 System Firmware Resource Management Configuration Data
3 *
4 * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
5 * Andreas Dannenberg <dannenberg@ti.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the
17 * distribution.
18 *
19 * Neither the name of Texas Instruments Incorporated nor the names of
20 * its contributors may be used to endorse or promote products derived
21 * from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
26 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
27 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
29 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#include "common.h"
37
38const struct boardcfg_rm_local am65_boardcfg_rm_data = {
39 .rm_boardcfg = {
40 /* boardcfg_abi_rev */
41 .rev = {
42 .boardcfg_abi_maj = 0x0,
43 .boardcfg_abi_min = 0x1,
44 },
45
46 /* boardcfg_rm_host_cfg */
47 .host_cfg = {
48 .subhdr = {
49 .magic = BOARDCFG_RM_HOST_CFG_MAGIC_NUM,
50 .size = sizeof(struct boardcfg_rm_host_cfg),
51 },
52 .host_cfg_entries = {{ 0 } },
53 },
54
55 /* boardcfg_rm_resasg */
56 .resasg = {
57 .subhdr = {
58 .magic = BOARDCFG_RM_RESASG_MAGIC_NUM,
59 .size = sizeof(struct boardcfg_rm_resasg),
60 },
61 .resasg_entries_size = BOARDCFG_RM_RESASG_ENTRIES *
62 sizeof(struct boardcfg_rm_resasg_entry),
63 .reserved = 0,
64 /* .resasg_entries is set via boardcfg_rm_local */
65 },
66 },
67
68 /* This is actually part of .resasg */
69 .resasg_entries = {
70 {
71 .start_resource = 16,
72 .num_resource = 240,
73 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMASS_IA0,
74 RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_VINT),
75 .host_id = HOST_ID_A53_2,
76 },
77 {
78 .start_resource = 16,
79 .num_resource = 4592,
80 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMASS_IA0,
81 RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_SEVI),
82 .host_id = HOST_ID_A53_2,
83 },
84 {
85 .start_resource = 32768,
86 .num_resource = 512,
87 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMASS_IA0,
88 RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_MEVI),
89 .host_id = HOST_ID_A53_2,
90 },
91 {
92 .start_resource = 36864,
93 .num_resource = 512,
94 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMASS_IA0,
95 RESASG_SUBTYPE_MAIN_NAV_UDMASS_IA0_GEVI),
96 .host_id = HOST_ID_A53_2,
97 },
98 {
99 .start_resource = 0,
100 .num_resource = 64,
101 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_MODSS_IA0,
102 RESASG_SUBTYPE_MAIN_NAV_MODSS_IA0_VINT),
103 .host_id = HOST_ID_A53_2,
104 },
105 {
106 .start_resource = 20480,
107 .num_resource = 1024,
108 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_MODSS_IA0,
109 RESASG_SUBTYPE_MAIN_NAV_MODSS_IA0_SEVI),
110 .host_id = HOST_ID_A53_2,
111 },
112 {
113 .start_resource = 0,
114 .num_resource = 64,
115 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_MODSS_IA1,
116 RESASG_SUBTYPE_MAIN_NAV_MODSS_IA1_VINT),
117 .host_id = HOST_ID_A53_2,
118 },
119 {
120 .start_resource = 22528,
121 .num_resource = 1024,
122 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_MODSS_IA1,
123 RESASG_SUBTYPE_MAIN_NAV_MODSS_IA1_SEVI),
124 .host_id = HOST_ID_A53_2,
125 },
126 {
127 .start_resource = 8,
128 .num_resource = 248,
129 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMASS_IA0,
130 RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_VINT),
131 .host_id = HOST_ID_R5_0,
132 },
133 {
134 .start_resource = 16392,
135 .num_resource = 992,
136 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMASS_IA0,
137 RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_SEVI),
138 .host_id = HOST_ID_R5_0,
139 },
140 {
141 .start_resource = 17384,
142 .num_resource = 536,
143 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMASS_IA0,
144 RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_SEVI),
145 .host_id = HOST_ID_R5_0,
146 },
147 {
148 .start_resource = 34816,
149 .num_resource = 128,
150 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMASS_IA0,
151 RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_MEVI),
152 .host_id = HOST_ID_R5_0,
153 },
154 {
155 .start_resource = 39936,
156 .num_resource = 256,
157 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMASS_IA0,
158 RESASG_SUBTYPE_MCU_NAV_UDMASS_IA0_GEVI),
159 .host_id = HOST_ID_R5_0,
160 },
161 {
162 .start_resource = 43008,
163 .num_resource = 4,
164 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_MCRC,
165 RESASG_SUBTYPE_MAIN_NAV_MCRC_LEVI),
166 .host_id = HOST_ID_R5_0,
167 },
168 {
169 .start_resource = 43136,
170 .num_resource = 4,
171 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_MCRC,
172 RESASG_SUBTYPE_MCU_NAV_MCRC_LEVI),
173 .host_id = HOST_ID_R5_0,
174 },
175 {
176 .start_resource = 49152,
177 .num_resource = 1024,
178 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
179 RESASG_SUBTYPE_MAIN_NAV_UDMAP_TRIGGER),
180 .host_id = HOST_ID_A53_2,
181 },
182 {
183 .start_resource = 1,
184 .num_resource = 7,
185 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
186 RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_HCHAN),
187 .host_id = HOST_ID_A53_2,
188 },
189 {
190 .start_resource = 8,
191 .num_resource = 112,
192 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
193 RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_CHAN),
194 .host_id = HOST_ID_A53_2,
195 },
196 {
197 .start_resource = 120,
198 .num_resource = 32,
199 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
200 RESASG_SUBTYPE_MAIN_NAV_UDMAP_TX_ECHAN),
201 .host_id = HOST_ID_A53_2,
202 },
203 {
204 .start_resource = 2,
205 .num_resource = 6,
206 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
207 RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_HCHAN),
208 .host_id = HOST_ID_A53_2,
209 },
210 {
211 .start_resource = 8,
212 .num_resource = 142,
213 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
214 RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_CHAN),
215 .host_id = HOST_ID_A53_2,
216 },
217 {
218 .start_resource = 150,
219 .num_resource = 150,
220 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
221 RESASG_SUBTYPE_MAIN_NAV_UDMAP_RX_FLOW_COMMON),
222 .host_id = HOST_ID_A53_2,
223 },
224 {
225 .start_resource = 0,
226 .num_resource = 1,
227 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_UDMAP,
228 RESASG_SUBTYPE_MAIN_NAV_UDMAP_INVALID_FLOW_OES),
229 .host_id = HOST_ID_A53_2,
230 },
231 {
232 .start_resource = 56320,
233 .num_resource = 256,
234 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
235 RESASG_SUBTYPE_MCU_NAV_UDMAP_TRIGGER),
236 .host_id = HOST_ID_A53_2,
237 },
238 {
239 .start_resource = 0,
240 .num_resource = 2,
241 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
242 RESASG_SUBTYPE_MCU_NAV_UDMAP_TX_HCHAN),
243 .host_id = HOST_ID_A53_2,
244 },
245 {
246 .start_resource = 2,
247 .num_resource = 46,
248 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
249 RESASG_SUBTYPE_MCU_NAV_UDMAP_TX_CHAN),
250 .host_id = HOST_ID_A53_2,
251 },
252 {
253 .start_resource = 0,
254 .num_resource = 2,
255 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
256 RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_HCHAN),
257 .host_id = HOST_ID_A53_2,
258 },
259 {
260 .start_resource = 2,
261 .num_resource = 46,
262 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
263 RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_CHAN),
264 .host_id = HOST_ID_A53_2,
265 },
266 {
267 .start_resource = 48,
268 .num_resource = 48,
269 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
270 RESASG_SUBTYPE_MCU_NAV_UDMAP_RX_FLOW_COMMON),
271 .host_id = HOST_ID_A53_2,
272 },
273 {
274 .start_resource = 0,
275 .num_resource = 1,
276 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_UDMAP,
277 RESASG_SUBTYPE_MCU_NAV_UDMAP_INVALID_FLOW_OES),
278 .host_id = HOST_ID_A53_2,
279 },
280 {
281 .start_resource = 61440,
282 .num_resource = 64,
283 .type = RESASG_UTYPE(RESASG_TYPE_MSMC,
284 RESASG_SUBTYPE_MSMC_DRU),
285 .host_id = HOST_ID_A53_2,
286 },
287 {
288 .start_resource = 1,
289 .num_resource = 151,
290 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_RA,
291 RESASG_SUBTYPE_MAIN_NAV_RA_RING_UDMAP_TX),
292 .host_id = HOST_ID_A53_2,
293 },
294 {
295 .start_resource = 153,
296 .num_resource = 149,
297 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_RA,
298 RESASG_SUBTYPE_MAIN_NAV_RA_RING_UDMAP_RX),
299 .host_id = HOST_ID_A53_2,
300 },
301 {
302 .start_resource = 304,
303 .num_resource = 464,
304 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_RA,
305 RESASG_SUBTYPE_MAIN_NAV_RA_RING_GP),
306 .host_id = HOST_ID_A53_2,
307 },
308 {
309 .start_resource = 0,
310 .num_resource = 1,
311 .type = RESASG_UTYPE(RESASG_TYPE_MAIN_NAV_RA,
312 RESASG_SUBTYPE_MAIN_NAV_RA_ERROR_OES),
313 .host_id = HOST_ID_A53_2,
314 },
315 {
316 .start_resource = 0,
317 .num_resource = 48,
318 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_RA,
319 RESASG_SUBTYPE_MCU_NAV_RA_RING_UDMAP_TX),
320 .host_id = HOST_ID_A53_2,
321 },
322 {
323 .start_resource = 48,
324 .num_resource = 48,
325 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_RA,
326 RESASG_SUBTYPE_MCU_NAV_RA_RING_UDMAP_RX),
327 .host_id = HOST_ID_A53_2,
328 },
329 {
330 .start_resource = 96,
331 .num_resource = 160,
332 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_RA,
333 RESASG_SUBTYPE_MCU_NAV_RA_RING_GP),
334 .host_id = HOST_ID_A53_2,
335 },
336 {
337 .start_resource = 0,
338 .num_resource = 1,
339 .type = RESASG_UTYPE(RESASG_TYPE_MCU_NAV_RA,
340 RESASG_SUBTYPE_MCU_NAV_RA_ERROR_OES),
341 .host_id = HOST_ID_A53_2,
342 },
343 {
344 .start_resource = 80,
345 .num_resource = 48,
346 .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
347 RESASG_SUBTYPE_GIC_IRQ_MAIN_NAV_SET0),
348 .host_id = HOST_ID_A53_2,
349 },
350 {
351 .start_resource = 392,
352 .num_resource = 32,
353 .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
354 RESASG_SUBTYPE_GIC_IRQ_MAIN_GPIO),
355 .host_id = HOST_ID_A53_2,
356 },
357 {
358 .start_resource = 448,
359 .num_resource = 50,
360 .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
361 RESASG_SUBTYPE_GIC_IRQ_MAIN_NAV_SET1),
362 .host_id = HOST_ID_A53_2,
363 },
364 {
365 .start_resource = 498,
366 .num_resource = 6,
367 .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
368 RESASG_SUBTYPE_GIC_IRQ_MAIN_NAV_SET1),
369 .host_id = HOST_ID_A53_2,
370 },
371 {
372 .start_resource = 544,
373 .num_resource = 16,
374 .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
375 RESASG_SUBTYPE_GIC_IRQ_COMP_EVT),
376 .host_id = HOST_ID_A53_2,
377 },
378 {
379 .start_resource = 712,
380 .num_resource = 16,
381 .type = RESASG_UTYPE(RESASG_TYPE_GIC_IRQ,
382 RESASG_SUBTYPE_GIC_IRQ_WKUP_GPIO),
383 .host_id = HOST_ID_A53_2,
384 },
385 {
386 .start_resource = 68,
387 .num_resource = 28,
388 .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C0_IRQ,
389 RESASG_SUBTYPE_PULSAR_C0_IRQ_MCU_NAV),
390 .host_id = HOST_ID_R5_0,
391 },
392 {
393 .start_resource = 124,
394 .num_resource = 16,
395 .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C0_IRQ,
396 RESASG_SUBTYPE_PULSAR_C0_IRQ_WKUP_GPIO),
397 .host_id = HOST_ID_R5_0,
398 },
399 {
400 .start_resource = 160,
401 .num_resource = 32,
402 .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C0_IRQ,
403 RESASG_SUBTYPE_PULSAR_C0_IRQ_MAIN2MCU_LVL),
404 .host_id = HOST_ID_R5_0,
405 },
406 {
407 .start_resource = 224,
408 .num_resource = 48,
409 .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C0_IRQ,
410 RESASG_SUBTYPE_PULSAR_C0_IRQ_MAIN2MCU_PLS),
411 .host_id = HOST_ID_R5_0,
412 },
413 {
414 .start_resource = 68,
415 .num_resource = 28,
416 .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C1_IRQ,
417 RESASG_SUBTYPE_PULSAR_C1_IRQ_MCU_NAV),
418 .host_id = HOST_ID_R5_0,
419 },
420 {
421 .start_resource = 124,
422 .num_resource = 16,
423 .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C1_IRQ,
424 RESASG_SUBTYPE_PULSAR_C1_IRQ_WKUP_GPIO),
425 .host_id = HOST_ID_R5_0,
426 },
427 {
428 .start_resource = 192,
429 .num_resource = 32,
430 .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C1_IRQ,
431 RESASG_SUBTYPE_PULSAR_C1_IRQ_MAIN2MCU_LVL),
432 .host_id = HOST_ID_R5_1,
433 },
434 {
435 .start_resource = 224,
436 .num_resource = 48,
437 .type = RESASG_UTYPE(RESASG_TYPE_PULSAR_C1_IRQ,
438 RESASG_SUBTYPE_PULSAR_C1_IRQ_MAIN2MCU_PLS),
439 .host_id = HOST_ID_R5_0,
440 },
441 {
442 .start_resource = 46,
443 .num_resource = 8,
444 .type = RESASG_UTYPE(RESASG_TYPE_ICSSG0_IRQ,
445 RESASG_SUBTYPE_ICSSG0_IRQ_MAIN_NAV),
446 .host_id = HOST_ID_ICSSG_0,
447 },
448 {
449 .start_resource = 88,
450 .num_resource = 8,
451 .type = RESASG_UTYPE(RESASG_TYPE_ICSSG0_IRQ,
452 RESASG_SUBTYPE_ICSSG0_IRQ_MAIN_GPIO),
453 .host_id = HOST_ID_ICSSG_0,
454 },
455 {
456 .start_resource = 46,
457 .num_resource = 8,
458 .type = RESASG_UTYPE(RESASG_TYPE_ICSSG1_IRQ,
459 RESASG_SUBTYPE_ICSSG1_IRQ_MAIN_NAV),
460 .host_id = HOST_ID_ICSSG_1,
461 },
462 {
463 .start_resource = 88,
464 .num_resource = 8,
465 .type = RESASG_UTYPE(RESASG_TYPE_ICSSG1_IRQ,
466 RESASG_SUBTYPE_ICSSG1_IRQ_MAIN_GPIO),
467 .host_id = HOST_ID_ICSSG_1,
468 },
469 {
470 .start_resource = 46,
471 .num_resource = 8,
472 .type = RESASG_UTYPE(RESASG_TYPE_ICSSG2_IRQ,
473 RESASG_SUBTYPE_ICSSG2_IRQ_MAIN_NAV),
474 .host_id = HOST_ID_ICSSG_2,
475 },
476 {
477 .start_resource = 88,
478 .num_resource = 8,
479 .type = RESASG_UTYPE(RESASG_TYPE_ICSSG2_IRQ,
480 RESASG_SUBTYPE_ICSSG2_IRQ_MAIN_GPIO),
481 .host_id = HOST_ID_ICSSG_2,
482 },
483 },
484};
diff --git a/soc/am65x/evm/sec-cfg.c b/soc/am65x/evm/sec-cfg.c
new file mode 100644
index 000000000..055eb8eda
--- /dev/null
+++ b/soc/am65x/evm/sec-cfg.c
@@ -0,0 +1,62 @@
1/*
2 * K3 System Firmware Security Configuration Data
3 *
4 * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
5 * Andreas Dannenberg <dannenberg@ti.com>
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the
17 * distribution.
18 *
19 * Neither the name of Texas Instruments Incorporated nor the names of
20 * its contributors may be used to endorse or promote products derived
21 * from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
26 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
27 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
29 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 */
35
36#include "common.h"
37
38const struct boardcfg_security am65_boardcfg_security_data = {
39 /* boardcfg_abi_rev */
40 .rev = {
41 .boardcfg_abi_maj = 0x0,
42 .boardcfg_abi_min = 0x1,
43 },
44
45 /* boardcfg_proc_acl */
46 .processor_acl_list = {
47 .subhdr = {
48 .magic = BOARDCFG_PROC_ACL_MAGIC_NUM,
49 .size = sizeof(struct boardcfg_proc_acl),
50 },
51 .proc_acl_entries = {{ 0 } },
52 },
53
54 /* boardcfg_host_hierarchy */
55 .host_hierarchy = {
56 .subhdr = {
57 .magic = BOARDCFG_HOST_HIERARCHY_MAGIC_NUM,
58 .size = sizeof(struct boardcfg_host_hierarchy),
59 },
60 .host_hierarchy_entries = {{ 0 } },
61 },
62};
diff --git a/soc/am65x/evm/sysfw_img_cfg.h b/soc/am65x/evm/sysfw_img_cfg.h
new file mode 100644
index 000000000..de5f1ab00
--- /dev/null
+++ b/soc/am65x/evm/sysfw_img_cfg.h
@@ -0,0 +1,40 @@
1/*
2 * K3 System Firmware Configuration Data
3 *
4 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 *
13 * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the
16 * distribution.
17 *
18 * Neither the name of Texas Instruments Incorporated nor the names of
19 * its contributors may be used to endorse or promote products derived
20 * from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#ifndef SYSFW_IMG_CFG_H
36#define SYSFW_IMG_CFG_H
37
38#define BOARDCFG_RM_RESASG_ENTRIES 59
39
40#endif /* SYSFW_IMG_CFG_H */