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author | Suman Anna | 2020-05-04 16:08:44 -0500 |
---|---|---|
committer | Dave Gerlach | 2020-05-05 13:15:15 -0500 |
commit | 8e928afbfb3d38dbaf31fccd3554f3d2ab3ab505 (patch) | |
tree | cb0fa4f22232f80833e20c9821dde403d3c06d45 /soc/j721e | |
parent | 6a56ee37885c7f0dcc198339a735d2670962f2c7 (diff) | |
download | k3-image-gen-8e928afbfb3d38dbaf31fccd3554f3d2ab3ab505.tar.gz k3-image-gen-8e928afbfb3d38dbaf31fccd3554f3d2ab3ab505.tar.xz k3-image-gen-8e928afbfb3d38dbaf31fccd3554f3d2ab3ab505.zip |
j721e: rm-cfg: Assign unallocated Main NavSS IR GIC_SPI lines to C71x
The Main NavSS IR has 192 output lines routed to both the GIC and CLEC
within the Compute Cluster. The first 10 and the last 4 interrupts are
reserved for System Firmware, while the remaining are split up between
the HOST_ID_A72_2, HOST_ID_A72_3 and HOST_ID_C7X_1 contexts. The Main
NavSS IR output lines [174:187] are currently not allocated to any
context, so assign these to the C71x non-secure context.
Signed-off-by: Suman Anna <s-anna@ti.com>
Diffstat (limited to 'soc/j721e')
-rw-r--r-- | soc/j721e/evm/rm-cfg.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/soc/j721e/evm/rm-cfg.c b/soc/j721e/evm/rm-cfg.c index 6c79b8256..da697d02c 100644 --- a/soc/j721e/evm/rm-cfg.c +++ b/soc/j721e/evm/rm-cfg.c | |||
@@ -1302,7 +1302,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
1302 | }, | 1302 | }, |
1303 | { | 1303 | { |
1304 | .start_resource = 142, | 1304 | .start_resource = 142, |
1305 | .num_resource = 32, | 1305 | .num_resource = 46, |
1306 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0, | 1306 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0, |
1307 | RESASG_SUBTYPE_IR_OUTPUT), | 1307 | RESASG_SUBTYPE_IR_OUTPUT), |
1308 | .host_id = HOST_ID_C7X_1, | 1308 | .host_id = HOST_ID_C7X_1, |