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author | Vignesh Raghavendra | 2019-07-19 07:51:26 -0500 |
---|---|---|
committer | Andreas Dannenberg | 2019-07-31 12:52:44 -0500 |
commit | 25db50f9c505fb5e870264930dce67a28817cde8 (patch) | |
tree | 604f14bb23d6eb76a88e5c8b42173a51e4f8fb46 /soc | |
parent | ef6f0b61dbd32ddbef62fbe7a7e70241221a0461 (diff) | |
download | k3-image-gen-25db50f9c505fb5e870264930dce67a28817cde8.tar.gz k3-image-gen-25db50f9c505fb5e870264930dce67a28817cde8.tar.xz k3-image-gen-25db50f9c505fb5e870264930dce67a28817cde8.zip |
j721e: rm-cfg: Add resources for secure context of MCU R5
ROM boots up MCU R5 in secure context and R5 SPL continues to run in the
same context. In order for R5 SPL to use DMA (e.g: with OSPI) add MCU
NAVSS resources with MCU R5 secure host ID that is used by R5 SPL.
Resources allocated are same as those allocated for non secure context.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Diffstat (limited to 'soc')
-rw-r--r-- | soc/j721e/evm/rm-cfg.c | 42 | ||||
-rw-r--r-- | soc/j721e/evm/sysfw_img_cfg.h | 2 |
2 files changed, 43 insertions, 1 deletions
diff --git a/soc/j721e/evm/rm-cfg.c b/soc/j721e/evm/rm-cfg.c index 5d69018e6..c149c56f5 100644 --- a/soc/j721e/evm/rm-cfg.c +++ b/soc/j721e/evm/rm-cfg.c | |||
@@ -1258,6 +1258,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
1258 | .num_resource = 2, | 1258 | .num_resource = 2, |
1259 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1259 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1260 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1260 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1261 | .host_id = HOST_ID_MCU_0_R5_1, | ||
1262 | }, | ||
1263 | { | ||
1264 | .start_resource = 25, | ||
1265 | .num_resource = 2, | ||
1266 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | ||
1267 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | ||
1261 | .host_id = HOST_ID_MCU_0_R5_2, | 1268 | .host_id = HOST_ID_MCU_0_R5_2, |
1262 | }, | 1269 | }, |
1263 | { | 1270 | { |
@@ -1344,6 +1351,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
1344 | .num_resource = 2, | 1351 | .num_resource = 2, |
1345 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1352 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1346 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1353 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1354 | .host_id = HOST_ID_MCU_0_R5_1, | ||
1355 | }, | ||
1356 | { | ||
1357 | .start_resource = 25, | ||
1358 | .num_resource = 2, | ||
1359 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | ||
1360 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | ||
1347 | .host_id = HOST_ID_MCU_0_R5_2, | 1361 | .host_id = HOST_ID_MCU_0_R5_2, |
1348 | }, | 1362 | }, |
1349 | { | 1363 | { |
@@ -1448,6 +1462,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
1448 | .num_resource = 2, | 1462 | .num_resource = 2, |
1449 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1463 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1450 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1464 | RESASG_SUBTYPE_RA_UDMAP_TX), |
1465 | .host_id = HOST_ID_MCU_0_R5_1, | ||
1466 | }, | ||
1467 | { | ||
1468 | .start_resource = 25, | ||
1469 | .num_resource = 2, | ||
1470 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | ||
1471 | RESASG_SUBTYPE_RA_UDMAP_TX), | ||
1451 | .host_id = HOST_ID_MCU_0_R5_2, | 1472 | .host_id = HOST_ID_MCU_0_R5_2, |
1452 | }, | 1473 | }, |
1453 | { | 1474 | { |
@@ -1534,6 +1555,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
1534 | .num_resource = 2, | 1555 | .num_resource = 2, |
1535 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1556 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1536 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1557 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1558 | .host_id = HOST_ID_MCU_0_R5_1, | ||
1559 | }, | ||
1560 | { | ||
1561 | .start_resource = 73, | ||
1562 | .num_resource = 2, | ||
1563 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | ||
1564 | RESASG_SUBTYPE_RA_UDMAP_RX), | ||
1537 | .host_id = HOST_ID_MCU_0_R5_2, | 1565 | .host_id = HOST_ID_MCU_0_R5_2, |
1538 | }, | 1566 | }, |
1539 | { | 1567 | { |
@@ -1620,6 +1648,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
1620 | .num_resource = 4, | 1648 | .num_resource = 4, |
1621 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1649 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1622 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | 1650 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), |
1651 | .host_id = HOST_ID_MCU_0_R5_1, | ||
1652 | }, | ||
1653 | { | ||
1654 | .start_resource = 68, | ||
1655 | .num_resource = 4, | ||
1656 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | ||
1657 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | ||
1623 | .host_id = HOST_ID_MCU_0_R5_2, | 1658 | .host_id = HOST_ID_MCU_0_R5_2, |
1624 | }, | 1659 | }, |
1625 | { | 1660 | { |
@@ -1685,6 +1720,13 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
1685 | .num_resource = 12, | 1720 | .num_resource = 12, |
1686 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1721 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1687 | RESASG_SUBTYPE_RA_GP), | 1722 | RESASG_SUBTYPE_RA_GP), |
1723 | .host_id = HOST_ID_MCU_0_R5_1, | ||
1724 | }, | ||
1725 | { | ||
1726 | .start_resource = 156, | ||
1727 | .num_resource = 12, | ||
1728 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | ||
1729 | RESASG_SUBTYPE_RA_GP), | ||
1688 | .host_id = HOST_ID_MCU_0_R5_2, | 1730 | .host_id = HOST_ID_MCU_0_R5_2, |
1689 | }, | 1731 | }, |
1690 | { | 1732 | { |
diff --git a/soc/j721e/evm/sysfw_img_cfg.h b/soc/j721e/evm/sysfw_img_cfg.h index b1f6afe3e..5a626875a 100644 --- a/soc/j721e/evm/sysfw_img_cfg.h +++ b/soc/j721e/evm/sysfw_img_cfg.h | |||
@@ -35,6 +35,6 @@ | |||
35 | #ifndef SYSFW_IMG_CFG_H | 35 | #ifndef SYSFW_IMG_CFG_H |
36 | #define SYSFW_IMG_CFG_H | 36 | #define SYSFW_IMG_CFG_H |
37 | 37 | ||
38 | #define BOARDCFG_RM_RESASG_ENTRIES 252 | 38 | #define BOARDCFG_RM_RESASG_ENTRIES 258 |
39 | 39 | ||
40 | #endif /* SYSFW_IMG_CFG_H */ | 40 | #endif /* SYSFW_IMG_CFG_H */ |