diff options
-rw-r--r-- | include/soc/j721e/resasg_types.h | 108 | ||||
-rw-r--r-- | soc/j721e/evm/rm-cfg.c | 2189 | ||||
-rw-r--r-- | soc/j721e/evm/sysfw_img_cfg.h | 2 |
3 files changed, 1180 insertions, 1119 deletions
diff --git a/include/soc/j721e/resasg_types.h b/include/soc/j721e/resasg_types.h index 5e5dcf637..fe2750aff 100644 --- a/include/soc/j721e/resasg_types.h +++ b/include/soc/j721e/resasg_types.h | |||
@@ -39,28 +39,25 @@ | |||
39 | * Resource assignment type shift | 39 | * Resource assignment type shift |
40 | */ | 40 | */ |
41 | #define RESASG_TYPE_SHIFT (0x0006U) | 41 | #define RESASG_TYPE_SHIFT (0x0006U) |
42 | |||
43 | /** | 42 | /** |
44 | * Resource assignment type mask | 43 | * Resource assignment type mask |
45 | */ | 44 | */ |
46 | #define RESASG_TYPE_MASK (0xFFC0U) | 45 | #define RESASG_TYPE_MASK (0xFFC0U) |
47 | |||
48 | /** | 46 | /** |
49 | * Resource assignment subtype shift | 47 | * Resource assignment subtype shift |
50 | */ | 48 | */ |
51 | #define RESASG_SUBTYPE_SHIFT (0x0000U) | 49 | #define RESASG_SUBTYPE_SHIFT (0x0000U) |
52 | |||
53 | /** | 50 | /** |
54 | * Resource assignment subtype mask | 51 | * Resource assignment subtype mask |
55 | */ | 52 | */ |
56 | #define RESASG_SUBTYPE_MASK (0x003FU) | 53 | #define RESASG_SUBTYPE_MASK (0x003FU) |
57 | |||
58 | /** | 54 | /** |
59 | * Macro to create unique resource assignment types using type and subtype | 55 | * Macro to create unique resource assignment types using type and subtype |
60 | */ | 56 | */ |
57 | |||
61 | #define RESASG_UTYPE(type, subtype) \ | 58 | #define RESASG_UTYPE(type, subtype) \ |
62 | (((type << RESASG_TYPE_SHIFT) & RESASG_TYPE_MASK) | \ | 59 | (((type << RESASG_TYPE_SHIFT) & RESASG_TYPE_MASK) |\ |
63 | ((subtype << RESASG_SUBTYPE_SHIFT) & RESASG_SUBTYPE_MASK)) | 60 | ((subtype << RESASG_SUBTYPE_SHIFT) & RESASG_SUBTYPE_MASK)) |
64 | 61 | ||
65 | /** | 62 | /** |
66 | * IA subtypes definitions | 63 | * IA subtypes definitions |
@@ -72,99 +69,10 @@ | |||
72 | #define RESASG_SUBTYPES_IA_CNT (0x0004U) | 69 | #define RESASG_SUBTYPES_IA_CNT (0x0004U) |
73 | 70 | ||
74 | /** | 71 | /** |
75 | * IRQ subtypes definitions | 72 | * IR subtypes definitions |
76 | */ | 73 | */ |
77 | #define RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP0_FROM_C66SS0_INTROUTER0 (0x0000U) | 74 | #define RESASG_SUBTYPE_IR_OUTPUT (0x0000U) |
78 | #define RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP1_FROM_C66SS0_INTROUTER0 (0x0001U) | 75 | #define RESASG_SUBTYPES_IR_CNT (0x0001U) |
79 | #define RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP2_FROM_C66SS0_INTROUTER0 (0x0002U) | ||
80 | #define RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP3_FROM_C66SS0_INTROUTER0 (0x0003U) | ||
81 | #define RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP4_FROM_C66SS0_INTROUTER0 (0x0004U) | ||
82 | #define RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP0_FROM_C66SS1_INTROUTER0 (0x0000U) | ||
83 | #define RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP1_FROM_C66SS1_INTROUTER0 (0x0001U) | ||
84 | #define RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP2_FROM_C66SS1_INTROUTER0 (0x0002U) | ||
85 | #define RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP3_FROM_C66SS1_INTROUTER0 (0x0003U) | ||
86 | #define RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP4_FROM_C66SS1_INTROUTER0 (0x0004U) | ||
87 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP0_FROM_CMPEVENT_INTRTR0 (0x0003U) | ||
88 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0001U) | ||
89 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 (0x0000U) | ||
90 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 (0x0005U) | ||
91 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP1_FROM_NAVSS0_INTR_ROUTER_0 (0x0002U) | ||
92 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_CLEC_SOC_EVENTS_IN_IRQ_GROUP2_FROM_NAVSS0_INTR_ROUTER_0 (0x0004U) | ||
93 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_CMPEVENT_INTRTR0 (0x0003U) | ||
94 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0001U) | ||
95 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 (0x0000U) | ||
96 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 (0x0005U) | ||
97 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP1_FROM_NAVSS0_INTR_ROUTER_0 (0x0002U) | ||
98 | #define RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP2_FROM_NAVSS0_INTR_ROUTER_0 (0x0004U) | ||
99 | #define RESASG_SUBTYPE_CPSW0_CPTS_HW1_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0000U) | ||
100 | #define RESASG_SUBTYPE_CPSW0_CPTS_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0001U) | ||
101 | #define RESASG_SUBTYPE_CPSW0_CPTS_HW3_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0002U) | ||
102 | #define RESASG_SUBTYPE_CPSW0_CPTS_HW4_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0003U) | ||
103 | #define RESASG_SUBTYPE_CPSW0_CPTS_HW5_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0004U) | ||
104 | #define RESASG_SUBTYPE_CPSW0_CPTS_HW6_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0005U) | ||
105 | #define RESASG_SUBTYPE_CPSW0_CPTS_HW7_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0006U) | ||
106 | #define RESASG_SUBTYPE_CPSW0_CPTS_HW8_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0007U) | ||
107 | #define RESASG_SUBTYPE_ESM0_ESM_PLS_EVENT0_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0000U) | ||
108 | #define RESASG_SUBTYPE_ESM0_ESM_PLS_EVENT1_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0001U) | ||
109 | #define RESASG_SUBTYPE_ESM0_ESM_PLS_EVENT2_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0002U) | ||
110 | #define RESASG_SUBTYPE_MCU_CPSW0_CPTS_HW3_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0000U) | ||
111 | #define RESASG_SUBTYPE_MCU_CPSW0_CPTS_HW4_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0001U) | ||
112 | #define RESASG_SUBTYPE_MCU_NAVSS0_INTAGGR_0_INTAGGR_LEVI_PEND_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 (0x0000U) | ||
113 | #define RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_MAIN2MCU_LVL_INTRTR0 (0x0002U) | ||
114 | #define RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_MAIN2MCU_PLS_INTRTR0 (0x0003U) | ||
115 | #define RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_MCU_NAVSS0_INTR_ROUTER_0 (0x0000U) | ||
116 | #define RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 (0x0004U) | ||
117 | #define RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 (0x0001U) | ||
118 | #define RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_MAIN2MCU_LVL_INTRTR0 (0x0002U) | ||
119 | #define RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_MAIN2MCU_PLS_INTRTR0 (0x0003U) | ||
120 | #define RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_MCU_NAVSS0_INTR_ROUTER_0 (0x0000U) | ||
121 | #define RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 (0x0004U) | ||
122 | #define RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 (0x0001U) | ||
123 | #define RESASG_SUBTYPE_NAVSS0_UDMASS_INTAGGR_0_INTAGGR_LEVI_PEND_IRQ_GROUP0_FROM_CMPEVENT_INTRTR0 (0x0001U) | ||
124 | #define RESASG_SUBTYPE_NAVSS0_UDMASS_INTAGGR_0_INTAGGR_LEVI_PEND_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0002U) | ||
125 | #define RESASG_SUBTYPE_NAVSS0_UDMASS_INTAGGR_0_INTAGGR_LEVI_PEND_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0000U) | ||
126 | #define RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW1_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0000U) | ||
127 | #define RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0001U) | ||
128 | #define RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW3_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0002U) | ||
129 | #define RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW4_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0003U) | ||
130 | #define RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW5_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0004U) | ||
131 | #define RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW6_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0005U) | ||
132 | #define RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW7_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0006U) | ||
133 | #define RESASG_SUBTYPE_NAVSS512L_MAIN_0_CPTS0_HW8_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0007U) | ||
134 | #define RESASG_SUBTYPE_PCIE0_PCIE_CPTS_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0000U) | ||
135 | #define RESASG_SUBTYPE_PCIE1_PCIE_CPTS_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0000U) | ||
136 | #define RESASG_SUBTYPE_PCIE2_PCIE_CPTS_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0000U) | ||
137 | #define RESASG_SUBTYPE_PCIE3_PCIE_CPTS_HW2_PUSH_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0000U) | ||
138 | #define RESASG_SUBTYPE_PRU_ICSSG0_PR1_EDC0_LATCH0_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0000U) | ||
139 | #define RESASG_SUBTYPE_PRU_ICSSG0_PR1_EDC0_LATCH1_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0001U) | ||
140 | #define RESASG_SUBTYPE_PRU_ICSSG0_PR1_EDC1_LATCH0_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0002U) | ||
141 | #define RESASG_SUBTYPE_PRU_ICSSG0_PR1_EDC1_LATCH1_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0003U) | ||
142 | #define RESASG_SUBTYPE_PRU_ICSSG0_PR1_IEP0_CAP_INTR_REQ_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0004U) | ||
143 | #define RESASG_SUBTYPE_PRU_ICSSG0_PR1_IEP1_CAP_INTR_REQ_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0005U) | ||
144 | #define RESASG_SUBTYPE_PRU_ICSSG0_PR1_SLV_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 (0x0006U) | ||
145 | #define RESASG_SUBTYPE_PRU_ICSSG1_PR1_EDC0_LATCH0_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0000U) | ||
146 | #define RESASG_SUBTYPE_PRU_ICSSG1_PR1_EDC0_LATCH1_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0001U) | ||
147 | #define RESASG_SUBTYPE_PRU_ICSSG1_PR1_EDC1_LATCH0_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0002U) | ||
148 | #define RESASG_SUBTYPE_PRU_ICSSG1_PR1_EDC1_LATCH1_IN_IRQ_GROUP0_FROM_TIMESYNC_INTRTR0 (0x0003U) | ||
149 | #define RESASG_SUBTYPE_PRU_ICSSG1_PR1_IEP0_CAP_INTR_REQ_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0004U) | ||
150 | #define RESASG_SUBTYPE_PRU_ICSSG1_PR1_IEP1_CAP_INTR_REQ_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0005U) | ||
151 | #define RESASG_SUBTYPE_PRU_ICSSG1_PR1_SLV_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 (0x0006U) | ||
152 | #define RESASG_SUBTYPE_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0000U) | ||
153 | #define RESASG_SUBTYPE_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 (0x0001U) | ||
154 | #define RESASG_SUBTYPE_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_R5FSS0_INTROUTER0 (0x0002U) | ||
155 | #define RESASG_SUBTYPE_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0000U) | ||
156 | #define RESASG_SUBTYPE_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 (0x0001U) | ||
157 | #define RESASG_SUBTYPE_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_R5FSS0_INTROUTER0 (0x0002U) | ||
158 | #define RESASG_SUBTYPE_R5FSS1_CORE0_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0000U) | ||
159 | #define RESASG_SUBTYPE_R5FSS1_CORE0_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 (0x0001U) | ||
160 | #define RESASG_SUBTYPE_R5FSS1_CORE0_INTR_IRQ_GROUP0_FROM_R5FSS1_INTROUTER0 (0x0002U) | ||
161 | #define RESASG_SUBTYPE_R5FSS1_CORE1_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0 (0x0000U) | ||
162 | #define RESASG_SUBTYPE_R5FSS1_CORE1_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0 (0x0001U) | ||
163 | #define RESASG_SUBTYPE_R5FSS1_CORE1_INTR_IRQ_GROUP0_FROM_R5FSS1_INTROUTER0 (0x0002U) | ||
164 | #define RESASG_SUBTYPE_WKUP_ESM0_ESM_PLS_EVENT0_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 (0x0000U) | ||
165 | #define RESASG_SUBTYPE_WKUP_ESM0_ESM_PLS_EVENT1_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 (0x0001U) | ||
166 | #define RESASG_SUBTYPE_WKUP_ESM0_ESM_PLS_EVENT2_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0 (0x0002U) | ||
167 | #define RESASG_SUBTYPES_IRQ_CNT (0x005AU) | ||
168 | 76 | ||
169 | /** | 77 | /** |
170 | * Proxy subtypes definitions | 78 | * Proxy subtypes definitions |
@@ -206,8 +114,8 @@ | |||
206 | 114 | ||
207 | 115 | ||
208 | /** | 116 | /** |
209 | * Total number of unique resource types for J721E | 117 | * Total number of unique resource types for SoC |
210 | */ | 118 | */ |
211 | #define RESASG_UTYPE_CNT 138U | 119 | #define RESASG_UTYPE_CNT 60U |
212 | 120 | ||
213 | #endif /* RESASG_TYPES_H */ | 121 | #endif /* RESASG_TYPES_H */ |
diff --git a/soc/j721e/evm/rm-cfg.c b/soc/j721e/evm/rm-cfg.c index b028b5a44..4767ebfab 100644 --- a/soc/j721e/evm/rm-cfg.c +++ b/soc/j721e/evm/rm-cfg.c | |||
@@ -72,603 +72,727 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
72 | /* This is actually part of .resasg */ | 72 | /* This is actually part of .resasg */ |
73 | .resasg_entries = { | 73 | .resasg_entries = { |
74 | 74 | ||
75 | /* GIC/CLEC slot assignment for NAVSS INTR */ | 75 | /* C6x_0 IR */ |
76 | { | 76 | { |
77 | .start_resource = 392, | 77 | .start_resource = 4, |
78 | .num_resource = 93, | ||
79 | .type = RESASG_UTYPE (J721E_DEV_C66SS0_INTROUTER0, | ||
80 | RESASG_SUBTYPE_IR_OUTPUT), | ||
81 | .host_id = HOST_ID_C6X_0_1, | ||
82 | }, | ||
83 | |||
84 | /* C6x_1 IR */ | ||
85 | { | ||
86 | .start_resource = 4, | ||
87 | .num_resource = 93, | ||
88 | .type = RESASG_UTYPE (J721E_DEV_C66SS1_INTROUTER0, | ||
89 | RESASG_SUBTYPE_IR_OUTPUT), | ||
90 | .host_id = HOST_ID_C6X_1_1, | ||
91 | }, | ||
92 | |||
93 | /* */ | ||
94 | { | ||
95 | .start_resource = 0, | ||
78 | .num_resource = 32, | 96 | .num_resource = 32, |
79 | .type = RESASG_UTYPE (J721E_DEV_COMPUTE_CLUSTER0_GIC500SS, | 97 | .type = RESASG_UTYPE (J721E_DEV_CMPEVENT_INTRTR0, |
80 | RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0), | 98 | RESASG_SUBTYPE_IR_OUTPUT), |
81 | .host_id = HOST_ID_A72_2, | 99 | .host_id = HOST_ID_ALL, |
82 | }, | 100 | }, |
101 | |||
102 | /* Main 2 MCU level IRQ IR */ | ||
83 | { | 103 | { |
84 | .start_resource = 424, | 104 | .start_resource = 0, |
85 | .num_resource = 24, | 105 | .num_resource = 32, |
86 | .type = RESASG_UTYPE (J721E_DEV_COMPUTE_CLUSTER0_GIC500SS, | 106 | .type = RESASG_UTYPE (J721E_DEV_MAIN2MCU_LVL_INTRTR0, |
87 | RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0), | 107 | RESASG_SUBTYPE_IR_OUTPUT), |
88 | .host_id = HOST_ID_A72_3, | 108 | .host_id = HOST_ID_MCU_0_R5_0, |
89 | }, | 109 | }, |
90 | { | 110 | { |
91 | .start_resource = 960, | 111 | .start_resource = 0, |
92 | .num_resource = 16, | 112 | .num_resource = 32, |
93 | .type = RESASG_UTYPE (J721E_DEV_COMPUTE_CLUSTER0_GIC500SS, | 113 | .type = RESASG_UTYPE (J721E_DEV_MAIN2MCU_LVL_INTRTR0, |
94 | RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0), | 114 | RESASG_SUBTYPE_IR_OUTPUT), |
95 | .host_id = HOST_ID_A72_2, | 115 | .host_id = HOST_ID_MCU_0_R5_1, |
96 | }, | 116 | }, |
97 | { | 117 | { |
98 | .start_resource = 74, | 118 | .start_resource = 32, |
99 | .num_resource = 54, | 119 | .num_resource = 32, |
100 | .type = RESASG_UTYPE (J721E_DEV_COMPUTE_CLUSTER0_GIC500SS, | 120 | .type = RESASG_UTYPE (J721E_DEV_MAIN2MCU_LVL_INTRTR0, |
101 | RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0), | 121 | RESASG_SUBTYPE_IR_OUTPUT), |
102 | .host_id = HOST_ID_A72_2, | 122 | .host_id = HOST_ID_MCU_0_R5_2, |
103 | }, | 123 | }, |
124 | |||
125 | /* Main 2 MCU Pulse IRQ IR */ | ||
104 | { | 126 | { |
105 | .start_resource = 448, | 127 | .start_resource = 0, |
106 | .num_resource = 64, | 128 | .num_resource = 24, |
107 | .type = RESASG_UTYPE (J721E_DEV_COMPUTE_CLUSTER0_GIC500SS, | 129 | .type = RESASG_UTYPE (J721E_DEV_MAIN2MCU_PLS_INTRTR0, |
108 | RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP1_FROM_NAVSS0_INTR_ROUTER_0), | 130 | RESASG_SUBTYPE_IR_OUTPUT), |
109 | .host_id = HOST_ID_A72_2, | 131 | .host_id = HOST_ID_MCU_0_R5_0, |
110 | }, | 132 | }, |
111 | { | 133 | { |
112 | .start_resource = 672, | 134 | .start_resource = 0, |
113 | .num_resource = 44, | 135 | .num_resource = 24, |
114 | .type = RESASG_UTYPE (J721E_DEV_COMPUTE_CLUSTER0_GIC500SS, | 136 | .type = RESASG_UTYPE (J721E_DEV_MAIN2MCU_PLS_INTRTR0, |
115 | RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP2_FROM_NAVSS0_INTR_ROUTER_0), | 137 | RESASG_SUBTYPE_IR_OUTPUT), |
116 | .host_id = HOST_ID_A72_3, | 138 | .host_id = HOST_ID_MCU_0_R5_1, |
117 | }, | 139 | }, |
118 | { | 140 | { |
119 | .start_resource = 716, | 141 | .start_resource = 24, |
120 | .num_resource = 16, | 142 | .num_resource = 24, |
121 | .type = RESASG_UTYPE (J721E_DEV_COMPUTE_CLUSTER0_CLEC, | 143 | .type = RESASG_UTYPE (J721E_DEV_MAIN2MCU_PLS_INTRTR0, |
122 | RESASG_SUBTYPE_COMPUTE_CLUSTER0_GIC500SS_SPI_IRQ_GROUP2_FROM_NAVSS0_INTR_ROUTER_0), | 144 | RESASG_SUBTYPE_IR_OUTPUT), |
123 | .host_id = HOST_ID_C7X_1, | 145 | .host_id = HOST_ID_MCU_0_R5_2, |
124 | }, | 146 | }, |
125 | 147 | ||
126 | /* MCU_0_R5_0 CPU INTR */ | 148 | /* Main GPIO IR for Compute cluster */ |
127 | { | 149 | { |
128 | .start_resource = 68U, | 150 | .start_resource = 16, |
129 | .num_resource = 28U, | 151 | .num_resource = 4, |
130 | .type = RESASG_UTYPE(J721E_DEV_MCU_R5FSS0_CORE0, | 152 | .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0, |
131 | RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_MCU_NAVSS0_INTR_ROUTER_0), | 153 | RESASG_SUBTYPE_IR_OUTPUT), |
132 | .host_id = HOST_ID_MCU_0_R5_0, | 154 | .host_id = HOST_ID_MAIN_1_R5_0, |
133 | }, | 155 | }, |
134 | { | 156 | { |
135 | .start_resource = 124U, | 157 | .start_resource = 20, |
136 | .num_resource = 16U, | 158 | .num_resource = 4, |
137 | .type = RESASG_UTYPE(J721E_DEV_MCU_R5FSS0_CORE0, | 159 | .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0, |
138 | RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0), | 160 | RESASG_SUBTYPE_IR_OUTPUT), |
139 | .host_id = HOST_ID_MCU_0_R5_0, | 161 | .host_id = HOST_ID_MAIN_1_R5_2, |
140 | }, | 162 | }, |
141 | { | 163 | { |
142 | .start_resource = 160U, | 164 | .start_resource = 24, |
143 | .num_resource = 64U, | 165 | .num_resource = 4, |
144 | .type = RESASG_UTYPE(J721E_DEV_MCU_R5FSS0_CORE0, | 166 | .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0, |
145 | RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_MAIN2MCU_LVL_INTRTR0), | 167 | RESASG_SUBTYPE_IR_OUTPUT), |
146 | .host_id = HOST_ID_MCU_0_R5_0, | 168 | .host_id = HOST_ID_MAIN_0_R5_0, |
147 | }, | 169 | }, |
148 | { | 170 | { |
149 | .start_resource = 224U, | 171 | .start_resource = 28, |
150 | .num_resource = 48U, | 172 | .num_resource = 4, |
151 | .type = RESASG_UTYPE(J721E_DEV_MCU_R5FSS0_CORE0, | 173 | .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0, |
152 | RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_MAIN2MCU_PLS_INTRTR0), | 174 | RESASG_SUBTYPE_IR_OUTPUT), |
153 | .host_id = HOST_ID_MCU_0_R5_0, | 175 | .host_id = HOST_ID_MAIN_0_R5_2, |
154 | }, | 176 | }, |
155 | { | 177 | { |
156 | .start_resource = 376U, | 178 | .start_resource = 32, |
157 | .num_resource = 4U, | 179 | .num_resource = 4, |
158 | .type = RESASG_UTYPE(J721E_DEV_MCU_R5FSS0_CORE0, | 180 | .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0, |
159 | RESASG_SUBTYPE_MCU_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0), | 181 | RESASG_SUBTYPE_IR_OUTPUT), |
160 | .host_id = HOST_ID_MCU_0_R5_0, | 182 | .host_id = HOST_ID_C6X_0_1, |
161 | }, | 183 | }, |
162 | |||
163 | /* MCU_0_R5_2 CPU INTR */ | ||
164 | { | 184 | { |
165 | .start_resource = 68U, | 185 | .start_resource = 36, |
166 | .num_resource = 28U, | 186 | .num_resource = 4, |
167 | .type = RESASG_UTYPE(J721E_DEV_MCU_R5FSS0_CORE1, | 187 | .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0, |
168 | RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_MCU_NAVSS0_INTR_ROUTER_0), | 188 | RESASG_SUBTYPE_IR_OUTPUT), |
169 | .host_id = HOST_ID_MCU_0_R5_2, | 189 | .host_id = HOST_ID_C6X_1_1, |
170 | }, | 190 | }, |
171 | { | 191 | { |
172 | .start_resource = 124U, | 192 | .start_resource = 40, |
173 | .num_resource = 16U, | 193 | .num_resource = 16, |
174 | .type = RESASG_UTYPE(J721E_DEV_MCU_R5FSS0_CORE1, | 194 | .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0, |
175 | RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_WKUP_GPIOMUX_INTRTR0), | 195 | RESASG_SUBTYPE_IR_OUTPUT), |
176 | .host_id = HOST_ID_MCU_0_R5_2, | 196 | .host_id = HOST_ID_A72_2, |
177 | }, | 197 | }, |
178 | { | 198 | { |
179 | .start_resource = 160U, | 199 | .start_resource = 56, |
180 | .num_resource = 64U, | 200 | .num_resource = 4, |
181 | .type = RESASG_UTYPE(J721E_DEV_MCU_R5FSS0_CORE1, | 201 | .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0, |
182 | RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_MAIN2MCU_LVL_INTRTR0), | 202 | RESASG_SUBTYPE_IR_OUTPUT), |
183 | .host_id = HOST_ID_MCU_0_R5_2, | 203 | .host_id = HOST_ID_A72_3, |
184 | }, | 204 | }, |
185 | { | 205 | { |
186 | .start_resource = 224U, | 206 | .start_resource = 60, |
187 | .num_resource = 48U, | 207 | .num_resource = 4, |
188 | .type = RESASG_UTYPE(J721E_DEV_MCU_R5FSS0_CORE1, | 208 | .type = RESASG_UTYPE (J721E_DEV_GPIOMUX_INTRTR0, |
189 | RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_MAIN2MCU_PLS_INTRTR0), | 209 | RESASG_SUBTYPE_IR_OUTPUT), |
190 | .host_id = HOST_ID_MCU_0_R5_2, | 210 | .host_id = HOST_ID_C7X_1, |
191 | }, | 211 | }, |
212 | |||
213 | /* Main R5FSS0 IR */ | ||
192 | { | 214 | { |
193 | .start_resource = 380U, | 215 | .start_resource = 0, |
194 | .num_resource = 4U, | 216 | .num_resource = 128, |
195 | .type = RESASG_UTYPE(J721E_DEV_MCU_R5FSS0_CORE1, | 217 | .type = RESASG_UTYPE (J721E_DEV_R5FSS0_INTROUTER0, |
196 | RESASG_SUBTYPE_MCU_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0), | 218 | RESASG_SUBTYPE_IR_OUTPUT), |
197 | .host_id = HOST_ID_MCU_0_R5_2, | 219 | .host_id = HOST_ID_MAIN_0_R5_0, |
220 | }, | ||
221 | { | ||
222 | .start_resource = 128, | ||
223 | .num_resource = 128, | ||
224 | .type = RESASG_UTYPE (J721E_DEV_R5FSS0_INTROUTER0, | ||
225 | RESASG_SUBTYPE_IR_OUTPUT), | ||
226 | .host_id = HOST_ID_MAIN_0_R5_2, | ||
198 | }, | 227 | }, |
199 | 228 | ||
200 | /* MAIN_0_R5_0 CPU INTR */ | 229 | /* Main R5FSS1 IR */ |
201 | { | 230 | { |
202 | .start_resource = 176U, | 231 | .start_resource = 0, |
203 | .num_resource = 16U, | 232 | .num_resource = 128, |
204 | .type = RESASG_UTYPE(J721E_DEV_R5FSS0_CORE0, | 233 | .type = RESASG_UTYPE (J721E_DEV_R5FSS1_INTROUTER0, |
205 | RESASG_SUBTYPE_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0), | 234 | RESASG_SUBTYPE_IR_OUTPUT), |
206 | .host_id = HOST_ID_MAIN_0_R5_0, | 235 | .host_id = HOST_ID_MAIN_1_R5_0, |
207 | }, | 236 | }, |
208 | { | 237 | { |
209 | .start_resource = 228U, | 238 | .start_resource = 128, |
210 | .num_resource = 28U, | 239 | .num_resource = 128, |
211 | .type = RESASG_UTYPE(J721E_DEV_R5FSS0_CORE0, | 240 | .type = RESASG_UTYPE (J721E_DEV_R5FSS1_INTROUTER0, |
212 | RESASG_SUBTYPE_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0), | 241 | RESASG_SUBTYPE_IR_OUTPUT), |
213 | .host_id = HOST_ID_MAIN_0_R5_0, | 242 | .host_id = HOST_ID_MAIN_1_R5_2, |
214 | }, | 243 | }, |
244 | |||
245 | /* */ | ||
215 | { | 246 | { |
216 | .start_resource = 256U, | 247 | .start_resource = 0, |
217 | .num_resource = 256U, | 248 | .num_resource = 48, |
218 | .type = RESASG_UTYPE(J721E_DEV_R5FSS0_CORE0, | 249 | .type = RESASG_UTYPE (J721E_DEV_TIMESYNC_INTRTR0, |
219 | RESASG_SUBTYPE_R5FSS0_CORE0_INTR_IRQ_GROUP0_FROM_R5FSS0_INTROUTER0), | 250 | RESASG_SUBTYPE_IR_OUTPUT), |
220 | .host_id = HOST_ID_MAIN_0_R5_0, | 251 | .host_id = HOST_ID_ALL, |
221 | }, | 252 | }, |
222 | 253 | ||
223 | /* MAIN_0_R5_2 CPU INTR */ | 254 | /* WKUP GPIO IR for others */ |
224 | { | 255 | { |
225 | .start_resource = 176U, | 256 | .start_resource = 0, |
226 | .num_resource = 16U, | 257 | .num_resource = 8, |
227 | .type = RESASG_UTYPE(J721E_DEV_R5FSS0_CORE1, | 258 | .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0, |
228 | RESASG_SUBTYPE_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0), | 259 | RESASG_SUBTYPE_IR_OUTPUT), |
229 | .host_id = HOST_ID_MAIN_0_R5_2, | 260 | .host_id = HOST_ID_MCU_0_R5_0, |
230 | }, | 261 | }, |
231 | { | 262 | { |
232 | .start_resource = 228U, | 263 | .start_resource = 0, |
233 | .num_resource = 28U, | 264 | .num_resource = 8, |
234 | .type = RESASG_UTYPE(J721E_DEV_R5FSS0_CORE1, | 265 | .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0, |
235 | RESASG_SUBTYPE_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0), | 266 | RESASG_SUBTYPE_IR_OUTPUT), |
236 | .host_id = HOST_ID_MAIN_0_R5_2, | 267 | .host_id = HOST_ID_MCU_0_R5_1, |
237 | }, | 268 | }, |
238 | { | 269 | { |
239 | .start_resource = 256U, | 270 | .start_resource = 8, |
240 | .num_resource = 256U, | 271 | .num_resource = 8, |
241 | .type = RESASG_UTYPE(J721E_DEV_R5FSS0_CORE1, | 272 | .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0, |
242 | RESASG_SUBTYPE_R5FSS0_CORE1_INTR_IRQ_GROUP0_FROM_R5FSS0_INTROUTER0), | 273 | RESASG_SUBTYPE_IR_OUTPUT), |
243 | .host_id = HOST_ID_MAIN_0_R5_2, | 274 | .host_id = HOST_ID_MCU_0_R5_2, |
244 | }, | 275 | }, |
245 | |||
246 | /* MAIN_1_R5_0 CPU INTR */ | ||
247 | { | 276 | { |
248 | .start_resource = 176U, | 277 | .start_resource = 16, |
249 | .num_resource = 16U, | 278 | .num_resource = 8, |
250 | .type = RESASG_UTYPE(J721E_DEV_R5FSS1_CORE0, | 279 | .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0, |
251 | RESASG_SUBTYPE_R5FSS1_CORE0_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0), | 280 | RESASG_SUBTYPE_IR_OUTPUT), |
252 | .host_id = HOST_ID_MAIN_1_R5_0, | 281 | .host_id = HOST_ID_A72_2, |
253 | }, | 282 | }, |
254 | { | 283 | { |
255 | .start_resource = 228U, | 284 | .start_resource = 24, |
256 | .num_resource = 28U, | 285 | .num_resource = 4, |
257 | .type = RESASG_UTYPE(J721E_DEV_R5FSS1_CORE0, | 286 | .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0, |
258 | RESASG_SUBTYPE_R5FSS1_CORE0_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0), | 287 | RESASG_SUBTYPE_IR_OUTPUT), |
259 | .host_id = HOST_ID_MAIN_1_R5_0, | 288 | .host_id = HOST_ID_A72_3, |
260 | }, | 289 | }, |
261 | { | 290 | { |
262 | .start_resource = 256U, | 291 | .start_resource = 28, |
263 | .num_resource = 256U, | 292 | .num_resource = 4, |
264 | .type = RESASG_UTYPE(J721E_DEV_R5FSS1_CORE0, | 293 | .type = RESASG_UTYPE (J721E_DEV_WKUP_GPIOMUX_INTRTR0, |
265 | RESASG_SUBTYPE_R5FSS1_CORE0_INTR_IRQ_GROUP0_FROM_R5FSS1_INTROUTER0), | 294 | RESASG_SUBTYPE_IR_OUTPUT), |
266 | .host_id = HOST_ID_MAIN_1_R5_0, | 295 | .host_id = HOST_ID_ALL, |
267 | }, | 296 | }, |
268 | 297 | ||
269 | /* MAIN_1_R5_2 CPU INTR */ | 298 | /* Main Nav IA VINT */ |
270 | { | 299 | { |
271 | .start_resource = 176U, | 300 | .start_resource = 38, |
272 | .num_resource = 16U, | 301 | .num_resource = 86, |
273 | .type = RESASG_UTYPE(J721E_DEV_R5FSS1_CORE1, | 302 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
274 | RESASG_SUBTYPE_R5FSS1_CORE1_INTR_IRQ_GROUP0_FROM_GPIOMUX_INTRTR0), | 303 | RESASG_SUBTYPE_IA_VINT), |
275 | .host_id = HOST_ID_MAIN_1_R5_2, | 304 | .host_id = HOST_ID_A72_2, |
276 | }, | 305 | }, |
277 | { | 306 | { |
278 | .start_resource = 228U, | 307 | .start_resource = 124, |
279 | .num_resource = 28U, | 308 | .num_resource = 32, |
280 | .type = RESASG_UTYPE(J721E_DEV_R5FSS1_CORE1, | 309 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
281 | RESASG_SUBTYPE_R5FSS1_CORE1_INTR_IRQ_GROUP0_FROM_NAVSS0_INTR_ROUTER_0), | 310 | RESASG_SUBTYPE_IA_VINT), |
282 | .host_id = HOST_ID_MAIN_1_R5_2, | 311 | .host_id = HOST_ID_A72_3, |
283 | }, | 312 | }, |
284 | { | 313 | { |
285 | .start_resource = 256U, | 314 | .start_resource = 156, |
286 | .num_resource = 256U, | 315 | .num_resource = 12, |
287 | .type = RESASG_UTYPE(J721E_DEV_R5FSS1_CORE1, | 316 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
288 | RESASG_SUBTYPE_R5FSS1_CORE1_INTR_IRQ_GROUP0_FROM_R5FSS1_INTROUTER0), | 317 | RESASG_SUBTYPE_IA_VINT), |
318 | .host_id = HOST_ID_MAIN_1_R5_0, | ||
319 | }, | ||
320 | { | ||
321 | .start_resource = 168, | ||
322 | .num_resource = 12, | ||
323 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | ||
324 | RESASG_SUBTYPE_IA_VINT), | ||
289 | .host_id = HOST_ID_MAIN_1_R5_2, | 325 | .host_id = HOST_ID_MAIN_1_R5_2, |
290 | }, | 326 | }, |
291 | |||
292 | /* C6X_0_1 CPU INTR */ | ||
293 | { | 327 | { |
294 | .start_resource = 8U, | 328 | .start_resource = 180, |
295 | .num_resource = 1U, | 329 | .num_resource = 12, |
296 | .type = RESASG_UTYPE(J721E_DEV_C66SS0_CORE0, | 330 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
297 | RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP0_FROM_C66SS0_INTROUTER0), | 331 | RESASG_SUBTYPE_IA_VINT), |
298 | .host_id = HOST_ID_C6X_0_1, | 332 | .host_id = HOST_ID_C7X_1, |
299 | }, | 333 | }, |
300 | { | 334 | { |
301 | .start_resource = 15U, | 335 | .start_resource = 192, |
302 | .num_resource = 81U, | 336 | .num_resource = 12, |
303 | .type = RESASG_UTYPE(J721E_DEV_C66SS0_CORE0, | 337 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
304 | RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP1_FROM_C66SS0_INTROUTER0), | 338 | RESASG_SUBTYPE_IA_VINT), |
305 | .host_id = HOST_ID_C6X_0_1, | 339 | .host_id = HOST_ID_C6X_0_1, |
306 | }, | 340 | }, |
307 | { | 341 | { |
308 | .start_resource = 99U, | 342 | .start_resource = 204, |
309 | .num_resource = 1U, | 343 | .num_resource = 12, |
310 | .type = RESASG_UTYPE(J721E_DEV_C66SS0_CORE0, | 344 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
311 | RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP2_FROM_C66SS0_INTROUTER0), | 345 | RESASG_SUBTYPE_IA_VINT), |
312 | .host_id = HOST_ID_C6X_0_1, | 346 | .host_id = HOST_ID_C6X_1_1, |
313 | }, | 347 | }, |
314 | { | 348 | { |
315 | .start_resource = 102U, | 349 | .start_resource = 216, |
316 | .num_resource = 8U, | 350 | .num_resource = 8, |
317 | .type = RESASG_UTYPE(J721E_DEV_C66SS0_CORE0, | 351 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
318 | RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP3_FROM_C66SS0_INTROUTER0), | 352 | RESASG_SUBTYPE_IA_VINT), |
319 | .host_id = HOST_ID_C6X_0_1, | 353 | .host_id = HOST_ID_MAIN_0_R5_0, |
320 | }, | 354 | }, |
321 | { | 355 | { |
322 | .start_resource = 114U, | 356 | .start_resource = 224, |
323 | .num_resource = 2U, | 357 | .num_resource = 24, |
324 | .type = RESASG_UTYPE(J721E_DEV_C66SS0_CORE0, | 358 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
325 | RESASG_SUBTYPE_C66SS0_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP4_FROM_C66SS0_INTROUTER0), | 359 | RESASG_SUBTYPE_IA_VINT), |
326 | .host_id = HOST_ID_C6X_0_1, | 360 | .host_id = HOST_ID_MAIN_0_R5_2, |
361 | }, | ||
362 | { | ||
363 | .start_resource = 248, | ||
364 | .num_resource = 8, | ||
365 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | ||
366 | RESASG_SUBTYPE_IA_VINT), | ||
367 | .host_id = HOST_ID_ALL, | ||
327 | }, | 368 | }, |
328 | 369 | ||
329 | /* C6X_1_1 CPU INTR */ | 370 | /* Main Nav IA SEVT */ |
330 | { | 371 | { |
331 | .start_resource = 8U, | 372 | .start_resource = 38, |
332 | .num_resource = 1U, | 373 | .num_resource = 1024, |
333 | .type = RESASG_UTYPE(J721E_DEV_C66SS1_CORE0, | 374 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
334 | RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP0_FROM_C66SS1_INTROUTER0), | 375 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
335 | .host_id = HOST_ID_C6X_1_1, | 376 | .host_id = HOST_ID_A72_2, |
336 | }, | 377 | }, |
337 | { | 378 | { |
338 | .start_resource = 15U, | 379 | .start_resource = 1062, |
339 | .num_resource = 81U, | 380 | .num_resource = 512, |
340 | .type = RESASG_UTYPE(J721E_DEV_C66SS1_CORE0, | 381 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
341 | RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP1_FROM_C66SS1_INTROUTER0), | 382 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
342 | .host_id = HOST_ID_C6X_1_1, | 383 | .host_id = HOST_ID_A72_3, |
343 | }, | 384 | }, |
344 | { | 385 | { |
345 | .start_resource = 99U, | 386 | .start_resource = 1574, |
346 | .num_resource = 1U, | 387 | .num_resource = 32, |
347 | .type = RESASG_UTYPE(J721E_DEV_C66SS1_CORE0, | 388 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
348 | RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP2_FROM_C66SS1_INTROUTER0), | 389 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
349 | .host_id = HOST_ID_C6X_1_1, | 390 | .host_id = HOST_ID_MCU_0_R5_0, |
350 | }, | 391 | }, |
351 | { | 392 | { |
352 | .start_resource = 102U, | 393 | .start_resource = 1574, |
353 | .num_resource = 8U, | 394 | .num_resource = 32, |
354 | .type = RESASG_UTYPE(J721E_DEV_C66SS1_CORE0, | 395 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
355 | RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP3_FROM_C66SS1_INTROUTER0), | 396 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
356 | .host_id = HOST_ID_C6X_1_1, | 397 | .host_id = HOST_ID_MCU_0_R5_1, |
357 | }, | 398 | }, |
358 | { | 399 | { |
359 | .start_resource = 114U, | 400 | .start_resource = 1606, |
360 | .num_resource = 2U, | 401 | .num_resource = 32, |
361 | .type = RESASG_UTYPE(J721E_DEV_C66SS1_CORE0, | 402 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
362 | RESASG_SUBTYPE_C66SS1_CORE0_C66_EVENT_IN_SYNC_IRQ_GROUP4_FROM_C66SS1_INTROUTER0), | 403 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
363 | .host_id = HOST_ID_C6X_1_1, | 404 | .host_id = HOST_ID_MCU_0_R5_2, |
364 | }, | 405 | }, |
365 | |||
366 | /* AUTO GENERATED ENTRIES BELOW */ | ||
367 | |||
368 | /* Main Nav UHC TX Channel */ | ||
369 | { | 406 | { |
370 | .start_resource = 0, | 407 | .start_resource = 1638, |
371 | .num_resource = 2, | 408 | .num_resource = 256, |
372 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 409 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
373 | RESASG_SUBTYPE_UDMAP_TX_UHCHAN), | 410 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
374 | .host_id = HOST_ID_A72_2, | 411 | .host_id = HOST_ID_MAIN_1_R5_0, |
375 | }, | 412 | }, |
376 | { | 413 | { |
377 | .start_resource = 2, | 414 | .start_resource = 1894, |
378 | .num_resource = 2, | 415 | .num_resource = 256, |
379 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 416 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
380 | RESASG_SUBTYPE_UDMAP_TX_UHCHAN), | 417 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
381 | .host_id = HOST_ID_MAIN_0_R5_2, | 418 | .host_id = HOST_ID_MAIN_1_R5_2, |
382 | }, | 419 | }, |
383 | |||
384 | /* Main Nav UHC RX Channel */ | ||
385 | { | 420 | { |
386 | .start_resource = 0, | 421 | .start_resource = 2150, |
387 | .num_resource = 2, | 422 | .num_resource = 256, |
388 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 423 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
389 | RESASG_SUBTYPE_UDMAP_RX_UHCHAN), | 424 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
390 | .host_id = HOST_ID_A72_2, | 425 | .host_id = HOST_ID_C7X_1, |
391 | }, | 426 | }, |
392 | { | 427 | { |
393 | .start_resource = 2, | 428 | .start_resource = 2406, |
394 | .num_resource = 2, | 429 | .num_resource = 256, |
395 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 430 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
396 | RESASG_SUBTYPE_UDMAP_RX_UHCHAN), | 431 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
397 | .host_id = HOST_ID_MAIN_0_R5_2, | 432 | .host_id = HOST_ID_C6X_0_1, |
398 | }, | 433 | }, |
399 | |||
400 | /* Main Nav HC TX Channel */ | ||
401 | { | 434 | { |
402 | .start_resource = 4, | 435 | .start_resource = 2662, |
403 | .num_resource = 4, | 436 | .num_resource = 256, |
404 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 437 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
405 | RESASG_SUBTYPE_UDMAP_TX_HCHAN), | 438 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
406 | .host_id = HOST_ID_A72_2, | 439 | .host_id = HOST_ID_C6X_1_1, |
407 | }, | 440 | }, |
408 | { | 441 | { |
409 | .start_resource = 8, | 442 | .start_resource = 2918, |
410 | .num_resource = 2, | 443 | .num_resource = 256, |
411 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 444 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
412 | RESASG_SUBTYPE_UDMAP_TX_HCHAN), | 445 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
413 | .host_id = HOST_ID_MAIN_0_R5_0, | 446 | .host_id = HOST_ID_MAIN_0_R5_0, |
414 | }, | 447 | }, |
415 | { | 448 | { |
416 | .start_resource = 10, | 449 | .start_resource = 3174, |
417 | .num_resource = 4, | 450 | .num_resource = 512, |
418 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 451 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
419 | RESASG_SUBTYPE_UDMAP_TX_HCHAN), | 452 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
420 | .host_id = HOST_ID_MAIN_0_R5_2, | 453 | .host_id = HOST_ID_MAIN_0_R5_2, |
421 | }, | 454 | }, |
422 | { | 455 | { |
423 | .start_resource = 14, | 456 | .start_resource = 3686, |
424 | .num_resource = 2, | 457 | .num_resource = 922, |
425 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 458 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, |
426 | RESASG_SUBTYPE_UDMAP_TX_HCHAN), | 459 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
427 | .host_id = HOST_ID_ALL, | 460 | .host_id = HOST_ID_ALL, |
428 | }, | 461 | }, |
429 | 462 | ||
430 | /* Main Nav HC RX Channel */ | 463 | /* Main Nav Free Ring */ |
431 | { | 464 | { |
432 | .start_resource = 4, | 465 | .start_resource = 440, |
433 | .num_resource = 4, | 466 | .num_resource = 150, |
434 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 467 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
435 | RESASG_SUBTYPE_UDMAP_RX_HCHAN), | 468 | RESASG_SUBTYPE_RA_GP), |
436 | .host_id = HOST_ID_A72_2, | 469 | .host_id = HOST_ID_A72_2, |
437 | }, | 470 | }, |
438 | { | 471 | { |
439 | .start_resource = 8, | 472 | .start_resource = 590, |
440 | .num_resource = 2, | 473 | .num_resource = 40, |
441 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 474 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
442 | RESASG_SUBTYPE_UDMAP_RX_HCHAN), | 475 | RESASG_SUBTYPE_RA_GP), |
476 | .host_id = HOST_ID_A72_3, | ||
477 | }, | ||
478 | { | ||
479 | .start_resource = 630, | ||
480 | .num_resource = 6, | ||
481 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
482 | RESASG_SUBTYPE_RA_GP), | ||
483 | .host_id = HOST_ID_MCU_0_R5_0, | ||
484 | }, | ||
485 | { | ||
486 | .start_resource = 630, | ||
487 | .num_resource = 6, | ||
488 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
489 | RESASG_SUBTYPE_RA_GP), | ||
490 | .host_id = HOST_ID_MCU_0_R5_1, | ||
491 | }, | ||
492 | { | ||
493 | .start_resource = 636, | ||
494 | .num_resource = 6, | ||
495 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
496 | RESASG_SUBTYPE_RA_GP), | ||
497 | .host_id = HOST_ID_MCU_0_R5_2, | ||
498 | }, | ||
499 | { | ||
500 | .start_resource = 642, | ||
501 | .num_resource = 10, | ||
502 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
503 | RESASG_SUBTYPE_RA_GP), | ||
504 | .host_id = HOST_ID_MAIN_1_R5_0, | ||
505 | }, | ||
506 | { | ||
507 | .start_resource = 652, | ||
508 | .num_resource = 10, | ||
509 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
510 | RESASG_SUBTYPE_RA_GP), | ||
511 | .host_id = HOST_ID_MAIN_1_R5_2, | ||
512 | }, | ||
513 | { | ||
514 | .start_resource = 662, | ||
515 | .num_resource = 32, | ||
516 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
517 | RESASG_SUBTYPE_RA_GP), | ||
518 | .host_id = HOST_ID_C7X_1, | ||
519 | }, | ||
520 | { | ||
521 | .start_resource = 694, | ||
522 | .num_resource = 38, | ||
523 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
524 | RESASG_SUBTYPE_RA_GP), | ||
525 | .host_id = HOST_ID_C6X_0_1, | ||
526 | }, | ||
527 | { | ||
528 | .start_resource = 732, | ||
529 | .num_resource = 12, | ||
530 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
531 | RESASG_SUBTYPE_RA_GP), | ||
532 | .host_id = HOST_ID_C6X_1_1, | ||
533 | }, | ||
534 | { | ||
535 | .start_resource = 744, | ||
536 | .num_resource = 40, | ||
537 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
538 | RESASG_SUBTYPE_RA_GP), | ||
443 | .host_id = HOST_ID_MAIN_0_R5_0, | 539 | .host_id = HOST_ID_MAIN_0_R5_0, |
444 | }, | 540 | }, |
445 | { | 541 | { |
446 | .start_resource = 10, | 542 | .start_resource = 784, |
447 | .num_resource = 4, | 543 | .num_resource = 182, |
448 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 544 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
449 | RESASG_SUBTYPE_UDMAP_RX_HCHAN), | 545 | RESASG_SUBTYPE_RA_GP), |
450 | .host_id = HOST_ID_MAIN_0_R5_2, | 546 | .host_id = HOST_ID_MAIN_0_R5_2, |
451 | }, | 547 | }, |
452 | { | 548 | { |
453 | .start_resource = 14, | 549 | .start_resource = 966, |
454 | .num_resource = 2, | 550 | .num_resource = 8, |
455 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 551 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
456 | RESASG_SUBTYPE_UDMAP_RX_HCHAN), | 552 | RESASG_SUBTYPE_RA_GP), |
457 | .host_id = HOST_ID_ALL, | 553 | .host_id = HOST_ID_ALL, |
458 | }, | 554 | }, |
459 | 555 | ||
460 | /* Main Nav Total TX Channel */ | 556 | /* Main Nav Normal Capacity RX ring */ |
461 | { | 557 | { |
462 | .start_resource = 16, | 558 | .start_resource = 316, |
463 | .num_resource = 36, | 559 | .num_resource = 36, |
464 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 560 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
465 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 561 | RESASG_SUBTYPE_RA_UDMAP_RX), |
466 | .host_id = HOST_ID_A72_2, | 562 | .host_id = HOST_ID_A72_2, |
467 | }, | 563 | }, |
468 | { | 564 | { |
469 | .start_resource = 52, | 565 | .start_resource = 352, |
470 | .num_resource = 20, | 566 | .num_resource = 20, |
471 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 567 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
472 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 568 | RESASG_SUBTYPE_RA_UDMAP_RX), |
473 | .host_id = HOST_ID_A72_3, | 569 | .host_id = HOST_ID_A72_3, |
474 | }, | 570 | }, |
475 | { | 571 | { |
476 | .start_resource = 72, | 572 | .start_resource = 372, |
477 | .num_resource = 2, | 573 | .num_resource = 2, |
478 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 574 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
479 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 575 | RESASG_SUBTYPE_RA_UDMAP_RX), |
480 | .host_id = HOST_ID_MCU_0_R5_0, | 576 | .host_id = HOST_ID_MCU_0_R5_0, |
481 | }, | 577 | }, |
482 | { | 578 | { |
483 | .start_resource = 74, | 579 | .start_resource = 372, |
484 | .num_resource = 2, | 580 | .num_resource = 2, |
485 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 581 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
486 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 582 | RESASG_SUBTYPE_RA_UDMAP_RX), |
583 | .host_id = HOST_ID_MCU_0_R5_1, | ||
584 | }, | ||
585 | { | ||
586 | .start_resource = 374, | ||
587 | .num_resource = 2, | ||
588 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
589 | RESASG_SUBTYPE_RA_UDMAP_RX), | ||
487 | .host_id = HOST_ID_MCU_0_R5_2, | 590 | .host_id = HOST_ID_MCU_0_R5_2, |
488 | }, | 591 | }, |
489 | { | 592 | { |
490 | .start_resource = 76, | 593 | .start_resource = 376, |
491 | .num_resource = 6, | 594 | .num_resource = 6, |
492 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 595 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
493 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 596 | RESASG_SUBTYPE_RA_UDMAP_RX), |
494 | .host_id = HOST_ID_MAIN_1_R5_0, | 597 | .host_id = HOST_ID_MAIN_1_R5_0, |
495 | }, | 598 | }, |
496 | { | 599 | { |
497 | .start_resource = 82, | 600 | .start_resource = 382, |
498 | .num_resource = 6, | 601 | .num_resource = 6, |
499 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 602 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
500 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 603 | RESASG_SUBTYPE_RA_UDMAP_RX), |
501 | .host_id = HOST_ID_MAIN_1_R5_2, | 604 | .host_id = HOST_ID_MAIN_1_R5_2, |
502 | }, | 605 | }, |
503 | { | 606 | { |
504 | .start_resource = 88, | 607 | .start_resource = 388, |
505 | .num_resource = 6, | 608 | .num_resource = 6, |
506 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 609 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
507 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 610 | RESASG_SUBTYPE_RA_UDMAP_RX), |
508 | .host_id = HOST_ID_C7X_1, | 611 | .host_id = HOST_ID_C7X_1, |
509 | }, | 612 | }, |
510 | { | 613 | { |
511 | .start_resource = 94, | 614 | .start_resource = 394, |
512 | .num_resource = 16, | 615 | .num_resource = 16, |
513 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 616 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
514 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 617 | RESASG_SUBTYPE_RA_UDMAP_RX), |
515 | .host_id = HOST_ID_C6X_0_1, | 618 | .host_id = HOST_ID_C6X_0_1, |
516 | }, | 619 | }, |
517 | { | 620 | { |
518 | .start_resource = 110, | 621 | .start_resource = 410, |
519 | .num_resource = 8, | 622 | .num_resource = 8, |
520 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 623 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
521 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 624 | RESASG_SUBTYPE_RA_UDMAP_RX), |
522 | .host_id = HOST_ID_C6X_1_1, | 625 | .host_id = HOST_ID_C6X_1_1, |
523 | }, | 626 | }, |
524 | { | 627 | { |
525 | .start_resource = 118, | 628 | .start_resource = 418, |
526 | .num_resource = 7, | 629 | .num_resource = 7, |
527 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 630 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
528 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 631 | RESASG_SUBTYPE_RA_UDMAP_RX), |
529 | .host_id = HOST_ID_MAIN_0_R5_0, | 632 | .host_id = HOST_ID_MAIN_0_R5_0, |
530 | }, | 633 | }, |
531 | { | 634 | { |
532 | .start_resource = 125, | 635 | .start_resource = 425, |
533 | .num_resource = 8, | 636 | .num_resource = 15, |
534 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 637 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
535 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 638 | RESASG_SUBTYPE_RA_UDMAP_RX), |
536 | .host_id = HOST_ID_MAIN_0_R5_2, | 639 | .host_id = HOST_ID_MAIN_0_R5_2, |
537 | }, | 640 | }, |
538 | { | ||
539 | .start_resource = 133, | ||
540 | .num_resource = 7, | ||
541 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
542 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | ||
543 | .host_id = HOST_ID_ALL, | ||
544 | }, | ||
545 | 641 | ||
546 | /* Main Nav Total RX Channel */ | 642 | /* Main Nav Normal Capacity TX ring */ |
547 | { | 643 | { |
548 | .start_resource = 16, | 644 | .start_resource = 16, |
549 | .num_resource = 36, | 645 | .num_resource = 36, |
550 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 646 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
551 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 647 | RESASG_SUBTYPE_RA_UDMAP_TX), |
552 | .host_id = HOST_ID_A72_2, | 648 | .host_id = HOST_ID_A72_2, |
553 | }, | 649 | }, |
554 | { | 650 | { |
555 | .start_resource = 52, | 651 | .start_resource = 52, |
556 | .num_resource = 20, | 652 | .num_resource = 20, |
557 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 653 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
558 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 654 | RESASG_SUBTYPE_RA_UDMAP_TX), |
559 | .host_id = HOST_ID_A72_3, | 655 | .host_id = HOST_ID_A72_3, |
560 | }, | 656 | }, |
561 | { | 657 | { |
562 | .start_resource = 72, | 658 | .start_resource = 72, |
563 | .num_resource = 2, | 659 | .num_resource = 2, |
564 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 660 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
565 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 661 | RESASG_SUBTYPE_RA_UDMAP_TX), |
566 | .host_id = HOST_ID_MCU_0_R5_0, | 662 | .host_id = HOST_ID_MCU_0_R5_0, |
567 | }, | 663 | }, |
568 | { | 664 | { |
665 | .start_resource = 72, | ||
666 | .num_resource = 2, | ||
667 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
668 | RESASG_SUBTYPE_RA_UDMAP_TX), | ||
669 | .host_id = HOST_ID_MCU_0_R5_1, | ||
670 | }, | ||
671 | { | ||
569 | .start_resource = 74, | 672 | .start_resource = 74, |
570 | .num_resource = 2, | 673 | .num_resource = 2, |
571 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 674 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
572 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 675 | RESASG_SUBTYPE_RA_UDMAP_TX), |
573 | .host_id = HOST_ID_MCU_0_R5_2, | 676 | .host_id = HOST_ID_MCU_0_R5_2, |
574 | }, | 677 | }, |
575 | { | 678 | { |
576 | .start_resource = 76, | 679 | .start_resource = 76, |
577 | .num_resource = 6, | 680 | .num_resource = 6, |
578 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 681 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
579 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 682 | RESASG_SUBTYPE_RA_UDMAP_TX), |
580 | .host_id = HOST_ID_MAIN_1_R5_0, | 683 | .host_id = HOST_ID_MAIN_1_R5_0, |
581 | }, | 684 | }, |
582 | { | 685 | { |
583 | .start_resource = 82, | 686 | .start_resource = 82, |
584 | .num_resource = 6, | 687 | .num_resource = 6, |
585 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 688 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
586 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 689 | RESASG_SUBTYPE_RA_UDMAP_TX), |
587 | .host_id = HOST_ID_MAIN_1_R5_2, | 690 | .host_id = HOST_ID_MAIN_1_R5_2, |
588 | }, | 691 | }, |
589 | { | 692 | { |
590 | .start_resource = 88, | 693 | .start_resource = 88, |
591 | .num_resource = 6, | 694 | .num_resource = 6, |
592 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 695 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
593 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 696 | RESASG_SUBTYPE_RA_UDMAP_TX), |
594 | .host_id = HOST_ID_C7X_1, | 697 | .host_id = HOST_ID_C7X_1, |
595 | }, | 698 | }, |
596 | { | 699 | { |
597 | .start_resource = 94, | 700 | .start_resource = 94, |
598 | .num_resource = 16, | 701 | .num_resource = 16, |
599 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 702 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
600 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 703 | RESASG_SUBTYPE_RA_UDMAP_TX), |
601 | .host_id = HOST_ID_C6X_0_1, | 704 | .host_id = HOST_ID_C6X_0_1, |
602 | }, | 705 | }, |
603 | { | 706 | { |
604 | .start_resource = 110, | 707 | .start_resource = 110, |
605 | .num_resource = 8, | 708 | .num_resource = 8, |
606 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 709 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
607 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 710 | RESASG_SUBTYPE_RA_UDMAP_TX), |
608 | .host_id = HOST_ID_C6X_1_1, | 711 | .host_id = HOST_ID_C6X_1_1, |
609 | }, | 712 | }, |
610 | { | 713 | { |
611 | .start_resource = 118, | 714 | .start_resource = 118, |
612 | .num_resource = 7, | 715 | .num_resource = 7, |
613 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 716 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
614 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 717 | RESASG_SUBTYPE_RA_UDMAP_TX), |
615 | .host_id = HOST_ID_MAIN_0_R5_0, | 718 | .host_id = HOST_ID_MAIN_0_R5_0, |
616 | }, | 719 | }, |
617 | { | 720 | { |
618 | .start_resource = 125, | 721 | .start_resource = 125, |
619 | .num_resource = 15, | 722 | .num_resource = 8, |
620 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 723 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
621 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 724 | RESASG_SUBTYPE_RA_UDMAP_TX), |
622 | .host_id = HOST_ID_MAIN_0_R5_2, | 725 | .host_id = HOST_ID_MAIN_0_R5_2, |
623 | }, | 726 | }, |
727 | { | ||
728 | .start_resource = 133, | ||
729 | .num_resource = 7, | ||
730 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
731 | RESASG_SUBTYPE_RA_UDMAP_TX), | ||
732 | .host_id = HOST_ID_ALL, | ||
733 | }, | ||
624 | 734 | ||
625 | /* Main Nav extended TX channels */ | 735 | /* Main Nav TX Extended channel rings */ |
626 | { | 736 | { |
627 | .start_resource = 140, | 737 | .start_resource = 140, |
628 | .num_resource = 16, | 738 | .num_resource = 16, |
629 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 739 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
630 | RESASG_SUBTYPE_UDMAP_TX_ECHAN), | 740 | RESASG_SUBTYPE_RA_UDMAP_TX_EXT), |
631 | .host_id = HOST_ID_C7X_1, | 741 | .host_id = HOST_ID_C7X_1, |
632 | }, | 742 | }, |
633 | { | 743 | { |
634 | .start_resource = 156, | 744 | .start_resource = 156, |
635 | .num_resource = 6, | 745 | .num_resource = 6, |
636 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 746 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
637 | RESASG_SUBTYPE_UDMAP_TX_ECHAN), | 747 | RESASG_SUBTYPE_RA_UDMAP_TX_EXT), |
638 | .host_id = HOST_ID_C6X_0_1, | 748 | .host_id = HOST_ID_C6X_0_1, |
639 | }, | 749 | }, |
640 | { | 750 | { |
641 | .start_resource = 162, | 751 | .start_resource = 162, |
642 | .num_resource = 6, | 752 | .num_resource = 6, |
643 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 753 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
644 | RESASG_SUBTYPE_UDMAP_TX_ECHAN), | 754 | RESASG_SUBTYPE_RA_UDMAP_TX_EXT), |
645 | .host_id = HOST_ID_C6X_1_1, | 755 | .host_id = HOST_ID_C6X_1_1, |
646 | }, | 756 | }, |
647 | { | 757 | { |
648 | .start_resource = 168, | 758 | .start_resource = 168, |
649 | .num_resource = 132, | 759 | .num_resource = 132, |
650 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 760 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
651 | RESASG_SUBTYPE_UDMAP_TX_ECHAN), | 761 | RESASG_SUBTYPE_RA_UDMAP_TX_EXT), |
652 | .host_id = HOST_ID_MAIN_0_R5_2, | 762 | .host_id = HOST_ID_MAIN_0_R5_2, |
653 | }, | 763 | }, |
654 | 764 | ||
655 | /* Main Nav UHC TX ring */ | 765 | /* Main Nav High Capacity RX ring */ |
656 | { | 766 | { |
657 | .start_resource = 0, | 767 | .start_resource = 304, |
658 | .num_resource = 2, | 768 | .num_resource = 4, |
659 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 769 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
660 | RESASG_SUBTYPE_RA_UDMAP_TX_UH), | 770 | RESASG_SUBTYPE_RA_UDMAP_RX_H), |
661 | .host_id = HOST_ID_A72_2, | 771 | .host_id = HOST_ID_A72_2, |
662 | }, | 772 | }, |
663 | { | 773 | { |
664 | .start_resource = 2, | 774 | .start_resource = 308, |
665 | .num_resource = 2, | 775 | .num_resource = 2, |
666 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 776 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
667 | RESASG_SUBTYPE_RA_UDMAP_TX_UH), | 777 | RESASG_SUBTYPE_RA_UDMAP_RX_H), |
778 | .host_id = HOST_ID_MAIN_0_R5_0, | ||
779 | }, | ||
780 | { | ||
781 | .start_resource = 310, | ||
782 | .num_resource = 4, | ||
783 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
784 | RESASG_SUBTYPE_RA_UDMAP_RX_H), | ||
668 | .host_id = HOST_ID_MAIN_0_R5_2, | 785 | .host_id = HOST_ID_MAIN_0_R5_2, |
669 | }, | 786 | }, |
787 | { | ||
788 | .start_resource = 314, | ||
789 | .num_resource = 2, | ||
790 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
791 | RESASG_SUBTYPE_RA_UDMAP_RX_H), | ||
792 | .host_id = HOST_ID_ALL, | ||
793 | }, | ||
670 | 794 | ||
671 | /* Main Nav UHC RX ring */ | 795 | /* Main Nav Ultra High Capacity RX ring */ |
672 | { | 796 | { |
673 | .start_resource = 300, | 797 | .start_resource = 300, |
674 | .num_resource = 2, | 798 | .num_resource = 2, |
@@ -684,7 +808,7 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
684 | .host_id = HOST_ID_MAIN_0_R5_2, | 808 | .host_id = HOST_ID_MAIN_0_R5_2, |
685 | }, | 809 | }, |
686 | 810 | ||
687 | /* Main Nav HC TX ring */ | 811 | /* Main Nav High Capacity TX ring */ |
688 | { | 812 | { |
689 | .start_resource = 4, | 813 | .start_resource = 4, |
690 | .num_resource = 4, | 814 | .num_resource = 4, |
@@ -714,771 +838,846 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
714 | .host_id = HOST_ID_ALL, | 838 | .host_id = HOST_ID_ALL, |
715 | }, | 839 | }, |
716 | 840 | ||
717 | /* Main Nav HC RX ring */ | 841 | /* Main Nav Ultra High Capacity TX ring */ |
718 | { | 842 | { |
719 | .start_resource = 304, | 843 | .start_resource = 0, |
720 | .num_resource = 4, | 844 | .num_resource = 2, |
721 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 845 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
722 | RESASG_SUBTYPE_RA_UDMAP_RX_H), | 846 | RESASG_SUBTYPE_RA_UDMAP_TX_UH), |
723 | .host_id = HOST_ID_A72_2, | 847 | .host_id = HOST_ID_A72_2, |
724 | }, | 848 | }, |
725 | { | 849 | { |
726 | .start_resource = 308, | 850 | .start_resource = 2, |
727 | .num_resource = 2, | 851 | .num_resource = 2, |
728 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 852 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
729 | RESASG_SUBTYPE_RA_UDMAP_RX_H), | 853 | RESASG_SUBTYPE_RA_UDMAP_TX_UH), |
854 | .host_id = HOST_ID_MAIN_0_R5_2, | ||
855 | }, | ||
856 | |||
857 | /* Main Nav ring monitors */ | ||
858 | { | ||
859 | .start_resource = 0, | ||
860 | .num_resource = 3, | ||
861 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
862 | RESASG_SUBTYPE_RA_MONITORS), | ||
863 | .host_id = HOST_ID_A72_2, | ||
864 | }, | ||
865 | { | ||
866 | .start_resource = 3, | ||
867 | .num_resource = 2, | ||
868 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
869 | RESASG_SUBTYPE_RA_MONITORS), | ||
870 | .host_id = HOST_ID_A72_3, | ||
871 | }, | ||
872 | { | ||
873 | .start_resource = 5, | ||
874 | .num_resource = 1, | ||
875 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
876 | RESASG_SUBTYPE_RA_MONITORS), | ||
877 | .host_id = HOST_ID_MCU_0_R5_0, | ||
878 | }, | ||
879 | { | ||
880 | .start_resource = 5, | ||
881 | .num_resource = 1, | ||
882 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
883 | RESASG_SUBTYPE_RA_MONITORS), | ||
884 | .host_id = HOST_ID_MCU_0_R5_1, | ||
885 | }, | ||
886 | { | ||
887 | .start_resource = 6, | ||
888 | .num_resource = 1, | ||
889 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
890 | RESASG_SUBTYPE_RA_MONITORS), | ||
891 | .host_id = HOST_ID_MCU_0_R5_2, | ||
892 | }, | ||
893 | { | ||
894 | .start_resource = 7, | ||
895 | .num_resource = 3, | ||
896 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
897 | RESASG_SUBTYPE_RA_MONITORS), | ||
898 | .host_id = HOST_ID_MAIN_1_R5_0, | ||
899 | }, | ||
900 | { | ||
901 | .start_resource = 10, | ||
902 | .num_resource = 3, | ||
903 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
904 | RESASG_SUBTYPE_RA_MONITORS), | ||
905 | .host_id = HOST_ID_MAIN_1_R5_2, | ||
906 | }, | ||
907 | { | ||
908 | .start_resource = 13, | ||
909 | .num_resource = 3, | ||
910 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
911 | RESASG_SUBTYPE_RA_MONITORS), | ||
912 | .host_id = HOST_ID_C7X_1, | ||
913 | }, | ||
914 | { | ||
915 | .start_resource = 16, | ||
916 | .num_resource = 3, | ||
917 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
918 | RESASG_SUBTYPE_RA_MONITORS), | ||
919 | .host_id = HOST_ID_C6X_0_1, | ||
920 | }, | ||
921 | { | ||
922 | .start_resource = 19, | ||
923 | .num_resource = 3, | ||
924 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
925 | RESASG_SUBTYPE_RA_MONITORS), | ||
926 | .host_id = HOST_ID_C6X_1_1, | ||
927 | }, | ||
928 | { | ||
929 | .start_resource = 22, | ||
930 | .num_resource = 6, | ||
931 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
932 | RESASG_SUBTYPE_RA_MONITORS), | ||
730 | .host_id = HOST_ID_MAIN_0_R5_0, | 933 | .host_id = HOST_ID_MAIN_0_R5_0, |
731 | }, | 934 | }, |
732 | { | 935 | { |
733 | .start_resource = 310, | 936 | .start_resource = 28, |
734 | .num_resource = 4, | 937 | .num_resource = 3, |
735 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 938 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
736 | RESASG_SUBTYPE_RA_UDMAP_RX_H), | 939 | RESASG_SUBTYPE_RA_MONITORS), |
737 | .host_id = HOST_ID_MAIN_0_R5_2, | 940 | .host_id = HOST_ID_MAIN_0_R5_2, |
738 | }, | 941 | }, |
739 | { | 942 | { |
740 | .start_resource = 314, | 943 | .start_resource = 31, |
741 | .num_resource = 2, | 944 | .num_resource = 1, |
742 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 945 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, |
743 | RESASG_SUBTYPE_RA_UDMAP_RX_H), | 946 | RESASG_SUBTYPE_RA_MONITORS), |
947 | .host_id = HOST_ID_ALL, | ||
948 | }, | ||
949 | |||
950 | /* Main Nav Free RX Flow */ | ||
951 | { | ||
952 | .start_resource = 140, | ||
953 | .num_resource = 16, | ||
954 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
955 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | ||
956 | .host_id = HOST_ID_A72_2, | ||
957 | }, | ||
958 | { | ||
959 | .start_resource = 156, | ||
960 | .num_resource = 16, | ||
961 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
962 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | ||
963 | .host_id = HOST_ID_A72_3, | ||
964 | }, | ||
965 | { | ||
966 | .start_resource = 172, | ||
967 | .num_resource = 64, | ||
968 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
969 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | ||
970 | .host_id = HOST_ID_MAIN_0_R5_0, | ||
971 | }, | ||
972 | { | ||
973 | .start_resource = 236, | ||
974 | .num_resource = 8, | ||
975 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
976 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | ||
977 | .host_id = HOST_ID_MAIN_0_R5_2, | ||
978 | }, | ||
979 | { | ||
980 | .start_resource = 244, | ||
981 | .num_resource = 56, | ||
982 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
983 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | ||
744 | .host_id = HOST_ID_ALL, | 984 | .host_id = HOST_ID_ALL, |
745 | }, | 985 | }, |
746 | 986 | ||
747 | /* Main Nav TX ring */ | 987 | /* Main Nav Total RX channel */ |
748 | { | 988 | { |
749 | .start_resource = 16, | 989 | .start_resource = 16, |
750 | .num_resource = 36, | 990 | .num_resource = 36, |
751 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 991 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
752 | RESASG_SUBTYPE_RA_UDMAP_TX), | 992 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
753 | .host_id = HOST_ID_A72_2, | 993 | .host_id = HOST_ID_A72_2, |
754 | }, | 994 | }, |
755 | { | 995 | { |
756 | .start_resource = 52, | 996 | .start_resource = 52, |
757 | .num_resource = 20, | 997 | .num_resource = 20, |
758 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 998 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
759 | RESASG_SUBTYPE_RA_UDMAP_TX), | 999 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
760 | .host_id = HOST_ID_A72_3, | 1000 | .host_id = HOST_ID_A72_3, |
761 | }, | 1001 | }, |
762 | { | 1002 | { |
763 | .start_resource = 72, | 1003 | .start_resource = 72, |
764 | .num_resource = 2, | 1004 | .num_resource = 2, |
765 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1005 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
766 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1006 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
767 | .host_id = HOST_ID_MCU_0_R5_0, | 1007 | .host_id = HOST_ID_MCU_0_R5_0, |
768 | }, | 1008 | }, |
769 | { | 1009 | { |
1010 | .start_resource = 72, | ||
1011 | .num_resource = 2, | ||
1012 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
1013 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | ||
1014 | .host_id = HOST_ID_MCU_0_R5_1, | ||
1015 | }, | ||
1016 | { | ||
770 | .start_resource = 74, | 1017 | .start_resource = 74, |
771 | .num_resource = 2, | 1018 | .num_resource = 2, |
772 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1019 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
773 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1020 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
774 | .host_id = HOST_ID_MCU_0_R5_2, | 1021 | .host_id = HOST_ID_MCU_0_R5_2, |
775 | }, | 1022 | }, |
776 | { | 1023 | { |
777 | .start_resource = 76, | 1024 | .start_resource = 76, |
778 | .num_resource = 6, | 1025 | .num_resource = 6, |
779 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1026 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
780 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1027 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
781 | .host_id = HOST_ID_MAIN_1_R5_0, | 1028 | .host_id = HOST_ID_MAIN_1_R5_0, |
782 | }, | 1029 | }, |
783 | { | 1030 | { |
784 | .start_resource = 82, | 1031 | .start_resource = 82, |
785 | .num_resource = 6, | 1032 | .num_resource = 6, |
786 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1033 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
787 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1034 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
788 | .host_id = HOST_ID_MAIN_1_R5_2, | 1035 | .host_id = HOST_ID_MAIN_1_R5_2, |
789 | }, | 1036 | }, |
790 | { | 1037 | { |
791 | .start_resource = 88, | 1038 | .start_resource = 88, |
792 | .num_resource = 6, | 1039 | .num_resource = 6, |
793 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1040 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
794 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1041 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
795 | .host_id = HOST_ID_C7X_1, | 1042 | .host_id = HOST_ID_C7X_1, |
796 | }, | 1043 | }, |
797 | { | 1044 | { |
798 | .start_resource = 94, | 1045 | .start_resource = 94, |
799 | .num_resource = 16, | 1046 | .num_resource = 16, |
800 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1047 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
801 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1048 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
802 | .host_id = HOST_ID_C6X_0_1, | 1049 | .host_id = HOST_ID_C6X_0_1, |
803 | }, | 1050 | }, |
804 | { | 1051 | { |
805 | .start_resource = 110, | 1052 | .start_resource = 110, |
806 | .num_resource = 8, | 1053 | .num_resource = 8, |
807 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1054 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
808 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1055 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
809 | .host_id = HOST_ID_C6X_1_1, | 1056 | .host_id = HOST_ID_C6X_1_1, |
810 | }, | 1057 | }, |
811 | { | 1058 | { |
812 | .start_resource = 118, | 1059 | .start_resource = 118, |
813 | .num_resource = 7, | 1060 | .num_resource = 7, |
814 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1061 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
815 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1062 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
816 | .host_id = HOST_ID_MAIN_0_R5_0, | 1063 | .host_id = HOST_ID_MAIN_0_R5_0, |
817 | }, | 1064 | }, |
818 | { | 1065 | { |
819 | .start_resource = 125, | 1066 | .start_resource = 125, |
820 | .num_resource = 8, | 1067 | .num_resource = 15, |
821 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1068 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
822 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1069 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
823 | .host_id = HOST_ID_MAIN_0_R5_2, | 1070 | .host_id = HOST_ID_MAIN_0_R5_2, |
824 | }, | 1071 | }, |
1072 | |||
1073 | /* Main Nav High Capacity RX channel */ | ||
825 | { | 1074 | { |
826 | .start_resource = 133, | 1075 | .start_resource = 4, |
827 | .num_resource = 7, | 1076 | .num_resource = 4, |
828 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1077 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
829 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1078 | RESASG_SUBTYPE_UDMAP_RX_HCHAN), |
1079 | .host_id = HOST_ID_A72_2, | ||
1080 | }, | ||
1081 | { | ||
1082 | .start_resource = 8, | ||
1083 | .num_resource = 2, | ||
1084 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
1085 | RESASG_SUBTYPE_UDMAP_RX_HCHAN), | ||
1086 | .host_id = HOST_ID_MAIN_0_R5_0, | ||
1087 | }, | ||
1088 | { | ||
1089 | .start_resource = 10, | ||
1090 | .num_resource = 4, | ||
1091 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
1092 | RESASG_SUBTYPE_UDMAP_RX_HCHAN), | ||
1093 | .host_id = HOST_ID_MAIN_0_R5_2, | ||
1094 | }, | ||
1095 | { | ||
1096 | .start_resource = 14, | ||
1097 | .num_resource = 2, | ||
1098 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
1099 | RESASG_SUBTYPE_UDMAP_RX_HCHAN), | ||
830 | .host_id = HOST_ID_ALL, | 1100 | .host_id = HOST_ID_ALL, |
831 | }, | 1101 | }, |
832 | 1102 | ||
833 | /* Main Nav RX ring */ | 1103 | /* Main Nav Ultra High Capacity RX channel */ |
834 | { | 1104 | { |
835 | .start_resource = 316, | 1105 | .start_resource = 0, |
1106 | .num_resource = 2, | ||
1107 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
1108 | RESASG_SUBTYPE_UDMAP_RX_UHCHAN), | ||
1109 | .host_id = HOST_ID_A72_2, | ||
1110 | }, | ||
1111 | { | ||
1112 | .start_resource = 2, | ||
1113 | .num_resource = 2, | ||
1114 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
1115 | RESASG_SUBTYPE_UDMAP_RX_UHCHAN), | ||
1116 | .host_id = HOST_ID_MAIN_0_R5_2, | ||
1117 | }, | ||
1118 | |||
1119 | /* Main Nav Total TX channel */ | ||
1120 | { | ||
1121 | .start_resource = 16, | ||
836 | .num_resource = 36, | 1122 | .num_resource = 36, |
837 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1123 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
838 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1124 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
839 | .host_id = HOST_ID_A72_2, | 1125 | .host_id = HOST_ID_A72_2, |
840 | }, | 1126 | }, |
841 | { | 1127 | { |
842 | .start_resource = 352, | 1128 | .start_resource = 52, |
843 | .num_resource = 20, | 1129 | .num_resource = 20, |
844 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1130 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
845 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1131 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
846 | .host_id = HOST_ID_A72_3, | 1132 | .host_id = HOST_ID_A72_3, |
847 | }, | 1133 | }, |
848 | { | 1134 | { |
849 | .start_resource = 372, | 1135 | .start_resource = 72, |
850 | .num_resource = 2, | 1136 | .num_resource = 2, |
851 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1137 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
852 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1138 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
853 | .host_id = HOST_ID_MCU_0_R5_0, | 1139 | .host_id = HOST_ID_MCU_0_R5_0, |
854 | }, | 1140 | }, |
855 | { | 1141 | { |
856 | .start_resource = 374, | 1142 | .start_resource = 72, |
857 | .num_resource = 2, | 1143 | .num_resource = 2, |
858 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1144 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
859 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1145 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1146 | .host_id = HOST_ID_MCU_0_R5_1, | ||
1147 | }, | ||
1148 | { | ||
1149 | .start_resource = 74, | ||
1150 | .num_resource = 2, | ||
1151 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
1152 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | ||
860 | .host_id = HOST_ID_MCU_0_R5_2, | 1153 | .host_id = HOST_ID_MCU_0_R5_2, |
861 | }, | 1154 | }, |
862 | { | 1155 | { |
863 | .start_resource = 376, | 1156 | .start_resource = 76, |
864 | .num_resource = 6, | 1157 | .num_resource = 6, |
865 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1158 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
866 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1159 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
867 | .host_id = HOST_ID_MAIN_1_R5_0, | 1160 | .host_id = HOST_ID_MAIN_1_R5_0, |
868 | }, | 1161 | }, |
869 | { | 1162 | { |
870 | .start_resource = 382, | 1163 | .start_resource = 82, |
871 | .num_resource = 6, | 1164 | .num_resource = 6, |
872 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1165 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
873 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1166 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
874 | .host_id = HOST_ID_MAIN_1_R5_2, | 1167 | .host_id = HOST_ID_MAIN_1_R5_2, |
875 | }, | 1168 | }, |
876 | { | 1169 | { |
877 | .start_resource = 388, | 1170 | .start_resource = 88, |
878 | .num_resource = 6, | 1171 | .num_resource = 6, |
879 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1172 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
880 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1173 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
881 | .host_id = HOST_ID_C7X_1, | 1174 | .host_id = HOST_ID_C7X_1, |
882 | }, | 1175 | }, |
883 | { | 1176 | { |
884 | .start_resource = 394, | 1177 | .start_resource = 94, |
885 | .num_resource = 16, | 1178 | .num_resource = 16, |
886 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1179 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
887 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1180 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
888 | .host_id = HOST_ID_C6X_0_1, | 1181 | .host_id = HOST_ID_C6X_0_1, |
889 | }, | 1182 | }, |
890 | { | 1183 | { |
891 | .start_resource = 410, | 1184 | .start_resource = 110, |
892 | .num_resource = 8, | 1185 | .num_resource = 8, |
893 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1186 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
894 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1187 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
895 | .host_id = HOST_ID_C6X_1_1, | 1188 | .host_id = HOST_ID_C6X_1_1, |
896 | }, | 1189 | }, |
897 | { | 1190 | { |
898 | .start_resource = 418, | 1191 | .start_resource = 118, |
899 | .num_resource = 7, | 1192 | .num_resource = 7, |
900 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1193 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
901 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1194 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
902 | .host_id = HOST_ID_MAIN_0_R5_0, | 1195 | .host_id = HOST_ID_MAIN_0_R5_0, |
903 | }, | 1196 | }, |
904 | { | 1197 | { |
905 | .start_resource = 425, | 1198 | .start_resource = 125, |
906 | .num_resource = 15, | 1199 | .num_resource = 8, |
907 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1200 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
908 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1201 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
909 | .host_id = HOST_ID_MAIN_0_R5_2, | 1202 | .host_id = HOST_ID_MAIN_0_R5_2, |
910 | }, | 1203 | }, |
1204 | { | ||
1205 | .start_resource = 133, | ||
1206 | .num_resource = 7, | ||
1207 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
1208 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | ||
1209 | .host_id = HOST_ID_ALL, | ||
1210 | }, | ||
911 | 1211 | ||
912 | /* Main Nav TX Extended rings */ | 1212 | /* Main Nav extended TX channels */ |
913 | { | 1213 | { |
914 | .start_resource = 140, | 1214 | .start_resource = 140, |
915 | .num_resource = 16, | 1215 | .num_resource = 16, |
916 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1216 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
917 | RESASG_SUBTYPE_RA_UDMAP_TX_EXT), | 1217 | RESASG_SUBTYPE_UDMAP_TX_ECHAN), |
918 | .host_id = HOST_ID_C7X_1, | 1218 | .host_id = HOST_ID_C7X_1, |
919 | }, | 1219 | }, |
920 | { | 1220 | { |
921 | .start_resource = 156, | 1221 | .start_resource = 156, |
922 | .num_resource = 6, | 1222 | .num_resource = 6, |
923 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1223 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
924 | RESASG_SUBTYPE_RA_UDMAP_TX_EXT), | 1224 | RESASG_SUBTYPE_UDMAP_TX_ECHAN), |
925 | .host_id = HOST_ID_C6X_0_1, | 1225 | .host_id = HOST_ID_C6X_0_1, |
926 | }, | 1226 | }, |
927 | { | 1227 | { |
928 | .start_resource = 162, | 1228 | .start_resource = 162, |
929 | .num_resource = 6, | 1229 | .num_resource = 6, |
930 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1230 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
931 | RESASG_SUBTYPE_RA_UDMAP_TX_EXT), | 1231 | RESASG_SUBTYPE_UDMAP_TX_ECHAN), |
932 | .host_id = HOST_ID_C6X_1_1, | 1232 | .host_id = HOST_ID_C6X_1_1, |
933 | }, | 1233 | }, |
934 | { | 1234 | { |
935 | .start_resource = 168, | 1235 | .start_resource = 168, |
936 | .num_resource = 132, | 1236 | .num_resource = 132, |
937 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1237 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
938 | RESASG_SUBTYPE_RA_UDMAP_TX_EXT), | 1238 | RESASG_SUBTYPE_UDMAP_TX_ECHAN), |
939 | .host_id = HOST_ID_MAIN_0_R5_2, | 1239 | .host_id = HOST_ID_MAIN_0_R5_2, |
940 | }, | 1240 | }, |
941 | 1241 | ||
942 | /* Main Nav ring monitors */ | 1242 | /* Main Nav High Capacity TX channel */ |
943 | { | 1243 | { |
944 | .start_resource = 0, | 1244 | .start_resource = 4, |
945 | .num_resource = 3, | 1245 | .num_resource = 4, |
946 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1246 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
947 | RESASG_SUBTYPE_RA_MONITORS), | 1247 | RESASG_SUBTYPE_UDMAP_TX_HCHAN), |
948 | .host_id = HOST_ID_A72_2, | 1248 | .host_id = HOST_ID_A72_2, |
949 | }, | 1249 | }, |
950 | { | 1250 | { |
951 | .start_resource = 3, | 1251 | .start_resource = 8, |
952 | .num_resource = 2, | 1252 | .num_resource = 2, |
953 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1253 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
954 | RESASG_SUBTYPE_RA_MONITORS), | 1254 | RESASG_SUBTYPE_UDMAP_TX_HCHAN), |
955 | .host_id = HOST_ID_A72_3, | 1255 | .host_id = HOST_ID_MAIN_0_R5_0, |
956 | }, | ||
957 | { | ||
958 | .start_resource = 5, | ||
959 | .num_resource = 27, | ||
960 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
961 | RESASG_SUBTYPE_RA_MONITORS), | ||
962 | .host_id = HOST_ID_ALL, | ||
963 | }, | ||
964 | |||
965 | /* Main Nav nonsecure proxies */ | ||
966 | { | ||
967 | .start_resource = 0, | ||
968 | .num_resource = 4, | ||
969 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0, | ||
970 | RESASG_SUBTYPE_PROXY_PROXIES), | ||
971 | .host_id = HOST_ID_A72_2, | ||
972 | }, | 1256 | }, |
973 | { | 1257 | { |
974 | .start_resource = 4, | 1258 | .start_resource = 10, |
975 | .num_resource = 4, | 1259 | .num_resource = 4, |
976 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0, | 1260 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
977 | RESASG_SUBTYPE_PROXY_PROXIES), | 1261 | RESASG_SUBTYPE_UDMAP_TX_HCHAN), |
978 | .host_id = HOST_ID_A72_3, | 1262 | .host_id = HOST_ID_MAIN_0_R5_2, |
979 | }, | 1263 | }, |
980 | { | 1264 | { |
981 | .start_resource = 8, | 1265 | .start_resource = 14, |
982 | .num_resource = 56, | 1266 | .num_resource = 2, |
983 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_PROXY_0, | 1267 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
984 | RESASG_SUBTYPE_PROXY_PROXIES), | 1268 | RESASG_SUBTYPE_UDMAP_TX_HCHAN), |
985 | .host_id = HOST_ID_ALL, | 1269 | .host_id = HOST_ID_ALL, |
986 | }, | 1270 | }, |
987 | 1271 | ||
988 | /* Main Nav Free RX Flow */ | 1272 | /* Main Nav Ultra High Capacity TX channel */ |
989 | { | 1273 | { |
990 | .start_resource = 140, | 1274 | .start_resource = 0, |
991 | .num_resource = 16, | 1275 | .num_resource = 2, |
992 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 1276 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
993 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | 1277 | RESASG_SUBTYPE_UDMAP_TX_UHCHAN), |
994 | .host_id = HOST_ID_A72_2, | 1278 | .host_id = HOST_ID_A72_2, |
995 | }, | 1279 | }, |
996 | { | 1280 | { |
997 | .start_resource = 156, | 1281 | .start_resource = 2, |
998 | .num_resource = 16, | 1282 | .num_resource = 2, |
999 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
1000 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | ||
1001 | .host_id = HOST_ID_A72_3, | ||
1002 | }, | ||
1003 | { | ||
1004 | .start_resource = 172, | ||
1005 | .num_resource = 64, | ||
1006 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | ||
1007 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | ||
1008 | .host_id = HOST_ID_ALL, | ||
1009 | }, | ||
1010 | { | ||
1011 | .start_resource = 236, | ||
1012 | .num_resource = 8, | ||
1013 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, | 1283 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMAP_0, |
1014 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | 1284 | RESASG_SUBTYPE_UDMAP_TX_UHCHAN), |
1015 | .host_id = HOST_ID_MAIN_0_R5_2, | 1285 | .host_id = HOST_ID_MAIN_0_R5_2, |
1016 | }, | 1286 | }, |
1017 | 1287 | ||
1018 | /* Main Nav Free Ring */ | 1288 | /* NAVSS IR for others - Unassigned */ |
1019 | { | 1289 | { |
1020 | .start_resource = 440, | 1290 | .start_resource = 10, |
1021 | .num_resource = 150, | 1291 | .num_resource = 100, |
1022 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1292 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0, |
1023 | RESASG_SUBTYPE_RA_GP), | 1293 | RESASG_SUBTYPE_IR_OUTPUT), |
1024 | .host_id = HOST_ID_A72_2, | 1294 | .host_id = HOST_ID_A72_2, |
1025 | }, | 1295 | }, |
1026 | { | 1296 | { |
1027 | .start_resource = 590, | 1297 | .start_resource = 110, |
1028 | .num_resource = 40, | 1298 | .num_resource = 32, |
1029 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1299 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0, |
1030 | RESASG_SUBTYPE_RA_GP), | 1300 | RESASG_SUBTYPE_IR_OUTPUT), |
1031 | .host_id = HOST_ID_A72_3, | 1301 | .host_id = HOST_ID_A72_3, |
1032 | }, | 1302 | }, |
1033 | { | 1303 | { |
1034 | .start_resource = 630, | 1304 | .start_resource = 142, |
1035 | .num_resource = 6, | ||
1036 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
1037 | RESASG_SUBTYPE_RA_GP), | ||
1038 | .host_id = HOST_ID_MCU_0_R5_0, | ||
1039 | }, | ||
1040 | { | ||
1041 | .start_resource = 636, | ||
1042 | .num_resource = 6, | ||
1043 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
1044 | RESASG_SUBTYPE_RA_GP), | ||
1045 | .host_id = HOST_ID_MCU_0_R5_2, | ||
1046 | }, | ||
1047 | { | ||
1048 | .start_resource = 642, | ||
1049 | .num_resource = 10, | ||
1050 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
1051 | RESASG_SUBTYPE_RA_GP), | ||
1052 | .host_id = HOST_ID_MAIN_1_R5_0, | ||
1053 | }, | ||
1054 | { | ||
1055 | .start_resource = 652, | ||
1056 | .num_resource = 10, | ||
1057 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
1058 | RESASG_SUBTYPE_RA_GP), | ||
1059 | .host_id = HOST_ID_MAIN_1_R5_2, | ||
1060 | }, | ||
1061 | { | ||
1062 | .start_resource = 662, | ||
1063 | .num_resource = 32, | 1305 | .num_resource = 32, |
1064 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1306 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_INTR_ROUTER_0, |
1065 | RESASG_SUBTYPE_RA_GP), | 1307 | RESASG_SUBTYPE_IR_OUTPUT), |
1066 | .host_id = HOST_ID_C7X_1, | 1308 | .host_id = HOST_ID_C7X_1, |
1067 | }, | 1309 | }, |
1310 | |||
1311 | /* MCU Nav IA VINT */ | ||
1068 | { | 1312 | { |
1069 | .start_resource = 694, | 1313 | .start_resource = 8, |
1070 | .num_resource = 38, | 1314 | .num_resource = 32, |
1071 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1315 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1072 | RESASG_SUBTYPE_RA_GP), | 1316 | RESASG_SUBTYPE_IA_VINT), |
1073 | .host_id = HOST_ID_C6X_0_1, | 1317 | .host_id = HOST_ID_A72_2, |
1074 | }, | ||
1075 | { | ||
1076 | .start_resource = 732, | ||
1077 | .num_resource = 12, | ||
1078 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
1079 | RESASG_SUBTYPE_RA_GP), | ||
1080 | .host_id = HOST_ID_C6X_1_1, | ||
1081 | }, | ||
1082 | { | ||
1083 | .start_resource = 744, | ||
1084 | .num_resource = 40, | ||
1085 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | ||
1086 | RESASG_SUBTYPE_RA_GP), | ||
1087 | .host_id = HOST_ID_MAIN_0_R5_0, | ||
1088 | }, | 1318 | }, |
1089 | { | 1319 | { |
1090 | .start_resource = 784, | 1320 | .start_resource = 40, |
1091 | .num_resource = 182, | 1321 | .num_resource = 16, |
1092 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1322 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1093 | RESASG_SUBTYPE_RA_GP), | 1323 | RESASG_SUBTYPE_IA_VINT), |
1094 | .host_id = HOST_ID_MAIN_0_R5_2, | 1324 | .host_id = HOST_ID_A72_3, |
1095 | }, | 1325 | }, |
1096 | { | 1326 | { |
1097 | .start_resource = 966, | 1327 | .start_resource = 56, |
1098 | .num_resource = 8, | 1328 | .num_resource = 64, |
1099 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_RINGACC_0, | 1329 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1100 | RESASG_SUBTYPE_RA_GP), | 1330 | RESASG_SUBTYPE_IA_VINT), |
1101 | .host_id = HOST_ID_ALL, | 1331 | .host_id = HOST_ID_MCU_0_R5_0, |
1102 | }, | 1332 | }, |
1103 | |||
1104 | /* Main Nav IA VINT */ | ||
1105 | { | 1333 | { |
1106 | .start_resource = 38, | 1334 | .start_resource = 56, |
1107 | .num_resource = 86, | 1335 | .num_resource = 64, |
1108 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1336 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1109 | RESASG_SUBTYPE_IA_VINT), | 1337 | RESASG_SUBTYPE_IA_VINT), |
1110 | .host_id = HOST_ID_A72_2, | 1338 | .host_id = HOST_ID_MCU_0_R5_1, |
1111 | }, | 1339 | }, |
1112 | { | 1340 | { |
1113 | .start_resource = 124, | 1341 | .start_resource = 120, |
1114 | .num_resource = 32, | 1342 | .num_resource = 4, |
1115 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1343 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1116 | RESASG_SUBTYPE_IA_VINT), | 1344 | RESASG_SUBTYPE_IA_VINT), |
1117 | .host_id = HOST_ID_A72_3, | 1345 | .host_id = HOST_ID_MCU_0_R5_2, |
1118 | }, | 1346 | }, |
1119 | { | 1347 | { |
1120 | .start_resource = 156, | 1348 | .start_resource = 124, |
1121 | .num_resource = 12, | 1349 | .num_resource = 16, |
1122 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1350 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1123 | RESASG_SUBTYPE_IA_VINT), | 1351 | RESASG_SUBTYPE_IA_VINT), |
1124 | .host_id = HOST_ID_MAIN_1_R5_0, | 1352 | .host_id = HOST_ID_MAIN_1_R5_0, |
1125 | }, | 1353 | }, |
1126 | { | 1354 | { |
1127 | .start_resource = 168, | 1355 | .start_resource = 140, |
1128 | .num_resource = 12, | 1356 | .num_resource = 16, |
1129 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1357 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1130 | RESASG_SUBTYPE_IA_VINT), | 1358 | RESASG_SUBTYPE_IA_VINT), |
1131 | .host_id = HOST_ID_MAIN_1_R5_2, | 1359 | .host_id = HOST_ID_MAIN_1_R5_2, |
1132 | }, | 1360 | }, |
1133 | { | 1361 | { |
1134 | .start_resource = 180, | 1362 | .start_resource = 156, |
1135 | .num_resource = 12, | 1363 | .num_resource = 8, |
1136 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1364 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1137 | RESASG_SUBTYPE_IA_VINT), | 1365 | RESASG_SUBTYPE_IA_VINT), |
1138 | .host_id = HOST_ID_C7X_1, | 1366 | .host_id = HOST_ID_C7X_1, |
1139 | }, | 1367 | }, |
1140 | { | 1368 | { |
1141 | .start_resource = 192, | 1369 | .start_resource = 164, |
1142 | .num_resource = 12, | 1370 | .num_resource = 8, |
1143 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1371 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1144 | RESASG_SUBTYPE_IA_VINT), | 1372 | RESASG_SUBTYPE_IA_VINT), |
1145 | .host_id = HOST_ID_C6X_0_1, | 1373 | .host_id = HOST_ID_C6X_0_1, |
1146 | }, | 1374 | }, |
1147 | { | 1375 | { |
1148 | .start_resource = 204, | 1376 | .start_resource = 172, |
1149 | .num_resource = 12, | 1377 | .num_resource = 8, |
1150 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1378 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1151 | RESASG_SUBTYPE_IA_VINT), | 1379 | RESASG_SUBTYPE_IA_VINT), |
1152 | .host_id = HOST_ID_C6X_1_1, | 1380 | .host_id = HOST_ID_C6X_1_1, |
1153 | }, | 1381 | }, |
1154 | { | 1382 | { |
1155 | .start_resource = 216, | 1383 | .start_resource = 180, |
1156 | .num_resource = 8, | 1384 | .num_resource = 16, |
1157 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1385 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1158 | RESASG_SUBTYPE_IA_VINT), | 1386 | RESASG_SUBTYPE_IA_VINT), |
1159 | .host_id = HOST_ID_MAIN_0_R5_0, | 1387 | .host_id = HOST_ID_MAIN_0_R5_0, |
1160 | }, | 1388 | }, |
1161 | { | 1389 | { |
1162 | .start_resource = 224, | 1390 | .start_resource = 196, |
1163 | .num_resource = 24, | 1391 | .num_resource = 16, |
1164 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1392 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1165 | RESASG_SUBTYPE_IA_VINT), | 1393 | RESASG_SUBTYPE_IA_VINT), |
1166 | .host_id = HOST_ID_MAIN_0_R5_2, | 1394 | .host_id = HOST_ID_MAIN_0_R5_2, |
1167 | }, | 1395 | }, |
1168 | { | 1396 | { |
1169 | .start_resource = 248, | 1397 | .start_resource = 212, |
1170 | .num_resource = 8, | 1398 | .num_resource = 44, |
1171 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1399 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1172 | RESASG_SUBTYPE_IA_VINT), | 1400 | RESASG_SUBTYPE_IA_VINT), |
1173 | .host_id = HOST_ID_ALL, | 1401 | .host_id = HOST_ID_ALL, |
1174 | }, | 1402 | }, |
1175 | 1403 | ||
1176 | /* Main Nav IA SEVT */ | 1404 | /* MCU Nav IA SEVT */ |
1177 | { | 1405 | { |
1178 | .start_resource = 38, | 1406 | .start_resource = 16392, |
1179 | .num_resource = 1024, | 1407 | .num_resource = 128, |
1180 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1408 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1181 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1409 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1182 | .host_id = HOST_ID_A72_2, | 1410 | .host_id = HOST_ID_A72_2, |
1183 | }, | 1411 | }, |
1184 | { | 1412 | { |
1185 | .start_resource = 1062, | 1413 | .start_resource = 16520, |
1186 | .num_resource = 512, | 1414 | .num_resource = 128, |
1187 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1415 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1188 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1416 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1189 | .host_id = HOST_ID_A72_3, | 1417 | .host_id = HOST_ID_A72_3, |
1190 | }, | 1418 | }, |
1191 | { | 1419 | { |
1192 | .start_resource = 1574, | 1420 | .start_resource = 16648, |
1193 | .num_resource = 32, | 1421 | .num_resource = 256, |
1194 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1422 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1195 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1423 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1196 | .host_id = HOST_ID_MCU_0_R5_0, | 1424 | .host_id = HOST_ID_MCU_0_R5_0, |
1197 | }, | 1425 | }, |
1198 | { | 1426 | { |
1199 | .start_resource = 1606, | 1427 | .start_resource = 16648, |
1200 | .num_resource = 32, | 1428 | .num_resource = 256, |
1201 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1429 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1430 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | ||
1431 | .host_id = HOST_ID_MCU_0_R5_1, | ||
1432 | }, | ||
1433 | { | ||
1434 | .start_resource = 16904, | ||
1435 | .num_resource = 64, | ||
1436 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | ||
1202 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1437 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1203 | .host_id = HOST_ID_MCU_0_R5_2, | 1438 | .host_id = HOST_ID_MCU_0_R5_2, |
1204 | }, | 1439 | }, |
1205 | { | 1440 | { |
1206 | .start_resource = 1638, | 1441 | .start_resource = 16968, |
1207 | .num_resource = 256, | 1442 | .num_resource = 128, |
1208 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1443 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1209 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1444 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1210 | .host_id = HOST_ID_MAIN_1_R5_0, | 1445 | .host_id = HOST_ID_MAIN_1_R5_0, |
1211 | }, | 1446 | }, |
1212 | { | 1447 | { |
1213 | .start_resource = 1894, | 1448 | .start_resource = 17096, |
1214 | .num_resource = 256, | 1449 | .num_resource = 128, |
1215 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1450 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1216 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1451 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1217 | .host_id = HOST_ID_MAIN_1_R5_2, | 1452 | .host_id = HOST_ID_MAIN_1_R5_2, |
1218 | }, | 1453 | }, |
1219 | { | 1454 | { |
1220 | .start_resource = 2150, | 1455 | .start_resource = 17224, |
1221 | .num_resource = 256, | 1456 | .num_resource = 64, |
1222 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1457 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1223 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1458 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1224 | .host_id = HOST_ID_C7X_1, | 1459 | .host_id = HOST_ID_C7X_1, |
1225 | }, | 1460 | }, |
1226 | { | 1461 | { |
1227 | .start_resource = 2406, | 1462 | .start_resource = 17288, |
1228 | .num_resource = 256, | 1463 | .num_resource = 64, |
1229 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1464 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1230 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1465 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1231 | .host_id = HOST_ID_C6X_0_1, | 1466 | .host_id = HOST_ID_C6X_0_1, |
1232 | }, | 1467 | }, |
1233 | { | 1468 | { |
1234 | .start_resource = 2662, | 1469 | .start_resource = 17352, |
1235 | .num_resource = 256, | 1470 | .num_resource = 64, |
1236 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1471 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1237 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1472 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1238 | .host_id = HOST_ID_C6X_1_1, | 1473 | .host_id = HOST_ID_C6X_1_1, |
1239 | }, | 1474 | }, |
1240 | { | 1475 | { |
1241 | .start_resource = 2918, | 1476 | .start_resource = 17416, |
1242 | .num_resource = 256, | 1477 | .num_resource = 128, |
1243 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1478 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1244 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1479 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1245 | .host_id = HOST_ID_MAIN_0_R5_0, | 1480 | .host_id = HOST_ID_MAIN_0_R5_0, |
1246 | }, | 1481 | }, |
1247 | { | 1482 | { |
1248 | .start_resource = 3174, | 1483 | .start_resource = 17544, |
1249 | .num_resource = 512, | 1484 | .num_resource = 128, |
1250 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1485 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1251 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1486 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1252 | .host_id = HOST_ID_MAIN_0_R5_2, | 1487 | .host_id = HOST_ID_MAIN_0_R5_2, |
1253 | }, | 1488 | }, |
1254 | { | 1489 | { |
1255 | .start_resource = 3686, | 1490 | .start_resource = 17672, |
1256 | .num_resource = 922, | 1491 | .num_resource = 248, |
1257 | .type = RESASG_UTYPE (J721E_DEV_NAVSS0_UDMASS_INTAGGR_0, | 1492 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, |
1258 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 1493 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), |
1259 | .host_id = HOST_ID_ALL, | 1494 | .host_id = HOST_ID_ALL, |
1260 | }, | 1495 | }, |
1261 | 1496 | ||
1262 | /* MCU Nav HC TX Channel */ | 1497 | /* MCU Nav Free Ring */ |
1263 | { | ||
1264 | .start_resource = 0, | ||
1265 | .num_resource = 2, | ||
1266 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | ||
1267 | RESASG_SUBTYPE_UDMAP_TX_HCHAN), | ||
1268 | .host_id = HOST_ID_MCU_0_R5_0, | ||
1269 | }, | ||
1270 | |||
1271 | /* MCU Nav HC RX Channel */ | ||
1272 | { | ||
1273 | .start_resource = 0, | ||
1274 | .num_resource = 2, | ||
1275 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | ||
1276 | RESASG_SUBTYPE_UDMAP_RX_HCHAN), | ||
1277 | .host_id = HOST_ID_MCU_0_R5_0, | ||
1278 | }, | ||
1279 | |||
1280 | /* MCU Nav Total TX Channel */ | ||
1281 | { | 1498 | { |
1282 | .start_resource = 2, | 1499 | .start_resource = 96, |
1283 | .num_resource = 12, | 1500 | .num_resource = 20, |
1284 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1501 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1285 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1502 | RESASG_SUBTYPE_RA_GP), |
1286 | .host_id = HOST_ID_A72_2, | 1503 | .host_id = HOST_ID_A72_2, |
1287 | }, | 1504 | }, |
1288 | { | 1505 | { |
1289 | .start_resource = 14, | 1506 | .start_resource = 116, |
1290 | .num_resource = 6, | 1507 | .num_resource = 8, |
1291 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1508 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1292 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1509 | RESASG_SUBTYPE_RA_GP), |
1293 | .host_id = HOST_ID_A72_3, | 1510 | .host_id = HOST_ID_A72_3, |
1294 | }, | 1511 | }, |
1295 | { | 1512 | { |
1296 | .start_resource = 20, | 1513 | .start_resource = 124, |
1297 | .num_resource = 5, | 1514 | .num_resource = 32, |
1298 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1515 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1299 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1516 | RESASG_SUBTYPE_RA_GP), |
1300 | .host_id = HOST_ID_MCU_0_R5_0, | 1517 | .host_id = HOST_ID_MCU_0_R5_0, |
1301 | }, | 1518 | }, |
1302 | { | 1519 | { |
1303 | .start_resource = 25, | 1520 | .start_resource = 124, |
1304 | .num_resource = 2, | 1521 | .num_resource = 32, |
1305 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1522 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1306 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1523 | RESASG_SUBTYPE_RA_GP), |
1307 | .host_id = HOST_ID_MCU_0_R5_1, | 1524 | .host_id = HOST_ID_MCU_0_R5_1, |
1308 | }, | 1525 | }, |
1309 | { | 1526 | { |
1310 | .start_resource = 25, | 1527 | .start_resource = 156, |
1311 | .num_resource = 2, | 1528 | .num_resource = 12, |
1312 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1529 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1313 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1530 | RESASG_SUBTYPE_RA_GP), |
1314 | .host_id = HOST_ID_MCU_0_R5_2, | 1531 | .host_id = HOST_ID_MCU_0_R5_2, |
1315 | }, | 1532 | }, |
1316 | { | 1533 | { |
1317 | .start_resource = 27, | 1534 | .start_resource = 168, |
1318 | .num_resource = 2, | 1535 | .num_resource = 8, |
1319 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1536 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1320 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1537 | RESASG_SUBTYPE_RA_GP), |
1321 | .host_id = HOST_ID_MAIN_1_R5_0, | 1538 | .host_id = HOST_ID_MAIN_1_R5_0, |
1322 | }, | 1539 | }, |
1323 | { | 1540 | { |
1324 | .start_resource = 29, | 1541 | .start_resource = 176, |
1325 | .num_resource = 2, | 1542 | .num_resource = 8, |
1326 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1543 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1327 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1544 | RESASG_SUBTYPE_RA_GP), |
1328 | .host_id = HOST_ID_MAIN_1_R5_2, | 1545 | .host_id = HOST_ID_MAIN_1_R5_2, |
1329 | }, | 1546 | }, |
1330 | { | 1547 | { |
1331 | .start_resource = 31, | 1548 | .start_resource = 184, |
1332 | .num_resource = 2, | 1549 | .num_resource = 8, |
1333 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1550 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1334 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1551 | RESASG_SUBTYPE_RA_GP), |
1335 | .host_id = HOST_ID_C7X_1, | 1552 | .host_id = HOST_ID_C7X_1, |
1336 | }, | 1553 | }, |
1337 | { | 1554 | { |
1338 | .start_resource = 33, | 1555 | .start_resource = 192, |
1339 | .num_resource = 2, | 1556 | .num_resource = 8, |
1340 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1557 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1341 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1558 | RESASG_SUBTYPE_RA_GP), |
1342 | .host_id = HOST_ID_C6X_0_1, | 1559 | .host_id = HOST_ID_C6X_0_1, |
1343 | }, | 1560 | }, |
1344 | { | 1561 | { |
1345 | .start_resource = 35, | 1562 | .start_resource = 200, |
1346 | .num_resource = 2, | 1563 | .num_resource = 8, |
1347 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1564 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1348 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1565 | RESASG_SUBTYPE_RA_GP), |
1349 | .host_id = HOST_ID_C6X_1_1, | 1566 | .host_id = HOST_ID_C6X_1_1, |
1350 | }, | 1567 | }, |
1351 | { | 1568 | { |
1352 | .start_resource = 37, | 1569 | .start_resource = 208, |
1353 | .num_resource = 3, | 1570 | .num_resource = 16, |
1354 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1571 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1355 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1572 | RESASG_SUBTYPE_RA_GP), |
1356 | .host_id = HOST_ID_MAIN_0_R5_0, | 1573 | .host_id = HOST_ID_MAIN_0_R5_0, |
1357 | }, | 1574 | }, |
1358 | { | 1575 | { |
1359 | .start_resource = 40, | 1576 | .start_resource = 224, |
1360 | .num_resource = 2, | 1577 | .num_resource = 8, |
1361 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1578 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1362 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1579 | RESASG_SUBTYPE_RA_GP), |
1363 | .host_id = HOST_ID_MAIN_0_R5_2, | 1580 | .host_id = HOST_ID_MAIN_0_R5_2, |
1364 | }, | 1581 | }, |
1365 | { | 1582 | { |
1366 | .start_resource = 42, | 1583 | .start_resource = 232, |
1367 | .num_resource = 4, | 1584 | .num_resource = 20, |
1368 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1585 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1369 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | 1586 | RESASG_SUBTYPE_RA_GP), |
1370 | .host_id = HOST_ID_ALL, | 1587 | .host_id = HOST_ID_ALL, |
1371 | }, | 1588 | }, |
1372 | 1589 | ||
1373 | /* MCU Nav Total RX Channel */ | 1590 | /* MCU Nav Rx ring */ |
1374 | { | 1591 | { |
1375 | .start_resource = 2, | 1592 | .start_resource = 50, |
1376 | .num_resource = 12, | 1593 | .num_resource = 12, |
1377 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1594 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1378 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1595 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1379 | .host_id = HOST_ID_A72_2, | 1596 | .host_id = HOST_ID_A72_2, |
1380 | }, | 1597 | }, |
1381 | { | 1598 | { |
1382 | .start_resource = 14, | 1599 | .start_resource = 62, |
1383 | .num_resource = 6, | 1600 | .num_resource = 6, |
1384 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1601 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1385 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1602 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1386 | .host_id = HOST_ID_A72_3, | 1603 | .host_id = HOST_ID_A72_3, |
1387 | }, | 1604 | }, |
1388 | { | 1605 | { |
1389 | .start_resource = 20, | 1606 | .start_resource = 68, |
1390 | .num_resource = 5, | 1607 | .num_resource = 5, |
1391 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1608 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1392 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1609 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1393 | .host_id = HOST_ID_MCU_0_R5_0, | 1610 | .host_id = HOST_ID_MCU_0_R5_0, |
1394 | }, | 1611 | }, |
1395 | { | 1612 | { |
1396 | .start_resource = 25, | 1613 | .start_resource = 68, |
1397 | .num_resource = 2, | 1614 | .num_resource = 5, |
1398 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1615 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1399 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1616 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1400 | .host_id = HOST_ID_MCU_0_R5_1, | 1617 | .host_id = HOST_ID_MCU_0_R5_1, |
1401 | }, | 1618 | }, |
1402 | { | 1619 | { |
1403 | .start_resource = 25, | 1620 | .start_resource = 73, |
1404 | .num_resource = 2, | 1621 | .num_resource = 2, |
1405 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1622 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1406 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1623 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1407 | .host_id = HOST_ID_MCU_0_R5_2, | 1624 | .host_id = HOST_ID_MCU_0_R5_2, |
1408 | }, | 1625 | }, |
1409 | { | 1626 | { |
1410 | .start_resource = 27, | 1627 | .start_resource = 75, |
1411 | .num_resource = 2, | 1628 | .num_resource = 2, |
1412 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1629 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1413 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1630 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1414 | .host_id = HOST_ID_MAIN_1_R5_0, | 1631 | .host_id = HOST_ID_MAIN_1_R5_0, |
1415 | }, | 1632 | }, |
1416 | { | 1633 | { |
1417 | .start_resource = 29, | 1634 | .start_resource = 77, |
1418 | .num_resource = 2, | 1635 | .num_resource = 2, |
1419 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1636 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1420 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1637 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1421 | .host_id = HOST_ID_MAIN_1_R5_2, | 1638 | .host_id = HOST_ID_MAIN_1_R5_2, |
1422 | }, | 1639 | }, |
1423 | { | 1640 | { |
1424 | .start_resource = 31, | 1641 | .start_resource = 79, |
1425 | .num_resource = 2, | 1642 | .num_resource = 2, |
1426 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1643 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1427 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1644 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1428 | .host_id = HOST_ID_C7X_1, | 1645 | .host_id = HOST_ID_C7X_1, |
1429 | }, | 1646 | }, |
1430 | { | 1647 | { |
1431 | .start_resource = 33, | 1648 | .start_resource = 81, |
1432 | .num_resource = 2, | 1649 | .num_resource = 2, |
1433 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1650 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1434 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1651 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1435 | .host_id = HOST_ID_C6X_0_1, | 1652 | .host_id = HOST_ID_C6X_0_1, |
1436 | }, | 1653 | }, |
1437 | { | 1654 | { |
1438 | .start_resource = 35, | 1655 | .start_resource = 83, |
1439 | .num_resource = 2, | 1656 | .num_resource = 2, |
1440 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1657 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1441 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1658 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1442 | .host_id = HOST_ID_C6X_1_1, | 1659 | .host_id = HOST_ID_C6X_1_1, |
1443 | }, | 1660 | }, |
1444 | { | 1661 | { |
1445 | .start_resource = 37, | 1662 | .start_resource = 85, |
1446 | .num_resource = 3, | 1663 | .num_resource = 3, |
1447 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1664 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1448 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1665 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1449 | .host_id = HOST_ID_MAIN_0_R5_0, | 1666 | .host_id = HOST_ID_MAIN_0_R5_0, |
1450 | }, | 1667 | }, |
1451 | { | 1668 | { |
1452 | .start_resource = 40, | 1669 | .start_resource = 88, |
1453 | .num_resource = 2, | 1670 | .num_resource = 2, |
1454 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1671 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1455 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | 1672 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1456 | .host_id = HOST_ID_MAIN_0_R5_2, | 1673 | .host_id = HOST_ID_MAIN_0_R5_2, |
1457 | }, | 1674 | }, |
1458 | { | 1675 | { |
1459 | .start_resource = 42, | 1676 | .start_resource = 90, |
1460 | .num_resource = 3, | 1677 | .num_resource = 3, |
1461 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | ||
1462 | RESASG_SUBTYPE_UDMAP_RX_CHAN), | ||
1463 | .host_id = HOST_ID_ALL, | ||
1464 | }, | ||
1465 | |||
1466 | /* MCU Nav HC Tx ring */ | ||
1467 | { | ||
1468 | .start_resource = 0, | ||
1469 | .num_resource = 2, | ||
1470 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1678 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1471 | RESASG_SUBTYPE_RA_UDMAP_TX_H), | 1679 | RESASG_SUBTYPE_RA_UDMAP_RX), |
1472 | .host_id = HOST_ID_MCU_0_R5_0, | 1680 | .host_id = HOST_ID_ALL, |
1473 | }, | ||
1474 | |||
1475 | /* MCU Nav HC Rx ring */ | ||
1476 | { | ||
1477 | .start_resource = 48, | ||
1478 | .num_resource = 2, | ||
1479 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | ||
1480 | RESASG_SUBTYPE_RA_UDMAP_RX_H), | ||
1481 | .host_id = HOST_ID_MCU_0_R5_0, | ||
1482 | }, | 1681 | }, |
1483 | 1682 | ||
1484 | /* MCU Nav Tx ring */ | 1683 | /* MCU Nav Tx ring */ |
@@ -1504,8 +1703,8 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
1504 | .host_id = HOST_ID_MCU_0_R5_0, | 1703 | .host_id = HOST_ID_MCU_0_R5_0, |
1505 | }, | 1704 | }, |
1506 | { | 1705 | { |
1507 | .start_resource = 25, | 1706 | .start_resource = 20, |
1508 | .num_resource = 2, | 1707 | .num_resource = 5, |
1509 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1708 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1510 | RESASG_SUBTYPE_RA_UDMAP_TX), | 1709 | RESASG_SUBTYPE_RA_UDMAP_TX), |
1511 | .host_id = HOST_ID_MCU_0_R5_1, | 1710 | .host_id = HOST_ID_MCU_0_R5_1, |
@@ -1574,143 +1773,122 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
1574 | .host_id = HOST_ID_ALL, | 1773 | .host_id = HOST_ID_ALL, |
1575 | }, | 1774 | }, |
1576 | 1775 | ||
1577 | /* MCU Nav Rx ring */ | 1776 | /* MCU Nav High Capacity Rx ring */ |
1578 | { | ||
1579 | .start_resource = 50, | ||
1580 | .num_resource = 12, | ||
1581 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | ||
1582 | RESASG_SUBTYPE_RA_UDMAP_RX), | ||
1583 | .host_id = HOST_ID_A72_2, | ||
1584 | }, | ||
1585 | { | 1777 | { |
1586 | .start_resource = 62, | 1778 | .start_resource = 48, |
1587 | .num_resource = 6, | 1779 | .num_resource = 2, |
1588 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | ||
1589 | RESASG_SUBTYPE_RA_UDMAP_RX), | ||
1590 | .host_id = HOST_ID_A72_3, | ||
1591 | }, | ||
1592 | { | ||
1593 | .start_resource = 68, | ||
1594 | .num_resource = 5, | ||
1595 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1780 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1596 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1781 | RESASG_SUBTYPE_RA_UDMAP_RX_H), |
1597 | .host_id = HOST_ID_MCU_0_R5_0, | 1782 | .host_id = HOST_ID_MCU_0_R5_0, |
1598 | }, | 1783 | }, |
1599 | { | 1784 | { |
1600 | .start_resource = 73, | 1785 | .start_resource = 48, |
1601 | .num_resource = 2, | 1786 | .num_resource = 2, |
1602 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1787 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1603 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1788 | RESASG_SUBTYPE_RA_UDMAP_RX_H), |
1604 | .host_id = HOST_ID_MCU_0_R5_1, | 1789 | .host_id = HOST_ID_MCU_0_R5_1, |
1605 | }, | 1790 | }, |
1791 | |||
1792 | /* MCU Nav High Capacity Tx ring */ | ||
1606 | { | 1793 | { |
1607 | .start_resource = 73, | 1794 | .start_resource = 0, |
1608 | .num_resource = 2, | 1795 | .num_resource = 2, |
1609 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1796 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1610 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1797 | RESASG_SUBTYPE_RA_UDMAP_TX_H), |
1611 | .host_id = HOST_ID_MCU_0_R5_2, | 1798 | .host_id = HOST_ID_MCU_0_R5_0, |
1612 | }, | 1799 | }, |
1613 | { | 1800 | { |
1614 | .start_resource = 75, | 1801 | .start_resource = 0, |
1615 | .num_resource = 2, | 1802 | .num_resource = 2, |
1616 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1803 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1617 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1804 | RESASG_SUBTYPE_RA_UDMAP_TX_H), |
1618 | .host_id = HOST_ID_MAIN_1_R5_0, | 1805 | .host_id = HOST_ID_MCU_0_R5_1, |
1619 | }, | 1806 | }, |
1807 | |||
1808 | /* MCU Nav ring monitors */ | ||
1620 | { | 1809 | { |
1621 | .start_resource = 77, | 1810 | .start_resource = 0, |
1622 | .num_resource = 2, | 1811 | .num_resource = 3, |
1623 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1812 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1624 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1813 | RESASG_SUBTYPE_RA_MONITORS), |
1625 | .host_id = HOST_ID_MAIN_1_R5_2, | 1814 | .host_id = HOST_ID_A72_2, |
1626 | }, | 1815 | }, |
1627 | { | 1816 | { |
1628 | .start_resource = 79, | 1817 | .start_resource = 3, |
1629 | .num_resource = 2, | 1818 | .num_resource = 2, |
1630 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1819 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1631 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1820 | RESASG_SUBTYPE_RA_MONITORS), |
1632 | .host_id = HOST_ID_C7X_1, | 1821 | .host_id = HOST_ID_A72_3, |
1633 | }, | 1822 | }, |
1634 | { | 1823 | { |
1635 | .start_resource = 81, | 1824 | .start_resource = 5, |
1636 | .num_resource = 2, | 1825 | .num_resource = 3, |
1637 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1826 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1638 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1827 | RESASG_SUBTYPE_RA_MONITORS), |
1639 | .host_id = HOST_ID_C6X_0_1, | 1828 | .host_id = HOST_ID_MCU_0_R5_0, |
1640 | }, | 1829 | }, |
1641 | { | 1830 | { |
1642 | .start_resource = 83, | 1831 | .start_resource = 5, |
1643 | .num_resource = 2, | 1832 | .num_resource = 3, |
1644 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1833 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1645 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1834 | RESASG_SUBTYPE_RA_MONITORS), |
1646 | .host_id = HOST_ID_C6X_1_1, | 1835 | .host_id = HOST_ID_MCU_0_R5_1, |
1647 | }, | 1836 | }, |
1648 | { | 1837 | { |
1649 | .start_resource = 85, | 1838 | .start_resource = 8, |
1650 | .num_resource = 3, | 1839 | .num_resource = 3, |
1651 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1840 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1652 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1841 | RESASG_SUBTYPE_RA_MONITORS), |
1653 | .host_id = HOST_ID_MAIN_0_R5_0, | 1842 | .host_id = HOST_ID_MCU_0_R5_2, |
1654 | }, | 1843 | }, |
1655 | { | 1844 | { |
1656 | .start_resource = 88, | 1845 | .start_resource = 11, |
1657 | .num_resource = 2, | 1846 | .num_resource = 3, |
1658 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1847 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1659 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1848 | RESASG_SUBTYPE_RA_MONITORS), |
1660 | .host_id = HOST_ID_MAIN_0_R5_2, | 1849 | .host_id = HOST_ID_MAIN_1_R5_0, |
1661 | }, | 1850 | }, |
1662 | { | 1851 | { |
1663 | .start_resource = 90, | 1852 | .start_resource = 14, |
1664 | .num_resource = 3, | 1853 | .num_resource = 3, |
1665 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1854 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1666 | RESASG_SUBTYPE_RA_UDMAP_RX), | 1855 | RESASG_SUBTYPE_RA_MONITORS), |
1667 | .host_id = HOST_ID_ALL, | 1856 | .host_id = HOST_ID_MAIN_1_R5_2, |
1668 | }, | 1857 | }, |
1669 | |||
1670 | /* MCU Nav ring monitors */ | ||
1671 | { | 1858 | { |
1672 | .start_resource = 0, | 1859 | .start_resource = 17, |
1673 | .num_resource = 3, | 1860 | .num_resource = 3, |
1674 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1861 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1675 | RESASG_SUBTYPE_RA_MONITORS), | 1862 | RESASG_SUBTYPE_RA_MONITORS), |
1676 | .host_id = HOST_ID_A72_2, | 1863 | .host_id = HOST_ID_C7X_1, |
1677 | }, | 1864 | }, |
1678 | { | 1865 | { |
1679 | .start_resource = 3, | 1866 | .start_resource = 20, |
1680 | .num_resource = 2, | 1867 | .num_resource = 3, |
1681 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1868 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1682 | RESASG_SUBTYPE_RA_MONITORS), | 1869 | RESASG_SUBTYPE_RA_MONITORS), |
1683 | .host_id = HOST_ID_A72_3, | 1870 | .host_id = HOST_ID_C6X_0_1, |
1684 | }, | 1871 | }, |
1685 | { | 1872 | { |
1686 | .start_resource = 5, | 1873 | .start_resource = 23, |
1687 | .num_resource = 27, | 1874 | .num_resource = 3, |
1688 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1875 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1689 | RESASG_SUBTYPE_RA_MONITORS), | 1876 | RESASG_SUBTYPE_RA_MONITORS), |
1690 | .host_id = HOST_ID_ALL, | 1877 | .host_id = HOST_ID_C6X_1_1, |
1691 | }, | ||
1692 | |||
1693 | /* MCU Nav nonsecure proxies */ | ||
1694 | { | ||
1695 | .start_resource = 1, | ||
1696 | .num_resource = 4, | ||
1697 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0, | ||
1698 | RESASG_SUBTYPE_PROXY_PROXIES), | ||
1699 | .host_id = HOST_ID_A72_2, | ||
1700 | }, | 1878 | }, |
1701 | { | 1879 | { |
1702 | .start_resource = 5, | 1880 | .start_resource = 26, |
1703 | .num_resource = 4, | 1881 | .num_resource = 3, |
1704 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0, | 1882 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1705 | RESASG_SUBTYPE_PROXY_PROXIES), | 1883 | RESASG_SUBTYPE_RA_MONITORS), |
1706 | .host_id = HOST_ID_A72_3, | 1884 | .host_id = HOST_ID_MAIN_0_R5_0, |
1707 | }, | 1885 | }, |
1708 | { | 1886 | { |
1709 | .start_resource = 9, | 1887 | .start_resource = 29, |
1710 | .num_resource = 55, | 1888 | .num_resource = 3, |
1711 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_PROXY_0, | 1889 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, |
1712 | RESASG_SUBTYPE_PROXY_PROXIES), | 1890 | RESASG_SUBTYPE_RA_MONITORS), |
1713 | .host_id = HOST_ID_ALL, | 1891 | .host_id = HOST_ID_MAIN_0_R5_2, |
1714 | }, | 1892 | }, |
1715 | 1893 | ||
1716 | /* MCU Nav Free RX Flow */ | 1894 | /* MCU Nav Free RX Flow */ |
@@ -1736,8 +1914,8 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
1736 | .host_id = HOST_ID_MCU_0_R5_0, | 1914 | .host_id = HOST_ID_MCU_0_R5_0, |
1737 | }, | 1915 | }, |
1738 | { | 1916 | { |
1739 | .start_resource = 68, | 1917 | .start_resource = 60, |
1740 | .num_resource = 4, | 1918 | .num_resource = 8, |
1741 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | 1919 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1742 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), | 1920 | RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON), |
1743 | .host_id = HOST_ID_MCU_0_R5_1, | 1921 | .host_id = HOST_ID_MCU_0_R5_1, |
@@ -1785,270 +1963,245 @@ const struct boardcfg_rm_local j721e_boardcfg_rm_data = { | |||
1785 | .host_id = HOST_ID_ALL, | 1963 | .host_id = HOST_ID_ALL, |
1786 | }, | 1964 | }, |
1787 | 1965 | ||
1788 | /* MCU Nav Free Ring */ | 1966 | /* MCU Nav Total RX channel */ |
1789 | { | 1967 | { |
1790 | .start_resource = 96, | 1968 | .start_resource = 2, |
1791 | .num_resource = 20, | 1969 | .num_resource = 12, |
1792 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1970 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1793 | RESASG_SUBTYPE_RA_GP), | 1971 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1794 | .host_id = HOST_ID_A72_2, | 1972 | .host_id = HOST_ID_A72_2, |
1795 | }, | 1973 | }, |
1796 | { | 1974 | { |
1797 | .start_resource = 116, | 1975 | .start_resource = 14, |
1798 | .num_resource = 8, | 1976 | .num_resource = 6, |
1799 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1977 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1800 | RESASG_SUBTYPE_RA_GP), | 1978 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1801 | .host_id = HOST_ID_A72_3, | 1979 | .host_id = HOST_ID_A72_3, |
1802 | }, | 1980 | }, |
1803 | { | 1981 | { |
1804 | .start_resource = 124, | 1982 | .start_resource = 20, |
1805 | .num_resource = 32, | 1983 | .num_resource = 5, |
1806 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1984 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1807 | RESASG_SUBTYPE_RA_GP), | 1985 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1808 | .host_id = HOST_ID_MCU_0_R5_0, | 1986 | .host_id = HOST_ID_MCU_0_R5_0, |
1809 | }, | 1987 | }, |
1810 | { | 1988 | { |
1811 | .start_resource = 156, | 1989 | .start_resource = 20, |
1812 | .num_resource = 12, | 1990 | .num_resource = 5, |
1813 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1991 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1814 | RESASG_SUBTYPE_RA_GP), | 1992 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1815 | .host_id = HOST_ID_MCU_0_R5_1, | 1993 | .host_id = HOST_ID_MCU_0_R5_1, |
1816 | }, | 1994 | }, |
1817 | { | 1995 | { |
1818 | .start_resource = 156, | 1996 | .start_resource = 25, |
1819 | .num_resource = 12, | 1997 | .num_resource = 2, |
1820 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 1998 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1821 | RESASG_SUBTYPE_RA_GP), | 1999 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1822 | .host_id = HOST_ID_MCU_0_R5_2, | 2000 | .host_id = HOST_ID_MCU_0_R5_2, |
1823 | }, | 2001 | }, |
1824 | { | 2002 | { |
1825 | .start_resource = 168, | 2003 | .start_resource = 27, |
1826 | .num_resource = 8, | 2004 | .num_resource = 2, |
1827 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 2005 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1828 | RESASG_SUBTYPE_RA_GP), | 2006 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1829 | .host_id = HOST_ID_MAIN_1_R5_0, | 2007 | .host_id = HOST_ID_MAIN_1_R5_0, |
1830 | }, | 2008 | }, |
1831 | { | 2009 | { |
1832 | .start_resource = 176, | 2010 | .start_resource = 29, |
1833 | .num_resource = 8, | 2011 | .num_resource = 2, |
1834 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 2012 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1835 | RESASG_SUBTYPE_RA_GP), | 2013 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1836 | .host_id = HOST_ID_MAIN_1_R5_2, | 2014 | .host_id = HOST_ID_MAIN_1_R5_2, |
1837 | }, | 2015 | }, |
1838 | { | 2016 | { |
1839 | .start_resource = 184, | 2017 | .start_resource = 31, |
1840 | .num_resource = 8, | 2018 | .num_resource = 2, |
1841 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 2019 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1842 | RESASG_SUBTYPE_RA_GP), | 2020 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1843 | .host_id = HOST_ID_C7X_1, | 2021 | .host_id = HOST_ID_C7X_1, |
1844 | }, | 2022 | }, |
1845 | { | 2023 | { |
1846 | .start_resource = 192, | 2024 | .start_resource = 33, |
1847 | .num_resource = 8, | 2025 | .num_resource = 2, |
1848 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 2026 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1849 | RESASG_SUBTYPE_RA_GP), | 2027 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1850 | .host_id = HOST_ID_C6X_0_1, | 2028 | .host_id = HOST_ID_C6X_0_1, |
1851 | }, | 2029 | }, |
1852 | { | 2030 | { |
1853 | .start_resource = 200, | 2031 | .start_resource = 35, |
1854 | .num_resource = 8, | 2032 | .num_resource = 2, |
1855 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 2033 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1856 | RESASG_SUBTYPE_RA_GP), | 2034 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1857 | .host_id = HOST_ID_C6X_1_1, | 2035 | .host_id = HOST_ID_C6X_1_1, |
1858 | }, | 2036 | }, |
1859 | { | 2037 | { |
1860 | .start_resource = 208, | 2038 | .start_resource = 37, |
1861 | .num_resource = 16, | 2039 | .num_resource = 3, |
1862 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 2040 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1863 | RESASG_SUBTYPE_RA_GP), | 2041 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1864 | .host_id = HOST_ID_MAIN_0_R5_0, | 2042 | .host_id = HOST_ID_MAIN_0_R5_0, |
1865 | }, | 2043 | }, |
1866 | { | 2044 | { |
1867 | .start_resource = 224, | 2045 | .start_resource = 40, |
1868 | .num_resource = 8, | 2046 | .num_resource = 2, |
1869 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 2047 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1870 | RESASG_SUBTYPE_RA_GP), | 2048 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1871 | .host_id = HOST_ID_MAIN_0_R5_2, | 2049 | .host_id = HOST_ID_MAIN_0_R5_2, |
1872 | }, | 2050 | }, |
1873 | { | 2051 | { |
1874 | .start_resource = 232, | 2052 | .start_resource = 42, |
1875 | .num_resource = 20, | 2053 | .num_resource = 3, |
1876 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_RINGACC_0, | 2054 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1877 | RESASG_SUBTYPE_RA_GP), | 2055 | RESASG_SUBTYPE_UDMAP_RX_CHAN), |
1878 | .host_id = HOST_ID_ALL, | 2056 | .host_id = HOST_ID_ALL, |
1879 | }, | 2057 | }, |
1880 | 2058 | ||
1881 | /* MCU Nav IA VINT */ | 2059 | /* MCU Nav High Capacity RX channel */ |
1882 | { | 2060 | { |
1883 | .start_resource = 8, | 2061 | .start_resource = 0, |
1884 | .num_resource = 32, | 2062 | .num_resource = 2, |
1885 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2063 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1886 | RESASG_SUBTYPE_IA_VINT), | 2064 | RESASG_SUBTYPE_UDMAP_RX_HCHAN), |
2065 | .host_id = HOST_ID_MCU_0_R5_0, | ||
2066 | }, | ||
2067 | { | ||
2068 | .start_resource = 0, | ||
2069 | .num_resource = 2, | ||
2070 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | ||
2071 | RESASG_SUBTYPE_UDMAP_RX_HCHAN), | ||
2072 | .host_id = HOST_ID_MCU_0_R5_1, | ||
2073 | }, | ||
2074 | |||
2075 | /* MCU Nav Total TX channel */ | ||
2076 | { | ||
2077 | .start_resource = 2, | ||
2078 | .num_resource = 12, | ||
2079 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | ||
2080 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | ||
1887 | .host_id = HOST_ID_A72_2, | 2081 | .host_id = HOST_ID_A72_2, |
1888 | }, | 2082 | }, |
1889 | { | 2083 | { |
1890 | .start_resource = 40, | 2084 | .start_resource = 14, |
1891 | .num_resource = 16, | 2085 | .num_resource = 6, |
1892 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2086 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1893 | RESASG_SUBTYPE_IA_VINT), | 2087 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1894 | .host_id = HOST_ID_A72_3, | 2088 | .host_id = HOST_ID_A72_3, |
1895 | }, | 2089 | }, |
1896 | { | 2090 | { |
1897 | .start_resource = 56, | 2091 | .start_resource = 20, |
1898 | .num_resource = 64, | 2092 | .num_resource = 5, |
1899 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2093 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1900 | RESASG_SUBTYPE_IA_VINT), | 2094 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1901 | .host_id = HOST_ID_MCU_0_R5_0, | 2095 | .host_id = HOST_ID_MCU_0_R5_0, |
1902 | }, | 2096 | }, |
1903 | { | 2097 | { |
1904 | .start_resource = 120, | 2098 | .start_resource = 20, |
1905 | .num_resource = 4, | 2099 | .num_resource = 5, |
1906 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2100 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1907 | RESASG_SUBTYPE_IA_VINT), | 2101 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
2102 | .host_id = HOST_ID_MCU_0_R5_1, | ||
2103 | }, | ||
2104 | { | ||
2105 | .start_resource = 25, | ||
2106 | .num_resource = 2, | ||
2107 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, | ||
2108 | RESASG_SUBTYPE_UDMAP_TX_CHAN), | ||
1908 | .host_id = HOST_ID_MCU_0_R5_2, | 2109 | .host_id = HOST_ID_MCU_0_R5_2, |
1909 | }, | 2110 | }, |
1910 | { | 2111 | { |
1911 | .start_resource = 124, | 2112 | .start_resource = 27, |
1912 | .num_resource = 16, | 2113 | .num_resource = 2, |
1913 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2114 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1914 | RESASG_SUBTYPE_IA_VINT), | 2115 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1915 | .host_id = HOST_ID_MAIN_1_R5_0, | 2116 | .host_id = HOST_ID_MAIN_1_R5_0, |
1916 | }, | 2117 | }, |
1917 | { | 2118 | { |
1918 | .start_resource = 140, | 2119 | .start_resource = 29, |
1919 | .num_resource = 16, | 2120 | .num_resource = 2, |
1920 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2121 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1921 | RESASG_SUBTYPE_IA_VINT), | 2122 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1922 | .host_id = HOST_ID_MAIN_1_R5_2, | 2123 | .host_id = HOST_ID_MAIN_1_R5_2, |
1923 | }, | 2124 | }, |
1924 | { | 2125 | { |
1925 | .start_resource = 156, | 2126 | .start_resource = 31, |
1926 | .num_resource = 8, | 2127 | .num_resource = 2, |
1927 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2128 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1928 | RESASG_SUBTYPE_IA_VINT), | 2129 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1929 | .host_id = HOST_ID_C7X_1, | 2130 | .host_id = HOST_ID_C7X_1, |
1930 | }, | 2131 | }, |
1931 | { | 2132 | { |
1932 | .start_resource = 164, | 2133 | .start_resource = 33, |
1933 | .num_resource = 8, | 2134 | .num_resource = 2, |
1934 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2135 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1935 | RESASG_SUBTYPE_IA_VINT), | 2136 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1936 | .host_id = HOST_ID_C6X_0_1, | 2137 | .host_id = HOST_ID_C6X_0_1, |
1937 | }, | 2138 | }, |
1938 | { | 2139 | { |
1939 | .start_resource = 172, | 2140 | .start_resource = 35, |
1940 | .num_resource = 8, | 2141 | .num_resource = 2, |
1941 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2142 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1942 | RESASG_SUBTYPE_IA_VINT), | 2143 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1943 | .host_id = HOST_ID_C6X_1_1, | 2144 | .host_id = HOST_ID_C6X_1_1, |
1944 | }, | 2145 | }, |
1945 | { | 2146 | { |
1946 | .start_resource = 180, | 2147 | .start_resource = 37, |
1947 | .num_resource = 16, | 2148 | .num_resource = 3, |
1948 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2149 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1949 | RESASG_SUBTYPE_IA_VINT), | 2150 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1950 | .host_id = HOST_ID_MAIN_0_R5_0, | 2151 | .host_id = HOST_ID_MAIN_0_R5_0, |
1951 | }, | 2152 | }, |
1952 | { | 2153 | { |
1953 | .start_resource = 196, | 2154 | .start_resource = 40, |
1954 | .num_resource = 16, | 2155 | .num_resource = 2, |
1955 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2156 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1956 | RESASG_SUBTYPE_IA_VINT), | 2157 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1957 | .host_id = HOST_ID_MAIN_0_R5_2, | 2158 | .host_id = HOST_ID_MAIN_0_R5_2, |
1958 | }, | 2159 | }, |
1959 | { | 2160 | { |
1960 | .start_resource = 212, | 2161 | .start_resource = 42, |
1961 | .num_resource = 44, | 2162 | .num_resource = 4, |
1962 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2163 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1963 | RESASG_SUBTYPE_IA_VINT), | 2164 | RESASG_SUBTYPE_UDMAP_TX_CHAN), |
1964 | .host_id = HOST_ID_ALL, | 2165 | .host_id = HOST_ID_ALL, |
1965 | }, | 2166 | }, |
1966 | 2167 | ||
1967 | /* MCU Nav IA SEVT */ | 2168 | /* MCU Nav High Capacity TX channel */ |
1968 | { | ||
1969 | .start_resource = 16392, | ||
1970 | .num_resource = 128, | ||
1971 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | ||
1972 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | ||
1973 | .host_id = HOST_ID_A72_2, | ||
1974 | }, | ||
1975 | { | 2169 | { |
1976 | .start_resource = 16520, | 2170 | .start_resource = 0, |
1977 | .num_resource = 128, | 2171 | .num_resource = 2, |
1978 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2172 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1979 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 2173 | RESASG_SUBTYPE_UDMAP_TX_HCHAN), |
1980 | .host_id = HOST_ID_A72_3, | ||
1981 | }, | ||
1982 | { | ||
1983 | .start_resource = 16648, | ||
1984 | .num_resource = 256, | ||
1985 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | ||
1986 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | ||
1987 | .host_id = HOST_ID_MCU_0_R5_0, | 2174 | .host_id = HOST_ID_MCU_0_R5_0, |
1988 | }, | 2175 | }, |
1989 | { | 2176 | { |
1990 | .start_resource = 16904, | 2177 | .start_resource = 0, |
1991 | .num_resource = 64, | 2178 | .num_resource = 2, |
1992 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2179 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_UDMAP_0, |
1993 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 2180 | RESASG_SUBTYPE_UDMAP_TX_HCHAN), |
1994 | .host_id = HOST_ID_MCU_0_R5_2, | 2181 | .host_id = HOST_ID_MCU_0_R5_1, |
1995 | }, | ||
1996 | { | ||
1997 | .start_resource = 16968, | ||
1998 | .num_resource = 128, | ||
1999 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | ||
2000 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | ||
2001 | .host_id = HOST_ID_MAIN_1_R5_0, | ||
2002 | }, | ||
2003 | { | ||
2004 | .start_resource = 17096, | ||
2005 | .num_resource = 128, | ||
2006 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | ||
2007 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | ||
2008 | .host_id = HOST_ID_MAIN_1_R5_2, | ||
2009 | }, | ||
2010 | { | ||
2011 | .start_resource = 17224, | ||
2012 | .num_resource = 64, | ||
2013 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | ||
2014 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | ||
2015 | .host_id = HOST_ID_C7X_1, | ||
2016 | }, | ||
2017 | { | ||
2018 | .start_resource = 17288, | ||
2019 | .num_resource = 64, | ||
2020 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | ||
2021 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | ||
2022 | .host_id = HOST_ID_C6X_0_1, | ||
2023 | }, | ||
2024 | { | ||
2025 | .start_resource = 17352, | ||
2026 | .num_resource = 64, | ||
2027 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | ||
2028 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | ||
2029 | .host_id = HOST_ID_C6X_1_1, | ||
2030 | }, | 2182 | }, |
2183 | |||
2184 | /* MCU NAVSS IR for MCU R5 */ | ||
2031 | { | 2185 | { |
2032 | .start_resource = 17416, | 2186 | .start_resource = 4, |
2033 | .num_resource = 128, | 2187 | .num_resource = 14, |
2034 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2188 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_ROUTER_0, |
2035 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 2189 | RESASG_SUBTYPE_IR_OUTPUT), |
2036 | .host_id = HOST_ID_MAIN_0_R5_0, | 2190 | .host_id = HOST_ID_MCU_0_R5_0, |
2037 | }, | 2191 | }, |
2038 | { | 2192 | { |
2039 | .start_resource = 17544, | 2193 | .start_resource = 4, |
2040 | .num_resource = 128, | 2194 | .num_resource = 14, |
2041 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2195 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_ROUTER_0, |
2042 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 2196 | RESASG_SUBTYPE_IR_OUTPUT), |
2043 | .host_id = HOST_ID_MAIN_0_R5_2, | 2197 | .host_id = HOST_ID_MCU_0_R5_1, |
2044 | }, | 2198 | }, |
2045 | { | 2199 | { |
2046 | .start_resource = 17672, | 2200 | .start_resource = 18, |
2047 | .num_resource = 248, | 2201 | .num_resource = 14, |
2048 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTAGGR_0, | 2202 | .type = RESASG_UTYPE (J721E_DEV_MCU_NAVSS0_INTR_ROUTER_0, |
2049 | RESASG_SUBTYPE_GLOBAL_EVENT_SEVT), | 2203 | RESASG_SUBTYPE_IR_OUTPUT), |
2050 | .host_id = HOST_ID_ALL, | 2204 | .host_id = HOST_ID_MCU_0_R5_2, |
2051 | }, | 2205 | }, |
2052 | |||
2053 | }, | 2206 | }, |
2054 | }; | 2207 | }; |
diff --git a/soc/j721e/evm/sysfw_img_cfg.h b/soc/j721e/evm/sysfw_img_cfg.h index 35f24ca8a..02fbd0563 100644 --- a/soc/j721e/evm/sysfw_img_cfg.h +++ b/soc/j721e/evm/sysfw_img_cfg.h | |||
@@ -35,6 +35,6 @@ | |||
35 | #ifndef SYSFW_IMG_CFG_H | 35 | #ifndef SYSFW_IMG_CFG_H |
36 | #define SYSFW_IMG_CFG_H | 36 | #define SYSFW_IMG_CFG_H |
37 | 37 | ||
38 | #define BOARDCFG_RM_RESASG_ENTRIES 270 | 38 | #define BOARDCFG_RM_RESASG_ENTRIES 292 |
39 | 39 | ||
40 | #endif /* SYSFW_IMG_CFG_H */ | 40 | #endif /* SYSFW_IMG_CFG_H */ |