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Update the common.h headers to add new defines from
SYSFW 2020.07-rc1.
Starting from SYSFW v2020.07-rc1, a secure_debug_config section
is mandatory in the security config. Otherwise the boot fails
on all SoCs.
Fix this by adding a section for secure_debug_config with
appropriate parameters configured on all on AM65x, AM65x SR2.0,
J721E and J7200 SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
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Now that SoCs have different boot image targets, introduce SOC specific
Makefiles to represent boot targets. Below are boot targets:
- AM65x: sysfw.itb
- AM65x SR2: sysfw.itb
- J721E: sysfw.itb
- J7200: tiboot3.bin, sysfw.itb
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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The number of Main NavSS rings reserved by DMSC for High capacity Rx
channels is off by one. Update the board configuration validation
script and fix the RM cfg resource entries for the same on both AM65x
and AM65x SR2.0 SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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Each of the MCU R5F cores are represented by different HOST_IDs, and
the ABI 3.0 RM changes have reassigned all the MAIN2MCU interrupt router
outputs back to only the MCU R5F Core0. This breaks the IPC use-cases
when the MCU R5FSS cluster is configured for Split-mode.
Partition both the MAIN2MCU_LVL and MAIN2MCU_PLS Interrupt Router
outputs equally between the non-secure contexts of both the MCU
R5F cores.
Signed-off-by: Suman Anna <s-anna@ti.com>
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The Main NavSS IR on AM65x SoCs has a total of 152 output interrupt
lines, out of which the first 16 are reserved for System Firmware.
The ABI 3.0 resource updates have assigned all the remaining IR
output lines to the A53 host context HOST_ID_A53_2, which is wrong.
The Main NavSS IR also supports some interrupt lines for the MCU
R5F cores (connected through MAIN2MCU LVL IR) and for each of the
3 ICSSG subsystems.
Fix up the Main NavSS IR outputs properly by adding resources for
each of the processor subsystems. The output lines [120:127] are
split equally for each of the MCU R5F cores (to support Split-mode),
leaving only 104 usable interrupts for the A53 core. The output
lines [128:151] are associated with the ICSSG subsystems.
Signed-off-by: Suman Anna <s-anna@ti.com>
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Update the common.h headers to add new defines from SYSFW 2020.04.
Starting from SYSFW v2020.04, an sa2ul_config section is mandatory in
the security config. Otherwise the boot fails.
Fix this by adding a section for sa2ul_config with all parameters
configured to 0.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
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Update the common.h headers to add new defines from SYSFW 2020.03.
Starting from SYSFW v2020.03, a dkek_config section is mandatory in
the security config. Otherwise the boot fails.
Fix this by adding a section for dkek_config with HOST_ID_ALL in
allowed_hosts and allow_dkek_export_tisci set.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Tested-by: Suman Anna <s-anna@ti.com>
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Update the AM65x SR2 RM board configuration to use ABI 3.0 resource type
definitions.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
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Add support for AM65x SR2 SoCs which have slightly different board
configuration requirements than AM65x and also require a specific
firmware image.
Also update the SYSFW_GIT_HASH to point to the latest ti-linux-firmware
repo which contains v2019.12b SR2 binary.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
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