aboutsummaryrefslogtreecommitdiffstats
blob: f5ec123d4e663b1d4ee0bcd0450cb1d8decab70c (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
/*
 * K3 System Firmware Board Configuration Data Definitions
 *
 * Copyright (C) 2019-2020 Texas Instruments Incorporated - https://www.ti.com/
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef RESASG_TYPES_H
#define RESASG_TYPES_H

/**
 * Resource assignment type shift
 */
#define RESASG_TYPE_SHIFT (0x0006U)
/**
 * Resource assignment type mask
 */
#define RESASG_TYPE_MASK (0xFFC0U)
/**
 * Resource assignment subtype shift
 */
#define RESASG_SUBTYPE_SHIFT (0x0000U)
/**
 * Resource assignment subtype mask
 */
#define RESASG_SUBTYPE_MASK (0x003FU)
/**
 * Macro to create unique resource assignment types using type and subtype
 */

#define RESASG_UTYPE(type, subtype) \
	(((type << RESASG_TYPE_SHIFT) & RESASG_TYPE_MASK) |\
	((subtype << RESASG_SUBTYPE_SHIFT) & RESASG_SUBTYPE_MASK))

/**
 * IA subtypes definitions
 */
#define RESASG_SUBTYPE_IA_VINT (0x000AU)
#define RESASG_SUBTYPE_GLOBAL_EVENT_GEVT (0x000BU)
#define RESASG_SUBTYPE_GLOBAL_EVENT_MEVT (0x000CU)
#define RESASG_SUBTYPE_GLOBAL_EVENT_SEVT (0x000DU)
#define RESASG_SUBTYPE_GLOBAL_EVENT_LEVT (0x000EU)
#define RESASG_SUBTYPE_IA_TIMERMGR_EVT_OES (0x000FU)
#define RESASG_SUBTYPE_IA_PKTDMA_TX_CHAN_ERROR_OES (0x0010U)
#define RESASG_SUBTYPE_IA_PKTDMA_TX_FLOW_COMPLETION_OES (0x0011U)
#define RESASG_SUBTYPE_IA_PKTDMA_RX_CHAN_ERROR_OES (0x0012U)
#define RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_COMPLETION_OES (0x0013U)
#define RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_STARVATION_OES (0x0014U)
#define RESASG_SUBTYPE_IA_PKTDMA_RX_FLOW_FIREWALL_OES (0x0015U)
#define RESASG_SUBTYPE_IA_BCDMA_CHAN_ERROR_OES (0x0016U)
#define RESASG_SUBTYPE_IA_BCDMA_CHAN_DATA_COMPLETION_OES (0x0017U)
#define RESASG_SUBTYPE_IA_BCDMA_CHAN_RING_COMPLETION_OES (0x0018U)
#define RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_ERROR_OES (0x0019U)
#define RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_DATA_COMPLETION_OES (0x001AU)
#define RESASG_SUBTYPE_IA_BCDMA_TX_CHAN_RING_COMPLETION_OES (0x001BU)
#define RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_ERROR_OES (0x001CU)
#define RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_DATA_COMPLETION_OES (0x001DU)
#define RESASG_SUBTYPE_IA_BCDMA_RX_CHAN_RING_COMPLETION_OES (0x001EU)
#define RESASG_SUBTYPES_IA_CNT (0x0015U)

/**
 * IR subtypes definitions
 */
#define RESASG_SUBTYPE_IR_OUTPUT (0x0000U)
#define RESASG_SUBTYPES_IR_CNT (0x0001U)

/**
 * RA subtypes definitions
 */
#define RESASG_SUBTYPE_RA_ERROR_OES (0x0000U)
#define RESASG_SUBTYPE_RA_VIRTID (0x000AU)
#define RESASG_SUBTYPE_RA_GENERIC_IPC (0x000CU)
#define RESASG_SUBTYPE_BCDMA_RING_BLOCK_COPY_CHAN (0x000DU)
#define RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_RX_CHAN (0x000EU)
#define RESASG_SUBTYPE_BCDMA_RING_SPLIT_TR_TX_CHAN (0x000FU)
#define RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_TX_CHAN (0x0010U)
#define RESASG_SUBTYPE_PKTDMA_RING_CPSW_TX_CHAN (0x0011U)
#define RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_0_CHAN (0x0012U)
#define RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_1_CHAN (0x0013U)
#define RESASG_SUBTYPE_PKTDMA_RING_ICSSG_0_TX_CHAN (0x0014U)
#define RESASG_SUBTYPE_PKTDMA_RING_ICSSG_1_TX_CHAN (0x0015U)
#define RESASG_SUBTYPE_PKTDMA_RING_UNMAPPED_RX_CHAN (0x0016U)
#define RESASG_SUBTYPE_PKTDMA_RING_CPSW_RX_CHAN (0x0017U)
#define RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_0_CHAN (0x0018U)
#define RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_1_CHAN (0x0019U)
#define RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_2_CHAN (0x001AU)
#define RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_3_CHAN (0x001BU)
#define RESASG_SUBTYPE_PKTDMA_RING_ICSSG_0_RX_CHAN (0x001CU)
#define RESASG_SUBTYPE_PKTDMA_RING_ICSSG_1_RX_CHAN (0x001DU)
#define RESASG_SUBTYPES_RA_CNT (0x0014U)

/**
 * UDMAP subtypes definitions
 */
#define RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER (0x0002U)
#define RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG (0x0003U)
#define RESASG_SUBTYPE_BCDMA_BLOCK_COPY_CHAN (0x0020U)
#define RESASG_SUBTYPE_BCDMA_SPLIT_TR_RX_CHAN (0x0021U)
#define RESASG_SUBTYPE_BCDMA_SPLIT_TR_TX_CHAN (0x0022U)
#define RESASG_SUBTYPE_PKTDMA_UNMAPPED_TX_CHAN (0x0023U)
#define RESASG_SUBTYPE_PKTDMA_CPSW_TX_CHAN (0x0024U)
#define RESASG_SUBTYPE_PKTDMA_SAUL_TX_0_CHAN (0x0025U)
#define RESASG_SUBTYPE_PKTDMA_SAUL_TX_1_CHAN (0x0026U)
#define RESASG_SUBTYPE_PKTDMA_ICSSG_0_TX_CHAN (0x0027U)
#define RESASG_SUBTYPE_PKTDMA_ICSSG_1_TX_CHAN (0x0028U)
#define RESASG_SUBTYPE_PKTDMA_UNMAPPED_RX_CHAN (0x0029U)
#define RESASG_SUBTYPE_PKTDMA_FLOW_UNMAPPED_RX_CHAN (0x002AU)
#define RESASG_SUBTYPE_PKTDMA_CPSW_RX_CHAN (0x002BU)
#define RESASG_SUBTYPE_PKTDMA_FLOW_CPSW_RX_CHAN (0x002CU)
#define RESASG_SUBTYPE_PKTDMA_SAUL_RX_0_CHAN (0x002DU)
#define RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_0_CHAN (0x002EU)
#define RESASG_SUBTYPE_PKTDMA_SAUL_RX_1_CHAN (0x002FU)
#define RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_1_CHAN (0x0030U)
#define RESASG_SUBTYPE_PKTDMA_SAUL_RX_2_CHAN (0x0031U)
#define RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_2_CHAN (0x0032U)
#define RESASG_SUBTYPE_PKTDMA_SAUL_RX_3_CHAN (0x0033U)
#define RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_3_CHAN (0x0034U)
#define RESASG_SUBTYPE_PKTDMA_ICSSG_0_RX_CHAN (0x0035U)
#define RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_0_RX_CHAN (0x0036U)
#define RESASG_SUBTYPE_PKTDMA_ICSSG_1_RX_CHAN (0x0037U)
#define RESASG_SUBTYPE_PKTDMA_FLOW_ICSSG_1_RX_CHAN (0x0038U)
#define RESASG_SUBTYPES_UDMAP_CNT (0x001BU)


/**
 * Total number of unique resource types for SoC
 */
#define RESASG_UTYPE_CNT 72U

#endif /* RESASG_TYPES_H */