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|
{
"comment": "Python struct module (https://docs.python.org/2/library/struct.html#module-struct) format codes and validation rules for the board configuration structures",
"format_rules": {
"boardcfg_substructure_header": {
"magic": {
"fmt": "H"
},
"size": {
"fmt": "H"
}
},
"boardcfg_abi_rev": {
"boardcfg_abi_maj": {
"fmt": "B"
},
"boardcfg_abi_min": {
"fmt": "B"
}
},
"boardcfg_rm_host_cfg_entry": {
"host_id": {
"fmt": "B"
},
"allowed_atype": {
"fmt": "B"
},
"allowed_qos": {
"fmt": "H"
},
"allowed_orderid": {
"fmt": "I"
},
"allowed_priority": {
"fmt": "H"
},
"allowed_sched_priority": {
"fmt": "B"
}
},
"boardcfg_rm_host_cfg": {
"subhdr": {
"fmt": "boardcfg_substructure_header",
"value": {
"magic": "0x4c41",
"size": "boardcfg_rm_host_cfg"
}
},
"host_cfg_entries": {
"fmt": "boardcfg_rm_host_cfg_entry",
"elements": 32
}
},
"boardcfg_rm_resasg_entry": {
"start_resource": {
"fmt": "H"
},
"num_resource": {
"fmt": "H"
},
"type": {
"fmt": "H"
},
"host_id": {
"fmt": "B"
},
"reserved": {
"fmt": "B"
}
},
"boardcfg_rm_resasg": {
"subhdr": {
"fmt": "boardcfg_substructure_header",
"value": {
"magic": "0x7b25",
"size": "boardcfg_rm_resasg"
}
},
"resasg_entries_size": {
"fmt": "H"
},
"reserved": {
"fmt": "H"
},
"resasg_entries": {
"fmt": "boardcfg_rm_resasg_entry",
"validator": "boardcfg_rm_resasg_entry",
"size_bytes": "resasg_entries_size",
"incomplete_type": "",
"sort_order": [
"type",
"start_resource"
]
}
},
"boardcfg_rm": {
"rev": {
"fmt": "boardcfg_abi_rev"
},
"host_cfg": {
"fmt": "boardcfg_rm_host_cfg"
},
"resasg": {
"fmt": "boardcfg_substructure_header"
}
},
"boardcfg_pm": {
"rev": {
"fmt": "boardcfg_abi_rev"
}
},
"boardcfg_control": {
"subhdr": {
"fmt": "boardcfg_substructure_header",
"value": {
"magic": "0xc1d3",
"size": "boardcfg_control"
}
},
"main_isolation_enable": {
"fmt": "?"
},
"main_isolation_hostid": {
"fmt": "H"
}
},
"boardcfg_secproxy": {
"subhdr": {
"fmt": "boardcfg_substructure_header",
"value": {
"magic": "0x1207",
"size": "boardcfg_secproxy"
}
},
"scaling_factor": {
"fmt": "B"
},
"scaling_profile": {
"fmt": "B"
},
"disable_main_nav_secure_proxy": {
"fmt": "B"
}
},
"boardcfg_msmc": {
"subhdr": {
"fmt": "boardcfg_substructure_header",
"value": {
"magic": "0xa5c3",
"size": "boardcfg_msmc"
}
},
"msmc_cache_size": {
"fmt": "B"
}
},
"boardcfg_proc_acl_entry": {
"processor_id": {
"fmt": "B"
},
"proc_access_master": {
"fmt": "B"
},
"proc_access_secondary": {
"fmt": "B",
"elements": 3
}
},
"boardcfg_proc_acl": {
"subhdr": {
"fmt": "boardcfg_substructure_header",
"value": {
"magic": "0xf1ea",
"size": "boardcfg_proc_acl"
}
},
"boardcfg_proc_acl_entry": {
"fmt": "boardcfg_proc_acl_entry",
"elements": 32
}
},
"boardcfg_host_hierarchy_entry": {
"host_id": {
"fmt": "B"
},
"supervisor_host_id": {
"fmt": "B"
}
},
"boardcfg_host_hierarchy": {
"subhdr": {
"fmt": "boardcfg_substructure_header",
"value": {
"magic": "0x8d27",
"size": "boardcfg_host_hierarchy"
}
},
"host_hierarchy_entries": {
"fmt": "boardcfg_host_hierarchy_entry",
"elements": 32
}
},
"boardcfg_extended_otp_entry": {
"host_id": {
"fmt": "B"
},
"host_perms": {
"fmt": "B"
}
},
"boardcfg_extended_otp": {
"subhdr": {
"fmt": "boardcfg_substructure_header",
"value": {
"magic": "0x4081",
"size": "boardcfg_extended_otp"
}
},
"otp_entry": {
"fmt": "boardcfg_extended_otp_entry",
"elements": 32
},
"write_host_id": {
"fmt": "B"
}
},
"boardcfg_dkek": {
"subhdr": {
"fmt": "boardcfg_substructure_header",
"value": {
"magic": "0x5170",
"size": "boardcfg_dkek"
}
},
"allowed_hosts": {
"fmt": "B",
"elements": 4
},
"allow_dkek_export_tisci": {
"fmt": "B"
},
"rsvd": {
"fmt": "B",
"elements": 3
}
},
"boardcfg_sec": {
"rev": {
"fmt": "boardcfg_abi_rev"
},
"processor_acl_list": {
"fmt": "boardcfg_proc_acl"
},
"host_hierarchy": {
"fmt": "boardcfg_host_hierarchy"
},
"otp_config": {
"fmt": "boardcfg_extended_otp"
},
"dkek_config": {
"fmt": "boardcfg_dkek"
}
},
"boardcfg_orderid": {
"allowed": {
"fmt": "I"
}
},
"boardcfg_dbg_cfg": {
"subhdr": {
"fmt": "boardcfg_substructure_header",
"value": {
"magic": "0x020c",
"size": "boardcfg_dbg_cfg"
}
},
"trace_dst_enables": {
"fmt": "H"
},
"trace_src_enables": {
"fmt": "H"
}
},
"boardcfg": {
"rev": {
"fmt": "boardcfg_abi_rev"
},
"control": {
"fmt": "boardcfg_control"
},
"secproxy": {
"fmt": "boardcfg_secproxy"
},
"msmc": {
"fmt": "boardcfg_msmc"
},
"debug_cfg": {
"fmt": "boardcfg_dbg_cfg"
}
}
},
"validation_rules": {
"boardcfg_rm_resasg_entry": {
"comment": "values array contain each resources valid range AFTER accounting for DMSC reserved resources",
"am6": {
"values": [
{
"name": "RESASG_UTYPE(AM6_DEV_CMPEVENT_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 192,
"start_resource": 0,
"num_resource": 32
},
{
"name": "RESASG_UTYPE(AM6_DEV_MAIN2MCU_LVL_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 6208,
"start_resource": 0,
"num_resource": 64
},
{
"name": "RESASG_UTYPE(AM6_DEV_MAIN2MCU_PLS_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 6272,
"start_resource": 0,
"num_resource": 48
},
{
"name": "RESASG_UTYPE(AM6_DEV_GPIOMUX_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 6400,
"start_resource": 0,
"num_resource": 32
},
{
"name": "RESASG_UTYPE(AM6_DEV_TIMESYNC_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 9280,
"start_resource": 0,
"num_resource": 40
},
{
"name": "RESASG_UTYPE(AM6_DEV_WKUP_GPIOMUX_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 9984,
"start_resource": 0,
"num_resource": 16
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMASS_INTA0, RESASG_SUBTYPE_IA_VINT)",
"type": 11466,
"start_resource": 16,
"num_resource": 240
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMASS_INTA0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
"type": 11469,
"start_resource": 16,
"num_resource": 4592
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_MODSS_INTA0, RESASG_SUBTYPE_IA_VINT)",
"type": 11530,
"start_resource": 0,
"num_resource": 64
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_MODSS_INTA0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
"type": 11533,
"start_resource": 20480,
"num_resource": 1024
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_MODSS_INTA1, RESASG_SUBTYPE_IA_VINT)",
"type": 11594,
"start_resource": 0,
"num_resource": 64
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_MODSS_INTA1, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
"type": 11597,
"start_resource": 22528,
"num_resource": 1024
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 11648,
"start_resource": 16,
"num_resource": 136
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_PROXY0, RESASG_SUBTYPE_PROXY_PROXIES)",
"type": 11840,
"start_resource": 1,
"num_resource": 63
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_ERROR_OES)",
"type": 11968,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_GP)",
"type": 11969,
"start_resource": 304,
"num_resource": 464
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX)",
"type": 11970,
"start_resource": 160,
"num_resource": 142
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX)",
"type": 11971,
"start_resource": 8,
"num_resource": 112
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_EXT)",
"type": 11972,
"start_resource": 120,
"num_resource": 32
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX_H)",
"type": 11973,
"start_resource": 154,
"num_resource": 6
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_H)",
"type": 11975,
"start_resource": 1,
"num_resource": 7
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_VIRTID)",
"type": 11978,
"start_resource": 0,
"num_resource": 4096
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_MONITORS)",
"type": 11979,
"start_resource": 0,
"num_resource": 32
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON)",
"type": 12032,
"start_resource": 150,
"num_resource": 150
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES)",
"type": 12033,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER)",
"type": 12034,
"start_resource": 49152,
"num_resource": 1024
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG)",
"type": 12035,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_CHAN)",
"type": 12042,
"start_resource": 8,
"num_resource": 142
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_HCHAN)",
"type": 12043,
"start_resource": 2,
"num_resource": 6
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_TX_CHAN)",
"type": 12045,
"start_resource": 8,
"num_resource": 112
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_TX_ECHAN)",
"type": 12046,
"start_resource": 120,
"num_resource": 32
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_TX_HCHAN)",
"type": 12047,
"start_resource": 1,
"num_resource": 7
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_INTR_AGGR_0, RESASG_SUBTYPE_IA_VINT)",
"type": 12106,
"start_resource": 8,
"num_resource": 248
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_INTR_AGGR_0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
"type": 12109,
"start_resource": 16392,
"num_resource": 1528
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 12160,
"start_resource": 4,
"num_resource": 28
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 12160,
"start_resource": 36,
"num_resource": 28
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_PROXY0, RESASG_SUBTYPE_PROXY_PROXIES)",
"type": 12224,
"start_resource": 0,
"num_resource": 64
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON)",
"type": 12416,
"start_resource": 48,
"num_resource": 48
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES)",
"type": 12417,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER)",
"type": 12418,
"start_resource": 56320,
"num_resource": 256
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG)",
"type": 12419,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_CHAN)",
"type": 12426,
"start_resource": 2,
"num_resource": 46
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_HCHAN)",
"type": 12427,
"start_resource": 0,
"num_resource": 2
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_TX_CHAN)",
"type": 12429,
"start_resource": 2,
"num_resource": 46
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_TX_HCHAN)",
"type": 12431,
"start_resource": 0,
"num_resource": 2
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_ERROR_OES)",
"type": 12480,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_GP)",
"type": 12481,
"start_resource": 96,
"num_resource": 160
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX)",
"type": 12482,
"start_resource": 50,
"num_resource": 46
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX)",
"type": 12483,
"start_resource": 2,
"num_resource": 46
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX_H)",
"type": 12485,
"start_resource": 48,
"num_resource": 2
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_H)",
"type": 12487,
"start_resource": 0,
"num_resource": 2
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_VIRTID)",
"type": 12490,
"start_resource": 0,
"num_resource": 4096
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_MONITORS)",
"type": 12491,
"start_resource": 0,
"num_resource": 32
}
],
"constraints": [
{
"max_resource_entries": 260
}
]
},
"am65x_sr2": {
"values": [
{
"name": "RESASG_UTYPE(AM6_DEV_CMPEVENT_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 192,
"start_resource": 0,
"num_resource": 32
},
{
"name": "RESASG_UTYPE(AM6_DEV_MAIN2MCU_LVL_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 6208,
"start_resource": 0,
"num_resource": 64
},
{
"name": "RESASG_UTYPE(AM6_DEV_MAIN2MCU_PLS_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 6272,
"start_resource": 0,
"num_resource": 48
},
{
"name": "RESASG_UTYPE(AM6_DEV_GPIOMUX_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 6400,
"start_resource": 0,
"num_resource": 32
},
{
"name": "RESASG_UTYPE(AM6_DEV_TIMESYNC_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 9280,
"start_resource": 0,
"num_resource": 40
},
{
"name": "RESASG_UTYPE(AM6_DEV_WKUP_GPIOMUX_INTRTR0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 9984,
"start_resource": 0,
"num_resource": 16
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMASS_INTA0, RESASG_SUBTYPE_IA_VINT)",
"type": 11466,
"start_resource": 16,
"num_resource": 240
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMASS_INTA0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
"type": 11469,
"start_resource": 16,
"num_resource": 4592
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_MODSS_INTA0, RESASG_SUBTYPE_IA_VINT)",
"type": 11530,
"start_resource": 0,
"num_resource": 64
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_MODSS_INTA0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
"type": 11533,
"start_resource": 20480,
"num_resource": 1024
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_MODSS_INTA1, RESASG_SUBTYPE_IA_VINT)",
"type": 11594,
"start_resource": 0,
"num_resource": 64
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_MODSS_INTA1, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
"type": 11597,
"start_resource": 22528,
"num_resource": 1024
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 11648,
"start_resource": 16,
"num_resource": 136
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_PROXY0, RESASG_SUBTYPE_PROXY_PROXIES)",
"type": 11840,
"start_resource": 1,
"num_resource": 63
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_ERROR_OES)",
"type": 11968,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_GP)",
"type": 11969,
"start_resource": 304,
"num_resource": 464
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX)",
"type": 11970,
"start_resource": 160,
"num_resource": 142
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX)",
"type": 11971,
"start_resource": 8,
"num_resource": 112
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_EXT)",
"type": 11972,
"start_resource": 120,
"num_resource": 32
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX_H)",
"type": 11973,
"start_resource": 154,
"num_resource": 6
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_H)",
"type": 11975,
"start_resource": 1,
"num_resource": 7
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_VIRTID)",
"type": 11978,
"start_resource": 0,
"num_resource": 4096
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_MONITORS)",
"type": 11979,
"start_resource": 0,
"num_resource": 32
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON)",
"type": 12032,
"start_resource": 150,
"num_resource": 150
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES)",
"type": 12033,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER)",
"type": 12034,
"start_resource": 49152,
"num_resource": 1024
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG)",
"type": 12035,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_CHAN)",
"type": 12042,
"start_resource": 8,
"num_resource": 142
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_HCHAN)",
"type": 12043,
"start_resource": 2,
"num_resource": 6
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_TX_CHAN)",
"type": 12045,
"start_resource": 8,
"num_resource": 112
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_TX_ECHAN)",
"type": 12046,
"start_resource": 120,
"num_resource": 32
},
{
"name": "RESASG_UTYPE(AM6_DEV_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_TX_HCHAN)",
"type": 12047,
"start_resource": 1,
"num_resource": 7
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_INTR_AGGR_0, RESASG_SUBTYPE_IA_VINT)",
"type": 12106,
"start_resource": 8,
"num_resource": 248
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_INTR_AGGR_0, RESASG_SUBTYPE_GLOBAL_EVENT_SEVT)",
"type": 12109,
"start_resource": 16392,
"num_resource": 1528
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 12160,
"start_resource": 4,
"num_resource": 28
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_INTR_ROUTER_0, RESASG_SUBTYPE_IR_OUTPUT)",
"type": 12160,
"start_resource": 36,
"num_resource": 28
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_PROXY0, RESASG_SUBTYPE_PROXY_PROXIES)",
"type": 12224,
"start_resource": 0,
"num_resource": 64
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_FLOW_COMMON)",
"type": 12416,
"start_resource": 48,
"num_resource": 48
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_INVALID_FLOW_OES)",
"type": 12417,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_GLOBAL_EVENT_TRIGGER)",
"type": 12418,
"start_resource": 56320,
"num_resource": 256
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_GLOBAL_CONFIG)",
"type": 12419,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_CHAN)",
"type": 12426,
"start_resource": 2,
"num_resource": 46
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_RX_HCHAN)",
"type": 12427,
"start_resource": 0,
"num_resource": 2
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_TX_CHAN)",
"type": 12429,
"start_resource": 2,
"num_resource": 46
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_UDMAP0, RESASG_SUBTYPE_UDMAP_TX_HCHAN)",
"type": 12431,
"start_resource": 0,
"num_resource": 2
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_ERROR_OES)",
"type": 12480,
"start_resource": 0,
"num_resource": 1
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_GP)",
"type": 12481,
"start_resource": 96,
"num_resource": 160
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX)",
"type": 12482,
"start_resource": 50,
"num_resource": 46
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX)",
"type": 12483,
"start_resource": 2,
"num_resource": 46
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_RX_H)",
"type": 12485,
"start_resource": 48,
"num_resource": 2
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_UDMAP_TX_H)",
"type": 12487,
"start_resource": 0,
"num_resource": 2
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_VIRTID)",
"type": 12490,
"start_resource": 0,
"num_resource": 4096
},
{
"name": "RESASG_UTYPE(AM6_DEV_MCU_NAVSS0_RINGACC0, RESASG_SUBTYPE_RA_MONITORS)",
"type": 12491,
"start_resource": 0,
"num_resource": 32
}
],
"constraints": [
{
"max_resource_entries": 260
}
]
},
"j721e": {
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