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author | Lokesh Vutla | 2020-11-11 09:09:24 -0600 |
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committer | Lokesh Vutla | 2020-11-12 01:39:14 -0600 |
commit | 7a831d7d0e8ea3999d3e954a4d121a5ca821cd56 (patch) | |
tree | 4961e3171b9d309fd7b4729745cfff524efce1ea | |
parent | 6170c387b873a51748aaf73bf1ee881afdadce2f (diff) | |
download | k3conf-7a831d7d0e8ea3999d3e954a4d121a5ca821cd56.tar.gz k3conf-7a831d7d0e8ea3999d3e954a4d121a5ca821cd56.tar.xz k3conf-7a831d7d0e8ea3999d3e954a4d121a5ca821cd56.zip |
soc: am65x: Update sysfw data corresponding to v2020.08b
Update the sysfw data that corresponds to v2020.08b. Also fix the TI
link in Copyright headers
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
-rw-r--r-- | soc/am65x/am65x_processors_info.c | 2 | ||||
-rw-r--r-- | soc/am65x/am65x_sec_proxy_info.c | 12 |
2 files changed, 7 insertions, 7 deletions
diff --git a/soc/am65x/am65x_processors_info.c b/soc/am65x/am65x_processors_info.c index d0fd226..b9caab3 100644 --- a/soc/am65x/am65x_processors_info.c +++ b/soc/am65x/am65x_processors_info.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * SoC Host Info | 2 | * AM65X Processor Info |
3 | * | 3 | * |
4 | * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ | 4 | * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/ |
5 | * | 5 | * |
diff --git a/soc/am65x/am65x_sec_proxy_info.c b/soc/am65x/am65x_sec_proxy_info.c index e20cd7a..5663834 100644 --- a/soc/am65x/am65x_sec_proxy_info.c +++ b/soc/am65x/am65x_sec_proxy_info.c | |||
@@ -105,14 +105,14 @@ struct ti_sci_sec_proxy_info am65x_main_sp_info[] = { | |||
105 | 105 | ||
106 | struct ti_sci_sec_proxy_info am65x_mcu_sp_info[] = { | 106 | struct ti_sci_sec_proxy_info am65x_mcu_sp_info[] = { |
107 | [0] = {0, "read", 2, "R5_0", "notify"}, | 107 | [0] = {0, "read", 2, "R5_0", "notify"}, |
108 | [1] = {1, "read", 7, "R5_0", "response"}, | 108 | [1] = {1, "read", 20, "R5_0", "response"}, |
109 | [2] = {2, "write", 2, "R5_0", "high_priority"}, | 109 | [2] = {2, "write", 10, "R5_0", "high_priority"}, |
110 | [3] = {3, "write", 5, "R5_0", "low_priority"}, | 110 | [3] = {3, "write", 10, "R5_0", "low_priority"}, |
111 | [4] = {4, "write", 2, "R5_0", "notify_resp"}, | 111 | [4] = {4, "write", 2, "R5_0", "notify_resp"}, |
112 | [5] = {5, "read", 2, "R5_1", "notify"}, | 112 | [5] = {5, "read", 2, "R5_1", "notify"}, |
113 | [6] = {6, "read", 7, "R5_1", "response"}, | 113 | [6] = {6, "read", 20, "R5_1", "response"}, |
114 | [7] = {7, "write", 2, "R5_1", "high_priority"}, | 114 | [7] = {7, "write", 10, "R5_1", "high_priority"}, |
115 | [8] = {8, "write", 5, "R5_1", "low_priority"}, | 115 | [8] = {8, "write", 10, "R5_1", "low_priority"}, |
116 | [9] = {9, "write", 2, "R5_1", "notify_resp"}, | 116 | [9] = {9, "write", 2, "R5_1", "notify_resp"}, |
117 | [10] = {10, "read", 1, "R5_2", "notify"}, | 117 | [10] = {10, "read", 1, "R5_2", "notify"}, |
118 | [11] = {11, "read", 2, "R5_2", "response"}, | 118 | [11] = {11, "read", 2, "R5_2", "response"}, |