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authorVitaly Andrianov2014-07-30 12:44:10 -0500
committerVitaly Andrianov2015-01-21 08:53:04 -0600
commitdd2c4cfa5d3fc5ef26697c94895d35a4c26a150a (patch)
tree97d528b518d31eed20e6172ea527296de5f4f52a
parentbaefb659b6cb68b1780cc24573b9a4887589eb42 (diff)
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arm: keystone2: add default config and DTS for recovery kernel
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
-rw-r--r--arch/arm/boot/dts/k2hk-evm-recovery.dts1327
-rw-r--r--arch/arm/configs/keystone2_recovery_defconfig286
2 files changed, 1613 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/k2hk-evm-recovery.dts b/arch/arm/boot/dts/k2hk-evm-recovery.dts
new file mode 100644
index 00000000000..c845f27d907
--- /dev/null
+++ b/arch/arm/boot/dts/k2hk-evm-recovery.dts
@@ -0,0 +1,1327 @@
1/*
2 * Keystone II Hawking EVM device tree file
3 *
4 * Copyright (c) 2012-13, Texas Instruments Inc
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met:
10 *
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * * Neither the name of TI nor the names of its contributors may be
18 * used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
22 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
24 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
27 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
28 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
29 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
30 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
31 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34/dts-v1/;
35
36/ {
37 #address-cells = <0x2>;
38 #size-cells = <0x2>;
39 model = "Texas Instruments Keystone 2 SoC";
40 interrupt-parent = <0x1>;
41 compatible = "ti,k2hk-evm", "ti,keystone";
42
43 chosen {
44 bootargs = "console=ttyS0,115200n8 earlyprintk rootwait=1 rootfstype=ubifs root=ubi0:rootfs-recovery rootflags=sync rw ubi.mtd=2,2048 elfcorehdr=0x97f00000";
45 };
46
47 aliases {
48 serial0 = "/soc/serial@02530c00";
49 };
50
51 memory {
52 device_type = "memory";
53 reg = <0x8 0x10000000 0x0 0x8000000>;
54 };
55
56 soc {
57 #address-cells = <0x1>;
58 #size-cells = <0x1>;
59 compatible = "ti,keystone", "simple-bus";
60 interrupt-parent = <0x1>;
61 ranges = <0x0 0x0 0x0 0xc0000000>;
62
63 rstctrl@23100e8 {
64 compatible = "ti,keystone-reset";
65 reg = <0x23100e8 0x4 0x2620328 0x4>;
66 };
67
68 clocks {
69 #address-cells = <0x1>;
70 #size-cells = <0x1>;
71 ranges;
72
73 mainmuxclk@2310108 {
74 #clock-cells = <0x0>;
75 compatible = "davinci,main-pll-mux-clk";
76 clocks = <0x3 0x4>;
77 reg = <0x2310108 0x4>;
78 shift = <0x17>;
79 width = <0x1>;
80 linux,phandle = <0x5>;
81 phandle = <0x5>;
82 };
83
84 chipclk1 {
85 #clock-cells = <0x0>;
86 compatible = "fixed-clock-factor";
87 clocks = <0x5>;
88 clock-mult = <0x1>;
89 clock-div = <0x1>;
90 linux,phandle = <0x6>;
91 phandle = <0x6>;
92 };
93
94 chipclk1rstiso {
95 #clock-cells = <0x0>;
96 compatible = "fixed-clock-factor";
97 clocks = <0x5>;
98 clock-mult = <0x1>;
99 clock-div = <0x1>;
100 linux,phandle = <0x8>;
101 phandle = <0x8>;
102 };
103
104 gemtraceclk@2310120 {
105 #clock-cells = <0x0>;
106 compatible = "davinci,pll-divider-clk";
107 clocks = <0x5>;
108 reg = <0x2310120 0x4>;
109 shift = <0x0>;
110 width = <0x8>;
111 linux,phandle = <0x39>;
112 phandle = <0x39>;
113 };
114
115 chipstmxptclk {
116 #clock-cells = <0x0>;
117 compatible = "davinci,pll-divider-clk";
118 clocks = <0x5>;
119 reg = <0x2310164 0x4>;
120 shift = <0x0>;
121 width = <0x8>;
122 };
123
124 chipclk12 {
125 #clock-cells = <0x0>;
126 compatible = "fixed-clock-factor";
127 clocks = <0x6>;
128 clock-mult = <0x1>;
129 clock-div = <0x2>;
130 linux,phandle = <0xd>;
131 phandle = <0xd>;
132 };
133
134 chipclk13 {
135 #clock-cells = <0x0>;
136 compatible = "fixed-clock-factor";
137 clocks = <0x6>;
138 clock-mult = <0x1>;
139 clock-div = <0x3>;
140 linux,phandle = <0xa>;
141 phandle = <0xa>;
142 };
143
144 paclk13 {
145 #clock-cells = <0x0>;
146 compatible = "fixed-clock-factor";
147 clocks = <0x7>;
148 clock-mult = <0x1>;
149 clock-div = <0x3>;
150 linux,phandle = <0xb>;
151 phandle = <0xb>;
152 };
153
154 chipclk14 {
155 #clock-cells = <0x0>;
156 compatible = "fixed-clock-factor";
157 clocks = <0x6>;
158 clock-mult = <0x1>;
159 clock-div = <0x4>;
160 };
161
162 chipclk16 {
163 #clock-cells = <0x0>;
164 compatible = "fixed-clock-factor";
165 clocks = <0x6>;
166 clock-mult = <0x1>;
167 clock-div = <0x6>;
168 linux,phandle = <0x9>;
169 phandle = <0x9>;
170 };
171
172 chipclk112 {
173 #clock-cells = <0x0>;
174 compatible = "fixed-clock-factor";
175 clocks = <0x6>;
176 clock-mult = <0x1>;
177 clock-div = <0xc>;
178 };
179
180 chipclk124 {
181 #clock-cells = <0x0>;
182 compatible = "fixed-clock-factor";
183 clocks = <0x6>;
184 clock-mult = <0x1>;
185 clock-div = <0x18>;
186 };
187
188 chipclk1rstiso13 {
189 #clock-cells = <0x0>;
190 compatible = "fixed-clock-factor";
191 clocks = <0x8>;
192 clock-mult = <0x1>;
193 clock-div = <0x3>;
194 linux,phandle = <0x15>;
195 phandle = <0x15>;
196 };
197
198 chipclk1rstiso14 {
199 #clock-cells = <0x0>;
200 compatible = "fixed-clock-factor";
201 clocks = <0x8>;
202 clock-mult = <0x1>;
203 clock-div = <0x4>;
204 };
205
206 chipclk1rstiso16 {
207 #clock-cells = <0x0>;
208 compatible = "fixed-clock-factor";
209 clocks = <0x8>;
210 clock-mult = <0x1>;
211 clock-div = <0x6>;
212 };
213
214 chipclk1rstiso112 {
215 #clock-cells = <0x0>;
216 compatible = "fixed-clock-factor";
217 clocks = <0x8>;
218 clock-mult = <0x1>;
219 clock-div = <0xc>;
220 linux,phandle = <0xe>;
221 phandle = <0xe>;
222 };
223
224 clkmodrst0 {
225 #clock-cells = <0x0>;
226 compatible = "davinci,psc-clk";
227 clocks = <0x9>;
228 clock-output-names = "modrst0";
229 status = "enabled";
230 reg = <0x2350000 0x1000>;
231 linux,phandle = <0xf>;
232 phandle = <0xf>;
233 };
234
235 clkaemifspi {
236 #clock-cells = <0x0>;
237 compatible = "davinci,psc-clk";
238 clocks = <0x9>;
239 clock-output-names = "aemif-spi";
240 reg = <0x2350000 0x1000>;
241 status = "enabled";
242 lpsc = <0x3>;
243 linux,phandle = <0x10>;
244 phandle = <0x10>;
245 };
246
247 clkdebugsstrc {
248 #clock-cells = <0x0>;
249 compatible = "davinci,psc-clk";
250 clocks = <0xa>;
251 clock-output-names = "debugss-trc";
252 base-flags = "ignore-unused";
253 reg = <0x2350000 0x1000>;
254 lpsc = <0x5>;
255 pd = <0x1>;
256 linux,phandle = <0x38>;
257 phandle = <0x38>;
258 };
259
260 clktetbtrc {
261 #clock-cells = <0x0>;
262 compatible = "davinci,psc-clk";
263 clocks = <0xa>;
264 clock-output-names = "tetb-trc";
265 base-flags = "ignore-unused";
266 reg = <0x2350000 0x1000>;
267 lpsc = <0x6>;
268 pd = <0x1>;
269 linux,phandle = <0x3a>;
270 phandle = <0x3a>;
271 };
272
273 clkpa {
274 #clock-cells = <0x0>;
275 compatible = "davinci,psc-clk";
276 clocks = <0xb>;
277 clock-output-names = "pa";
278 base-flags = "ignore-unused";
279 reg = <0x2350000 0x1000>;
280 lpsc = <0x7>;
281 pd = <0x2>;
282 linux,phandle = <0xc>;
283 phandle = <0xc>;
284 };
285
286 clkcpgmac {
287 #clock-cells = <0x0>;
288 compatible = "davinci,psc-clk";
289 clocks = <0xc>;
290 clock-output-names = "cpgmac";
291 base-flags = "ignore-unused";
292 reg = <0x2350000 0x1000>;
293 lpsc = <0x8>;
294 pd = <0x2>;
295 linux,phandle = <0x31>;
296 phandle = <0x31>;
297 };
298
299 clksa {
300 #clock-cells = <0x0>;
301 compatible = "davinci,psc-clk";
302 clocks = <0xc>;
303 clock-output-names = "sa";
304 base-flags = "ignore-unused";
305 reg = <0x2350000 0x1000>;
306 lpsc = <0x9>;
307 pd = <0x2>;
308 linux,phandle = <0x36>;
309 phandle = <0x36>;
310 };
311
312 clkpcie {
313 #clock-cells = <0x0>;
314 compatible = "davinci,psc-clk";
315 clocks = <0xd>;
316 clock-output-names = "pcie";
317 base-flags = "ignore-unused";
318 reg = <0x2350000 0x1000>;
319 lpsc = <0xa>;
320 pd = <0x3>;
321 linux,phandle = <0x1b>;
322 phandle = <0x1b>;
323 };
324
325 clksr {
326 #clock-cells = <0x0>;
327 compatible = "davinci,psc-clk";
328 clocks = <0xe>;
329 clock-output-names = "sr";
330 base-flags = "ignore-unused";
331 reg = <0x2350000 0x1000>;
332 lpsc = <0xd>;
333 pd = <0x6>;
334 linux,phandle = <0x1e>;
335 phandle = <0x1e>;
336 };
337
338 clkmsmcsram {
339 #clock-cells = <0x0>;
340 compatible = "davinci,psc-clk";
341 clocks = <0x6>;
342 clock-output-names = "msmcsram";
343 base-flags = "ignore-unused";
344 reg = <0x2350000 0x1000>;
345 lpsc = <0xe>;
346 pd = <0x7>;
347 };
348
349 clkgem0 {
350 #clock-cells = <0x0>;
351 compatible = "davinci,psc-clk";
352 clocks = <0x6>;
353 clock-output-names = "gem0";
354 base-flags = "ignore-unused";
355 reg = <0x2350000 0x1000>;
356 lpsc = <0xf>;
357 pd = <0x8>;
358 linux,phandle = <0x22>;
359 phandle = <0x22>;
360 };
361
362 clkddr30 {
363 #clock-cells = <0x0>;
364 compatible = "davinci,psc-clk";
365 clocks = <0xd>;
366 clock-output-names = "ddr3-0";
367 base-flags = "ignore-unused";
368 reg = <0x2350000 0x1000>;
369 lpsc = <0x17>;
370 pd = <0x10>;
371 };
372
373 clkwdtimer0 {
374 #clock-cells = <0x0>;
375 compatible = "davinci,psc-clk";
376 clocks = <0xf>;
377 clock-output-names = "timer0";
378 status = "enabled";
379 reg = <0x2350000 0x1000>;
380 linux,phandle = <0x1c>;
381 phandle = <0x1c>;
382 };
383
384 clkwdtimer1 {
385 #clock-cells = <0x0>;
386 compatible = "davinci,psc-clk";
387 clocks = <0xf>;
388 clock-output-names = "timer1";
389 status = "enabled";
390 reg = <0x2350000 0x1000>;
391 };
392
393 clkwdtimer2 {
394 #clock-cells = <0x0>;
395 compatible = "davinci,psc-clk";
396 clocks = <0xf>;
397 clock-output-names = "timer2";
398 status = "enabled";
399 reg = <0x2350000 0x1000>;
400 };
401
402 clkwdtimer3 {
403 #clock-cells = <0x0>;
404 compatible = "davinci,psc-clk";
405 clocks = <0xf>;
406 clock-output-names = "timer3";
407 status = "enabled";
408 reg = <0x2350000 0x1000>;
409 };
410
411 clktimer15 {
412 #clock-cells = <0x0>;
413 compatible = "davinci,psc-clk";
414 clocks = <0xf>;
415 clock-output-names = "timer15";
416 status = "enabled";
417 reg = <0x2350000 0x1000>;
418 linux,phandle = <0x1d>;
419 phandle = <0x1d>;
420 };
421
422 clkuart0 {
423 #clock-cells = <0x0>;
424 compatible = "davinci,psc-clk";
425 clocks = <0xf>;
426 clock-output-names = "uart0";
427 status = "enabled";
428 reg = <0x2350000 0x1000>;
429 linux,phandle = <0x16>;
430 phandle = <0x16>;
431 };
432
433 clkuart1 {
434 #clock-cells = <0x0>;
435 compatible = "davinci,psc-clk";
436 clocks = <0xf>;
437 clock-output-names = "uart1";
438 status = "enabled";
439 reg = <0x2350000 0x1000>;
440 };
441
442 clkaemif {
443 #clock-cells = <0x0>;
444 compatible = "davinci,psc-clk";
445 clocks = <0x10>;
446 clock-output-names = "aemif";
447 status = "enabled";
448 reg = <0x2350000 0x1000>;
449 linux,phandle = <0x17>;
450 phandle = <0x17>;
451 };
452
453 clkusim {
454 #clock-cells = <0x0>;
455 compatible = "davinci,psc-clk";
456 clocks = <0xf>;
457 clock-output-names = "usim";
458 status = "enabled";
459 reg = <0x2350000 0x1000>;
460 };
461
462 clki2c {
463 #clock-cells = <0x0>;
464 compatible = "davinci,psc-clk";
465 clocks = <0xf>;
466 clock-output-names = "i2c";
467 status = "enabled";
468 reg = <0x2350000 0x1000>;
469 linux,phandle = <0x19>;
470 phandle = <0x19>;
471 };
472
473 clkspi {
474 #clock-cells = <0x0>;
475 compatible = "davinci,psc-clk";
476 clocks = <0x10>;
477 clock-output-names = "spi";
478 status = "enabled";
479 reg = <0x2350000 0x1000>;
480 linux,phandle = <0x18>;
481 phandle = <0x18>;
482 };
483
484 clkgpio {
485 #clock-cells = <0x0>;
486 compatible = "davinci,psc-clk";
487 clocks = <0xf>;
488 clock-output-names = "gpio";
489 status = "enabled";
490 reg = <0x2350000 0x1000>;
491 linux,phandle = <0x1a>;
492 phandle = <0x1a>;
493 };
494
495 clkkeymgr {
496 #clock-cells = <0x0>;
497 compatible = "davinci,psc-clk";
498 clocks = <0xf>;
499 clock-output-names = "keymgr";
500 status = "enabled";
501 reg = <0x2350000 0x1000>;
502 };
503
504 mainpllclk@2310110 {
505 #clock-cells = <0x0>;
506 compatible = "keystone,main-pll-clk";
507 clocks = <0x4>;
508 reg = <0x2310110 0x4 0x2620350 0x4>;
509 pll_has_pllctrl;
510 pllm_lower_mask = <0x3f>;
511 pllm_upper_mask = <0x7f000>;
512 pllm_upper_shift = <0x6>;
513 plld_mask = <0x3f>;
514 fixed_postdiv = <0x2>;
515 linux,phandle = <0x3>;
516 phandle = <0x3>;
517 };
518
519 armpllclk@2620370 {
520 #clock-cells = <0x0>;
521 compatible = "keystone,pll-clk";
522 clocks = <0x11>;
523 clock-output-names = "arm-pll-clk";
524 reg = <0x2620370 0x4>;
525 pllm_upper_mask = <0x7ffc0>;
526 pllm_upper_shift = <0x6>;
527 plld_mask = <0x3f>;
528 linux,phandle = <0x37>;
529 phandle = <0x37>;
530 };
531
532 ddr3a_clk@2620360 {
533 #clock-cells = <0x0>;
534 compatible = "keystone,pll-clk";
535 clocks = <0x12>;
536 clock-output-names = "ddr3a-pll-clk";
537 reg = <0x2620360 0x4>;
538 pllm_upper_mask = <0x7ffc0>;
539 pllm_upper_shift = <0x6>;
540 plld_mask = <0x3f>;
541 };
542
543 ddr3b_clk@2620368 {
544 #clock-cells = <0x0>;
545 compatible = "keystone,pll-clk";
546 clocks = <0x13>;
547 clock-output-names = "ddr3b-pll-clk";
548 reg = <0x2620368 0x4>;
549 pllm_upper_mask = <0x7ffc0>;
550 pllm_upper_shift = <0x6>;
551 plld_mask = <0x3f>;
552 };
553
554 papllclk@2620358 {
555 #clock-cells = <0x0>;
556 compatible = "keystone,pll-clk";
557 clocks = <0x14>;
558 reg = <0x2620358 0x4>;
559 pllm_upper_mask = <0x7ffc0>;
560 pllm_upper_shift = <0x6>;
561 plld_mask = <0x3f>;
562 linux,phandle = <0x7>;
563 phandle = <0x7>;
564 };
565
566 clkusb {
567 #clock-cells = <0x0>;
568 compatible = "davinci,psc-clk";
569 clocks = <0x9>;
570 clock-output-names = "usb";
571 reg = <0x2350000 0x1000>;
572 lpsc = <0x2>;
573 linux,phandle = <0x1f>;
574 phandle = <0x1f>;
575 };
576
577 clksrio {
578 #clock-cells = <0x0>;
579 compatible = "davinci,psc-clk";
580 clocks = <0x15>;
581 clock-output-names = "srio";
582 base-flags = "ignore-unused";
583 status = "disabled";
584 reg = <0x2350000 0x1000>;
585 lpsc = <0xb>;
586 pd = <0x4>;
587 };
588
589 clkhyperlink0 {
590 #clock-cells = <0x0>;
591 compatible = "davinci,psc-clk";
592 clocks = <0xd>;
593 clock-output-names = "hyperlink-0";
594 base-flags = "ignore-unused";
595 status = "disabled";
596 reg = <0x2350000 0x1000>;
597 lpsc = <0xc>;
598 pd = <0x5>;
599 };
600
601 clkgem1 {
602 #clock-cells = <0x0>;
603 compatible = "davinci,psc-clk";
604 clocks = <0x6>;
605 clock-output-names = "gem1";
606 base-flags = "ignore-unused";
607 reg = <0x2350000 0x1000>;
608 lpsc = <0x10>;
609 pd = <0x9>;
610 linux,phandle = <0x24>;
611 phandle = <0x24>;
612 };
613
614 clkgem2 {
615 #clock-cells = <0x0>;
616 compatible = "davinci,psc-clk";
617 clocks = <0x6>;
618 clock-output-names = "gem2";
619 base-flags = "ignore-unused";
620 reg = <0x2350000 0x1000>;
621 lpsc = <0x11>;
622 pd = <0xa>;
623 linux,phandle = <0x26>;
624 phandle = <0x26>;
625 };
626
627 clkgem3 {
628 #clock-cells = <0x0>;
629 compatible = "davinci,psc-clk";
630 clocks = <0x6>;
631 clock-output-names = "gem3";
632 base-flags = "ignore-unused";
633 reg = <0x2350000 0x1000>;
634 lpsc = <0x12>;
635 pd = <0xb>;
636 linux,phandle = <0x28>;
637 phandle = <0x28>;
638 };
639
640 clkgem4 {
641 #clock-cells = <0x0>;
642 compatible = "davinci,psc-clk";
643 clocks = <0x6>;
644 clock-output-names = "gem4";
645 base-flags = "ignore-unused";
646 reg = <0x2350000 0x1000>;
647 lpsc = <0x13>;
648 pd = <0xc>;
649 linux,phandle = <0x2a>;
650 phandle = <0x2a>;
651 };
652
653 clkgem5 {
654 #clock-cells = <0x0>;
655 compatible = "davinci,psc-clk";
656 clocks = <0x6>;
657 clock-output-names = "gem5";
658 base-flags = "ignore-unused";
659 reg = <0x2350000 0x1000>;
660 lpsc = <0x14>;
661 pd = <0xd>;
662 linux,phandle = <0x2c>;
663 phandle = <0x2c>;
664 };
665
666 clkgem6 {
667 #clock-cells = <0x0>;
668 compatible = "davinci,psc-clk";
669 clocks = <0x6>;
670 clock-output-names = "gem6";
671 base-flags = "ignore-unused";
672 reg = <0x2350000 0x1000>;
673 lpsc = <0x15>;
674 pd = <0xe>;
675 linux,phandle = <0x2e>;
676 phandle = <0x2e>;
677 };
678
679 clkgem7 {
680 #clock-cells = <0x0>;
681 compatible = "davinci,psc-clk";
682 clocks = <0x6>;
683 clock-output-names = "gem7";
684 base-flags = "ignore-unused";
685 reg = <0x2350000 0x1000>;
686 lpsc = <0x16>;
687 pd = <0xf>;
688 linux,phandle = <0x30>;
689 phandle = <0x30>;
690 };
691
692 clkddr31 {
693 #clock-cells = <0x0>;
694 compatible = "davinci,psc-clk";
695 clocks = <0xa>;
696 clock-output-names = "ddr3-1";
697 base-flags = "ignore-unused";
698 reg = <0x2350000 0x1000>;
699 lpsc = <0x18>;
700 pd = <0x10>;
701 };
702
703 clktac {
704 #clock-cells = <0x0>;
705 compatible = "davinci,psc-clk";
706 clocks = <0xa>;
707 clock-output-names = "tac";
708 base-flags = "ignore-unused";
709 reg = <0x2350000 0x1000>;
710 lpsc = <0x19>;
711 pd = <0x11>;
712 };
713
714 clktac01 {
715 #clock-cells = <0x0>;
716 compatible = "davinci,psc-clk";
717 clocks = <0xa>;
718 clock-output-names = "rac-01";
719 base-flags = "ignore-unused";
720 reg = <0x2350000 0x1000>;
721 lpsc = <0x1a>;
722 pd = <0x11>;
723 };
724
725 clktac23 {
726 #clock-cells = <0x0>;
727 compatible = "davinci,psc-clk";
728 clocks = <0xa>;
729 clock-output-names = "rac-23";
730 base-flags = "ignore-unused";
731 reg = <0x2350000 0x1000>;
732 lpsc = <0x1b>;
733 pd = <0x12>;
734 };
735
736 clkfftc0 {
737 #clock-cells = <0x0>;
738 compatible = "davinci,psc-clk";
739 clocks = <0xa>;
740 clock-output-names = "fftc-0";
741 base-flags = "ignore-unused";
742 reg = <0x2350000 0x1000>;
743 lpsc = <0x1c>;
744 pd = <0x13>;
745 };
746
747 clkfftc1 {
748 #clock-cells = <0x0>;
749 compatible = "davinci,psc-clk";
750 clocks = <0xa>;
751 clock-output-names = "fftc-1";
752 base-flags = "ignore-unused";
753 reg = <0x2350000 0x1000>;
754 lpsc = <0x1d>;
755 pd = <0x13>;
756 };
757
758 clkfftc2 {
759 #clock-cells = <0x0>;
760 compatible = "davinci,psc-clk";
761 clocks = <0xa>;
762 clock-output-names = "fftc-2";
763 base-flags = "ignore-unused";
764 reg = <0x2350000 0x1000>;
765 lpsc = <0x1e>;
766 pd = <0x14>;
767 };
768
769 clkfftc3 {
770 #clock-cells = <0x0>;
771 compatible = "davinci,psc-clk";
772 clocks = <0xa>;
773 clock-output-names = "fftc-3";
774 base-flags = "ignore-unused";
775 reg = <0x2350000 0x1000>;
776 lpsc = <0x1f>;
777 pd = <0x14>;
778 };
779
780 clkfftc4 {
781 #clock-cells = <0x0>;
782 compatible = "davinci,psc-clk";
783 clocks = <0xa>;
784 clock-output-names = "fftc-4";
785 base-flags = "ignore-unused";
786 reg = <0x2350000 0x1000>;
787 lpsc = <0x20>;
788 pd = <0x14>;
789 };
790
791 clkfftc5 {
792 #clock-cells = <0x0>;
793 compatible = "davinci,psc-clk";
794 clocks = <0xa>;
795 clock-output-names = "fftc-5";
796 base-flags = "ignore-unused";
797 reg = <0x2350000 0x1000>;
798 lpsc = <0x21>;
799 pd = <0x14>;
800 };
801
802 clkaif {
803 #clock-cells = <0x0>;
804 compatible = "davinci,psc-clk";
805 clocks = <0xa>;
806 clock-output-names = "aif";
807 base-flags = "ignore-unused";
808 reg = <0x2350000 0x1000>;
809 lpsc = <0x22>;
810 pd = <0x15>;
811 };
812
813 clktcp3d0 {
814 #clock-cells = <0x0>;
815 compatible = "davinci,psc-clk";
816 clocks = <0xa>;
817 clock-output-names = "tcp3d-0";
818 base-flags = "ignore-unused";
819 reg = <0x2350000 0x1000>;
820 lpsc = <0x23>;
821 pd = <0x16>;
822 };
823
824 clktcp3d1 {
825 #clock-cells = <0x0>;
826 compatible = "davinci,psc-clk";
827 clocks = <0xa>;
828 clock-output-names = "tcp3d-1";
829 base-flags = "ignore-unused";
830 reg = <0x2350000 0x1000>;
831 lpsc = <0x24>;
832 pd = <0x16>;
833 };
834
835 clktcp3d2 {
836 #clock-cells = <0x0>;
837 compatible = "davinci,psc-clk";
838 clocks = <0xa>;
839 clock-output-names = "tcp3d-2";
840 base-flags = "ignore-unused";
841 reg = <0x2350000 0x1000>;
842 lpsc = <0x25>;
843 pd = <0x17>;
844 };
845
846 clktcp3d3 {
847 #clock-cells = <0x0>;
848 compatible = "davinci,psc-clk";
849 clocks = <0xa>;
850 clock-output-names = "tcp3d-3";
851 base-flags = "ignore-unused";
852 reg = <0x2350000 0x1000>;
853 lpsc = <0x26>;
854 pd = <0x17>;
855 };
856
857 clkvcp0 {
858 #clock-cells = <0x0>;
859 compatible = "davinci,psc-clk";
860 clocks = <0xa>;
861 clock-output-names = "vcp-0";
862 base-flags = "ignore-unused";
863 reg = <0x2350000 0x1000>;
864 lpsc = <0x27>;
865 pd = <0x18>;
866 };
867
868 clkvcp1 {
869 #clock-cells = <0x0>;
870 compatible = "davinci,psc-clk";
871 clocks = <0xa>;
872 clock-output-names = "vcp-1";
873 base-flags = "ignore-unused";
874 reg = <0x2350000 0x1000>;
875 lpsc = <0x28>;
876 pd = <0x18>;
877 };
878
879 clkvcp2 {
880 #clock-cells = <0x0>;
881 compatible = "davinci,psc-clk";
882 clocks = <0xa>;
883 clock-output-names = "vcp-2";
884 base-flags = "ignore-unused";
885 reg = <0x2350000 0x1000>;
886 lpsc = <0x29>;
887 pd = <0x18>;
888 };
889
890 clkvcp3 {
891 #clock-cells = <0x0>;
892 compatible = "davinci,psc-clk";
893 clocks = <0xa>;
894 clock-output-names = "vcp-3";
895 base-flags = "ignore-unused";
896 reg = <0x2350000 0x1000>;
897 lpsc = <0x2a>;
898 pd = <0x18>;
899 };
900
901 clkvcp4 {
902 #clock-cells = <0x0>;
903 compatible = "davinci,psc-clk";
904 clocks = <0xa>;
905 clock-output-names = "vcp-4";
906 base-flags = "ignore-unused";
907 reg = <0x2350000 0x1000>;
908 lpsc = <0x2b>;
909 pd = <0x19>;
910 };
911
912 clkvcp5 {
913 #clock-cells = <0x0>;
914 compatible = "davinci,psc-clk";
915 clocks = <0xa>;
916 clock-output-names = "vcp-5";
917 base-flags = "ignore-unused";
918 reg = <0x2350000 0x1000>;
919 lpsc = <0x2c>;
920 pd = <0x19>;
921 };
922
923 clkvcp6 {
924 #clock-cells = <0x0>;
925 compatible = "davinci,psc-clk";
926 clocks = <0xa>;
927 clock-output-names = "vcp-6";
928 base-flags = "ignore-unused";
929 reg = <0x2350000 0x1000>;
930 lpsc = <0x2d>;
931 pd = <0x19>;
932 };
933
934 clkvcp7 {
935 #clock-cells = <0x0>;
936 compatible = "davinci,psc-clk";
937 clocks = <0xa>;
938 clock-output-names = "vcp-7";
939 base-flags = "ignore-unused";
940 reg = <0x2350000 0x1000>;
941 lpsc = <0x2e>;
942 pd = <0x19>;
943 };
944
945 clkbcp {
946 #clock-cells = <0x0>;
947 compatible = "davinci,psc-clk";
948 clocks = <0xa>;
949 clock-output-names = "bcp";
950 base-flags = "ignore-unused";
951 reg = <0x2350000 0x1000>;
952 lpsc = <0x2f>;
953 pd = <0x1a>;
954 };
955
956 clkdxb {
957 #clock-cells = <0x0>;
958 compatible = "davinci,psc-clk";
959 clocks = <0xa>;
960 clock-output-names = "dxb";
961 base-flags = "ignore-unused";
962 reg = <0x2350000 0x1000>;
963 lpsc = <0x30>;
964 pd = <0x1b>;
965 };
966
967 clkhyperlink1 {
968 #clock-cells = <0x0>;
969 compatible = "davinci,psc-clk";
970 clocks = <0xd>;
971 clock-output-names = "hyperlink-1";
972 base-flags = "ignore-unused";
973 status = "disabled";
974 reg = <0x2350000 0x1000>;
975 lpsc = <0x31>;
976 pd = <0x1c>;
977 };
978
979 clkxge {
980 #clock-cells = <0x0>;
981 compatible = "davinci,psc-clk";
982 clocks = <0xa>;
983 clock-output-names = "xge";
984 base-flags = "ignore-unused";
985 reg = <0x2350000 0x1000>;
986 lpsc = <0x32>;
987 pd = <0x1d>;
988 linux,phandle = <0x33>;
989 phandle = <0x33>;
990 };
991
992 refclkmain {
993 #clock-cells = <0x0>;
994 compatible = "fixed-clock";
995 clock-frequency = <0x7530000>;
996 clock-output-names = "refclk-main";
997 linux,phandle = <0x4>;
998 phandle = <0x4>;
999 };
1000
1001 refclkarm {
1002 #clock-cells = <0x0>;
1003 compatible = "fixed-clock";
1004 clock-frequency = <0x7735940>;
1005 clock-output-names = "refclk-arm";
1006 linux,phandle = <0x11>;
1007 phandle = <0x11>;
1008 };
1009
1010 refclkpass {
1011 #clock-cells = <0x0>;
1012 compatible = "fixed-clock";
1013 clock-frequency = <0x7530000>;
1014 clock-output-names = "refclk-pass";
1015 linux,phandle = <0x14>;
1016 phandle = <0x14>;
1017 };
1018
1019 refclkddr3a {
1020 #clock-cells = <0x0>;
1021 compatible = "fixed-clock";
1022 clock-frequency = <0x5f5e100>;
1023 clock-output-names = "refclk-ddr3a";
1024 linux,phandle = <0x12>;
1025 phandle = <0x12>;
1026 };
1027
1028 refclkddr3b {
1029 #clock-cells = <0x0>;
1030 compatible = "fixed-clock";
1031 clock-frequency = <0x5f5e100>;
1032 clock-output-names = "refclk-ddr3b";
1033 linux,phandle = <0x13>;
1034 phandle = <0x13>;
1035 };
1036 };
1037
1038 interrupt-controller@02560000 {
1039 compatible = "arm,cortex-a15-gic";
1040 #interrupt-cells = <0x3>;
1041 #size-cells = <0x0>;
1042 #address-cells = <0x1>;
1043 interrupt-controller;
1044 reg = <0x2561000 0x1000 0x2562000 0x2000>;
1045 linux,phandle = <0x1>;
1046 phandle = <0x1>;
1047 };
1048
1049 ipcirq0@26202bc {
1050 compatible = "ti,keystone-ipc-irq";
1051 reg = <0x26202a0 0x4 0x2620260 0x4>;
1052 interrupts = <0x0 0x4 0x101>;
1053 interrupt-controller;
1054 #interrupt-cells = <0x2>;
1055 linux,phandle = <0x20>;
1056 phandle = <0x20>;
1057 };
1058
1059 timer {
1060 compatible = "arm,armv7-timer";
1061 interrupts = <0x1 0xd 0xf08 0x1 0xe 0xf08>;
1062 };
1063
1064 serial@02530c00 {
1065 compatible = "ns16550a";
1066 current-speed = <0x1c200>;
1067 reg-shift = <0x2>;
1068 reg-io-width = <0x4>;
1069 reg = <0x2530c00 0x100>;
1070 clocks = <0x16>;
1071 interrupts = <0x0 0x115 0xf01>;
1072 };
1073
1074 serial@02531000 {
1075 compatible = "ns16550a";
1076 current-speed = <0x1c200>;
1077 reg-shift = <0x2>;
1078 reg-io-width = <0x4>;
1079 reg = <0x2531000 0x100>;
1080 clocks = <0x16>;
1081 interrupts = <0x0 0x118 0xf01>;
1082 };
1083
1084 aemif@30000000 {
1085 compatible = "ti,davinci-aemif";
1086 #address-cells = <0x2>;
1087 #size-cells = <0x1>;
1088 reg = <0x21000a00 0x100>;
1089 ranges = <0x2 0x0 0x30000000 0x8000000 0x3 0x0 0x34000000 0x4000000 0x4 0x0 0x38000000 0x4000000 0x5 0x0 0x3c000000 0x4000000 0x6 0x0 0x21000a00 0x100>;
1090 clocks = <0x17>;
1091 clock-names = "aemif";
1092
1093 cs2@30000000 {
1094 compatible = "ti,davinci-cs";
1095 #address-cells = <0x1>;
1096 #size-cells = <0x1>;
1097 ti,davinci-cs-ta = <0xc>;
1098 ti,davinci-cs-rhold = <0x6>;
1099 ti,davinci-cs-rstrobe = <0x17>;
1100 ti,davinci-cs-rsetup = <0x9>;
1101 ti,davinci-cs-whold = <0x8>;
1102 ti,davinci-cs-wstrobe = <0x17>;
1103 ti,davinci-cs-wsetup = <0x8>;
1104 };
1105
1106 nand@2,0 {
1107 compatible = "ti,davinci-nand";
1108 reg = <0x2 0x0 0x8000000 0x6 0x0 0x100>;
1109 #address-cells = <0x1>;
1110 #size-cells = <0x1>;
1111 ti,davinci-chipselect = <0x0>;
1112 ti,davinci-mask-ale = <0x2000>;
1113 ti,davinci-mask-cle = <0x4000>;
1114 ti,davinci-mask-chipsel = <0x0>;
1115 ti,davinci-ecc-mode = "hw";
1116 ti,davinci-ecc-bits = <0x4>;
1117 ti,davinci-nand-use-bbt;
1118 ti,davinci-no-subpage-write;
1119 clocks = <0x17>;
1120 clock-names = "aemif";
1121
1122 partition@0 {
1123 label = "u-boot";
1124 reg = <0x0 0x100000>;
1125 read-only;
1126 };
1127
1128 partition@100000 {
1129 label = "params";
1130 reg = <0x100000 0x80000>;
1131 read-only;
1132 };
1133
1134 partition@180000 {
1135 label = "ubifs";
1136 reg = <0x180000 0x1fe80000>;
1137 };
1138 };
1139 };
1140
1141 spi@21000400 {
1142 #address-cells = <0x1>;
1143 #size-cells = <0x0>;
1144 compatible = "ti,davinci-spi-v1";
1145 reg = <0x21000400 0x200>;
1146 ti,davinci-spi-num-cs = <0x4>;
1147 ti,davinci-spi-intr-line = <0x0>;
1148 interrupts = <0x0 0x124 0xf01>;
1149 clocks = <0x18>;
1150
1151 n25q128@0 {
1152 #address-cells = <0x1>;
1153 #size-cells = <0x1>;
1154 compatible = "st,n25q128", "st,m25p";
1155 spi-max-frequency = <0x1c9c380>;
1156 reg = <0x0>;
1157
1158 partition@0 {
1159 label = "u-boot-spl";
1160 reg = <0x0 0x80000>;
1161 read-only;
1162 };
1163
1164 partition@1 {
1165 label = "test";
1166 reg = <0x80000 0xf80000>;
1167 };
1168 };
1169
1170 spi@1 {
1171 #address-cells = <0x1>;
1172 #size-cells = <0x1>;
1173 compatible = "rohm,dh2228fv";
1174 spi-max-frequency = <0x1c9c380>;
1175 reg = <0x3>;
1176 };
1177 };
1178
1179 spi@21000600 {
1180 #address-cells = <0x1>;
1181 #size-cells = <0x0>;
1182 compatible = "ti,davinci-spi-v1";
1183 reg = <0x21000600 0x200>;
1184 ti,davinci-spi-num-cs = <0x4>;
1185 ti,davinci-spi-intr-line = <0x0>;
1186 interrupts = <0x0 0x128 0xf01>;
1187 clocks = <0x18>;
1188 };
1189
1190 spi@21000800 {
1191 #address-cells = <0x1>;
1192 #size-cells = <0x0>;
1193 compatible = "ti,davinci-spi-v1";
1194 reg = <0x21000800 0x200>;
1195 ti,davinci-spi-num-cs = <0x4>;
1196 ti,davinci-spi-intr-line = <0x0>;
1197 interrupts = <0x0 0x12c 0xf01>;
1198 clocks = <0x18>;
1199 };
1200
1201 i2c0@2530000 {
1202 compatible = "ti,davinci-i2c";
1203 reg = <0x2530000 0x400>;
1204 clock-frequency = <0x186a0>;
1205 clocks = <0x19>;
1206 interrupts = <0x0 0x11b 0xf01>;
1207 #address-cells = <0x1>;
1208 #size-cells = <0x0>;
1209
1210 dtt@50 {
1211 compatible = "at,24c1024";
1212 reg = <0x50>;
1213 };
1214 };
1215
1216 i2c1@2530400 {
1217 compatible = "ti,davinci-i2c";
1218 reg = <0x2530400 0x400>;
1219 clock-frequency = <0x186a0>;
1220 clocks = <0x19>;
1221 interrupts = <0x0 0x11e 0xf01>;
1222 #address-cells = <0x1>;
1223 #size-cells = <0x0>;
1224 };
1225
1226 i2c2@2530800 {
1227 compatible = "ti,davinci-i2c";
1228 reg = <0x2530800 0x400>;
1229 clock-frequency = <0x186a0>;
1230 clocks = <0x19>;
1231 interrupts = <0x0 0x121 0xf01>;
1232 #address-cells = <0x1>;
1233 #size-cells = <0x0>;
1234
1235 pca@20 {
1236 compatible = "nxp,pca9555";
1237 status = "disabled";
1238 reg = <0x20>;
1239 };
1240 };
1241
1242 mpax {
1243 compatible = "ti,uio-module-drv";
1244 mem = <0xbc00000 0xa00>;
1245 label = "mpax";
1246 };
1247
1248 edma3 {
1249 compatible = "ti,uio-module-drv";
1250 mem = <0x2700000 0xc0000>;
1251 label = "edma3";
1252 };
1253
1254 secmgr {
1255 compatible = "ti,uio-module-drv";
1256 mem = <0x2500100 0x4>;
1257 label = "secmgr";
1258 };
1259
1260 wdt@22f0080 {
1261 compatible = "ti,davinci-wdt";
1262 reg = <0x22f0080 0x80>;
1263 clocks = <0x1c>;
1264 clock-names = "watchdog";
1265 };
1266
1267 timer@22f0000 {
1268 compatible = "ti,keystone-timer";
1269 reg = <0x22f0000 0x80>;
1270 interrupts = <0x0 0x6e 0xf01>;
1271 clocks = <0x1d>;
1272 };
1273
1274 srss@2330000 {
1275 compatible = "ti,keystone-srss";
1276 reg = <0x2330000 0x800>;
1277 clocks = <0x1e>;
1278 clock-names = "srssclock";
1279 };
1280
1281 sysctrl {
1282 compatible = "ti,keystone-sys";
1283 reg = <0x21010000 0x200>;
1284 interrupts = <0x0 0x18 0xf01 0x0 0x1c0 0xf01>;
1285 };
1286
1287 ssusb3_phy {
1288 compatible = "usb-nop-xceiv";
1289 };
1290
1291 dwc@2680000 {
1292 compatible = "ti,keystone-dwc3";
1293 #address-cells = <0x1>;
1294 #size-cells = <0x1>;
1295 reg = <0x2690000 0x70000 0x2680000 0x10000 0x2620738 0x20>;
1296 interrupts = <0x0 0x189 0xf01>;
1297 clocks = <0x1f>;
1298 clock-names = "usb";
1299 interrupt-controller;
1300 #interrupt-cells = <0x2>;
1301 };
1302
1303 debugss {
1304 compatible = "ti,keystone-debugss";
1305 clocks = <0x3 0x37 0x38 0x39 0x3a>;
1306 clock-names = "mainpllclock", "armpllclock", "debugssclock", "gemtraceclock", "tetbclock";
1307 };
1308
1309 pmu {
1310 compatible = "arm,cortex-a15-pmu";
1311 interrupts = <0x0 0x14 0xf01 0x0 0x15 0xf01 0x0 0x16 0xf01 0x0 0x17 0xf01>;
1312 };
1313 };
1314
1315 cpus {
1316 #address-cells = <0x1>;
1317 #size-cells = <0x0>;
1318 interrupt-parent = <0x1>;
1319
1320 cpu@0 {
1321 compatible = "arm,cortex-a15";
1322 device_type = "cpu";
1323 reg = <0x0>;
1324 clocks = <0x37>;
1325 };
1326 };
1327};
diff --git a/arch/arm/configs/keystone2_recovery_defconfig b/arch/arm/configs/keystone2_recovery_defconfig
new file mode 100644
index 00000000000..3557168f0bf
--- /dev/null
+++ b/arch/arm/configs/keystone2_recovery_defconfig
@@ -0,0 +1,286 @@
1# CONFIG_SWAP is not set
2CONFIG_SYSVIPC=y
3CONFIG_POSIX_MQUEUE=y
4CONFIG_HIGH_RES_TIMERS=y
5CONFIG_IKCONFIG=y
6CONFIG_IKCONFIG_PROC=y
7CONFIG_LOG_BUF_SHIFT=14
8CONFIG_BLK_DEV_INITRD=y
9CONFIG_SYSCTL_SYSCALL=y
10CONFIG_KALLSYMS_ALL=y
11# CONFIG_BASE_FULL is not set
12CONFIG_EMBEDDED=y
13# CONFIG_SLUB_DEBUG is not set
14CONFIG_PROFILING=y
15CONFIG_OPROFILE=y
16CONFIG_KPROBES=y
17CONFIG_JUMP_LABEL=y
18CONFIG_MODULES=y
19CONFIG_MODULE_FORCE_LOAD=y
20CONFIG_MODULE_UNLOAD=y
21CONFIG_MODULE_FORCE_UNLOAD=y
22CONFIG_MODVERSIONS=y
23CONFIG_ARCH_KEYSTONE=y
24CONFIG_GPIO_PCA953X=y
25CONFIG_KEYSTONE2_DMA_COHERENT=y
26CONFIG_ARM_LPAE=y
27CONFIG_ARM_ERRATA_798181=y
28CONFIG_PCI=y
29CONFIG_PCI_MSI=y
30CONFIG_PCI_REALLOC_ENABLE_AUTO=y
31CONFIG_TI_KEYSTONE_PCIE=y
32CONFIG_PCIE_ECRC=y
33CONFIG_SMP=y
34CONFIG_HAVE_ARM_ARCH_TIMER=y
35CONFIG_AEABI=y
36CONFIG_HIGHMEM=y
37CONFIG_ARM_APPENDED_DTB=y
38CONFIG_KEXEC=y
39CONFIG_CRASH_DUMP=y
40CONFIG_VFP=y
41CONFIG_NEON=y
42CONFIG_PM_RUNTIME=y
43CONFIG_NET=y
44CONFIG_PACKET=y
45CONFIG_UNIX=y
46CONFIG_UNIX_DIAG=y
47CONFIG_XFRM_USER=y
48CONFIG_XFRM_SUB_POLICY=y
49CONFIG_XFRM_STATISTICS=y
50CONFIG_NET_KEY=y
51CONFIG_NET_KEY_MIGRATE=y
52CONFIG_INET=y
53CONFIG_IP_MULTICAST=y
54CONFIG_IP_ADVANCED_ROUTER=y
55CONFIG_IP_MULTIPLE_TABLES=y
56CONFIG_IP_ROUTE_MULTIPATH=y
57CONFIG_IP_ROUTE_VERBOSE=y
58CONFIG_IP_PNP=y
59CONFIG_IP_PNP_DHCP=y
60CONFIG_IP_PNP_BOOTP=y
61CONFIG_NET_IPIP=y
62CONFIG_NET_IPGRE_DEMUX=y
63CONFIG_NET_IPGRE=y
64CONFIG_IP_MROUTE=y
65CONFIG_IP_MROUTE_MULTIPLE_TABLES=y
66CONFIG_IP_PIMSM_V2=y
67CONFIG_INET_AH=y
68CONFIG_INET_IPCOMP=y
69CONFIG_IPV6=y
70CONFIG_INET6_AH=y
71CONFIG_INET6_IPCOMP=y
72CONFIG_INET6_XFRM_MODE_BEET=m
73CONFIG_IPV6_SIT=m
74CONFIG_IPV6_TUNNEL=y
75CONFIG_IPV6_MULTIPLE_TABLES=y
76CONFIG_IPV6_SUBTREES=y
77CONFIG_IPV6_MROUTE=y
78CONFIG_IPV6_PIMSM_V2=y
79CONFIG_NETFILTER=y
80CONFIG_NF_CONNTRACK=m
81# CONFIG_NF_CONNTRACK_PROCFS is not set
82CONFIG_NF_CT_NETLINK=m
83CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
84CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
85CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m
86CONFIG_NETFILTER_XT_TARGET_MARK=m
87CONFIG_NETFILTER_XT_MATCH_COMMENT=m
88CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
89CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
90CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
91CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
92CONFIG_NETFILTER_XT_MATCH_CPU=m
93CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
94CONFIG_NETFILTER_XT_MATCH_LENGTH=m
95CONFIG_NETFILTER_XT_MATCH_LIMIT=m
96CONFIG_NETFILTER_XT_MATCH_MAC=m
97CONFIG_NETFILTER_XT_MATCH_MARK=m
98CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
99CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
100CONFIG_NETFILTER_XT_MATCH_STATE=m
101CONFIG_NF_CONNTRACK_IPV4=m
102CONFIG_IP_NF_IPTABLES=m
103CONFIG_IP_NF_MATCH_AH=m
104CONFIG_IP_NF_MATCH_ECN=m
105CONFIG_IP_NF_MATCH_TTL=m
106CONFIG_IP_NF_FILTER=m
107CONFIG_IP_NF_TARGET_REJECT=m
108CONFIG_IP_NF_TARGET_ULOG=m
109CONFIG_IP_NF_MANGLE=m
110CONFIG_IP_NF_TARGET_CLUSTERIP=m
111CONFIG_IP_NF_TARGET_ECN=m
112CONFIG_IP_NF_TARGET_TTL=m
113CONFIG_IP_NF_RAW=m
114CONFIG_IP_NF_ARPTABLES=m
115CONFIG_IP_NF_ARPFILTER=m
116CONFIG_IP_NF_ARP_MANGLE=m
117CONFIG_IP6_NF_IPTABLES=m
118CONFIG_BRIDGE_NF_EBTABLES=m
119CONFIG_BRIDGE_EBT_BROUTE=m
120CONFIG_BRIDGE_EBT_T_FILTER=m
121CONFIG_BRIDGE_EBT_T_NAT=m
122CONFIG_BRIDGE_EBT_802_3=m
123CONFIG_BRIDGE_EBT_AMONG=m
124CONFIG_BRIDGE_EBT_ARP=m
125CONFIG_BRIDGE_EBT_IP=m
126CONFIG_BRIDGE_EBT_IP6=m
127CONFIG_BRIDGE_EBT_LIMIT=m
128CONFIG_BRIDGE_EBT_MARK=m
129CONFIG_BRIDGE_EBT_PKTTYPE=m
130CONFIG_BRIDGE_EBT_STP=m
131CONFIG_BRIDGE_EBT_VLAN=m
132CONFIG_BRIDGE_EBT_ARPREPLY=m
133CONFIG_BRIDGE_EBT_DNAT=m
134CONFIG_BRIDGE_EBT_MARK_T=m
135CONFIG_BRIDGE_EBT_REDIRECT=m
136CONFIG_BRIDGE_EBT_SNAT=m
137CONFIG_BRIDGE_EBT_LOG=m
138CONFIG_BRIDGE_EBT_ULOG=m
139CONFIG_BRIDGE_EBT_NFLOG=m
140CONFIG_IP_SCTP=y
141CONFIG_BRIDGE=y
142CONFIG_VLAN_8021Q=y
143CONFIG_NET_SCHED=y
144CONFIG_NET_SCH_CBQ=m
145CONFIG_NET_SCH_HTB=m
146CONFIG_NET_SCH_HFSC=m
147CONFIG_NET_SCH_PRIO=m
148CONFIG_NET_SCH_MULTIQ=m
149CONFIG_NET_SCH_RED=m
150CONFIG_NET_SCH_SFB=m
151CONFIG_NET_SCH_SFQ=m
152CONFIG_NET_SCH_TEQL=m
153CONFIG_NET_SCH_TBF=m
154CONFIG_NET_SCH_GRED=m
155CONFIG_NET_SCH_DSMARK=m
156CONFIG_NET_SCH_NETEM=m
157CONFIG_NET_SCH_DRR=m
158CONFIG_NET_SCH_MQPRIO=m
159CONFIG_NET_SCH_CHOKE=m
160CONFIG_NET_SCH_QFQ=m
161CONFIG_NET_SCH_INGRESS=m
162CONFIG_NET_CLS_BASIC=m
163CONFIG_NET_CLS_TCINDEX=m
164CONFIG_NET_CLS_ROUTE4=m
165CONFIG_NET_CLS_FW=m
166CONFIG_NET_CLS_U32=m
167CONFIG_CLS_U32_PERF=y
168CONFIG_CLS_U32_MARK=y
169CONFIG_NET_CLS_RSVP=m
170CONFIG_NET_CLS_RSVP6=m
171CONFIG_NET_CLS_FLOW=m
172CONFIG_NET_EMATCH=y
173CONFIG_NET_EMATCH_CMP=m
174CONFIG_NET_EMATCH_NBYTE=m
175CONFIG_NET_EMATCH_U32=m
176CONFIG_NET_EMATCH_META=m
177CONFIG_NET_EMATCH_TEXT=m
178CONFIG_NET_CLS_ACT=y
179CONFIG_NET_ACT_POLICE=m
180CONFIG_NET_ACT_GACT=m
181CONFIG_GACT_PROB=y
182CONFIG_NET_ACT_MIRRED=m
183CONFIG_NET_ACT_IPT=m
184CONFIG_NET_ACT_NAT=m
185CONFIG_NET_ACT_PEDIT=m
186CONFIG_NET_ACT_SIMP=m
187CONFIG_NET_ACT_SKBEDIT=m
188CONFIG_NET_ACT_CSUM=m
189CONFIG_NET_CLS_IND=y
190CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
191CONFIG_DEVTMPFS=y
192CONFIG_DEVTMPFS_MOUNT=y
193CONFIG_MTD=y
194CONFIG_MTD_TESTS=m
195CONFIG_MTD_CMDLINE_PARTS=y
196CONFIG_MTD_BLOCK=y
197CONFIG_MTD_PLATRAM=y
198CONFIG_MTD_M25P80=y
199CONFIG_MTD_NAND=y
200CONFIG_MTD_NAND_DAVINCI=y
201CONFIG_MTD_UBI=y
202CONFIG_PROC_DEVICETREE=y
203CONFIG_BLK_DEV_LOOP=y
204CONFIG_EEPROM_AT24=y
205CONFIG_SCSI=y
206CONFIG_BLK_DEV_SD=y
207CONFIG_CHR_DEV_SG=y
208CONFIG_NETDEVICES=y
209CONFIG_TUN=y
210CONFIG_TI_DAVINCI_MDIO=y
211CONFIG_TI_CPTS=y
212CONFIG_TI_KEYSTONE_XGE=y
213CONFIG_MARVELL_PHY=y
214CONFIG_MDIO_BITBANG=y
215CONFIG_MDIO_GPIO=y
216CONFIG_INPUT_EVDEV=y
217CONFIG_KEYBOARD_GPIO=y
218CONFIG_SERIAL_8250=y
219CONFIG_SERIAL_8250_CONSOLE=y
220CONFIG_SERIAL_OF_PLATFORM=y
221CONFIG_I2C=y
222# CONFIG_I2C_COMPAT is not set
223CONFIG_I2C_CHARDEV=y
224CONFIG_I2C_DAVINCI=y
225CONFIG_SPI=y
226CONFIG_SPI_DAVINCI=y
227CONFIG_SPI_SPIDEV=y
228CONFIG_GPIO_SYSFS=y
229CONFIG_POWER_SUPPLY=y
230CONFIG_POWER_RESET=y
231CONFIG_POWER_RESET_GPIO=y
232# CONFIG_HWMON is not set
233CONFIG_WATCHDOG=y
234CONFIG_DAVINCI_WATCHDOG=y
235CONFIG_USB=y
236CONFIG_USB_DEBUG=y
237CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
238CONFIG_USB_XHCI_HCD=y
239CONFIG_USB_STORAGE=y
240CONFIG_USB_DWC3=y
241CONFIG_USB_DWC3_HOST=y
242CONFIG_USB_PHY=y
243CONFIG_NOP_USB_XCEIV=y
244CONFIG_USB_GADGET=y
245CONFIG_UIO=y
246CONFIG_UIO_PDRV=y
247CONFIG_COMMON_CLK_DEBUG=y
248# CONFIG_IOMMU_SUPPORT is not set
249CONFIG_REMOTEPROC_USER=y
250CONFIG_MEMORY=y
251CONFIG_EXT3_FS=y
252CONFIG_EXT4_FS=y
253CONFIG_EXT4_FS_POSIX_ACL=y
254CONFIG_JBD_DEBUG=y
255CONFIG_MSDOS_FS=y
256CONFIG_VFAT_FS=y
257CONFIG_NTFS_FS=y
258CONFIG_TMPFS=y
259CONFIG_JFFS2_FS=y
260CONFIG_JFFS2_FS_WBUF_VERIFY=y
261CONFIG_UBIFS_FS=y
262CONFIG_CRAMFS=y
263CONFIG_NFS_FS=y
264CONFIG_NFS_V3_ACL=y
265CONFIG_ROOT_NFS=y
266CONFIG_NFSD=y
267CONFIG_NFSD_V3=y
268CONFIG_NFSD_V3_ACL=y
269CONFIG_NLS_CODEPAGE_437=y
270CONFIG_NLS_ISO8859_1=y
271CONFIG_PRINTK_TIME=y
272# CONFIG_SCHED_DEBUG is not set
273CONFIG_DEBUG_INFO=y
274CONFIG_DEBUG_USER=y
275CONFIG_DEBUG_LL=y
276CONFIG_EARLY_PRINTK=y
277CONFIG_CRYPTO_USER=y
278CONFIG_CRYPTO_NULL=y
279CONFIG_CRYPTO_CBC=y
280CONFIG_CRYPTO_CTR=y
281CONFIG_CRYPTO_XCBC=y
282CONFIG_CRYPTO_DES=y
283CONFIG_CRYPTO_ANSI_CPRNG=y
284CONFIG_CRYPTO_USER_API_HASH=y
285CONFIG_CRYPTO_USER_API_SKCIPHER=y
286CONFIG_KEYSTONE_RECOVERY_KERNEL=y