aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorMurali Karicheri2014-06-13 10:47:47 -0500
committerMurali Karicheri2014-12-03 10:30:10 -0600
commit4c3bd74f5b1916d008dd5f13afddad437d617c9d (patch)
treefa99ff9bbfed98fd5c016f7fc51e9677a3a94d14 /drivers/net/ethernet/ti/keystone_ethss2.c
parent260df23623ccde037facc32d3860277eb87be2ba (diff)
downloadlinux-4c3bd74f5b1916d008dd5f13afddad437d617c9d.tar.gz
linux-4c3bd74f5b1916d008dd5f13afddad437d617c9d.tar.xz
linux-4c3bd74f5b1916d008dd5f13afddad437d617c9d.zip
net: keystone: ethss2: fix compiler error when CPTS is disabled
Currently if CPTS is disabled, network driver doesn't compile. This patch addresses this issue. While at it, move the code a bit so that ptp_filter_init() is called from cpts registration function. Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Diffstat (limited to 'drivers/net/ethernet/ti/keystone_ethss2.c')
-rw-r--r--drivers/net/ethernet/ti/keystone_ethss2.c127
1 files changed, 75 insertions, 52 deletions
diff --git a/drivers/net/ethernet/ti/keystone_ethss2.c b/drivers/net/ethernet/ti/keystone_ethss2.c
index 3d92e164b97..5803c2b1450 100644
--- a/drivers/net/ethernet/ti/keystone_ethss2.c
+++ b/drivers/net/ethernet/ti/keystone_ethss2.c
@@ -3187,13 +3187,20 @@ static inline void cpsw2_register_cpts(struct cpsw2_priv *cpsw_dev)
3187 if (cpsw_dev->cpts_registered > 0) 3187 if (cpsw_dev->cpts_registered > 0)
3188 goto done; 3188 goto done;
3189 3189
3190 if (ptp_filter_init(phy_ptp_filter, ARRAY_SIZE(phy_ptp_filter))) {
3191 dev_err(cpsw_dev->dev, "bad ptp filter\n");
3192 return;
3193 }
3194
3190 cpsw_dev->cpts.filter = cpsw_ptp_filter; 3195 cpsw_dev->cpts.filter = cpsw_ptp_filter;
3191 cpsw_dev->cpts.filter_size = ARRAY_SIZE(cpsw_ptp_filter); 3196 cpsw_dev->cpts.filter_size = ARRAY_SIZE(cpsw_ptp_filter);
3192 3197
3193 /* Let cpts calculate the mult and shift */ 3198 /* Let cpts calculate the mult and shift */
3194 if (cpts_register(cpsw_dev->dev, &cpsw_dev->cpts, 3199 if (cpts_register(cpsw_dev->dev, &cpsw_dev->cpts,
3195 cpsw_dev->cpts.cc.mult, cpsw_dev->cpts.cc.shift)) 3200 cpsw_dev->cpts.cc.mult, cpsw_dev->cpts.cc.shift)) {
3196 dev_err(cpsw_dev->dev, "error registering cpts device\n"); 3201 dev_err(cpsw_dev->dev, "error registering cpts device\n");
3202 return;
3203 }
3197 3204
3198done: 3205done:
3199 ++cpsw_dev->cpts_registered; 3206 ++cpsw_dev->cpts_registered;
@@ -3216,6 +3223,67 @@ static inline void cpsw2_unregister_cpts(struct cpsw2_priv *cpsw_dev)
3216 cpsw_dev->cpts.filter_size = 0; 3223 cpsw_dev->cpts.filter_size = 0;
3217 cpts_unregister(&cpsw_dev->cpts); 3224 cpts_unregister(&cpsw_dev->cpts);
3218} 3225}
3226
3227static void cpsw2_update_cpts_dt_params(struct cpsw2_priv *cpsw_dev,
3228 struct device_node *node)
3229{
3230 int ret;
3231
3232 ret = of_property_read_u32(node, "cpts_reg_ofs",
3233 &cpsw_dev->cpts_reg_ofs);
3234 if (ret < 0)
3235 dev_err(cpsw_dev->dev,
3236 "missing cpts reg offset, err %d\n", ret);
3237
3238 ret = of_property_read_u32(node, "cpts_rftclk_sel",
3239 &cpsw_dev->cpts.rftclk_sel);
3240 if (ret < 0) {
3241 dev_err(cpsw_dev->dev,
3242 "missing cpts rftclk_sel, err %d\n", ret);
3243 cpsw_dev->cpts.rftclk_sel = 0;
3244 }
3245
3246 ret = of_property_read_u32(node, "cpts_rftclk_freq",
3247 &cpsw_dev->cpts.rftclk_freq);
3248 if (ret < 0) {
3249 dev_vdbg(cpsw_dev->dev,
3250 "cpts rftclk freq not defined\n");
3251 cpsw_dev->cpts.rftclk_freq = 0;
3252 }
3253
3254 ret = of_property_read_u32(node, "cpts_ts_comp_length",
3255 &cpsw_dev->cpts.ts_comp_length);
3256 if (ret < 0) {
3257 dev_err(cpsw_dev->dev,
3258 "missing cpts ts_comp length, err %d\n", ret);
3259 cpsw_dev->cpts.ts_comp_length = 1;
3260 }
3261
3262 if (of_property_read_u32(node, "cpts_clock_mult",
3263 &cpsw_dev->cpts.cc.mult)) {
3264 dev_err(cpsw_dev->dev,
3265 "Missing cpts_clock_mult property in the DT.\n");
3266 cpsw_dev->cpts.cc.mult = 0;
3267 }
3268
3269 if (of_property_read_u32(node, "cpts_clock_shift",
3270 &cpsw_dev->cpts.cc.shift)) {
3271 dev_err(cpsw_dev->dev,
3272 "Missing cpts_clock_shift property in the DT.\n");
3273 cpsw_dev->cpts.cc.shift = 0;
3274 }
3275
3276 if (of_property_read_u32(node, "cpts_clock_div",
3277 &cpsw_dev->cpts.cc_div)) {
3278 dev_err(cpsw_dev->dev,
3279 "Missing cpts_clock_div property in the DT.\n");
3280 cpsw_dev->cpts.cc_div = 1;
3281 }
3282
3283 cpsw_dev->cpts.ignore_adjfreq =
3284 of_property_read_bool(node, "cpts-ignore-adjfreq");
3285}
3286
3219#else 3287#else
3220static inline int cpsw2_mark_pkt_txtstamp(struct cpsw2_intf *cpsw_intf, 3288static inline int cpsw2_mark_pkt_txtstamp(struct cpsw2_intf *cpsw_intf,
3221 struct netcp_packet *p_info) 3289 struct netcp_packet *p_info)
@@ -3236,6 +3304,11 @@ static inline void cpsw2_register_cpts(struct cpsw2_priv *cpsw_dev)
3236static inline void cpsw2_unregister_cpts(struct cpsw2_priv *cpsw_dev) 3304static inline void cpsw2_unregister_cpts(struct cpsw2_priv *cpsw_dev)
3237{ 3305{
3238} 3306}
3307
3308static void cpsw2_update_cpts_dt_params(struct cpsw2_priv *cpsw_dev,
3309 struct device_node *node)
3310{
3311}
3239#endif /* CONFIG_TI_CPTS */ 3312#endif /* CONFIG_TI_CPTS */
3240 3313
3241static int cpsw2_serdes_init(struct cpsw2_priv *cpsw_dev) 3314static int cpsw2_serdes_init(struct cpsw2_priv *cpsw_dev)
@@ -3578,11 +3651,6 @@ static int cpsw2_probe(struct netcp_device *netcp_device,
3578 return -ENODEV; 3651 return -ENODEV;
3579 } 3652 }
3580 3653
3581 if (ptp_filter_init(phy_ptp_filter, ARRAY_SIZE(phy_ptp_filter))) {
3582 dev_err(dev, "bad ptp filter\n");
3583 return -EINVAL;
3584 }
3585
3586 cpsw_dev = devm_kzalloc(dev, sizeof(struct cpsw2_priv), GFP_KERNEL); 3654 cpsw_dev = devm_kzalloc(dev, sizeof(struct cpsw2_priv), GFP_KERNEL);
3587 if (!cpsw_dev) { 3655 if (!cpsw_dev) {
3588 dev_err(dev, "cpsw_dev memory allocation failed\n"); 3656 dev_err(dev, "cpsw_dev memory allocation failed\n");
@@ -3715,54 +3783,9 @@ static int cpsw2_probe(struct netcp_device *netcp_device,
3715 &cpsw_dev->ale_reg_ofs); 3783 &cpsw_dev->ale_reg_ofs);
3716 if (ret < 0) 3784 if (ret < 0)
3717 dev_err(dev, "missing ale reg offset, err %d\n", ret); 3785 dev_err(dev, "missing ale reg offset, err %d\n", ret);
3718#ifdef CONFIG_TI_CPTS
3719 ret = of_property_read_u32(node, "cpts_reg_ofs",
3720 &cpsw_dev->cpts_reg_ofs);
3721 if (ret < 0)
3722 dev_err(dev, "missing cpts reg offset, err %d\n", ret);
3723 3786
3724 ret = of_property_read_u32(node, "cpts_rftclk_sel", 3787 cpsw2_update_cpts_dt_params(cpsw_dev, node);
3725 &cpsw_dev->cpts.rftclk_sel);
3726 if (ret < 0) {
3727 dev_err(dev, "missing cpts rftclk_sel, err %d\n", ret);
3728 cpsw_dev->cpts.rftclk_sel = 0;
3729 }
3730 3788
3731 ret = of_property_read_u32(node, "cpts_rftclk_freq",
3732 &cpsw_dev->cpts.rftclk_freq);
3733 if (ret < 0) {
3734 dev_vdbg(dev, "cpts rftclk freq not defined\n");
3735 cpsw_dev->cpts.rftclk_freq = 0;
3736 }
3737
3738 ret = of_property_read_u32(node, "cpts_ts_comp_length",
3739 &cpsw_dev->cpts.ts_comp_length);
3740 if (ret < 0) {
3741 dev_err(dev, "missing cpts ts_comp length, err %d\n", ret);
3742 cpsw_dev->cpts.ts_comp_length = 1;
3743 }
3744
3745 if (of_property_read_u32(node, "cpts_clock_mult",
3746 &cpsw_dev->cpts.cc.mult)) {
3747 pr_err("Missing cpts_clock_mult property in the DT.\n");
3748 cpsw_dev->cpts.cc.mult = 0;
3749 }
3750
3751 if (of_property_read_u32(node, "cpts_clock_shift",
3752 &cpsw_dev->cpts.cc.shift)) {
3753 pr_err("Missing cpts_clock_shift property in the DT.\n");
3754 cpsw_dev->cpts.cc.shift = 0;
3755 }
3756
3757 if (of_property_read_u32(node, "cpts_clock_div",
3758 &cpsw_dev->cpts.cc_div)) {
3759 pr_err("Missing cpts_clock_div property in the DT.\n");
3760 cpsw_dev->cpts.cc_div = 1;
3761 }
3762
3763 cpsw_dev->cpts.ignore_adjfreq =
3764 of_property_read_bool(node, "cpts-ignore-adjfreq");
3765#endif
3766 ret = of_property_read_u32(node, "ale_ageout", &cpsw_dev->ale_ageout); 3789 ret = of_property_read_u32(node, "ale_ageout", &cpsw_dev->ale_ageout);
3767 if (ret < 0) { 3790 if (ret < 0) {
3768 dev_err(dev, "missing ale_ageout parameter, err %d\n", ret); 3791 dev_err(dev, "missing ale_ageout parameter, err %d\n", ret);