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-rw-r--r--Documentation/devicetree/bindings/arm/keystone/ti,uio-module-drv.txt49
-rw-r--r--Documentation/devicetree/bindings/clock/clk-davinci-psc.txt34
-rw-r--r--Documentation/devicetree/bindings/clock/clk-keystone-pll.txt30
-rw-r--r--Documentation/devicetree/bindings/dma/keystone-pktdma.txt119
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-keystone.txt64
-rw-r--r--Documentation/devicetree/bindings/hwmon/keystone-srss.txt26
-rw-r--r--Documentation/devicetree/bindings/hwqueue/keystone-hwqueue.txt197
-rw-r--r--Documentation/devicetree/bindings/hwqueue/keystone-qos.txt190
-rw-r--r--Documentation/devicetree/bindings/i2c/davinci.txt28
-rw-r--r--Documentation/devicetree/bindings/memory/davinci-aemif.txt103
-rw-r--r--Documentation/devicetree/bindings/misc/keystone-debugss.txt32
-rw-r--r--Documentation/devicetree/bindings/mtd/davinci-nand.txt (renamed from Documentation/devicetree/bindings/arm/davinci/nand.txt)29
-rw-r--r--Documentation/devicetree/bindings/mtd/st-m25p.txt14
-rw-r--r--Documentation/devicetree/bindings/pci/pcie-keystone.txt37
-rw-r--r--Documentation/devicetree/bindings/spi/spi-davinci.txt37
-rw-r--r--Documentation/devicetree/bindings/timer/ti,keystone-timer.txt19
-rw-r--r--Documentation/devicetree/bindings/tty/serial/of-serial.txt1
-rw-r--r--Documentation/devicetree/bindings/usb/keystone-usb.txt41
-rw-r--r--arch/arm/Kconfig53
-rw-r--r--arch/arm/Kconfig.debug14
-rw-r--r--arch/arm/Makefile1
-rw-r--r--arch/arm/boot/compressed/head.S6
-rw-r--r--arch/arm/boot/dts/Makefile3
-rw-r--r--arch/arm/boot/dts/k2e-clocks.dtsi99
-rw-r--r--arch/arm/boot/dts/k2e-evm.dts165
-rw-r--r--arch/arm/boot/dts/k2e-net.dtsi443
-rw-r--r--arch/arm/boot/dts/k2e.dtsi853
-rw-r--r--arch/arm/boot/dts/k2hk-clocks.dtsi476
-rw-r--r--arch/arm/boot/dts/k2hk-evm-recovery.dts1327
-rw-r--r--arch/arm/boot/dts/k2hk-evm.dts228
-rw-r--r--arch/arm/boot/dts/k2hk-net.dtsi337
-rw-r--r--arch/arm/boot/dts/k2hk.dtsi1133
-rw-r--r--arch/arm/boot/dts/k2l-clocks.dtsi264
-rw-r--r--arch/arm/boot/dts/k2l-evm.dts145
-rw-r--r--arch/arm/boot/dts/k2l-net.dtsi274
-rw-r--r--arch/arm/boot/dts/k2l.dtsi893
-rw-r--r--arch/arm/boot/dts/keystone-clocks.dtsi393
-rw-r--r--arch/arm/boot/dts/keystone-qostree.dtsi415
-rw-r--r--arch/arm/boot/dts/keystone-sim.dts334
-rw-r--r--arch/arm/boot/dts/keystone.dtsi568
-rw-r--r--arch/arm/boot/dts/tci6638-vdb.dts866
-rw-r--r--arch/arm/configs/keystone2_defconfig289
-rw-r--r--arch/arm/configs/keystone2_fullrt_defconfig294
-rw-r--r--arch/arm/configs/keystone2_recovery_defconfig286
-rw-r--r--arch/arm/include/asm/mach/arch.h1
-rw-r--r--arch/arm/include/asm/memory.h116
-rw-r--r--arch/arm/include/asm/module.h15
-rw-r--r--arch/arm/include/asm/page.h2
-rw-r--r--arch/arm/include/asm/pgtable-3level-hwdef.h28
-rw-r--r--arch/arm/include/asm/pgtable-3level.h10
-rw-r--r--arch/arm/include/asm/pgtable.h11
-rw-r--r--arch/arm/include/asm/proc-fns.h26
-rw-r--r--arch/arm/include/asm/runtime-patch.h191
-rw-r--r--arch/arm/include/asm/timex.h3
-rw-r--r--arch/arm/kernel/Makefile1
-rw-r--r--arch/arm/kernel/arch_timer.c10
-rw-r--r--arch/arm/kernel/armksyms.c4
-rw-r--r--arch/arm/kernel/entry-armv.S11
-rw-r--r--arch/arm/kernel/head.S107
-rw-r--r--arch/arm/kernel/iwmmxt.S2
-rw-r--r--arch/arm/kernel/machine_kexec.c10
-rw-r--r--arch/arm/kernel/module.c14
-rw-r--r--arch/arm/kernel/process.c4
-rw-r--r--arch/arm/kernel/return_address.c4
-rw-r--r--arch/arm/kernel/runtime-patch.c291
-rw-r--r--arch/arm/kernel/setup.c22
-rw-r--r--arch/arm/kernel/smp.c11
-rw-r--r--arch/arm/kernel/topology.c24
-rw-r--r--arch/arm/kernel/vmlinux.lds.S13
-rw-r--r--arch/arm/mach-davinci/Kconfig6
-rw-r--r--arch/arm/mach-davinci/Makefile16
-rw-r--r--arch/arm/mach-davinci/clock.c713
-rw-r--r--arch/arm/mach-davinci/clock.h140
-rw-r--r--arch/arm/mach-davinci/common.c5
-rw-r--r--arch/arm/mach-davinci/devices.c1
-rw-r--r--arch/arm/mach-davinci/dm355.c583
-rw-r--r--arch/arm/mach-davinci/dm365.c655
-rw-r--r--arch/arm/mach-davinci/dm644x.c531
-rw-r--r--arch/arm/mach-davinci/dma.c3
-rw-r--r--arch/arm/mach-davinci/include/mach/clock.h24
-rw-r--r--arch/arm/mach-davinci/include/mach/common.h9
-rw-r--r--arch/arm/mach-davinci/include/mach/hardware.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/pll.h82
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h10
-rw-r--r--arch/arm/mach-davinci/include/mach/time.h2
-rw-r--r--arch/arm/mach-davinci/pm.c3
-rw-r--r--arch/arm/mach-davinci/psc.c137
-rw-r--r--arch/arm/mach-davinci/sleep.S3
-rw-r--r--arch/arm/mach-davinci/time.c14
-rw-r--r--arch/arm/mach-ep93xx/crunch-bits.S2
-rw-r--r--arch/arm/mach-exynos/Kconfig3
-rw-r--r--arch/arm/mach-keystone/Kconfig18
-rw-r--r--arch/arm/mach-keystone/Makefile2
-rw-r--r--arch/arm/mach-keystone/Makefile.boot2
-rw-r--r--arch/arm/mach-keystone/include/mach/debug-macro.S44
-rw-r--r--arch/arm/mach-keystone/include/mach/gpio.h1
-rw-r--r--arch/arm/mach-keystone/include/mach/memory.h75
-rw-r--r--arch/arm/mach-keystone/include/mach/serial.h48
-rw-r--r--arch/arm/mach-keystone/include/mach/timex.h21
-rw-r--r--arch/arm/mach-keystone/include/mach/uncompress.h48
-rw-r--r--arch/arm/mach-keystone/keystone.c313
-rw-r--r--arch/arm/mach-keystone/keystone.h26
-rw-r--r--arch/arm/mach-keystone/keystone_ecc.c85
-rw-r--r--arch/arm/mach-keystone/platsmp.c106
-rw-r--r--arch/arm/mach-keystone/pm.c68
-rw-r--r--arch/arm/mm/alignment.c1
-rw-r--r--arch/arm/mm/cache-v7.S7
-rw-r--r--arch/arm/mm/context.c9
-rw-r--r--arch/arm/mm/dma-mapping.c17
-rw-r--r--arch/arm/mm/idmap.c4
-rw-r--r--arch/arm/mm/init.c21
-rw-r--r--arch/arm/mm/mmu.c114
-rw-r--r--arch/arm/mm/proc-v7-3level.S53
-rw-r--r--arch/arm/oprofile/common.c3
-rw-r--r--arch/arm/vfp/entry.S3
-rw-r--r--arch/c6x/kernel/devicetree.c3
-rw-r--r--arch/microblaze/kernel/prom.c3
-rw-r--r--arch/mips/kernel/prom.c3
-rw-r--r--arch/openrisc/kernel/prom.c3
-rw-r--r--arch/powerpc/kernel/prom.c3
-rw-r--r--arch/x86/kernel/devicetree.c3
-rw-r--r--block/blk-settings.c8
-rw-r--r--drivers/Kconfig2
-rw-r--r--drivers/Makefile1
-rw-r--r--drivers/clk/Kconfig2
-rw-r--r--drivers/clk/Makefile2
-rw-r--r--drivers/clk/davinci/Kconfig42
-rw-r--r--drivers/clk/davinci/Makefile3
-rw-r--r--drivers/clk/davinci/clk-davinci-pll.c128
-rw-r--r--drivers/clk/davinci/clk-davinci-psc.c323
-rw-r--r--drivers/clk/davinci/davinci-clock.c379
-rw-r--r--drivers/clk/keystone/Kconfig6
-rw-r--r--drivers/clk/keystone/Makefile1
-rw-r--r--drivers/clk/keystone/clk-keystone-pll.c184
-rw-r--r--drivers/clocksource/Makefile1
-rw-r--r--drivers/clocksource/timer-keystone.c248
-rw-r--r--drivers/crypto/Kconfig16
-rw-r--r--drivers/crypto/Makefile1
-rw-r--r--drivers/crypto/keystone-sa.c3747
-rw-r--r--drivers/crypto/keystone-sa.h311
-rw-r--r--drivers/dma/Kconfig20
-rw-r--r--drivers/dma/Makefile2
-rw-r--r--drivers/dma/dmaengine.c15
-rw-r--r--drivers/dma/keystone-pktdma.c2300
-rw-r--r--drivers/dma/keystone-udma.c1046
-rw-r--r--drivers/dma/of-dma.c2
-rw-r--r--drivers/gpio/Kconfig15
-rw-r--r--drivers/gpio/Makefile2
-rw-r--r--drivers/gpio/gpio-davinci.c3
-rw-r--r--drivers/gpio/gpio-keystone-ipc.c121
-rw-r--r--drivers/gpio/gpio-keystone.c423
-rw-r--r--drivers/hwqueue/Kconfig29
-rw-r--r--drivers/hwqueue/Makefile9
-rw-r--r--drivers/hwqueue/hwqueue_core.c745
-rw-r--r--drivers/hwqueue/hwqueue_internal.h125
-rw-r--r--drivers/hwqueue/hwqueue_test.c277
-rw-r--r--drivers/hwqueue/keystone_hwqueue.c1362
-rw-r--r--drivers/hwqueue/keystone_hwqueue.h316
-rw-r--r--drivers/hwqueue/keystone_hwqueue_acc.c595
-rw-r--r--drivers/hwqueue/keystone_hwqueue_qos.c3992
-rw-r--r--drivers/hwqueue/keystone_qos.h418
-rw-r--r--drivers/i2c/busses/Kconfig2
-rw-r--r--drivers/i2c/busses/i2c-davinci.c32
-rw-r--r--drivers/irqchip/Makefile1
-rw-r--r--drivers/irqchip/irq-keystone-ipc.c216
-rw-r--r--drivers/memory/Kconfig10
-rw-r--r--drivers/memory/Makefile1
-rw-r--r--drivers/memory/davinci-aemif.c482
-rw-r--r--drivers/mtd/devices/m25p80.c16
-rw-r--r--drivers/mtd/nand/Kconfig6
-rw-r--r--drivers/mtd/nand/davinci_nand.c75
-rw-r--r--drivers/mtd/tests/mtd_oobtest.c17
-rw-r--r--drivers/net/ethernet/ti/davinci_mdio.c13
-rw-r--r--drivers/net/phy/marvell.c134
-rw-r--r--drivers/of/address.c30
-rw-r--r--drivers/of/fdt.c10
-rw-r--r--drivers/pci/Kconfig1
-rw-r--r--drivers/pci/Makefile2
-rw-r--r--drivers/pci/host/Kconfig12
-rw-r--r--drivers/pci/host/Makefile9
-rw-r--r--drivers/pci/host/k2-platform.c277
-rw-r--r--drivers/pci/host/pci-pdata.h25
-rw-r--r--drivers/pci/host/pcie-keystone.c1545
-rw-r--r--drivers/pci/pcie/aer/aerdrv.c11
-rw-r--r--drivers/pci/pcie/portdrv.h10
-rw-r--r--drivers/pci/pcie/portdrv_core.c3
-rw-r--r--drivers/pci/quirks.c12
-rw-r--r--drivers/remoteproc/Kconfig13
-rw-r--r--drivers/remoteproc/Makefile1
-rw-r--r--drivers/remoteproc/remoteproc_core.c176
-rw-r--r--drivers/remoteproc/remoteproc_user.c642
-rw-r--r--drivers/remoteproc/remoteproc_virtio.c18
-rw-r--r--drivers/rpmsg/virtio_rpmsg_bus.c129
-rw-r--r--drivers/scsi/scsi_lib.c2
-rw-r--r--drivers/scsi/storvsc_drv.c2
-rw-r--r--drivers/spi/Kconfig2
-rw-r--r--drivers/spi/spi-davinci.c211
-rw-r--r--drivers/tty/serial/8250/8250_core.c6
-rw-r--r--drivers/tty/serial/of_serial.c4
-rw-r--r--drivers/tty/serial/serial_core.c12
-rw-r--r--drivers/uio/uio.c13
-rw-r--r--drivers/uio/uio_pdrv.c20
-rw-r--r--drivers/usb/dwc3/Makefile1
-rw-r--r--drivers/usb/dwc3/dwc3-keystone.c254
-rw-r--r--drivers/usb/dwc3/dwc3-pci.c2
-rw-r--r--drivers/usb/host/xhci.c4
-rw-r--r--drivers/usb/phy/Kconfig8
-rw-r--r--drivers/usb/phy/Makefile1
-rw-r--r--drivers/usb/phy/phy-keystone.c151
-rw-r--r--drivers/virtio/Kconfig20
-rw-r--r--drivers/virtio/Makefile2
-rw-r--r--drivers/virtio/virtio_keystone.c1455
-rw-r--r--drivers/virtio/virtio_ring.c254
-rw-r--r--drivers/virtio/virtio_udma.c871
-rw-r--r--drivers/watchdog/Kconfig2
-rw-r--r--firmware/Makefile24
-rw-r--r--firmware/keystone/pa_eg0_pdsp0.fw.ihex236
-rw-r--r--firmware/keystone/pa_eg0_pdsp1.fw.ihex476
-rw-r--r--firmware/keystone/pa_eg0_pdsp2.fw.ihex429
-rw-r--r--firmware/keystone/pa_eg1_pdsp0.fw.ihex323
-rw-r--r--firmware/keystone/pa_eg2_pdsp0.fw.ihex385
-rw-r--r--firmware/keystone/pa_in0_pdsp0.fw.ihex413
-rw-r--r--firmware/keystone/pa_in0_pdsp1.fw.ihex385
-rw-r--r--firmware/keystone/pa_in1_pdsp0.fw.ihex434
-rw-r--r--firmware/keystone/pa_in1_pdsp1.fw.ihex324
-rw-r--r--firmware/keystone/pa_in2_pdsp0.fw.ihex316
-rw-r--r--firmware/keystone/pa_in3_pdsp0.fw.ihex384
-rw-r--r--firmware/keystone/pa_in4_pdsp0.fw.ihex429
-rw-r--r--firmware/keystone/pa_in4_pdsp1.fw.ihex285
-rw-r--r--firmware/keystone/pa_pdsp0_classify1.fw.ihex423
-rw-r--r--firmware/keystone/pa_pdsp1_classify1.fw.ihex422
-rw-r--r--firmware/keystone/pa_pdsp2_classify1.fw.ihex422
-rw-r--r--firmware/keystone/pa_pdsp3_classify2.fw.ihex255
-rw-r--r--firmware/keystone/pa_pdsp45_pam.fw.ihex449
-rw-r--r--firmware/keystone/pa_post_pdsp0.fw.ihex316
-rw-r--r--firmware/keystone/pa_post_pdsp1.fw.ihex215
-rw-r--r--firmware/keystone/qmss_pdsp_acc48_k2_le_1_0_0_9.fw.ihex112
-rw-r--r--firmware/keystone/qmss_pdsp_qos_k2_le_2_0_1_8.fw.ihex247
-rw-r--r--firmware/keystone/sa_pdsp0_1_0_2_1.fw.ihex548
-rw-r--r--firmware/keystone/sa_pdsp1_1_0_2_1.fw.ihex464
-rw-r--r--include/linux/bootmem.h30
-rw-r--r--include/linux/dmaengine.h15
-rw-r--r--include/linux/hwqueue.h223
-rw-r--r--include/linux/irqchip/keystone-ipc.h23
-rw-r--r--include/linux/keystone-dma.h124
-rw-r--r--include/linux/ktree.h127
-rw-r--r--include/linux/marvell_phy.h2
-rw-r--r--include/linux/of_address.h2
-rw-r--r--include/linux/of_fdt.h3
-rw-r--r--include/linux/platform_data/clk-davinci-pll.h54
-rw-r--r--include/linux/platform_data/clk-davinci-psc.h58
-rw-r--r--include/linux/platform_data/clk-keystone-pll.h56
-rw-r--r--include/linux/platform_data/davinci-clock.h149
-rw-r--r--include/linux/platform_data/edma.h (renamed from arch/arm/mach-davinci/include/mach/edma.h)0
-rw-r--r--include/linux/platform_data/mtd-davinci-aemif.h28
-rw-r--r--include/linux/platform_data/mtd-davinci.h3
-rw-r--r--include/linux/platform_data/spi-davinci.h2
-rw-r--r--include/linux/remoteproc.h12
-rw-r--r--include/linux/remoteproc_user.h34
-rw-r--r--include/linux/rpmsg.h4
-rw-r--r--include/linux/socket.h5
-rw-r--r--include/linux/udma.h38
-rw-r--r--include/linux/uio_driver.h4
-rw-r--r--include/linux/virtio.h340
-rw-r--r--include/net/rpmsg.h58
-rw-r--r--include/net/sctp/sctp.h1
-rw-r--r--include/uapi/linux/virtio_ids.h2
-rw-r--r--init/initramfs.c6
-rw-r--r--kernel/kexec.c45
-rw-r--r--lib/Makefile2
-rw-r--r--lib/ktree.c385
-rw-r--r--mm/bootmem.c57
-rw-r--r--mm/nobootmem.c30
-rw-r--r--mm/readahead.c2
-rw-r--r--net/Makefile1
-rw-r--r--net/rpmsg/Makefile1
-rw-r--r--net/rpmsg/rpmsg_proto.c635
-rw-r--r--net/sctp/outqueue.c1
-rw-r--r--net/sctp/proc.c1
-rwxr-xr-xscripts/mcsdk/forest361
l---------scripts/mcsdk/forest_cp1
l---------scripts/mcsdk/forest_ls1
l---------scripts/mcsdk/forest_mv1
l---------scripts/mcsdk/forest_rebuild1
l---------scripts/mcsdk/forest_rm1
285 files changed, 49572 insertions, 2716 deletions
diff --git a/Documentation/devicetree/bindings/arm/keystone/ti,uio-module-drv.txt b/Documentation/devicetree/bindings/arm/keystone/ti,uio-module-drv.txt
new file mode 100644
index 00000000000..54c78ced7d6
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/keystone/ti,uio-module-drv.txt
@@ -0,0 +1,49 @@
1UIO Peripheral Modules
2
3This file provides information about, what the device tree entry for the
4uio accesible peripheral module device should contain.
5
6Required properties:
7- compatible : "ti,uio-module-drv"
8- reg : Register start address and the size that will be
9 used by the driver
10 or
11 mem : Register/Memory start address and size of the Register/memory region.
12- label : label used for misc device registration
13
14
15Recommended properties :
16- interrupts : standard interrupt property
17- clocks : desired clock domain property
18
19Optional properties:
20- cfg-params: Specifies configuration parameters to be used with specific peripherals
21 ti,serdes_refclk_khz: serdes reference clock in khz
22 ti,serdes_maxserrate_khz: serdes maximum serial rate in khz
23 ti,serdes_maxlanerate: Lane rate "half" or "full"
24 The following are serdes equilization tap parameters
25 ti,serdes_c1 : Serdes c1 coefficient (0-31)
26 ti,serdes_c2 : Serdes c2 coefficient (0-15)
27 ti,serdes_cm : Serdes cm coefficient (0-15)
28 ti,qm-queue : QMSS queue associated with qpend binding
29
30Example:
31
32 uio_hyperlink0: hyperlink0 {
33 compatible = "ti,uio-module-drv";
34 mem = <0x21400000 0x00000100
35 0x40000000 0x10000000
36 0x0231a000 0x00002000>;
37 clocks = <&clkhyperlink0>;
38 interrupts = <0 387 0x101>;
39 label = "hyperlink0";
40 cfg-params
41 {
42 ti,serdes_refclk_khz = <312500>;
43 ti,serdes_maxserrate_khz = <6250000>;
44 ti,serdes_lanerate = "half";
45 ti,serdes_c1 = <4>;
46 ti,serdes_c2 = <0>;
47 ti,serdes_cm = <3>;
48 };
49 };
diff --git a/Documentation/devicetree/bindings/clock/clk-davinci-psc.txt b/Documentation/devicetree/bindings/clock/clk-davinci-psc.txt
new file mode 100644
index 00000000000..e61ac47e725
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/clk-davinci-psc.txt
@@ -0,0 +1,34 @@
1Binding for davinci psc clocks
2
3This binding uses the common clock binding[1].
4
5[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
6
7Required properties:
8- compatible : shall be "davinci,psc-clk".
9- #clock-cells : from common clock binding; shall be set to 0.
10- clocks : parent clock phandle
11- reg : psc base register address space
12
13Optional properties:
14- clock-output-names : From common clock binding to override the
15 default output clock name
16- status : "enabled" if clock is always enabled
17- lpsc : lpsc module id, if not set defaults to zero
18- pd : power domain number, if not set defaults to zero (always ON)
19- gpsc : gpsc number, if not set defaults to zero
20- base-flags : base flag used by clk framwork. Currently supports only
21 "ignore-unused" that avoids disabling unused clocks
22
23Example:
24 clock {
25 #clock-cells = <0>;
26 compatible = "davinci,psc-clk";
27 clocks = <&chipclk3>;
28 clock-output-names = "debugss_trc";
29 base-flags = "ignore-unused";
30 reg = <0x02350000 4096>;
31 lpsc = <5>;
32 pd = <1>;
33
34 };
diff --git a/Documentation/devicetree/bindings/clock/clk-keystone-pll.txt b/Documentation/devicetree/bindings/clock/clk-keystone-pll.txt
new file mode 100644
index 00000000000..82185ccfcda
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/clk-keystone-pll.txt
@@ -0,0 +1,30 @@
1Binding for keystone main pll clocks
2
3This binding uses the common clock binding[1].
4
5[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
6
7Required properties:
8- compatible : shall be "keystone,main-pll-clk".
9- #clock-cells : from common clock binding; shall be set to 0.
10- clocks : parent clock phandle
11- reg - index 0 - PLLCTRL PLLM register address
12- index 1 - MAINPLL_CTL0 register address
13- pllm_lower_mask - pllm lower bit mask
14- pllm_upper_mask - pllm upper bit mask
15- plld_mask - plld mask
16- fixed_postdiv - fixed post divider value
17
18Example:
19 clock {
20 #clock-cells = <0>;
21 compatible = "keystone,main-pll-clk";
22 clocks = <&refclk>;
23 reg = <0x02310110 4 /* PLLCTRL PLLM */
24 0x02620328 4>; /* MAINPLL_CTL0 */
25 pllm_lower_mask = <0x3f>;
26 pllm_upper_mask = <0x7f000>;
27 pllm_upper_shift = <6>;
28 plld_mask = <0x3f>;
29 fixed_postdiv = <2>;
30 };
diff --git a/Documentation/devicetree/bindings/dma/keystone-pktdma.txt b/Documentation/devicetree/bindings/dma/keystone-pktdma.txt
new file mode 100644
index 00000000000..73914a36786
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/keystone-pktdma.txt
@@ -0,0 +1,119 @@
1This document explains the device tree bindings for the packet dma
2on keystone devices. The Queue Manager Subsystem, The Packet Accelerator
3Subsystem and the SRIO on Keystone Devices all have their own packet dma
4modules. Each individual packet dma has a certain number of RX channels,
5RX flows and TX channels. Each instance of the packet DMA is being
6initialized through device specific bindings.
7
8Explantions of the various options:
9
10reg: the various registers offsets and the actual size from the offset
11loop-back: this is used only with the queue manger packet dma. This can be
12 used with other packet dma modules as well for testing purposes.
13big-endian: keystone devices can be operated in a mode where the DSP is in the
14 big endian mode. In such cases enable this option
15enable-all: enables all RX and TX channels associated with an instance of the
16 packet dma.
17debug: used to enable debug.To see debug messages the
18 CONFIG_DMADEVICES_DEBUG must also be enabled in the .config
19rx-priority: used to set the packet dma global rx priority.
20tx-priority: used to set the packet dma global tx priority.
21rx-retry-timeout: used to set the global timeout duration in pktdma clock
22 cycles. It controls the minimum amount of time that
23 an Rx channel will be required to wait when it encounters a
24 buffer starvation condition.
25
26The channels that will be used then need to be initialized. Both RX and TX
27channels need to be given bindings.
28
29label: This is used by the dma_request_channel_by_name APi to acquire
30 channels
31pool: is the pool from where descriptors will be acquired. This pool
32 needs to be defined in the hardware queue layer.
33decriptors: the number of descriptors accociated with the channel. Care should
34 be taken that the total number of descriptors associated with a
35 pool is less than or equal to the number in the hardware queue
36 layer.
37submit-queue: The submit queue which will be used by the hardware queue layer.
38completion-queue:the completion queue associated with a channel.
39debug: debug can be enabled on a per channel basis.
40channel: the actual channel number to be used.
41priority: the priority associated with a channel.
42flow: the RX flow that will be used. Applicable only for
43 RX.
44rx-error-retry: if enabled starvation errors result in subsequent re-try of
45 the descriptor allocation operation.
46logical-queue-managers: number of logical queue managers
47queues-per-queue-manager: the number of queues per queue manager
48qm-base-address: the actual VBUSM address that needs to be programmed into
49 each QM_BASE_ADDR register. The number of distinct values
50 should be equal to the number of logical queue managers.
51
52An examples is provided below. padma is packet dma instance associated
53with the packet accelerator susbsystem.
54
55 padma: pktdma@2004000 {
56 compatible = "ti,keystone-pktdma";
57 reg = <0x2004000 0x100 /* 0 - global */
58 0x2004400 0x120 /* 1 - txchan */
59 0x2004800 0x300 /* 2 - rxchan */
60 0x2004c00 0x120 /* 3 - txsched */
61 0x2005000 0x400>; /* 4 - rxflow */
62 /* loop-back; */
63 /* bigendian; */
64 enable-all;
65 /* debug; */
66
67 logical-queue-managers = <2>;
68 queues-per-queue-manager = <4096>;
69 qm-base-address = <0x34020000 0x34030000>;
70
71 channels {
72 nettx {
73 transmit;
74 label = "nettx";
75 pool = "pool-net";
76 descriptors = <128>;
77 submit-queue = <648>;
78 /* complete-queue = <xx>; */
79 /* debug; */
80 /* channel = <0>; */
81 /* priority = <1>; */
82 };
83 netrx {
84 receive;
85 label = "netrx";
86 pool = "pool-net";
87 descriptors = <128>;
88 /* submit-queue = <xx>; */
89 complete-queue = <657>;
90 /* debug; */
91 /* channel = <0>; */
92 flow = <0>;
93 };
94 patx {
95 transmit;
96 label = "patx";
97 pool = "pool-net";
98 descriptors = <8>;
99 submit-queue = <640>;
100 /* complete-queue = <xx>; */
101 /* debug; */
102 /* channel = <xx>; */
103 /* priority = <1>; */
104 queues = <640 4013>;
105 };
106 parx {
107 receive;
108 label = "parx";
109 pool = "pool-net";
110 descriptors = <4>;
111 /* submit-queue = <xx>; */
112 /* complete-queue = <xx>; */
113 /* debug; */
114 /* channel = <0>; */
115 flow = <1>;
116 };
117 };
118 };
119
diff --git a/Documentation/devicetree/bindings/gpio/gpio-keystone.txt b/Documentation/devicetree/bindings/gpio/gpio-keystone.txt
new file mode 100644
index 00000000000..eaef136009b
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-keystone.txt
@@ -0,0 +1,64 @@
1Keystone GPIO controller bindings
2
3Required properties:
4- compatible : Should be "ti,keystone-gpio"
5- reg : Address and length of the register set for the device.
6 This is the base address of GPIO bank.
7- gpio-controller : Marks the device node as a gpio controller.
8- #gpio-cells : Should be 2. First cell specify the pin number and
9 second is optional parameter (unused).
10- clocks: phandle to clock node
11- clock-names: name of the input clock
12- interrupt-controller: Marks the device node as an interrupt controller.
13- #interrupt-cells: Should be 2. The first cell is the GPIO number.
14 The second cell bits[3:0] is used to specify trigger type:
15 1 = low-to-high edge triggered.
16 2 = high-to-low edge triggered.
17
18Note: Each GPIO port should have an alias correctly numbered in "aliases"
19node.
20
21Examples:
22
23aliases {
24 gpio0 = &gpio0;
25 gpio1 = &gpio1;
26 gpio2 = &gpio2;
27 gpio3 = &gpio3;
28 gpio4 = &gpio4;
29};
30
31gpio0: gpio@2320000 {
32 compatible = "ti,keystone-gpio";
33 reg = <0x02320000 0x38>;
34 gpio-controller;
35 #gpio-cells = <2>;
36 interrupt-controller;
37 #interrupt-cells = <2>;
38 clocks = <&clkgpio>;
39 clock-names = "gpio";
40};
41
42To use gpio pins in the driver, include the phandle to the gpio device bindings
43in the specific driver device bindings.
44
45Example:
46
47following commands in the DT bindings of the device refers to gpio0, pin 20:-
48
49 test-gpios = <&gpio0 20 0x2>;
50
51Third argument (0x2) is the flag and is currently not used. Driver typically use
52the API of_get_named_gpio_flags() to refers to the specific gpio pin and use GPIO
53libraries to configure the pin.
54
55To use the gpio pin as an interrupt line, set the interrupt-parent to
56gpio driver device node that is associated with the gpio pin and include a
57interrupts property in the driver's device bindings to specify the irq number and
58flag as
59
60 interrupts = <20 0x2>
61 interrupt-parent = <&gpio0>;
62
63where gpio pin 20 is configured as interrupt line and flag is set to high to low
64edge triggered. gpio0 node is the interrupt-parent.
diff --git a/Documentation/devicetree/bindings/hwmon/keystone-srss.txt b/Documentation/devicetree/bindings/hwmon/keystone-srss.txt
new file mode 100644
index 00000000000..075b937cbfd
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwmon/keystone-srss.txt
@@ -0,0 +1,26 @@
1Texas Instruments Smart Reflex Sub-System (SRSS) module for Keystone devices
2
3Required properties:
4- compatible : Should be "ti,keystone-srss"
5- reg : Should contain SRSS registers location and length
6
7Optional properties:
8- clocks : the clock feeding the smart reflex sub-system.
9 Needed if platform uses clocks.
10 See clock-bindings.txt
11- clocks-names : clock name strings correspond to the clocks
12 defined above. These strings are used inside
13 module source code to identify the respective
14 clocks
15
16Documentation:
17http://www.ti.com/lit/ds/symlink/tci6636k2h.pdf
18
19Examples:
20
21srss: srss@2330000 {
22 compatible = "ti,keystone-srss";
23 reg = <0x02330000 0x800>;
24 clocks = <&clksr>;
25 clock-names = "srssclock";
26};
diff --git a/Documentation/devicetree/bindings/hwqueue/keystone-hwqueue.txt b/Documentation/devicetree/bindings/hwqueue/keystone-hwqueue.txt
new file mode 100644
index 00000000000..58e905cd5da
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwqueue/keystone-hwqueue.txt
@@ -0,0 +1,197 @@
1* Texas Instruments Keystone hwqueue driver
2
3Required properties:
4- compatible : Should be "ti,keystone-hwqueue";
5- reg : Address and length of the register set for the device for peek,
6 push/pop etc.
7- range : <start number> total range of hwqueue numbers for the device
8- region : <start number> of memory regions to use
9- linkram0 : <start number> of total link ram indices available
10- linkram1 : <start number> of total external linking ram indices
11 available
12- link-index : <start number> of link ram indices to use
13- queues : number of queues to use per queue range name (see example below)
14- descriptors : number and size of descriptors to use per hwqueue instance
15 name (see example below)
16
17- qmgrs : the number of individual queue managers in the device. On
18 keystone 1 range of devices there should be only one node.
19 On keystone 2 devices there can be more than 1 node
20 -- managed-queues : the actual queues managed by each queue manager instance
21
22Optional properties:
23- pdsps - PDSP configuration, if any.
24- qos-inputs - quality of service configuration
25
26The following explains the various attributes
27
28- values = <start number> : number of queues staring at queue number start are
29 reserved for QoS
30- pdsp-id = <x> : the qmss pdsp that has the QoS firmware
31- ticks-per-sec = <ticks> : the ticks per sec
32- sched-port-configs = <start count size> : scheduler port start index,
33 number of scheduler ports,
34 size of address space for
35 scheduler port
36- drop-out-profiles = <start count size> : output profile start index,
37 number of output profiles,
38 size of address space for
39 output profile
40- drop-cfg-profiles = <start count size> : config profile start index,
41 number of config profiles,
42 size of address space for
43 config profile
44- drop-queue-configs = <start count size> : drop queue config start index,
45 number of drop queue configs,
46 size of queue config address space
47- statistic-profiles = <start count> : statistics profile start index,
48 number of statistics profiles
49- drop-policies = <&droppolicies> : phandle for drop policies
50- qos-tree = <&qostree> : phandle for the qos tree
51 configuration
52
53Example:
54
55hwqueue0: hwqueue@2a00000 {
56 compatible = "ti,keystone-hwqueue";
57 #address-cells = <1>;
58 #size-cells = <1>;
59 ranges;
60 reg = <0x2a00000 0xc0000>;
61 range = <0 0x2000>;
62 linkram0 = <0x80000 0x4000>;
63 linkram1 = <0x0 0x10000>;
64
65 qmgrs {
66 #address-cells = <1>;
67 #size-cells = <1>;
68 ranges;
69 qmgr0 {
70 managed-queues = <0 0x2000>; /* managed queues */
71 reg = <0x2a00000 0x20000 /* 0 - peek */
72 0x2a62000 0x6000 /* 1 - status */
73 0x2a68000 0x2000 /* 2 - config */
74 0x2a6a000 0x4000 /* 3 - region */
75 0x2a40000 0x20000 /* 4 - push */
76 0x2a20000 0x20000>; /* 5 - pop */
77 };
78 };
79
80 queues {
81 qpend-arm {
82 values = <650 8>;
83 irq-base= <41>;
84 reserved;
85 };
86 general {
87 values = <4000 64>;
88 };
89 pa {
90 values = <640 9>;
91 reserved;
92 };
93 infradma {
94 values = <800 12>;
95 reserved;
96 };
97 accumulator-low-0 {
98 values = <0 32>;
99 // pdsp-id, channel, entries, pacing mode, latency
100 accumulator = <0 32 8 2 0>;
101 irq-base = <363>;
102 multi-queue;
103 reserved;
104 };
105 accumulator-low-1 {
106 values = <32 32>;
107 // pdsp-id, channel, entries, pacing mode, latency
108 accumulator = <0 33 8 2 0>;
109 irq-base = <364>;
110 multi-queue;
111 };
112 accumulator-low-2 {
113 values = <64 32>;
114 // pdsp-id, channel, entries, pacing mode, latency
115 accumulator = <0 34 8 2 0>;
116 irq-base = <365>;
117 multi-queue;
118 };
119 accumulator-low-3 {
120 values = <96 32>;
121 // pdsp-id, channel, entries, pacing mode, latency
122 accumulator = <0 35 8 2 0>;
123 irq-base = <366>;
124 multi-queue;
125 };
126 accumulator-high {
127 values = <728 8>;
128 // pdsp-id, channel, entries, pacing mode, latency
129 accumulator = <0 20 8 2 0>;
130 irq-base = <150>;
131 reserved;
132 };
133 qos-inputs {
134 values = <8000 192>;
135 pdsp-id = <1>;
136 ticks-per-sec = <10000>;
137 qos-cfg = <4 50 1 1 0xf00 0 0>;
138 sched-port-configs = <0 20 0x1c8>;
139 drop-out-profiles = <0 36 0xc>;
140 drop-cfg-profiles = <0 8 0x14>;
141 drop-queue-configs = <0 80 0x4>;
142 statistics-profiles = <0 48>;
143 drop-policies = <&droppolicies>;
144 qos-tree = <&qostree>;
145 reserved;
146 };
147 riotx {
148 values = <672 1>;
149 reserved;
150 };
151 };
152 regions {
153 #address-cells = <1>;
154 #size-cells = <1>;
155 ranges;
156 region-12 {
157 id = <12>;
158 values = <4096 128>; /* num_desc desc_size */
159 link-index = <0x4000>;
160 };
161 };
162 descriptors {
163 pool-net {
164 values = <2048 128>; /* num_desc desc_size */
165 region-id = <12>;
166 };
167 pool-udma {
168 values = <1152 128>; /* num_desc desc_size */
169 region-id = <12>;
170 };
171 pool-rio {
172 values = <128 128>;
173 region-id = <12>;
174 };
175 };
176 pdsps {
177 #address-cells = <1>;
178 #size-cells = <1>;
179 ranges;
180 pdsp0@0x2a60000 {
181 firmware = "keystone/qmss_pdsp_acc48_le_1_0_3_12.fw";
182 reg = <0x2a60000 0x1000 /*iram */
183 0x2a6e000 0x1000 /*reg*/
184 0x2aa0000 0x3c8 /*intd */
185 0x2ab8000 0x4000>; /*cmd*/
186 id = <0>;
187 };
188 pdsp1@0x2a61000 {
189 firmware = "keystone/qmss_qos.fw";
190 reg = <0x2a61000 0x1000 /*iram */
191 0x2a6f000 0x1000 /*reg*/
192 0x2aa0000 0x3c8 /*intd */
193 0x2abc000 0x4000>; /*cmd*/
194 id = <1>;
195 };
196 };
197 };
diff --git a/Documentation/devicetree/bindings/hwqueue/keystone-qos.txt b/Documentation/devicetree/bindings/hwqueue/keystone-qos.txt
new file mode 100644
index 00000000000..086f4713347
--- /dev/null
+++ b/Documentation/devicetree/bindings/hwqueue/keystone-qos.txt
@@ -0,0 +1,190 @@
1QoS Tree Configuration
2----------------------
3
4The QoS implementation allows for an abstracted tree of scheduler nodes
5represented in device tree form. For example:
6
7 +-----------+
8 | inputs | . . .
9 +-----------+ +-----------+ +-----------+
10 | | | | inputs | | inputs |
11 +-------+------+ +-----------+ +-----------+
12 | | |
13 +--------------+ +---------------+ +--------------+
14 | prio 0 | | prio 1 | | prio 2 |
15 | unordered | | inputs | | inputs |
16 +--------------+ +---------------+ +--------------+
17 | | |
18 +-----------------+--------------------+
19 |
20 +--------------------+
21 | strict prio node |
22 +--------------------+
23 |
24 output to network transmit
25
26At each node, shaping and dropping parameters may be specified, within limits
27of the constraints outlined in this document. The following sections detail
28the device tree attributes applicable for this implementation.
29
30QoS Node Attributes
31-------------------
32
33The following attributes are recognized within QoS configuration nodes:
34
35 - "strict-priority" and "weighted-round-robin"
36
37 e.g. strict-priority;
38
39 This attribute specifies the type of scheduling performed at a node. It
40 is an error to specify both of these attributes in a particular node. The
41 absence of both of these attributes defaults the node type to unordered
42 (first come first serve).
43
44 - "weight"
45
46 e.g. weight = <80>;
47
48 This attribute specifies the weight attached to the child node of a
49 weighted-round-robin node. It is an error to specify this attribute on a
50 node whose parent is not a weighted-round-robin node.
51
52 - "priority"
53
54 e.g. priority = <1>;
55
56 This attribute specifies the priority attached to the child node of a
57 strict-priority node. It is an error to specify this attribute on a
58 node whose parent is not a strict-priority node. It is also an error for
59 child nodes of a strict-priority node to have the same priority specified.
60
61 - "byte-units" or "packet-units"
62
63 e.g. byte-units;
64
65 The presence of this attribute indicates that the scheduler accounts for
66 traffic in byte or packet units. If this attribute is not specified for a
67 given node, the accounting mode is inherited from its parent node. If
68 this attribute is not specified for the root node, the accounting mode
69 defaults to byte units.
70
71 - "output-rate"
72
73 e.g. output-rate = <31250000 25000>;
74
75 The first element of this attribute specifies the output shaped rate in
76 bytes/second or packets/second (depending on the accounting mode for the
77 node). If this attribute is absent, it defaults to infinity (i.e., no
78 shaping).
79
80 The second element of this attribute specifies the maximum accumulated
81 credits in bytes or packets (depending on the accounting mode for the
82 node). If this attribute is absent, it defaults to infinity (i.e.,
83 accumulate as many credits as possible).
84
85 - "overhead-bytes"
86
87 e.g. overhead-bytes = <24>;
88
89 This attribute specifies a per-packet overhead (in bytes) applied in the byte
90 accounting mode. This can be used to account for framing overhead on the wire.
91 This attribute is inherited from parent nodes if absent. If not defined for the
92 root node, a default value of 24 will be used. This attribute is passed
93 through by inheritence (but ignored) on packet accounted nodes.
94
95 - "output-queue"
96
97 e.g. output-queue = <645>;
98
99 This specifies the QMSS queue on which output packets are pushed. This
100 attribute must be defined only for the root node in the qos tree. Child
101 nodes in the tree will ignore this attribute if specified.
102
103 - "input-queues"
104
105 e.g. input-queues = <8010 8065>;
106
107 This specifies a set of ingress queues that feed into a QoS node. This attribute
108 must be defined only for leaf nodes in the QoS tree. Specifying input queues
109 on non-leaf nodes is treated as an error. The absence of input queues on
110 a leaf node is also treated as an error.
111
112 - "stats-class"
113
114 e.g. stats-class = "linux-best-effort";
115
116 The stats-class attribute ties one or more input stage nodes to a set of
117 traffic statistics (forwarded/discarded bytes, etc.). The system has a
118 limited set of statistics blocks (up to 48), and an attempt to exceed this
119 count is an error. This attribute is legal only for leaf nodes, and a
120 stats-class attribute on an intermediate node will be treated as an error.
121
122 - "drop-policy"
123
124 e.g. drop-policy = "no-drop"
125
126 The drop-policy attribute specifies a drop policy to apply to a QoS
127 node (tail drop, random early drop, no drop, etc.) when the traffic
128 pattern exceeds specifies parameters. The drop-policy parameters are
129 configured separately within device tree (see "Traffic Police Policy
130 Attributes section below). This attribute defaults to "no drop" for
131 applicable input stage nodes.
132
133 If a node in the QoS tree specifies a drop-policy, it is an error if
134 any of its descendent nodes (children, children of children, ...) are of
135 weighted-round-robin or strict-priority types.
136
137
1381.5 Traffic Police Policy Attributes
139------------------------------------
140
141The following attributes are recognized within traffic drop policy nodes:
142
143 - "byte-units" or "packet-units"
144
145 e.g. byte-units;
146
147 The presence of this attribute indicates that the dropr accounts for
148 traffic in byte or packet units. If this attribute is not specified, it
149 defaults to byte units. Policies that use random early drop must be of
150 byte unit type.
151
152 - "limit"
153
154 e.g. limit = <10000>;
155
156 Instantaneous queue depth limit (in bytes or packets) at which tail drop
157 takes effect. This may be specified in combination with random early
158 drop, which operates on average queue depth (instead of instantaneous).
159 The absence of this attribute, or a zero value for this attribute disables
160 tail drop behavior.
161
162 - "random-early-drop"
163
164 e.g. random-early-drop = <32768 65536 2 2000>;
165
166 The random-early-drop attribute specifies the following four parameters
167 in order:
168
169 - low threshold: No packets are dropped when the average queue depth is
170 below this threshold (in bytes). This parameter must
171 be specified.
172
173 - high threshold: All packets are dropped when the average queue depth
174 above this threshold (in bytes). This parameter is
175 optional, and defaults to twice the low threshold.
176
177 - max drop probability: the maximum drop probability
178
179 - half-life: Specified in milli seconds. This is used to calculate
180 the average queue depth. This parameter
181 is optional and defaults to 2000.
182
183
184Internally Calculated
185---------------------
186 - throttle rate - might want to provide device tree override as well
187 - wrr/sp/be queue counts
188 - egress queue number (except final output)
189 - RNG seeds
190
diff --git a/Documentation/devicetree/bindings/i2c/davinci.txt b/Documentation/devicetree/bindings/i2c/davinci.txt
new file mode 100644
index 00000000000..2dc935b4113
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/davinci.txt
@@ -0,0 +1,28 @@
1* Texas Instruments Davinci I2C
2
3This file provides information, what the device node for the
4davinci i2c interface contain.
5
6Required properties:
7- compatible: "ti,davinci-i2c";
8- reg : Offset and length of the register set for the device
9
10Recommended properties :
11- interrupts : standard interrupt property.
12- clock-frequency : desired I2C bus clock frequency in Hz.
13
14Example (enbw_cmc board):
15 i2c@1c22000 {
16 compatible = "ti,davinci-i2c";
17 reg = <0x22000 0x1000>;
18 clock-frequency = <100000>;
19 interrupts = <15>;
20 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
23
24 dtt@48 {
25 compatible = "national,lm75";
26 reg = <0x48>;
27 };
28 };
diff --git a/Documentation/devicetree/bindings/memory/davinci-aemif.txt b/Documentation/devicetree/bindings/memory/davinci-aemif.txt
new file mode 100644
index 00000000000..a79b3ed46a7
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory/davinci-aemif.txt
@@ -0,0 +1,103 @@
1* Texas Instruments Davinci AEMIF bus interface
2
3This file provides information for the davinci-emif device and
4async bus bindings.
5
6Required properties:=
7- compatible: "ti,davinci-aemif";
8- #address-cells : Should be either two or three. The first cell is the
9 chipselect number, and the remaining cells are the
10 offset into the chipselect.
11- #size-cells : Either one or two, depending on how large each chipselect
12 can be.
13- reg : contains offset/length value for AEMIF control registers space
14- ranges : Each range corresponds to a single chipselect, and cover
15 the entire access window as configured.
16
17Child device nodes describe the devices connected to IFC such as NOR (e.g.
18cfi-flash) and NAND (ti,davinci-nand, see Documentation/devicetree/bindings/
19mtd/davinci-nand.txt). There might be board specific devices like FPGAs.
20
21In addition, optional child sub nodes contains bindings for the async bus
22interface for a given chip select.
23
24Optional cs node properties:-
25- compatible: "ti,davinci-cs"
26
27 All of the params below in nanoseconds and are optional
28
29- ti,davinci-cs-asize - asynchronous data bus width (0 - 8bit, 1 - 16 bit)
30- ti,davinci-cs-ta - Minimum turn around time
31- ti,davinci-cs-rhold - read hold width
32- ti,davinci-cs-rstobe - read strobe width
33- ti,davinci-cs-rsetup - read setup width
34- ti,davinci-cs-whold - write hold width
35- ti,davinci-cs-wstrobe - write strobe width
36- ti,davinci-cs-wsetup - write setup width
37- ti,davinci-cs-ss - enable/disable select strobe (0 - disable, 1 - enable)
38- ti,davinci-cs-ew - enable/disable extended wait cycles (0 - disable, 1 - enable)
39
40if any of the above parameters are absent, hardware register default or that
41set by a boot loader are used.
42
43Example for aemif, davinci nand and nor flash chip select shown below.
44
45aemif@60000000 {
46 compatible = "ti,davinci-aemif";
47 #address-cells = <2>;
48 #size-cells = <1>;
49 reg = <0x68000000 0x80000>;
50 ranges = <2 0 0x60000000 0x02000000
51 3 0 0x62000000 0x02000000
52 4 0 0x64000000 0x02000000
53 5 0 0x66000000 0x02000000
54 6 0 0x68000000 0x02000000>;
55
56 nand_cs:cs2@60000000 {
57 compatible = "ti,davinci-cs";
58 #address-cells = <1>;
59 #size-cells = <1>;
60 /* all timings in nanoseconds */
61 ti,davinci-cs-ta = <0>;
62 ti,davinci-cs-rhold = <7>;
63 ti,davinci-cs-rstrobe = <42>;
64 ti,davinci-cs-rsetup = <14>;
65 ti,davinci-cs-whold = <7>;
66 ti,davinci-cs-wstrobe = <42>;
67 ti,davinci-cs-wsetup = <14>;
68 };
69
70 nor_cs:cs3@62000000 {
71 compatible = "ti,davinci-cs";
72 #address-cells = <1>;
73 #size-cells = <1>;
74 /* all timings in nanoseconds */
75 ti,davinci-cs-ta = <0>;
76 ti,davinci-cs-rhold = <7>;
77 ti,davinci-cs-rstrobe = <42>;
78 ti,davinci-cs-rsetup = <14>;
79 ti,davinci-cs-whold = <7>;
80 ti,davinci-cs-wstrobe = <42>;
81 ti,davinci-cs-wsetup = <14>;
82 ti,davinci-cs-asize = <1>;
83 };
84
85 nand@3,0 {
86 compatible = "ti,davinci-nand";
87 reg = <3 0x0 0x807ff
88 6 0x0 0x8000>;
89 #address-cells = <1>;
90 #size-cells = <1>;
91
92 .. See Documentation/devicetree/bindings/mtd/davinci-nand.txt
93 };
94
95 flash@2,0 {
96 compatible = "cfi-flash";
97 reg = <2 0x0 0x400000>;
98 #address-cells = <1>;
99 #size-cells = <1>;
100 bank-width = <2>;
101 device-width = <2>;
102 };
103};
diff --git a/Documentation/devicetree/bindings/misc/keystone-debugss.txt b/Documentation/devicetree/bindings/misc/keystone-debugss.txt
new file mode 100644
index 00000000000..9b5d62b1d6a
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/keystone-debugss.txt
@@ -0,0 +1,32 @@
1Texas Instruments Debug Sub-System (DebugSS) module for Keystone devices
2
3Required properties:
4- compatible : Should be "ti,keystone-debugss"
5
6Optional properties:
7- clocks : the clocks feeding the Debug sub-system.
8 As an exception, the mainpllclk and
9 armpllclk are not directly feeding
10 the debugss, instead they are used
11 by the debugss module to expose the
12 mainpll and armpll clock rates as
13 sysfs entries readable from userspace
14 applications.
15 Needed if platform uses clocks.
16 See clock-bindings.txt
17- clocks-names : clock name strings correspond to the clocks
18 defined above. These strings are used inside
19 module source code to identify the respective
20 clocks
21
22Documentation:
23http://www.ti.com/lit/ug/spruhm4/spruhm4.pdf
24http://www.ti.com/lit/ds/symlink/tci6636k2h.pdf
25
26Examples:
27
28debugss: debugss {
29 compatible = "ti,keystone-debugss";
30 clocks = <&mainpllclk>, <&armpllclk>, <&clkdebugsstrc>, <&gemtraceclk>, <&clktetbtrc>;
31 clock-names = "mainpllclock", "armpllclock", "debugssclock", "gemtraceclock", "tetbclock";
32};
diff --git a/Documentation/devicetree/bindings/arm/davinci/nand.txt b/Documentation/devicetree/bindings/mtd/davinci-nand.txt
index 3545ea704b5..1b928a11c9f 100644
--- a/Documentation/devicetree/bindings/arm/davinci/nand.txt
+++ b/Documentation/devicetree/bindings/mtd/davinci-nand.txt
@@ -22,7 +22,9 @@ Recommended properties :
22- ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4. 22- ti,davinci-ecc-bits: used ECC bits, currently supported 1 or 4.
23- ti,davinci-nand-buswidth: buswidth 8 or 16 23- ti,davinci-nand-buswidth: buswidth 8 or 16
24- ti,davinci-nand-use-bbt: use flash based bad block table support. 24- ti,davinci-nand-use-bbt: use flash based bad block table support.
25- ti,davinci-no-subpage-write: disable subpage write for the device.
25 26
27<<<<<<< HEAD
26nand device bindings may contain additional sub-nodes describing 28nand device bindings may contain additional sub-nodes describing
27partitions of the address space. See partition.txt for more detail. 29partitions of the address space. See partition.txt for more detail.
28 30
@@ -44,3 +46,30 @@ nand_cs3@62000000 {
44 reg = <0x180000 0x7e80000>; 46 reg = <0x180000 0x7e80000>;
45 }; 47 };
46}; 48};
49
50Example (enbw_cmc board):
51aemif@60000000 {
52 compatible = "ti,davinci-aemif";
53 #address-cells = <2>;
54 #size-cells = <1>;
55 reg = <0x68000000 0x80000>;
56 ranges = <2 0 0x60000000 0x02000000
57 3 0 0x62000000 0x02000000
58 4 0 0x64000000 0x02000000
59 5 0 0x66000000 0x02000000
60 6 0 0x68000000 0x02000000>;
61 nand@3,0 {
62 compatible = "ti,davinci-nand";
63 reg = <3 0x0 0x807ff
64 6 0x0 0x8000>;
65 #address-cells = <1>;
66 #size-cells = <1>;
67 ti,davinci-chipselect = <1>;
68 ti,davinci-mask-ale = <0>;
69 ti,davinci-mask-cle = <0>;
70 ti,davinci-mask-chipsel = <0>;
71 ti,davinci-ecc-mode = "hw";
72 ti,davinci-ecc-bits = <4>;
73 ti,davinci-nand-use-bbt;
74 };
75};
diff --git a/Documentation/devicetree/bindings/mtd/st-m25p.txt b/Documentation/devicetree/bindings/mtd/st-m25p.txt
new file mode 100644
index 00000000000..a8c0485045f
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/st-m25p.txt
@@ -0,0 +1,14 @@
1* STMicroelectronics SPI Flash
2
3Required properties:
4- compatible : "st,<model>", "st,m25p".
5
6Examples:
7
8flash: m25p32@1 {
9 #address-cells = <1>;
10 #size-cells = <1>;
11 compatible = "st,m25p32", "st,m25p";
12 spi-max-frequency = <20000000>;
13 reg = <1>;
14};
diff --git a/Documentation/devicetree/bindings/pci/pcie-keystone.txt b/Documentation/devicetree/bindings/pci/pcie-keystone.txt
new file mode 100644
index 00000000000..afe215e2e49
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/pcie-keystone.txt
@@ -0,0 +1,37 @@
1Keystone PCIE Root complex device tree bindings
2-----------------------------------------------
3
4Sample bindings shown below:-
5
6 - Remove enable-linktrain if boot loader already does Link training and do EP
7 configuration.
8 - To Disable SERDES initialization during Linux boot up, remove the "Keystone2 serdes cfg"
9 reg values from the reg property.
10
11 pci-controller@21800000 {
12 device_type = "pci";
13 #address-cells = <3>;
14 #size-cells = <2>;
15 #interrupt-cells = <2>;
16 compatible = "ti,keystone2-pci";
17 reg = <0x21800000 0x8000 /* pcie-regs */
18 0x0262014c 4 /* device cfg */
19 0x02320000 0x4000>; /* Keystone2 serdes cfg */
20
21 /* outbound pci resources */
22 ranges = <0x02000000 0 0x50000000 0x50000000 0 0x10000000
23 0x01000000 0 0 0x24000000 0 0x4000>;
24
25 /* inbound dma range */
26 dma-ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000>;
27
28 interrupt-parent = <&gic>;
29 interrupts = <0 26 0xf01 0 27 0xf01 0 28 0xf01 0 29 0xf01 /* 4 Legacy IRQs */
30 0 30 0xf01 0 31 0xf01 0 32 0xf01 0 33 0xf01 /* 8 MSI IRQs */
31 0 34 0xf01 0 35 0xf01 0 36 0xf01 0 37 0xf01
32 0 38 0xf01>; /* Error IRQ */
33 clocks = <&clkpcie>;
34 clock-names = "pcie";
35 enable-linktrain; /* When the boot loader enables link train and configure ep
36 * remove this attribute */
37 };
diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt
index 6d0ac8d0ad9..2a127f3a636 100644
--- a/Documentation/devicetree/bindings/spi/spi-davinci.txt
+++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt
@@ -5,27 +5,34 @@ Required properties:
5 address on the SPI bus. Should be set to 1. 5 address on the SPI bus. Should be set to 1.
6- #size-cells: should be zero. 6- #size-cells: should be zero.
7- compatible: 7- compatible:
8 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family 8 - "ti,davinci-spi-v1" for SPI version 1.0
9 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family 9 - "ti,davinci-spi-v2" for SPI version 2.0
10- reg: Offset and length of SPI controller register space 10- reg: Offset and length of SPI controller register space
11- num-cs: Number of chip selects 11- ti,davinci-spi-num-cs: Number of chip selects. This includes
12 internal as well as GPIO chip selects.
12- ti,davinci-spi-intr-line: interrupt line used to connect the SPI 13- ti,davinci-spi-intr-line: interrupt line used to connect the SPI
13 IP to the interrupt controller within the SoC. Possible values 14 IP to the interrupt controller withn the SoC. Possible values
14 are 0 and 1. Manual says one of the two possible interrupt 15 are 0 and 1. Manual says one of the two possible interrupt
15 lines can be tied to the interrupt controller. Set this 16 lines can be tied to the interrupt controller. Set this
16 based on a specifc SoC configuration. 17 based on a specifc SoC configuration.
17- interrupts: interrupt number mapped to CPU. 18- interrupts: interrupt number offset at the irq parent
18- clocks: spi clk phandle 19- clocks: spi clk phandle
19 20
21Optional:
22- cs-gpios: gpio chip selects
23 For example to have 3 internal CS and 2 GPIO CS, user could define
24 cs-gpios = <0>, <0>, <0>, <&gpio1 30 0>, <&gpio1 31 0>;
25 where first three are internal CS and last two are GPIO CS.
26
20Example of a NOR flash slave device (n25q032) connected to DaVinci 27Example of a NOR flash slave device (n25q032) connected to DaVinci
21SPI controller device over the SPI bus. 28SPI controller device over the SPI bus.
22 29
23spi0:spi@20BF0000 { 30spi0:spi@20BF0000 {
24 #address-cells = <1>; 31 #address-cells = <1>;
25 #size-cells = <0>; 32 #size-cells = <0>;
26 compatible = "ti,dm6446-spi"; 33 compatible = "ti,davinci-spi-v1";
27 reg = <0x20BF0000 0x1000>; 34 reg = <0x20BF0000 0x1000>;
28 num-cs = <4>; 35 ti,davinci-spi-num-cs = <4>;
29 ti,davinci-spi-intr-line = <0>; 36 ti,davinci-spi-intr-line = <0>;
30 interrupts = <338>; 37 interrupts = <338>;
31 clocks = <&clkspi>; 38 clocks = <&clkspi>;
@@ -49,3 +56,19 @@ spi0:spi@20BF0000 {
49 }; 56 };
50 }; 57 };
51}; 58};
59
60SPI slave nodes must be children of the SPI master node and can
61contain the following properties. Not all SPI Peripherals from
62Texas Instruments support this. Please check SPI peripheral UG
63for a device before using these.
64
65- ti,davinci-spi-wdelay : delay between transmissions.
66- ti,davinci-spi-odd-parity : odd partity enabled
67 OR
68- ti,davinci-spi-even-parity : even parity enabled
69- ti,davinci-spi-io-type: io type (check platform_data/spi-davinci.h)
70- ti,davinci-spi-disable-timer: disable CS timer (SPIFMTn)
71- ti,davinci-spi-c2t-delay: c2t delay
72- ti,davinci-spi-t2c-delay: t2c delay
73- ti,davinci-spi-t2e-delay: t2e delay
74- ti,davinci-spi-c2e-delay: c2e delay
diff --git a/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt b/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt
new file mode 100644
index 00000000000..434f5d4dd51
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/ti,keystone-timer.txt
@@ -0,0 +1,19 @@
1Keystone timer
2
3Keystone timer is a 32bit event timer based on timer64 IP.
4
5Required properties:
6
7- compatible : should be "ti,keystone-timer".
8- reg : Specifies base physical address and size of the registers.
9- interrupts : interrupt for the timer
10- clocks : input clock for the timer hw block
11
12Example:
13
14timer15: timer@22f0000 {
15 compatible = "ti,keystone-timer";
16 reg = <0x022f0000 0x80>;
17 interrupts = <0 80 0xf01>;
18 clocks = <&clktimer15>;
19};
diff --git a/Documentation/devicetree/bindings/tty/serial/of-serial.txt b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
index 1928a3e83cd..77054772a8f 100644
--- a/Documentation/devicetree/bindings/tty/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/tty/serial/of-serial.txt
@@ -37,6 +37,7 @@ Optional properties:
37- auto-flow-control: one way to enable automatic flow control support. The 37- auto-flow-control: one way to enable automatic flow control support. The
38 driver is allowed to detect support for the capability even without this 38 driver is allowed to detect support for the capability even without this
39 property. 39 property.
40- has-hw-flow-control: the hardware has flow control capability.
40 41
41Example: 42Example:
42 43
diff --git a/Documentation/devicetree/bindings/usb/keystone-usb.txt b/Documentation/devicetree/bindings/usb/keystone-usb.txt
new file mode 100644
index 00000000000..4feb04dfcf4
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/keystone-usb.txt
@@ -0,0 +1,41 @@
1TI Keystone Soc USB Controller
2
3DWC3 GLUE
4
5Required properties:
6 - compatible: should be "ti,keystone-dwc3".
7 - #address-cells, #size-cells : should be '1' if the device has sub-nodes
8 with 'reg' property.
9 - reg : Address and length of the register set for the USB subsystem on
10 the SOC.
11 - interrupts : The irq number of this device that is used to interrupt the
12 MPU.
13 - ranges: allows valid 1:1 translation between child's address space and
14 parent's address space.
15 - clocks: Clock IDs array as required by the controller.
16 - clock-names: names of clocks correseponding to IDs in the clock property.
17
18Sub-nodes:
19The dwc3 core should be added as subnode to Keystone DWC3 glue.
20- dwc3 :
21 The binding details of dwc3 can be found in:
22 Documentation/devicetree/bindings/usb/dwc3.txt
23
24Example:
25 usb: usb@2680000 {
26 compatible = "ti,keystone-dwc3";
27 #address-cells = <1>;
28 #size-cells = <1>;
29 reg = <0x2680000 0x10000>;
30 clocks = <&clkusb>;
31 clock-names = "usb";
32 interrupts = <0 393 0xf01>;
33 ranges;
34
35 dwc3@2690000 {
36 compatible = "synopsys,dwc3";
37 reg = <0x2690000 0x70000>;
38 interrupts = <0 393 0xf01>;
39 usb-phy = <&usb_phy>, <&usb_phy>;
40 };
41 };
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d41951246cd..e73732ea96e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -72,6 +72,9 @@ config ARM
72config ARM_HAS_SG_CHAIN 72config ARM_HAS_SG_CHAIN
73 bool 73 bool
74 74
75config ARM_RUNTIME_PATCH
76 bool
77
75config NEED_SG_DMA_LENGTH 78config NEED_SG_DMA_LENGTH
76 bool 79 bool
77 80
@@ -221,6 +224,7 @@ config ARM_PATCH_PHYS_VIRT
221 default y 224 default y
222 depends on !XIP_KERNEL && MMU 225 depends on !XIP_KERNEL && MMU
223 depends on !ARCH_REALVIEW || !SPARSEMEM 226 depends on !ARCH_REALVIEW || !SPARSEMEM
227 select ARM_RUNTIME_PATCH
224 help 228 help
225 Patch phys-to-virt and virt-to-phys translation functions at 229 Patch phys-to-virt and virt-to-phys translation functions at
226 boot and module load time according to the position of the 230 boot and module load time according to the position of the
@@ -240,6 +244,19 @@ config NEED_MACH_GPIO_H
240 definitions for this platform. The need for mach/gpio.h should 244 definitions for this platform. The need for mach/gpio.h should
241 be avoided when possible. 245 be avoided when possible.
242 246
247config ARM_RUNTIME_PATCH_TEST
248 bool "Self test runtime patching mechanism"
249 depends on ARM_RUNTIME_PATCH
250 default y
251 help
252 Select this to enable init time self checking for the runtime kernel
253 patching mechanism. This enables an ISA specific set of tests that
254 ensure that the instructions generated by the patch process are
255 consistent with those generated by the assembler at compile time.
256
257 Only disable this option if you need to shrink the kernel to the
258 minimal size.
259
243config NEED_MACH_IO_H 260config NEED_MACH_IO_H
244 bool 261 bool
245 help 262 help
@@ -362,6 +379,33 @@ config ARCH_AT91
362 This enables support for systems based on Atmel 379 This enables support for systems based on Atmel
363 AT91RM9200 and AT91SAM9* processors. 380 AT91RM9200 and AT91SAM9* processors.
364 381
382config ARCH_KEYSTONE
383 bool "Texas Instruments Keystone Devices"
384 select ARCH_REQUIRE_GPIOLIB
385 select ARM_GIC
386 select MULTI_IRQ_HANDLER
387 select CLKDEV_LOOKUP
388 select COMMON_CLK
389 select CLK_KEYSTONE_PLL
390 select DAVINCI_CLKS
391 select CLKSRC_MMIO
392 select CPU_V7
393 select GENERIC_CLOCKEVENTS
394 select USE_OF
395 select SPARSE_IRQ
396 select NEED_MACH_MEMORY_H
397 select HAVE_SCHED_CLOCK
398 select HAVE_SMP
399 select ZONE_DMA if ARM_LPAE
400 select USB_ARCH_HAS_XHCI
401 select TI_KEYSTONE
402 select MIGHT_HAVE_PCI
403 select ARCH_SUPPORTS_MSI
404 select PCI_DOMAINS if PCI
405 help
406 Support for boards based on the Texas Instruments Keystone family of
407 SoCs.
408
365config ARCH_CLPS711X 409config ARCH_CLPS711X
366 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based" 410 bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
367 select ARCH_REQUIRE_GPIOLIB 411 select ARCH_REQUIRE_GPIOLIB
@@ -835,6 +879,9 @@ config ARCH_DAVINCI
835 bool "TI DaVinci" 879 bool "TI DaVinci"
836 select ARCH_HAS_HOLES_MEMORYMODEL 880 select ARCH_HAS_HOLES_MEMORYMODEL
837 select ARCH_REQUIRE_GPIOLIB 881 select ARCH_REQUIRE_GPIOLIB
882 select ZONE_DMA
883 select HAVE_IDE
884 select COMMON_CLK
838 select CLKDEV_LOOKUP 885 select CLKDEV_LOOKUP
839 select GENERIC_ALLOCATOR 886 select GENERIC_ALLOCATOR
840 select GENERIC_CLOCKEVENTS 887 select GENERIC_CLOCKEVENTS
@@ -949,6 +996,8 @@ source "arch/arm/mach-iop13xx/Kconfig"
949 996
950source "arch/arm/mach-ixp4xx/Kconfig" 997source "arch/arm/mach-ixp4xx/Kconfig"
951 998
999source "arch/arm/mach-keystone/Kconfig"
1000
952source "arch/arm/mach-kirkwood/Kconfig" 1001source "arch/arm/mach-kirkwood/Kconfig"
953 1002
954source "arch/arm/mach-ks8695/Kconfig" 1003source "arch/arm/mach-ks8695/Kconfig"
@@ -1418,6 +1467,7 @@ config PCI_HOST_ITE8152
1418 select DMABOUNCE 1467 select DMABOUNCE
1419 1468
1420source "drivers/pci/Kconfig" 1469source "drivers/pci/Kconfig"
1470source "drivers/pci/pcie/Kconfig"
1421 1471
1422source "drivers/pcmcia/Kconfig" 1472source "drivers/pcmcia/Kconfig"
1423 1473
@@ -1584,6 +1634,7 @@ config LOCAL_TIMERS
1584config ARCH_NR_GPIO 1634config ARCH_NR_GPIO
1585 int 1635 int
1586 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA 1636 default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
1637 default 512 if ARCH_KEYSTONE
1587 default 512 if SOC_OMAP5 1638 default 512 if SOC_OMAP5
1588 default 392 if ARCH_U8500 1639 default 392 if ARCH_U8500
1589 default 352 if ARCH_VT8500 1640 default 352 if ARCH_VT8500
@@ -1735,7 +1786,7 @@ config HW_PERF_EVENTS
1735source "mm/Kconfig" 1786source "mm/Kconfig"
1736 1787
1737config FORCE_MAX_ZONEORDER 1788config FORCE_MAX_ZONEORDER
1738 int "Maximum zone order" if ARCH_SHMOBILE 1789 int "Maximum zone order" if ARCH_SHMOBILE || ARCH_KEYSTONE
1739 range 11 64 if ARCH_SHMOBILE 1790 range 11 64 if ARCH_SHMOBILE
1740 default "12" if SOC_AM33XX 1791 default "12" if SOC_AM33XX
1741 default "9" if SA1111 1792 default "9" if SA1111
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 1d41908d5cd..29f13216f15 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -159,6 +159,20 @@ choice
159 159
160 If you have a ZC702 board and want early boot messages to 160 If you have a ZC702 board and want early boot messages to
161 appear on the USB serial adaptor, select this option. 161 appear on the USB serial adaptor, select this option.
162
163 config DEBUG_DAVINCI_TCI6638_UART0
164 bool "Kernel low-level debugging on TCI6638 using UART0"
165 depends on ARCH_KEYSTONE
166 help
167 Say Y here if you want the debug print routines to direct
168 their output to UART0 serial port on TCI6638 devices.
169
170 config DEBUG_DAVINCI_TCI6638_UART1
171 bool "Kernel low-level debugging on TCI6638 using UART1"
172 depends on ARCH_KEYSTONE
173 help
174 Say Y here if you want the debug print routines to direct
175 their output to UART1 serial port on TCI6638 devices.
162 176
163 config DEBUG_DC21285_PORT 177 config DEBUG_DC21285_PORT
164 bool "Kernel low-level debugging messages via footbridge serial port" 178 bool "Kernel low-level debugging messages via footbridge serial port"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 1ba358ba16b..1765b1adc97 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -194,6 +194,7 @@ machine-$(CONFIG_PLAT_SPEAR) += spear
194machine-$(CONFIG_ARCH_VIRT) += virt 194machine-$(CONFIG_ARCH_VIRT) += virt
195machine-$(CONFIG_ARCH_ZYNQ) += zynq 195machine-$(CONFIG_ARCH_ZYNQ) += zynq
196machine-$(CONFIG_ARCH_SUNXI) += sunxi 196machine-$(CONFIG_ARCH_SUNXI) += sunxi
197machine-$(CONFIG_ARCH_KEYSTONE) := keystone
197 198
198# Platform directory name. This list is sorted alphanumerically 199# Platform directory name. This list is sorted alphanumerically
199# by CONFIG_* macro name. 200# by CONFIG_* macro name.
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 032a8d98714..f4757cec655 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -712,6 +712,12 @@ __armv7_mmu_cache_on:
712 orr r0, r0, #1 << 25 @ big-endian page tables 712 orr r0, r0, #1 << 25 @ big-endian page tables
713#endif 713#endif
714 mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg 714 mrcne p15, 0, r6, c2, c0, 2 @ read ttb control reg
715#ifdef CONFIG_CPU_DCACHE_DISABLE
716 bic r0, r0, #1 << 2
717#endif
718#ifdef CONFIG_CPU_ICACHE_DISABLE
719 bic r0, r0, #1 << 12
720#endif
715 orrne r0, r0, #1 @ MMU enabled 721 orrne r0, r0, #1 @ MMU enabled
716 movne r1, #0xfffffffd @ domain 0 = client 722 movne r1, #0xfffffffd @ domain 0 = client
717 bic r6, r6, #1 << 31 @ 32-bit translation system 723 bic r6, r6, #1 << 31 @ 32-bit translation system
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f0895c581a8..564ebb4b211 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -62,6 +62,9 @@ dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb \
62 ecx-2000.dtb 62 ecx-2000.dtb
63dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \ 63dtb-$(CONFIG_ARCH_INTEGRATOR) += integratorap.dtb \
64 integratorcp.dtb 64 integratorcp.dtb
65dtb-$(CONFIG_ARCH_KEYSTONE) += k2hk-evm.dtb \
66 k2l-evm.dtb \
67 k2e-evm.dtb
65dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb 68dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
66dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \ 69dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-cloudbox.dtb \
67 kirkwood-dns320.dtb \ 70 kirkwood-dns320.dtb \
diff --git a/arch/arm/boot/dts/k2e-clocks.dtsi b/arch/arm/boot/dts/k2e-clocks.dtsi
new file mode 100644
index 00000000000..9a3981d01e0
--- /dev/null
+++ b/arch/arm/boot/dts/k2e-clocks.dtsi
@@ -0,0 +1,99 @@
1/*
2 * Copyright 2014 Texas Instruments, Inc.
3 *
4 * Keystone Edison SoC specific clock driver device bindings
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11clocks {
12 mainpllclk: mainpllclk@2310110 {
13 #clock-cells = <0>;
14 compatible = "keystone,main-pll-clk";
15 clocks = <&refclkmain>;
16 reg = <0x02310110 4 /* PLLCTRL PLLM */
17 0x02620350 4>; /* MAINPLL_CTL0 */
18 pll_has_pllctrl;
19 pllm_lower_mask = <0x3f>;
20 pllm_upper_mask = <0x7f000>;
21 pllm_upper_shift = <6>;
22 plld_mask = <0x3f>;
23 fixed_postdiv = <2>;
24 };
25
26 papllclk: papllclk@2620358 {
27 #clock-cells = <0>;
28 compatible = "keystone,pll-clk";
29 clocks = <&refclkpass>;
30 reg = <0x02620358 4>; /* PASSPLLCTL0 */
31 pllm_upper_mask = <0x7ffc0>;
32 pllm_upper_shift = <6>;
33 plld_mask = <0x3f>;
34 };
35
36 ddr3_clk: ddr3_clk@2620360 {
37 #clock-cells = <0>;
38 compatible = "keystone,pll-clk";
39 clocks = <&refclkddr3>;
40 clock-output-names = "ddr3-pll-clk";
41 reg = <0x02620360 4>;
42 pllm_upper_mask = <0x7ffc0>;
43 pllm_upper_shift = <6>;
44 plld_mask = <0x3f>;
45 };
46
47 clkusb: clkusb {
48 #clock-cells = <0>;
49 compatible = "davinci,psc-clk";
50 clocks = <&chipclk16>;
51 clock-output-names = "usb";
52 reg = <0x02350000 4096>;
53 lpsc = <2>;
54 };
55
56 clkusb1: clkusb1 {
57 #clock-cells = <0>;
58 compatible = "davinci,psc-clk";
59 clocks = <&chipclk16>;
60 clock-output-names = "usb1";
61 reg = <0x02350000 4096>;
62 lpsc = <1>;
63 };
64
65 clkpcie1: clkpcie1 {
66 #clock-cells = <0>;
67 compatible = "davinci,psc-clk";
68 clocks = <&chipclk12>;
69 clock-output-names = "pcie1";
70 base-flags = "ignore-unused";
71 reg = <0x02350000 4096>;
72 lpsc = <27>;
73 pd = <18>;
74 };
75
76 clkhyperlink0: clkhyperlink0 {
77 #clock-cells = <0>;
78 compatible = "davinci,psc-clk";
79 clocks = <&chipclk12>;
80 clock-output-names = "hyperlink-0";
81 base-flags = "ignore-unused";
82 status = "disabled";
83 reg = <0x02350000 4096>;
84 lpsc = <12>;
85 pd = <5>;
86 };
87
88 clkxge: clkxge {
89 #clock-cells = <0>;
90 compatible = "davinci,psc-clk";
91 clocks = <&chipclk13>;
92 clock-output-names = "xge";
93 base-flags = "ignore-unused";
94 reg = <0x02350000 4096>;
95 lpsc = <50>;
96 pd = <29>;
97 };
98};
99
diff --git a/arch/arm/boot/dts/k2e-evm.dts b/arch/arm/boot/dts/k2e-evm.dts
new file mode 100644
index 00000000000..a7309de6dcf
--- /dev/null
+++ b/arch/arm/boot/dts/k2e-evm.dts
@@ -0,0 +1,165 @@
1/*
2 * Copyright 2014 Texas Instruments, Inc.
3 *
4 * Keystone 2 Edison EVM device tree file
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10/dts-v1/;
11
12/include/ "keystone.dtsi"
13/include/ "k2e.dtsi"
14
15/ {
16 compatible = "ti,k2e-evm", "ti,keystone";
17
18 qostree: qos-tree {
19 output-queue = <910>; /* allowed only on root node */
20 };
21
22 qostree2: qos-tree-2 {
23 output-queue = <910>; /* allowed only on root node */
24 };
25
26 /include/ "keystone-qostree.dtsi"
27
28 soc {
29 clocks {
30 refclkmain: refclkmain {
31 #clock-cells = <0>;
32 compatible = "fixed-clock";
33 clock-frequency = <100000000>;
34 clock-output-names = "refclk-main";
35 };
36
37 refclkpass: refclkpass {
38 #clock-cells = <0>;
39 compatible = "fixed-clock";
40 clock-frequency = <100000000>;
41 clock-output-names = "refclk-pass";
42 };
43
44 refclkddr3: refclkddr3 {
45 #clock-cells = <0>;
46 compatible = "fixed-clock";
47 clock-frequency = <100000000>;
48 clock-output-names = "refclk-ddr3";
49 };
50 };
51
52 aemif@30000000 {
53 nand_cs:cs2@30000000 {
54 compatible = "ti,davinci-cs";
55 #address-cells = <1>;
56 #size-cells = <1>;
57 /* all timings in nanoseconds */
58 ti,davinci-cs-ta = <12>;
59 ti,davinci-cs-rhold = <6>;
60 ti,davinci-cs-rstrobe = <23>;
61 ti,davinci-cs-rsetup = <9>;
62 ti,davinci-cs-whold = <8>;
63 ti,davinci-cs-wstrobe = <23>;
64 ti,davinci-cs-wsetup = <8>;
65 };
66
67 nand@2,0 {
68 compatible = "ti,davinci-nand";
69 reg = <2 0x0 0x8000000
70 6 0x0 0x100>;
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ti,davinci-chipselect = <0>;
74 ti,davinci-mask-ale = <0x2000>;
75 ti,davinci-mask-cle = <0x4000>;
76 ti,davinci-mask-chipsel = <0>;
77 ti,davinci-ecc-mode = "hw";
78 ti,davinci-ecc-bits = <4>;
79 ti,davinci-nand-use-bbt;
80 ti,davinci-no-subpage-write;
81 clocks = <&clkaemif>;
82 clock-names = "aemif";
83
84 partition@0 {
85 label = "u-boot";
86 reg = <0x0 0x100000>;
87 read-only;
88 };
89
90 partition@100000 {
91 label = "params";
92 reg = <0x100000 0x80000>;
93 read-only;
94 };
95
96 partition@180000 {
97 label = "ubifs";
98 reg = <0x180000 0x1fe80000>;
99 };
100 };
101 };
102
103 hwqueue0: hwqueue@2a40000 {
104 queues {
105 qos-inputs-1 {
106 values = <8000 192>;
107 pdsp-id = <3>;
108 ticks-per-sec = <10000>;
109 qos-cfg = <4 50 1 1 0xf00 0 0>;
110 sched-port-configs = <0 20 0x1c8>;
111 drop-out-profiles = <0 36 0xc>;
112 drop-cfg-profiles = <0 8 0x14>;
113 drop-queue-configs = <0 80 0x4>;
114 drop-policies = <&droppolicies>;
115 qos-tree = <&qostree>;
116 statistics-profiles = <0 48>;
117 reserved;
118 };
119 qos-inputs-2 {
120 values = <6400 192>;
121 pdsp-id = <7>;
122 ticks-per-sec = <10000>;
123 qos-cfg = <4 50 1 1 0xf00 0 0>;
124 sched-port-configs = <0 20 0x1c8>;
125 drop-out-profiles = <0 36 0xc>;
126 drop-cfg-profiles = <0 8 0x14>;
127 drop-queue-configs = <0 80 0x4>;
128 drop-policies = <&droppolicies>;
129 qos-tree = <&qostree2>;
130 statistics-profiles = <0 48>;
131 reserved;
132 };
133 };
134 };
135
136
137 uio_hyperlink0: hyperlink0 {
138 compatible = "ti,uio-module-drv";
139 mem = <0x21400000 0x00000100
140 0x40000000 0x10000000
141 0x0231a000 0x00002000>;
142 clocks = <&clkhyperlink0>;
143 interrupts = <0 387 0x101>;
144 label = "hyperlink0";
145 cfg-params
146 {
147 ti,serdes_refclk_khz = <312500>;
148 ti,serdes_maxserrate_khz = <6250000>;
149 ti,serdes_lanerate = "half";
150 ti,serdes_c1 = <4>;
151 ti,serdes_c2 = <0>;
152 ti,serdes_cm = <3>;
153 };
154 };
155
156 uio_srss: srss {
157 compatible = "ti,uio-module-drv";
158 mem = <0x02330000 0x0000400>;
159 clocks=<&clksr>;
160 interrupts = <0 0x173 0xf01>;
161 label = "srss";
162 };
163 };
164};
165
diff --git a/arch/arm/boot/dts/k2e-net.dtsi b/arch/arm/boot/dts/k2e-net.dtsi
new file mode 100644
index 00000000000..87892cdd810
--- /dev/null
+++ b/arch/arm/boot/dts/k2e-net.dtsi
@@ -0,0 +1,443 @@
1/*
2 * Copyright 2014 Texas Instruments, Inc.
3 *
4 * Keystone 2 K2E SoC network node
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11mdio: mdio@24200f00 {
12 compatible = "ti,davinci_mdio";
13 #address-cells = <1>;
14 #size-cells = <0>;
15 reg = <0x24200f00 0x100>;
16 bus_freq = <2500000>;
17 clocks = <&clkcpgmac>;
18 clock-names = "fck";
19 phy0: phy@0 {
20 compatible = "marvell,88e1510";
21 reg = <0>;
22 };
23 phy1: phy@1 {
24 compatible = "marvell,88e1510";
25 reg = <1>;
26 };
27};
28
29netcp {
30 reg = <0x24000000 0xf00
31 0x2620110 0x8>;
32 compatible = "ti,keystone-netcp";
33 clocks = <&paclk13>, <&clkcpgmac>, <&chipclk12>;
34 clock-names = "clk_pa", "clk_cpgmac", "cpsw_cpts_rft_clk";
35 dma-coherent;
36 streaming-regs = <0x24000500 0x40>;
37
38 interfaces {
39 interface0: interface-0 {
40 rx-channel = "netrx0";
41 rx-queue-depth = <128 128 0 0>;
42 rx-buffer-size = <1536 4096 0 0>;
43 efuse-mac = <1>;
44 /* local-mac-address = [02 18 31 7e 3e 6e]; */
45 };
46 interface1: interface-1 {
47 rx-channel = "netrx1";
48 rx-queue-depth = <128 128 0 0>;
49 rx-buffer-size = <1536 4096 0 0>;
50 efuse-mac = <0>;
51 local-mac-address = [02 18 31 7e 3e 6f];
52 };
53 interface2: interface-2 {
54 rx-channel = "netrx2";
55 rx-queue-depth = <128 128 0 0>;
56 rx-buffer-size = <1536 4096 0 0>;
57 efuse-mac = <0>;
58 /*local-mac-address = [02 18 31 7e 3e 7e]; */
59 };
60 interface3: interface-3 {
61 rx-channel = "netrx3";
62 rx-queue-depth = <128 128 0 0>;
63 rx-buffer-size = <1536 4096 0 0>;
64 efuse-mac = <0>;
65 /*local-mac-address = [02 18 31 7e 3e 7f]; */
66 };
67 interface4: interface-4 {
68 rx-channel = "netrx4";
69 rx-queue-depth = <128 128 0 0>;
70 rx-buffer-size = <1536 4096 0 0>;
71 efuse-mac = <0>;
72 /* local-mac-address = [02 18 31 7e 3e 80]; */
73 };
74 interface5: interface-5 {
75 rx-channel = "netrx5";
76 rx-queue-depth = <128 128 0 0>;
77 rx-buffer-size = <1536 4096 0 0>;
78 efuse-mac = <0>;
79 /* local-mac-address = [02 18 31 7e 3e 81]; */
80 };
81 interface6: interface-6 {
82 rx-channel = "netrx6";
83 rx-queue-depth = <128 128 0 0>;
84 rx-buffer-size = <1536 4096 0 0>;
85 efuse-mac = <0>;
86 /*local-mac-address = [02 18 31 7e 3e 82]; */
87 };
88 interface7: interface-7 {
89 rx-channel = "netrx7";
90 rx-queue-depth = <128 128 0 0>;
91 rx-buffer-size = <1536 4096 0 0>;
92 efuse-mac = <0>;
93 /*local-mac-address = [02 18 31 7e 3e 83]; */
94 };
95 };
96
97 cpsw: cpsw@24200000 {
98 cpsw-ss-reg = <0x24200000 0x40000>;
99 label = "keystone-cpsw2";
100
101 /* serdes configuration registers */
102 serdes_reg = <0x0232a000 0x2000
103 0x02324000 0x2000>;
104 serdes_at_probe = <1>;
105
106 /* Number of SerDes */
107 num-serdes = <2>;
108 /* Max number of lanes per each SerDes */
109 serdes-lanes = <4>;
110 /* SerDes reference clock 156.25 MHz */
111 serdes-ref-clk = <3>;
112 /* SerDes baud rate 5GBaud */
113 serdes-baud-rate = <1>;
114 /* SerDes quarter rate mode */
115 serdes-rate-mode = <2>;
116 /* SerDes loopback */
117 serdes-loopback = <0>;
118 /* SerDes PHY interface: SGMII */
119 serdes-phy-intf = <0>;
120
121 intf_tx_queues = <7>;
122
123 sgmii_module_ofs = <0x100>;
124 switch_module_ofs = <0x20000>;
125 host_port_reg_ofs = <0x21000>;
126 slave_reg_ofs = <0x22000>;
127 hw_stats_reg_ofs = <0x3a000>;
128 cpts_reg_ofs = <0x3d000>;
129 ale_reg_ofs = <0x3e000>;
130
131 num_slaves = <8>;
132
133 ale_ageout = <30>;
134 ale_entries = <1024>;
135 ale_ports = <5>;
136
137 cpts_rftclk_sel = <0>;
138 /*cpts_rftclk_freq = <399360000>;*/
139 cpts_ts_comp_length = <3>;
140 cpts_ts_comp_polarity = <1>; /* 1 - assert high */
141 /* cpts_clock_mult = <5000>; */
142 /* cpts_clock_shift = <10>; */
143 /* cpts_clock_div = <3>; */
144 /* force_no_hwtstamp; */
145
146 multi-interface;
147 num-interfaces = <8>;
148 slaves-per-interface = <1>;
149
150 interfaces {
151 interface-0 {
152 slave_port = <0>;
153 tx-channel = "nettx0";
154 tx_queue_depth = <32>;
155 };
156 interface-1 {
157 slave_port = <1>;
158 tx-channel = "nettx1";
159 tx_queue_depth = <32>;
160 };
161 interface-2 {
162 slave_port = <2>;
163 tx-channel = "nettx2";
164 tx_queue_depth = <32>;
165 };
166 interface-3 {
167 slave_port = <3>;
168 tx-channel = "nettx3";
169 tx_queue_depth = <32>;
170 };
171 interface-4 {
172 slave_port = <4>;
173 tx-channel = "nettx4";
174 tx_queue_depth = <32>;
175 };
176 interface-5 {
177 slave_port = <5>;
178 tx-channel = "nettx5";
179 tx_queue_depth = <32>;
180 };
181 interface-6 {
182 slave_port = <6>;
183 tx-channel = "nettx6";
184 tx_queue_depth = <32>;
185 };
186 interface-7 {
187 slave_port = <7>;
188 tx-channel = "nettx7";
189 tx_queue_depth = <32>;
190 };
191 };
192
193 slaves {
194 slave0 {
195 label = "slave0";
196 link-interface = <1>;
197 phy-handle = <&phy0>;
198 };
199 slave1 {
200 label = "slave1";
201 link-interface = <1>;
202 phy-handle = <&phy1>;
203 };
204 slave2 {
205 label = "slave2";
206 link-interface = <2>;
207 };
208 slave3 {
209 label = "slave3";
210 link-interface = <2>;
211 };
212 slave4 {
213 label = "slave4";
214 link-interface = <2>;
215 };
216 slave5 {
217 label = "slave5";
218 link-interface = <2>;
219 };
220 slave6 {
221 label = "slave6";
222 link-interface = <2>;
223 };
224 slave7 {
225 label = "slave7";
226 link-interface = <2>;
227 };
228 };
229 };
230
231 pa: pa@24000000 {
232 label = "keystone-pa2";
233 reg_base = <0x24000000>;
234 checksum-offload = <1>; /* 1 - HW offload */
235 txhook-order = <10>;
236 txhook-softcsum = <40>;
237 rxhook-order = <10>;
238
239 tx_cmd_queue_depth = <64>;
240 tx_data_queue_depth = <1024>;
241 rx_pool_depth = <64>;
242 rx_buffer_size = <128>;
243 lut-ranges = <0 43 248 255>;
244 /* mark_mcast_match = <0x12345a00 0xffffff00>; */
245 firmware =
246 "keystone/pa_in0_pdsp0.fw", /* 0 */
247 "keystone/pa_in0_pdsp1.fw", /* 1 */
248 "keystone/pa_in1_pdsp0.fw", /* 2 */
249 "keystone/pa_in1_pdsp1.fw", /* 3 */
250 "keystone/pa_in2_pdsp0.fw", /* 4 */
251 "keystone/pa_in3_pdsp0.fw", /* 5 */
252 "keystone/pa_in4_pdsp0.fw", /* 6 */
253 "keystone/pa_in4_pdsp1.fw", /* 7 */
254 "keystone/pa_post_pdsp0.fw", /* 8 */
255 "keystone/pa_post_pdsp1.fw", /* 9 */
256 "keystone/pa_eg0_pdsp0.fw", /* 10 */
257 "keystone/pa_eg0_pdsp1.fw", /* 11 */
258 "keystone/pa_eg0_pdsp2.fw", /* 12 */
259 "keystone/pa_eg1_pdsp0.fw", /* 13 */
260 "keystone/pa_eg2_pdsp0.fw"; /* 14 */
261 };
262
263 sa: sa@24080000 {
264 label = "keystone-sa";
265 multi-interface;
266 interface-0;
267 interface-1;
268 tx_queue_depth = <32>;
269 netcp_ver = <1>; /* 0: NETCP v1.0, 1: NSS 1.0 */
270 };
271
272 qos: qos@0 {
273 label = "keystone-qos";
274 multi-interface;
275
276 interface-0 {
277 chan-0 {
278 tx-channel = "qos-bypass-0";
279 tx_queue_depth = <1024>;
280 };
281 chan-1 {
282 tx-channel = "qos0";
283 tx_queue_depth = <64>;
284 };
285 chan-2 {
286 tx-channel = "qos1";
287 tx_queue_depth = <64>;
288 };
289 chan-3 {
290 tx-channel = "qos2";
291 tx_queue_depth = <64>;
292 };
293 chan-4 {
294 tx-channel = "qos3";
295 tx_queue_depth = <64>;
296 };
297 chan-5 {
298 tx-channel = "qos4";
299 tx_queue_depth = <64>;
300 };
301 chan-6 {
302 tx-channel = "qos5";
303 tx_queue_depth = <64>;
304 };
305 };
306 interface-1 {
307 chan-0 {
308 tx-channel = "qos-bypass-1";
309 tx_queue_depth = <1024>;
310 };
311 chan-1 {
312 tx-channel = "qos6";
313 tx_queue_depth = <64>;
314 };
315 chan-2 {
316 tx-channel = "qos7";
317 tx_queue_depth = <64>;
318 };
319 chan-3 {
320 tx-channel = "qos8";
321 tx_queue_depth = <64>;
322 };
323 chan-4 {
324 tx-channel = "qos9";
325 tx_queue_depth = <64>;
326 };
327 chan-5 {
328 tx-channel = "qos10";
329 tx_queue_depth = <64>;
330 };
331 chan-6 {
332 tx-channel = "qos11";
333 tx_queue_depth = <64>;
334 };
335 };
336 };
337};
338
339mdiox0: mdiox {
340 compatible = "virtual,mdio-gpio";
341 #address-cells = <1>;
342 #size-cells = <0>;
343 status = "disabled";
344 gpios = <&gpio0 2 0x2 /* mdc */
345 &gpio0 0 0x2>; /* mdio */
346
347 phyx0: phyx@0 {
348 compatible = "Marvell,88x2242", "ethernet-phy-ieee802.3-c45";
349 reg = <0>;
350 };
351 phyx1: phyx@1 {
352 compatible = "Marvell,88x2242", "ethernet-phy-ieee802.3-c45";
353 reg = <1>;
354 };
355};
356
357netcpx: netcp@2f00000 {
358 #address-cells = <1>;
359 #size-cells = <1>;
360 reg = <0x2f00000 0xa0600>;
361 compatible = "ti,keystone-netcp";
362 dma-coherent;
363 status = "disabled";
364
365 clocks = <&clkxge>;
366 clock-names = "clk_xge";
367
368 interfaces {
369 interface-0 {
370 rx-channel = "xgerx0";
371 rx-queue-depth = <128 128 0 0>;
372 rx-buffer-size = <1500 4096 0 0>;
373 local-mac-address = [02 18 31 7e 3e 5e]; /* FIXME */
374 };
375 interface-1 {
376 rx-channel = "xgerx1";
377 rx-queue-depth = <128 128 0 0>;
378 rx-buffer-size = <1500 4096 0 0>;
379 local-mac-address = [02 18 31 7e 3e 5f]; /* FIXME */
380 };
381 };
382
383 cpswx: cpswx@2f00000 {
384 reg = <0x2f00000 0xa0600>;
385 label = "keystone-cpswx";
386 serdes_at_probe = <1>;
387
388 intf_tx_queues = <1>;
389
390 sgmii_module_ofs = <0x100>;
391 pcsr_module_ofs = <0x600>;
392 switch_module_ofs = <0x1000>;
393 host_port_reg_ofs = <0x1034>;
394 slave_reg_ofs = <0x1064>;
395 sliver_reg_ofs = <0x1400>;
396 hw_stats_reg_ofs = <0x1800>;
397 ale_reg_ofs = <0x1700>;
398
399 host_port = <0>;
400 num_slaves = <2>;
401 ale_ageout = <30>;
402 ale_entries = <1024>;
403 ale_ports = <3>;
404
405 multi-interface;
406 num-interfaces = <2>;
407 slaves-per-interface = <1>;
408
409 interfaces {
410 interface-0 {
411 slave_port = <0>;
412 tx-channel = "xgetx0";
413 tx_queue_depth = <128>;
414 };
415 interface-1 {
416 slave_port = <1>;
417 tx-channel = "xgetx1";
418 tx_queue_depth = <128>;
419 };
420 };
421
422 slaves {
423 slave0 {
424 label = "slave0";
425 link-interface = <10>; /* XGMII_LINK_MAC_PHY */
426 phy-handle = <&phyx0>;
427 };
428 slave1 {
429 label = "slave1";
430 link-interface = <10>; /* SGMII_LINK_MAC_PHY */
431 phy-handle = <&phyx1>;
432 };
433 };
434
435 serdes {
436 /* ref_clock = <0> */ /* 0 - 156.25MHz */
437 /* link_rate = <0> */ /* 0 - 10.3125GHz */
438 tx_ctrl_override = <2 0 2 12 4>; /* c1 c2 cm tx_att tx_vreg */
439 equalizer_flags = <1 1 1>; /* vreg cdfe offset */
440 };
441 };
442};
443
diff --git a/arch/arm/boot/dts/k2e.dtsi b/arch/arm/boot/dts/k2e.dtsi
new file mode 100644
index 00000000000..ecde840ec64
--- /dev/null
+++ b/arch/arm/boot/dts/k2e.dtsi
@@ -0,0 +1,853 @@
1/*
2 * Copyright 2014 Texas Instruments, Inc.
3 *
4 * Keystone Edison SoC specific device tree bindings
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11/ {
12 aliases {
13 ethernet1 = &interface1;
14 };
15
16 cpus {
17 #address-cells = <1>;
18 #size-cells = <0>;
19
20 interrupt-parent = <&gic>;
21
22 cpu@0 {
23 compatible = "arm,cortex-a15";
24 device_type = "cpu";
25 reg = <0x0>;
26 clocks = <&mainpllclk>;
27 };
28
29 cpu@1 {
30 compatible = "arm,cortex-a15";
31 device_type = "cpu";
32 reg = <0x1>;
33 clocks = <&mainpllclk>;
34 };
35
36 cpu@2 {
37 compatible = "arm,cortex-a15";
38 device_type = "cpu";
39 reg = <0x2>;
40 clocks = <&mainpllclk>;
41 };
42
43 cpu@3 {
44 compatible = "arm,cortex-a15";
45 device_type = "cpu";
46 reg = <0x3>;
47 clocks = <&mainpllclk>;
48 };
49 };
50
51 soc {
52 /include/ "k2e-clocks.dtsi"
53
54 dsp0: dsp0 {
55 compatible = "linux,rproc-user";
56 mem = <0x10e00000 0x00008000
57 0x10f00000 0x00008000
58 0x10800000 0x00100000>;
59 reg = <0x02620844 4
60 0x0235083c 4
61 0x02350a3c 4
62 0x02620240 4>;
63 reg-names = "boot-address", "psc-mdstat", "psc-mdctl",
64 "ipcgr";
65 interrupt-parent = <&ipcirq0>;
66 interrupts = <8 0 0 0>;
67 kick-gpio = <&ipcgpio0 27 0>;
68 clocks = <&clkgem0>;
69 label = "dsp0";
70 };
71
72 dspmem: dspmem {
73 compatible = "linux,rproc-user";
74 mem = <0x0c000000 0x000200000
75 0xa0000000 0x20000000>;
76 label = "dspmem";
77 };
78
79 hwqueue0: hwqueue@2a40000 {
80 range = <0 0x2000>;
81 linkram0 = <0x100000 0x4000>;
82 linkram1 = <0x0 0x10000>;
83
84 queues {
85 qpend-arm-hi {
86 values = <528 32>;
87 interrupts = <0 48 0x104>,
88 <0 49 0x204>,
89 <0 50 0xf04>,
90 <0 51 0xf04>,
91 <0 52 0xf04>,
92 <0 53 0xf04>,
93 <0 54 0xf04>,
94 <0 55 0xf04>,
95 <0 56 0xf04>,
96 <0 57 0xf04>,
97 <0 58 0xf04>,
98 <0 59 0xf04>,
99 <0 60 0x104>,
100 <0 61 0x204>,
101 <0 62 0x404>,
102 <0 63 0x804>,
103 <0 64 0x404>,
104 <0 65 0x804>,
105 <0 66 0xf04>,
106 <0 67 0xf04>,
107 <0 68 0xf04>,
108 <0 69 0xf04>,
109 <0 70 0xf04>,
110 <0 71 0xf04>,
111 <0 72 0xf04>,
112 <0 73 0xf04>,
113 <0 74 0xf04>,
114 <0 75 0xf04>,
115 <0 76 0xf04>,
116 <0 77 0xf04>,
117 <0 78 0xf04>,
118 <0 79 0xf04>;
119 reserved;
120 };
121 infradma {
122 values = <800 2>;
123 reserved;
124 };
125 cpsw {
126 values = <896 8>;
127 reserved;
128 };
129 pa {
130 values = <904 13>;
131 reserved;
132 };
133 xge {
134 values = <692 8>;
135 reserved;
136 };
137 };
138 regions {
139 #address-cells = <1>;
140 #size-cells = <1>;
141 ranges;
142 region-12 {
143 id = <12>;
144 values = <16384 128>; /* num_desc desc_size */
145 link-index = <0x4000>;
146 };
147 region-13 {
148 id = <13>;
149 values = <2048 256>; /* num_desc desc_size */
150 link-index = <0x8000>;
151 };
152 region-14 {
153 id = <14>;
154 values = <2048 128>; /* num_desc desc_size */
155 link-index = <0x8800>;
156 };
157 };
158 descriptors {
159 pool-net {
160 values = <15360 128>; /* num_desc desc_size */
161 region-id = <12>;
162 };
163 pool-udma {
164 values = <240 256>; /* num_desc desc_size */
165 region-id = <13>;
166 };
167 };
168 }; /* hwqueue0 */
169
170 padma: pktdma@24186000 {
171 compatible = "ti,keystone-pktdma";
172 reg = <0x24186000 0x100 /* 0 - global */
173 0x24187000 0x2a0 /* 1 - txchan */
174 0x24188000 0xb60 /* 2 - rxchan */
175 0x24186100 0x80 /* 3 - txsched */
176 0x24189000 0x1000>; /* 4 - rxflow */
177 /* loop-back; */
178 /* bigendian; */
179 dma-coherent;
180 enable-all;
181 /* debug; */
182 /* rx-priority = <0>; */
183 /* tx-priority = <0>; */
184 rx-retry-timeout = <3500>; /* Number of pktdma cycles
185 to wait before retry on
186 buffer starvation */
187 logical-queue-managers = <2>;
188 queues-per-queue-manager = <4096>;
189 qm-base-address = <0x23a80000 0x23a90000>;
190
191 channels {
192 nettx0 {
193 transmit;
194 label = "nettx0";
195 pool = "pool-net";
196 submit-queue = <896>;
197 /* complete-queue = <xx>; */
198 /* debug; */
199 /* channel = <0>; */
200 /* priority = <1>; */
201 };
202 nettx1 {
203 transmit;
204 label = "nettx1";
205 pool = "pool-net";
206 submit-queue = <896>;
207 /* complete-queue = <xx>; */
208 /* debug; */
209 /* channel = <0>; */
210 /* priority = <1>; */
211 };
212 nettx2 {
213 transmit;
214 label = "nettx2";
215 pool = "pool-net";
216 submit-queue = <896>;
217 /* complete-queue = <xx>; */
218 /* debug; */
219 /* channel = <0>; */
220 /* priority = <1>; */
221 };
222 nettx3 {
223 transmit;
224 label = "nettx3";
225 pool = "pool-net";
226 submit-queue = <896>;
227 /* complete-queue = <xx>; */
228 /* debug; */
229 /* channel = <0>; */
230 /* priority = <1>; */
231 };
232 nettx4 {
233 transmit;
234 label = "nettx4";
235 pool = "pool-net";
236 submit-queue = <896>;
237 /* complete-queue = <xx>; */
238 /* debug; */
239 /* channel = <0>; */
240 /* priority = <1>; */
241 };
242 nettx5 {
243 transmit;
244 label = "nettx5";
245 pool = "pool-net";
246 submit-queue = <896>;
247 /* complete-queue = <xx>; */
248 /* debug; */
249 /* channel = <0>; */
250 /* priority = <1>; */
251 };
252 nettx6 {
253 transmit;
254 label = "nettx6";
255 pool = "pool-net";
256 submit-queue = <896>;
257 /* complete-queue = <xx>; */
258 /* debug; */
259 /* channel = <0>; */
260 /* priority = <1>; */
261 };
262 nettx7 {
263 transmit;
264 label = "nettx7";
265 pool = "pool-net";
266 submit-queue = <896>;
267 /* complete-queue = <xx>; */
268 /* debug; */
269 /* channel = <0>; */
270 /* priority = <1>; */
271 };
272 netrx0 {
273 receive;
274 label = "netrx0";
275 pool = "pool-net";
276 /* submit-queue = <xx>; */
277 complete-queue = <528>;
278 /* debug; */
279 /* channel = <0>; */
280 flow = <22>;
281 };
282 netrx1 {
283 receive;
284 label = "netrx1";
285 pool = "pool-net";
286 /* submit-queue = <xx>; */
287 complete-queue = <529>;
288 /* debug; */
289 /* channel = <0>; */
290 flow = <23>;
291 };
292 netrx2 {
293 receive;
294 label = "netrx2";
295 pool = "pool-net";
296 /* submit-queue = <xx>; */
297 complete-queue = <542>;
298 /* debug; */
299 /* channel = <0>; */
300 flow = <24>;
301 };
302 netrx3 {
303 receive;
304 label = "netrx3";
305 pool = "pool-net";
306 /* submit-queue = <xx>; */
307 complete-queue = <543>;
308 /* debug; */
309 /* channel = <0>; */
310 flow = <25>;
311 };
312 netrx4 {
313 receive;
314 label = "netrx4";
315 pool = "pool-net";
316 /* submit-queue = <xx>; */
317 complete-queue = <546>;
318 /* debug; */
319 /* channel = <0>; */
320 flow = <27>;
321 };
322 netrx5 {
323 receive;
324 label = "netrx5";
325 pool = "pool-net";
326 /* submit-queue = <xx>; */
327 complete-queue = <547>;
328 /* debug; */
329 /* channel = <0>; */
330 flow = <28>;
331 };
332 netrx6 {
333 receive;
334 label = "netrx6";
335 pool = "pool-net";
336 /* submit-queue = <xx>; */
337 complete-queue = <548>;
338 /* debug; */
339 /* channel = <0>; */
340 flow = <29>;
341 };
342 netrx7 {
343 receive;
344 label = "netrx7";
345 pool = "pool-net";
346 /* submit-queue = <xx>; */
347 complete-queue = <549>;
348 /* debug; */
349 /* channel = <0>; */
350 flow = <30>;
351 };
352 satx-0 {
353 transmit;
354 label = "satx-0";
355 pool = "pool-net";
356 submit-queue = <914>;
357 };
358 satx-1 {
359 transmit;
360 label = "satx-1";
361 pool = "pool-net";
362 submit-queue = <914>;
363 };
364 patx-pdsp0 {
365 transmit;
366 label = "patx-pdsp0";
367 pool = "pool-net";
368 submit-queue = <904>;
369 complete-queue = <530>;
370 /* debug; */
371 /* channel = <xx>; */
372 /* priority = <1>; */
373 };
374 patx-pdsp5-0 {
375 transmit;
376 label = "patx-pdsp5-0";
377 pool = "pool-net";
378 submit-queue = <910>;
379 /* complete-queue = <xx>; */
380 /* debug; */
381 /* channel = <xx>; */
382 /* priority = <1>; */
383 };
384 patx-pdsp5-1 {
385 transmit;
386 label = "patx-pdsp5-1";
387 pool = "pool-net";
388 submit-queue = <910>;
389 /* complete-queue = <xx>; */
390 /* debug; */
391 /* channel = <xx>; */
392 /* priority = <1>; */
393 };
394 patx-pdsp5-2 {
395 transmit;
396 label = "patx-pdsp5-2";
397 pool = "pool-net";
398 submit-queue = <910>;
399 complete-queue = <544>;
400 /* debug; */
401 /* channel = <xx>; */
402 /* priority = <1>; */
403 };
404 patx-pdsp5-3 {
405 transmit;
406 label = "patx-pdsp5-3";
407 pool = "pool-net";
408 submit-queue = <910>;
409 complete-queue = <545>;
410 /* debug; */
411 /* channel = <xx>; */
412 /* priority = <1>; */
413 };
414 patx-pdsp5-4 {
415 transmit;
416 label = "patx-pdsp5-4";
417 pool = "pool-net";
418 submit-queue = <910>;
419 /* complete-queue = <xx>; */
420 /* debug; */
421 /* channel = <xx>; */
422 /* priority = <1>; */
423 };
424 patx-pdsp5-5 {
425 transmit;
426 label = "patx-pdsp5-5";
427 pool = "pool-net";
428 submit-queue = <910>;
429 /* complete-queue = <xx>; */
430 /* debug; */
431 /* channel = <xx>; */
432 /* priority = <1>; */
433 };
434 patx-pdsp5-6 {
435 transmit;
436 label = "patx-pdsp5-6";
437 pool = "pool-net";
438 submit-queue = <910>;
439 /* complete-queue = <xx>; */
440 /* debug; */
441 /* channel = <xx>; */
442 /* priority = <1>; */
443 };
444 patx-pdsp5-7 {
445 transmit;
446 label = "patx-pdsp5-7";
447 pool = "pool-net";
448 submit-queue = <910>;
449 /* complete-queue = <xx>; */
450 /* debug; */
451 /* channel = <xx>; */
452 /* priority = <1>; */
453 };
454 qos-bypass-0 {
455 transmit;
456 label = "qos-bypass-0";
457 pool = "pool-net";
458 submit-queue = <910>;
459 complete-queue = <540>;
460 /* debug; */
461 /* channel = <xx>; */
462 /* priority = <1>; */
463 };
464 qos-bypass-1 {
465 transmit;
466 label = "qos-bypass-1";
467 pool = "pool-net";
468 submit-queue = <910>;
469 complete-queue = <541>;
470 /* debug; */
471 /* channel = <xx>; */
472 /* priority = <1>; */
473 };
474 parx {
475 receive;
476 label = "parx";
477 pool = "pool-net";
478 /* submit-queue = <xx>; */
479 /* complete-queue = <xx>; */
480 /* debug; */
481 /* channel = <0>; */
482 flow = <31>;
483 };
484 crypto-rx0 {
485 receive;
486 label = "crypto-rx0";
487 pool = "pool-crypto";
488 complete-queue = <536>;
489 flow = <26>;
490 rx-error-retry; /* enable retry on
491 buffer starvation */
492 /* debug; */
493 };
494 crypto-tx {
495 transmit;
496 label = "crypto-tx";
497 pool = "pool-crypto";
498 submit-queue = <914>;
499 complete-queue = <537>;
500 /* debug; */
501 };
502 qos0 {
503 transmit;
504 label = "qos0";
505 pool = "pool-net";
506 submit-queue = <8072>;
507 /* complete-queue = <xx>; */
508 /* debug; */
509 /* channel = <xx>; */
510 /* priority = <1>; */
511 };
512 qos1 {
513 transmit;
514 label = "qos1";
515 pool = "pool-net";
516 submit-queue = <8073>;
517 /* complete-queue = <xx>; */
518 /* debug; */
519 /* channel = <xx>; */
520 /* priority = <1>; */
521 };
522 qos2 {
523 transmit;
524 label = "qos2";
525 pool = "pool-net";
526 submit-queue = <8074>;
527 /* complete-queue = <xx>; */
528 /* debug; */
529 /* channel = <xx>; */
530 /* priority = <1>; */
531 };
532 qos3 {
533 transmit;
534 label = "qos3";
535 pool = "pool-net";
536 submit-queue = <8075>;
537 /* complete-queue = <xx>; */
538 /* debug; */
539 /* channel = <xx>; */
540 /* priority = <1>; */
541 };
542 qos4 {
543 transmit;
544 label = "qos4";
545 pool = "pool-net";
546 submit-queue = <8076>;
547 /* complete-queue = <xx>; */
548 /* debug; */
549 /* channel = <xx>; */
550 /* priority = <1>; */
551 };
552 qos5 {
553 transmit;
554 label = "qos5";
555 pool = "pool-net";
556 submit-queue = <8077>;
557 complete-queue = <531>;
558 /* debug; */
559 /* channel = <xx>; */
560 /* priority = <1>; */
561 };
562 qos6 {
563 transmit;
564 label = "qos6";
565 pool = "pool-net";
566 submit-queue = <6472>;
567 /* complete-queue = <xx>; */
568 /* debug; */
569 /* channel = <xx>; */
570 /* priority = <1>; */
571 };
572 qos7 {
573 transmit;
574 label = "qos7";
575 pool = "pool-net";
576 submit-queue = <6473>;
577 /* complete-queue = <xx>; */
578 /* debug; */
579 /* channel = <xx>; */
580 /* priority = <1>; */
581 };
582 qos8 {
583 transmit;
584 label = "qos8";
585 pool = "pool-net";
586 submit-queue = <6474>;
587 /* complete-queue = <xx>; */
588 /* debug; */
589 /* channel = <xx>; */
590 /* priority = <1>; */
591 };
592 qos9 {
593 transmit;
594 label = "qos9";
595 pool = "pool-net";
596 submit-queue = <6475>;
597 /* complete-queue = <xx>; */
598 /* debug; */
599 /* channel = <xx>; */
600 /* priority = <1>; */
601 };
602 qos10 {
603 transmit;
604 label = "qos10";
605 pool = "pool-net";
606 submit-queue = <6476>;
607 /* complete-queue = <xx>; */
608 /* debug; */
609 /* channel = <xx>; */
610 /* priority = <1>; */
611 };
612 qos11 {
613 transmit;
614 label = "qos11";
615 pool = "pool-net";
616 submit-queue = <6477>;
617 complete-queue = <532>;
618 /* debug; */
619 /* channel = <xx>; */
620 /* priority = <1>; */
621 };
622 };
623 };
624
625 infradma: pktdma@2a08000 {
626 logical-queue-managers = <2>;
627 qm-base-address = <0x23a80000 0x23a90000>;
628
629 channels {
630 udmatx0 {
631 transmit;
632 label = "udmatx0";
633 pool = "pool-udma";
634 submit-queue = <800>;
635 /* complete-queue = <0> */
636 /* debug; */
637 channel = <0>;
638 priority = <1>;
639 flowtag = <0>;
640 };
641 udmatx1 {
642 transmit;
643 label = "udmatx1";
644 pool = "pool-udma";
645 submit-queue = <801>;
646 /* complete-queue = <1> */
647 /* debug; */
648 channel = <1>;
649 priority = <1>;
650 flowtag = <1>;
651 };
652 udmarx0 {
653 receive;
654 label = "udmarx0";
655 pool = "pool-udma";
656 /* submit-queue = <xx>; */
657 /* complete-queue = <16> */
658 /* debug; */
659 channel = <0>;
660 flow = <0>;
661 };
662 udmarx1 {
663 receive;
664 label = "udmarx1";
665 pool = "pool-udma";
666 /* submit-queue = <xx>; */
667 /* complete-queue = <17> */
668 /* debug; */
669 channel = <1>;
670 flow = <1>;
671 };
672 };
673
674 };
675
676 /include/ "k2e-net.dtsi"
677
678 crypto: crypto@24080000 {
679 compatible = "ti,keystone-crypto";
680 dma-coherent;
681 reg = <0x24080000 0x40000>;
682 clocks = <&clksa>;
683 tx_channel = "crypto-tx";
684 tx_queue_depth = <256>;
685
686 rx_channel = "crypto-rx0";
687 rx_queue_depth = <256 64 0 0>;
688 rx_buffer_size = <1500 4096 0 0>;
689
690 sc-id = <0x7000 0x71ff>;
691 };
692
693 usb: usb@2680000 {
694 interrupts = <0 152 0xf01>;
695 dwc3@2690000 {
696 interrupts = <0 152 0xf01>;
697 };
698 };
699
700 usb1_phy: usb_phy@2620750 {
701 compatible = "ti,keystone-usbphy";
702 #address-cells = <1>;
703 #size-cells = <1>;
704 reg = <0x2620750 24>;
705 status = "disabled";
706 };
707
708 usb1: usb@25000000 {
709 compatible = "ti,keystone-dwc3";
710 #address-cells = <1>;
711 #size-cells = <1>;
712 reg = <0x25000000 0x10000>;
713 clocks = <&clkusb1>;
714 clock-names = "usb";
715 interrupts = <0 414 0xf01>;
716 ranges;
717 status = "disabled";
718
719 dwc3@25010000 {
720 compatible = "synopsys,dwc3";
721 reg = <0x25010000 0x70000>;
722 interrupts = <0 414 0xf01>;
723 usb-phy = <&usb1_phy>, <&usb1_phy>;
724 };
725 };
726
727 xgedma: pktdma@2fa1000 {
728 compatible = "ti,keystone-pktdma";
729 reg = <0x2fa1000 0x100 /* 0 - global */
730 0x2fa1400 0x200 /* 1 - txchan */
731 0x2fa1800 0x200 /* 2 - rxchan */
732 0x2fa1c00 0x200 /* 3 - txsched */
733 0x2fa2000 0x400>; /* 4 - rxflow */
734 /* loop-back; */
735 /* bigendian; */
736 enable-all;
737 /* debug */
738 dma-coherent;
739 /* rx-priority = <0>; */
740 /* tx-priority = <0>; */
741 logical-queue-managers = <4>;
742 queues-per-queue-manager = <4096>;
743 qm-base-address = <0x23a80000 0
744 0x23a80000 0>; /* k2e xge cdma_txq_qmgr
745 tied to 0x2 eventhough
746 only 1 QM */
747
748 channels {
749 xgetx0 {
750 transmit;
751 label = "xgetx0";
752 pool = "pool-xge";
753 submit-queue = <692>;
754 /* complete-queue = <8714>; */
755 /* debug; */
756 /* channel = <0>; */
757 /* priority = <1>; */
758 };
759 xgetx1 {
760 transmit;
761 label = "xgetx1";
762 pool = "pool-xge";
763 submit-queue = <693>;
764 /* complete-queue = <8715>; */
765 /* debug; */
766 /* channel = <0>; */
767 /* priority = <1>; */
768 };
769 xgerx0 {
770 receive;
771 label = "xgerx0";
772 pool = "pool-xge";
773 /* submit-queue = <xx>; */
774 complete-queue = <534>;
775 /* debug; */
776 channel = <0>;
777 flow = <0>;
778 };
779 xgerx1 {
780 receive;
781 label = "xgerx1";
782 pool = "pool-xge";
783 /* submit-queue = <xx>; */
784 complete-queue = <535>;
785 /* debug; */
786 channel = <8>;
787 flow = <8>;
788 };
789 };
790 };
791
792 debugss: debugss {
793 compatible = "ti,keystone-debugss";
794 clocks = <&mainpllclk>, <&clkdebugsstrc>, <&gemtraceclk>, <&clktetbtrc>;
795 clock-names = "mainpllclock", "debugssclock", "gemtraceclock", "tetbclock";
796 };
797
798 sysctrl {
799 interrupts = <0 24 0xf01>, /* L1L2 ECC error interrupt */
800 <0 388 0xf01>; /* DDR3 ECC error interrupt */
801 };
802
803 pmu {
804 compatible = "arm,cortex-a15-pmu";
805 interrupts = <0 20 0xf01>,
806 <0 21 0xf01>,
807 <0 22 0xf01>,
808 <0 23 0xf01>;
809 };
810
811 pci-controller@21020000 {
812 device_type = "pci";
813 #address-cells = <3>;
814 #size-cells = <2>;
815 #interrupt-cells = <2>;
816 compatible = "ti,keystone2-pci";
817 ti,pcie-port = <1>;
818 reg = <0x21020000 0x8000 /* pcie-regs */
819 0x0262014c 4 /* device cfg */
820 0x02326000 0x4000>; /* Keystone2 serdes cfg */
821
822 /* outbound pci resources */
823 ranges = <0x02000000 0 0x60000000 0x60000000 0
824 0x10000000 0x01000000 0 0x4000 0x23260000 0 0x4000>;
825
826 /* inbound dma range */
827 dma-ranges = <0x02000000 0 0x80000000 0x80000000 0
828 0x20000000>;
829
830 interrupt-parent = <&gic>;
831 interrupts = <0 373 0xf01>,
832 <0 374 0xf01>,
833 <0 375 0xf01>,
834 <0 376 0xf01>, /* 4 Legacy IRQs */
835 <0 377 0xf01>,
836 <0 378 0xf01>,
837 <0 379 0xf01>,
838 <0 380 0xf01>, /* 8 MSI IRQs */
839 <0 381 0xf01>,
840 <0 382 0xf01>,
841 <0 383 0xf01>,
842 <0 384 0xf01>,
843 <0 385 0xf01>; /* Error IRQ */
844 clocks = <&clkpcie1>;
845 clock-names = "pcie";
846 enable-linktrain;
847 };
848
849 pci-controller@21800000 {
850 status = "ok";
851 };
852 };
853};
diff --git a/arch/arm/boot/dts/k2hk-clocks.dtsi b/arch/arm/boot/dts/k2hk-clocks.dtsi
new file mode 100644
index 00000000000..f38698f3ae1
--- /dev/null
+++ b/arch/arm/boot/dts/k2hk-clocks.dtsi
@@ -0,0 +1,476 @@
1/*
2 * Copyright 2014 Texas Instruments, Inc.
3 *
4 * Keystone Hawking/Kepler SoC specific clock driver device bindings
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11clocks {
12 mainpllclk: mainpllclk@2310110 {
13 #clock-cells = <0>;
14 compatible = "keystone,main-pll-clk";
15 clocks = <&refclkmain>;
16 reg = <0x02310110 4 /* PLLCTRL PLLM */
17 0x02620350 4>; /* MAINPLL_CTL0 */
18 pll_has_pllctrl;
19 pllm_lower_mask = <0x3f>;
20 pllm_upper_mask = <0x7f000>;
21 pllm_upper_shift = <6>;
22 plld_mask = <0x3f>;
23 fixed_postdiv = <2>;
24 };
25
26 armpllclk: armpllclk@2620370 {
27 #clock-cells = <0>;
28 compatible = "keystone,pll-clk";
29 clocks = <&refclkarm>;
30 clock-output-names = "arm-pll-clk";
31 reg = <0x02620370 4>;
32 pllm_upper_mask = <0x7ffc0>;
33 pllm_upper_shift = <6>;
34 plld_mask = <0x3f>;
35 };
36
37 ddr3a_clk: ddr3a_clk@2620360 {
38 #clock-cells = <0>;
39 compatible = "keystone,pll-clk";
40 clocks = <&refclkddr3a>;
41 clock-output-names = "ddr3a-pll-clk";
42 reg = <0x02620360 4>;
43 pllm_upper_mask = <0x7ffc0>;
44 pllm_upper_shift = <6>;
45 plld_mask = <0x3f>;
46 };
47
48 ddr3b_clk: ddr3b_clk@2620368 {
49 #clock-cells = <0>;
50 compatible = "keystone,pll-clk";
51 clocks = <&refclkddr3b>;
52 clock-output-names = "ddr3b-pll-clk";
53 reg = <0x02620368 4>;
54 pllm_upper_mask = <0x7ffc0>;
55 pllm_upper_shift = <6>;
56 plld_mask = <0x3f>;
57 };
58
59 papllclk: papllclk@2620358 {
60 #clock-cells = <0>;
61 compatible = "keystone,pll-clk";
62 clocks = <&refclkpass>;
63 reg = <0x02620358 4>; /* PASSPLLCTL0 */
64 pllm_upper_mask = <0x7ffc0>;
65 pllm_upper_shift = <6>;
66 plld_mask = <0x3f>;
67 };
68
69 clkusb: clkusb {
70 #clock-cells = <0>;
71 compatible = "davinci,psc-clk";
72 clocks = <&chipclk16>;
73 clock-output-names = "usb";
74 reg = <0x02350000 4096>;
75 lpsc = <2>;
76 };
77
78 clksrio: clksrio {
79 #clock-cells = <0>;
80 compatible = "davinci,psc-clk";
81 clocks = <&chipclk1rstiso13>;
82 clock-output-names = "srio";
83 base-flags = "ignore-unused";
84 status = "disabled";
85 reg = <0x02350000 4096>;
86 lpsc = <11>;
87 pd = <4>;
88 };
89
90 clkhyperlink0: clkhyperlink0 {
91 #clock-cells = <0>;
92 compatible = "davinci,psc-clk";
93 clocks = <&chipclk12>;
94 clock-output-names = "hyperlink-0";
95 base-flags = "ignore-unused";
96 status = "disabled";
97 reg = <0x02350000 4096>;
98 lpsc = <12>;
99 pd = <5>;
100 };
101
102 clkgem1: clkgem1 {
103 #clock-cells = <0>;
104 compatible = "davinci,psc-clk";
105 clocks = <&chipclk1>;
106 clock-output-names = "gem1";
107 base-flags = "ignore-unused";
108 reg = <0x02350000 4096>;
109 lpsc = <16>;
110 pd = <9>;
111 };
112
113 clkgem2: clkgem2 {
114 #clock-cells = <0>;
115 compatible = "davinci,psc-clk";
116 clocks = <&chipclk1>;
117 clock-output-names = "gem2";
118 base-flags = "ignore-unused";
119 reg = <0x02350000 4096>;
120 lpsc = <17>;
121 pd = <10>;
122 };
123
124 clkgem3: clkgem3 {
125 #clock-cells = <0>;
126 compatible = "davinci,psc-clk";
127 clocks = <&chipclk1>;
128 clock-output-names = "gem3";
129 base-flags = "ignore-unused";
130 reg = <0x02350000 4096>;
131 lpsc = <18>;
132 pd = <11>;
133 };
134
135 clkgem4: clkgem4 {
136 #clock-cells = <0>;
137 compatible = "davinci,psc-clk";
138 clocks = <&chipclk1>;
139 clock-output-names = "gem4";
140 base-flags = "ignore-unused";
141 reg = <0x02350000 4096>;
142 lpsc = <19>;
143 pd = <12>;
144 };
145
146 clkgem5: clkgem5 {
147 #clock-cells = <0>;
148 compatible = "davinci,psc-clk";
149 clocks = <&chipclk1>;
150 clock-output-names = "gem5";
151 base-flags = "ignore-unused";
152 reg = <0x02350000 4096>;
153 lpsc = <20>;
154 pd = <13>;
155 };
156
157 clkgem6: clkgem6 {
158 #clock-cells = <0>;
159 compatible = "davinci,psc-clk";
160 clocks = <&chipclk1>;
161 clock-output-names = "gem6";
162 base-flags = "ignore-unused";
163 reg = <0x02350000 4096>;
164 lpsc = <21>;
165 pd = <14>;
166 };
167
168 clkgem7: clkgem7 {
169 #clock-cells = <0>;
170 compatible = "davinci,psc-clk";
171 clocks = <&chipclk1>;
172 clock-output-names = "gem7";
173 base-flags = "ignore-unused";
174 reg = <0x02350000 4096>;
175 lpsc = <22>;
176 pd = <15>;
177 };
178
179 clkddr31: clkddr31 {
180 #clock-cells = <0>;
181 compatible = "davinci,psc-clk";
182 clocks = <&chipclk13>;
183 clock-output-names = "ddr3-1";
184 base-flags = "ignore-unused";
185 reg = <0x02350000 4096>;
186 lpsc = <24>;
187 pd = <16>;
188 };
189
190 clktac: clktac {
191 #clock-cells = <0>;
192 compatible = "davinci,psc-clk";
193 clocks = <&chipclk13>;
194 clock-output-names = "tac";
195 base-flags = "ignore-unused";
196 reg = <0x02350000 4096>;
197 lpsc = <25>;
198 pd = <17>;
199 };
200
201 clkrac01: clktac01 {
202 #clock-cells = <0>;
203 compatible = "davinci,psc-clk";
204 clocks = <&chipclk13>;
205 clock-output-names = "rac-01";
206 base-flags = "ignore-unused";
207 reg = <0x02350000 4096>;
208 lpsc = <26>;
209 pd = <17>;
210