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authorSebastien Tomas2015-05-22 02:48:50 -0500
committerSebastien Tomas2015-05-22 02:48:50 -0500
commita911d857b72d55c7ffafb33183f815a51d84ab40 (patch)
treedf0714e3ad801d86b5240200ea991f3f4be54462
parentbc2ef596660a885bcc46252431ea9bff702df2e8 (diff)
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step 2 for the migration of the LLD to ARM Linux as a user mode driver: arm-dsp example verified on k2hk evm with arm linux
-rw-r--r--.gitignore2
-rw-r--r--AIF_defs.h6
-rw-r--r--aif2_osal.h4
-rw-r--r--build/armv7/libaif2_aearmv7.mk3
-rw-r--r--makefile_armv76
-rw-r--r--src/AIF_calcParam.c5
-rw-r--r--src/AIF_cfg.c2
-rw-r--r--src/AIF_debug.c6
-rw-r--r--src/AIF_init.c50
-rw-r--r--src/AIF_shutdown.c9
-rw-r--r--src/cslfl/csl_aif2Close.c3
-rw-r--r--src/cslfl/csl_aif2GetBaseAddress.c3
-rw-r--r--src/cslfl/csl_aif2GetHwStatus.c2
-rw-r--r--src/cslfl/csl_aif2HwControl.c2
-rw-r--r--src/cslfl/csl_aif2HwSetup.c6
-rw-r--r--src/cslfl/csl_aif2Init.c2
-rw-r--r--src/cslfl/csl_aif2Open.c8
-rw-r--r--src/cslfl/csl_aif2Reset.c2
-rw-r--r--test/lte/k2hk/armv7/linux/aif2CSLIFace.c9
-rw-r--r--test/lte/k2hk/armv7/linux/build/makefile_armv712
-rw-r--r--test/lte/src/ltecpri_cfg.c4
-rw-r--r--test/utils/aif2_osal.c13
-rw-r--r--test/utils/cslUtils.c27
-rw-r--r--test/utils/cslUtils.h2
24 files changed, 127 insertions, 61 deletions
diff --git a/.gitignore b/.gitignore
index acb782a..d2ae50c 100644
--- a/.gitignore
+++ b/.gitignore
@@ -36,3 +36,5 @@ packages/
36lib/ 36lib/
37docs/doxygen/ 37docs/doxygen/
38docs/doxygen/html/ 38docs/doxygen/html/
39bin/
40obj/
diff --git a/AIF_defs.h b/AIF_defs.h
index 31ae143..beecbd0 100644
--- a/AIF_defs.h
+++ b/AIF_defs.h
@@ -90,7 +90,9 @@
90#ifndef __AIF_DEFS_H 90#ifndef __AIF_DEFS_H
91#define __AIF_DEFS_H 91#define __AIF_DEFS_H
92 92
93#ifdef _TMS320C6X
93#include <c6x.h> 94#include <c6x.h>
95#endif
94 96
95#include <ti/csl/csl.h> 97#include <ti/csl/csl.h>
96#include <ti/csl/csl_aif2.h> 98#include <ti/csl/csl_aif2.h>
@@ -553,12 +555,12 @@ typedef struct
553 /** Holds Pi min (can be user defined or set by the library)*/ 555 /** Holds Pi min (can be user defined or set by the library)*/
554 Uint32 piMin; 556 Uint32 piMin;
555 /** NodeTx parameter allows inserting a certain delay based on the place of the KeyStone SoC in the antenna daisy chain. 557 /** NodeTx parameter allows inserting a certain delay based on the place of the KeyStone SoC in the antenna daisy chain.
556 * For a direct communication between two devices, the nodeTx value needs to be set to ‘0’. For the 1st retransmission node, 558 * For a direct communication between two devices, the nodeTx value needs to be set to �0�. For the 1st retransmission node,
557 * set it to 1, and so on 559 * set it to 1, and so on
558 */ 560 */
559 Uint32 nodeTx; 561 Uint32 nodeTx;
560 /** NodeRx parameter allows inserting a certain delay based on the place of the KeyStone SoC in the antenna daisy chain. 562 /** NodeRx parameter allows inserting a certain delay based on the place of the KeyStone SoC in the antenna daisy chain.
561 * For a direct communication between two devices, the nodeTx value needs to be set to ‘0’. For the 1st retransmission node, 563 * For a direct communication between two devices, the nodeTx value needs to be set to �0�. For the 1st retransmission node,
562 * set it to 1, and so on 564 * set it to 1, and so on
563 */ 565 */
564 Uint32 nodeRx; 566 Uint32 nodeRx;
diff --git a/aif2_osal.h b/aif2_osal.h
index b98f007..52c35ce 100644
--- a/aif2_osal.h
+++ b/aif2_osal.h
@@ -48,7 +48,7 @@
48 48
49/** @addtogroup AIF2_LLD_OSAL 49/** @addtogroup AIF2_LLD_OSAL
50 @{ */ 50 @{ */
51extern void* Osal_aif2Malloc (Uint32 num_bytes); 51extern void* Osal_aif2Malloc (uint32_t num_bytes);
52 52
53extern void Osal_aif2Free (void *ptr, uint32_t num_bytes); 53extern void Osal_aif2Free (void *ptr, uint32_t num_bytes);
54 54
@@ -68,7 +68,7 @@ extern void Osal_aif2ResetMulticoreSyncBarrier ();
68 * The following is the C prototype for the expected OSAL API. 68 * The following is the C prototype for the expected OSAL API.
69 * 69 *
70 * @verbatim 70 * @verbatim
71 void Osal_aif2Malloc( Uint32 num_byte ) 71 void Osal_aif2Malloc( uint32_t num_byte )
72 @endverbatim 72 @endverbatim
73 * 73 *
74 * <b> Parameter </b> 74 * <b> Parameter </b>
diff --git a/build/armv7/libaif2_aearmv7.mk b/build/armv7/libaif2_aearmv7.mk
index 1bec494..832b377 100644
--- a/build/armv7/libaif2_aearmv7.mk
+++ b/build/armv7/libaif2_aearmv7.mk
@@ -33,7 +33,8 @@ endif
33INCS = -I. -I$(strip $(subst ;, -I,$(subst $(space),\$(space),$(INCDIR)))) 33INCS = -I. -I$(strip $(subst ;, -I,$(subst $(space),\$(space),$(INCDIR))))
34 34
35INTERNALDEFS = -D__ARMv7 -D_LITTLE_ENDIAN=1 -DDEVICE_K2K -DK2 -D_VIRTUAL_ADDR_SUPPORT -DMAKEFILE_BUILD 35INTERNALDEFS = -D__ARMv7 -D_LITTLE_ENDIAN=1 -DDEVICE_K2K -DK2 -D_VIRTUAL_ADDR_SUPPORT -DMAKEFILE_BUILD
36CFLAGS += $(INTERNALDEFS) $(LDFLAGS) -Wall -Wextra -Werror -O2 -marm -march=armv7-a -mtune=cortex-a15 -mfpu=neon -ffast-math -mfloat-abi=hard 36#CFLAGS += $(INTERNALDEFS) $(LDFLAGS) -Wall -Wextra -Werror -O2 -marm -march=armv7-a -mtune=cortex-a15 -mfpu=neon -ffast-math -mfloat-abi=hard
37CFLAGS += $(INTERNALDEFS) $(LDFLAGS) -Wall -Wextra -O2 -marm -march=armv7-a -mtune=cortex-a15 -mfpu=neon -ffast-math -mfloat-abi=hard
37 38
38OBJEXT = o 39OBJEXT = o
39INTERNALLINKDEFS = 40INTERNALLINKDEFS =
diff --git a/makefile_armv7 b/makefile_armv7
index ba59b8a..d586091 100644
--- a/makefile_armv7
+++ b/makefile_armv7
@@ -13,7 +13,7 @@
13 13
14# Output for prebuilt generated libraries 14# Output for prebuilt generated libraries
15export ARMV7LIBDIR ?= ./lib 15export ARMV7LIBDIR ?= ./lib
16export DEVICE ?=k2l 16export DEVICE ?=k2hk
17export ARMV7OBJDIR ?= ./obj/$(DEVICE) 17export ARMV7OBJDIR ?= ./obj/$(DEVICE)
18export ARMV7BINDIR ?= ./bin/$(DEVICE) 18export ARMV7BINDIR ?= ./bin/$(DEVICE)
19 19
@@ -85,10 +85,10 @@ installbin:
85 install -c -m 755 $(ARMV7BINDIR)/aif2/test/aif2Test.out $(INSTALL_BIN_BASE_DIR)/aif2LteCfgTest_$(DEVICE).out 85 install -c -m 755 $(ARMV7BINDIR)/aif2/test/aif2Test.out $(INSTALL_BIN_BASE_DIR)/aif2LteCfgTest_$(DEVICE).out
86 86
87install: 87install:
88 install -d $(INSTALL_INC_BASE_DIR)/ti/drv/aif2/device/k2l/src 88 install -d $(INSTALL_INC_BASE_DIR)/ti/drv/aif2/device/k2hk/src
89 install -d $(INSTALL_LIB_BASE_DIR) 89 install -d $(INSTALL_LIB_BASE_DIR)
90 $(CP) ./*.h $(INSTALL_INC_BASE_DIR)/ti/drv/aif2 90 $(CP) ./*.h $(INSTALL_INC_BASE_DIR)/ti/drv/aif2
91 $(CP) ./device/k2l/src/*.c $(INSTALL_INC_BASE_DIR)/ti/drv/aif2/device/k2l/src 91 $(CP) ./device/k2hk/src/*.c $(INSTALL_INC_BASE_DIR)/ti/drv/aif2/device/k2hk/src
92 $(CP) ./device/*.h $(INSTALL_INC_BASE_DIR)/ti/drv/aif2/device 92 $(CP) ./device/*.h $(INSTALL_INC_BASE_DIR)/ti/drv/aif2/device
93 @$(CP) -r $(ARMV7LIBDIR)/*.a $(INSTALL_LIB_BASE_DIR) 93 @$(CP) -r $(ARMV7LIBDIR)/*.a $(INSTALL_LIB_BASE_DIR)
94 @$(CP) -r $(ARMV7LIBDIR)/*.so $(INSTALL_LIB_BASE_DIR) 94 @$(CP) -r $(ARMV7LIBDIR)/*.so $(INSTALL_LIB_BASE_DIR)
diff --git a/src/AIF_calcParam.c b/src/AIF_calcParam.c
index 2503612..fc2748c 100644
--- a/src/AIF_calcParam.c
+++ b/src/AIF_calcParam.c
@@ -145,7 +145,7 @@ calcAifPackMode(
145 CSL_Aif2LinkIndex linkIndex 145 CSL_Aif2LinkIndex linkIndex
146 ) 146 )
147{ 147{
148 Int32 i; 148 Uint32 i;
149 AIF_LinkConfigHandle aifConfig = &(hAif->linkConfig[linkIndex]); 149 AIF_LinkConfigHandle aifConfig = &(hAif->linkConfig[linkIndex]);
150 if ((hAif->mode == AIF_LTE_FDD_MODE) || (hAif->mode == AIF_LTE_TDD_MODE) || ((hAif->mode == AIF_LTE_WCDMA_MODE) && (hAif->linkConfig[linkIndex].mode == LTE))){ 150 if ((hAif->mode == AIF_LTE_FDD_MODE) || (hAif->mode == AIF_LTE_TDD_MODE) || ((hAif->mode == AIF_LTE_WCDMA_MODE) && (hAif->linkConfig[linkIndex].mode == LTE))){
151 if (aifConfig->cpriPackMode == AIF2_LTE_CPRI_1b1) 151 if (aifConfig->cpriPackMode == AIF2_LTE_CPRI_1b1)
@@ -170,7 +170,8 @@ calcAifPackModeAxC(
170 Uint32 offsetAxC 170 Uint32 offsetAxC
171 ) 171 )
172{ 172{
173 Int32 i, offsetBitC; 173 Uint32 i;
174 Int32 offsetBitC;
174 AIF_LinkConfigHandle aifConfig = &(hAif->linkConfig[linkIndex]); 175 AIF_LinkConfigHandle aifConfig = &(hAif->linkConfig[linkIndex]);
175 offsetBitC = 0; 176 offsetBitC = 0;
176 for (i=0;i<aifConfig->numPeAxC;i++) 177 for (i=0;i<aifConfig->numPeAxC;i++)
diff --git a/src/AIF_cfg.c b/src/AIF_cfg.c
index 6cb0591..ef1bd2d 100644
--- a/src/AIF_cfg.c
+++ b/src/AIF_cfg.c
@@ -58,7 +58,7 @@ AIF_getCfg
58) 58)
59{ 59{
60 AIF_CoreCfgHandle ptrCfg; 60 AIF_CoreCfgHandle ptrCfg;
61 int32_t coreIndex; 61 uint32_t coreIndex;
62 62
63 /* Get the initial configuration. */ 63 /* Get the initial configuration. */
64 ptrCfg = ptrInitCfg->coreCfg; 64 ptrCfg = ptrInitCfg->coreCfg;
diff --git a/src/AIF_debug.c b/src/AIF_debug.c
index 4d0f8c7..de60116 100644
--- a/src/AIF_debug.c
+++ b/src/AIF_debug.c
@@ -107,8 +107,9 @@ void AIF_enableException(
107 CSL_Aif2EeAtInt eeAtInt; 107 CSL_Aif2EeAtInt eeAtInt;
108 CSL_Aif2EePdInt eePdInt; 108 CSL_Aif2EePdInt eePdInt;
109 CSL_Aif2EePeInt eePeInt; 109 CSL_Aif2EePeInt eePeInt;
110 Uint32 i;
110#ifdef _TMS320C6X 111#ifdef _TMS320C6X
111 Uint32 i, gie; 112 Uint32 gie;
112 113
113 gie = _disable_interrupts(); 114 gie = _disable_interrupts();
114#endif 115#endif
@@ -498,8 +499,9 @@ void AIF_printException(
498 AIF_ConfigHandle hAif 499 AIF_ConfigHandle hAif
499) 500)
500{ 501{
502 Uint32 i;
501#ifdef _TMS320C6X 503#ifdef _TMS320C6X
502 Uint32 i, gie; 504 Uint32 gie;
503 505
504 gie = _disable_interrupts(); 506 gie = _disable_interrupts();
505#endif 507#endif
diff --git a/src/AIF_init.c b/src/AIF_init.c
index 00dd1eb..17e4b84 100644
--- a/src/AIF_init.c
+++ b/src/AIF_init.c
@@ -272,6 +272,7 @@ AIF_initPktDma(
272 AIF_ConfigHandle hAif 272 AIF_ConfigHandle hAif
273) 273)
274{ 274{
275#ifdef _TMS320C6X
275 Cppi_CpDmaInitCfg aif2CPDMACfg; 276 Cppi_CpDmaInitCfg aif2CPDMACfg;
276 Cppi_DescCfg descCfg; 277 Cppi_DescCfg descCfg;
277 Cppi_MonolithicDesc *ptrMonoDesc; 278 Cppi_MonolithicDesc *ptrMonoDesc;
@@ -809,8 +810,10 @@ AIF_initPktDma(
809 } 810 }
810 } 811 }
811 } 812 }
813#else
814 Aif2_osalLog("Error: AIF2 LLD API supported only on C6X %d \n", (Uint32)hAif);
815#endif
812 return 0; 816 return 0;
813
814} 817}
815 818
816typedef struct { 819typedef struct {
@@ -960,18 +963,18 @@ void AIF_initHw(
960{ 963{
961 CSL_Status status; 964 CSL_Status status;
962 965
963 Int32 i,j,k,z; 966 Uint32 i,j,k,z;
964#ifndef K2 967#ifndef K2
965 Uint8 serdes_blockb8_used =0; 968 Uint8 serdes_blockb8_used =0;
966 Uint8 serdes_blockb4_used =0; 969 Uint8 serdes_blockb4_used =0;
967#endif 970#endif
968 Uint32 offset_channel_pe, offset_channel_pd, max_channel_pe, max_channel_pd, obsai_type, first_link, baseAddress, baseIngr, baseEgr; 971 Uint32 offset_channel_pe, offset_channel_pd, max_channel_pe, max_channel_pd, obsai_type=0, first_link, baseAddress, baseIngr=0, baseEgr=0;
969 Uint32 EventModulo,DioFrameEventOffset; 972 Uint32 EventModulo,DioFrameEventOffset;
970 Uint32 dbmxPe[6]; 973 Uint32 dbmxPe[6];
971 Uint32 dbmxPd; 974 Uint32 dbmxPd;
972 Uint32 numAxCPd; 975 Uint32 numAxCPd;
973 Uint32 maxAxC = 0, totalAxC = 0; 976 Uint32 maxAxC = 0, totalAxC = 0;
974 Uint32 FrameMsg1, FrameMsg, FrameMsg2; 977 Uint32 FrameMsg1=0, FrameMsg=0, FrameMsg2=0;
975 Uint32 tddSubFrameBitMap, offsetTdd, tddSpecSubFrameBitMap; 978 Uint32 tddSubFrameBitMap, offsetTdd, tddSpecSubFrameBitMap;
976 Uint8 tddTable[140]; 979 Uint8 tddTable[140];
977 Uint32 lte1_4 = 0; 980 Uint32 lte1_4 = 0;
@@ -979,7 +982,7 @@ void AIF_initHw(
979 Uint8 frameIndexSc = 0; 982 Uint8 frameIndexSc = 0;
980 Uint32 linkRate; 983 Uint32 linkRate;
981 AIF_SampleRate sampleRate; 984 AIF_SampleRate sampleRate;
982 Uint32 groupId, cellId, isNewGroup; 985 Uint32 groupId=0, cellId, isNewGroup=0;
983 AIF_LteCpType lteCpType; 986 AIF_LteCpType lteCpType;
984 ingrGroupInfo_t ingrGroupInfo[AIF_NUM_PD_PE_FRAME_TC_GROUPS]; 987 ingrGroupInfo_t ingrGroupInfo[AIF_NUM_PD_PE_FRAME_TC_GROUPS];
985 988
@@ -3028,9 +3031,9 @@ void AIF_initHw(
3028 UlRadTimerInit.FcbMinusOne = 1; // Applies to RP1 interface only 3031 UlRadTimerInit.FcbMinusOne = 1; // Applies to RP1 interface only
3029 //full symbol clock value - first ingress DIO event time (as for RAC processing) 3032 //full symbol clock value - first ingress DIO event time (as for RAC processing)
3030 if (CSL_AIF2_LINK_PROTOCOL_OBSAI==hAif->protocol){ 3033 if (CSL_AIF2_LINK_PROTOCOL_OBSAI==hAif->protocol){
3031 UlRadTimerInit.ClockNum = 204800 - ((8*80) + hAif->linkConfig[hAif->dioConfig[i].firstLink].piMin + 20 + 180); 3034 UlRadTimerInit.ClockNum = 204800 - ((8*80) + hAif->linkConfig[hAif->dioConfig[0].firstLink].piMin + 20 + 180);
3032 } else { 3035 } else {
3033 UlRadTimerInit.ClockNum = 163840 - ((8*64) + hAif->linkConfig[hAif->dioConfig[i].firstLink].piMin + 20 + 160); 3036 UlRadTimerInit.ClockNum = 163840 - ((8*64) + hAif->linkConfig[hAif->dioConfig[0].firstLink].piMin + 20 + 160);
3034 } 3037 }
3035 3038
3036 AtCommonSetup.AtTerminalCount.pPhyTimerTc = &PhyTimerTc; 3039 AtCommonSetup.AtTerminalCount.pPhyTimerTc = &PhyTimerTc;
@@ -3363,7 +3366,6 @@ void AIF_initHw(
3363 3366
3364} //eof AIF_initHw 3367} //eof AIF_initHw
3365 3368
3366
3367/* Start AIF given this user configuration*/ 3369/* Start AIF given this user configuration*/
3368#ifdef K2 3370#ifdef K2
3369static void AIF_serdesConfig(AIF_ConfigHandle hAif, Uint8 enableB8, Uint8 enableB4); 3371static void AIF_serdesConfig(AIF_ConfigHandle hAif, Uint8 enableB8, Uint8 enableB4);
@@ -3379,9 +3381,16 @@ void AIF_startHw(
3379#endif 3381#endif
3380 Uint8 serdes_blockb8_used =0; 3382 Uint8 serdes_blockb8_used =0;
3381 Uint8 serdes_blockb4_used =0; 3383 Uint8 serdes_blockb4_used =0;
3384#ifdef _TMS320C6X
3382 Cppi_RxChInitCfg dioRxCfg; 3385 Cppi_RxChInitCfg dioRxCfg;
3383 Cppi_TxChInitCfg dioTxCfg; 3386 Cppi_TxChInitCfg dioTxCfg;
3384 Uint8 isAllocated; 3387 Uint8 isAllocated;
3388#else
3389 // used for DIO mode only
3390 CSL_Cppidma_global_configRegs* pktDMAGlobalCfg = (CSL_Cppidma_global_configRegs*)((uint32_t)(hAif->hAif2SerDesBaseAddr->dev.bases[0].cfgBase) + 0x14000);
3391 CSL_Cppidma_rx_channel_configRegs* pktDMARxCfg = (CSL_Cppidma_rx_channel_configRegs*)((uint32_t)(hAif->hAif2SerDesBaseAddr->dev.bases[0].cfgBase) + 0x18000);
3392 CSL_Cppidma_tx_channel_configRegs* pktDMATxCfg = (CSL_Cppidma_tx_channel_configRegs*)((uint32_t)(hAif->hAif2SerDesBaseAddr->dev.bases[0].cfgBase) + 0x16000);
3393#endif
3385 CSL_Status status; 3394 CSL_Status status;
3386 3395
3387 // Identify which SerDes block to use 3396 // Identify which SerDes block to use
@@ -3447,7 +3456,9 @@ void AIF_startHw(
3447 3456
3448 // Disable loopback in PKT DMA (used also for DIO mode) - done in AIF_initPktDma() 3457 // Disable loopback in PKT DMA (used also for DIO mode) - done in AIF_initPktDma()
3449 if (hAif->pktdmaOrDioEngine == CSL_AIF2_DIO) 3458 if (hAif->pktdmaOrDioEngine == CSL_AIF2_DIO)
3450 { // Enable channel 128 for DIO mode 3459 {
3460#ifdef _TMS320C6X
3461 // Enable channel 128 for DIO mode
3451 // enable Rx and Tx for DIO 3462 // enable Rx and Tx for DIO
3452 memset(&dioRxCfg, 0, sizeof(dioRxCfg)); 3463 memset(&dioRxCfg, 0, sizeof(dioRxCfg));
3453 dioRxCfg.channelNum = 128; 3464 dioRxCfg.channelNum = 128;
@@ -3467,6 +3478,17 @@ void AIF_startHw(
3467 } 3478 }
3468 Cppi_channelEnable (hAif->pktDmaConfig.dioTxChAxC); 3479 Cppi_channelEnable (hAif->pktDmaConfig.dioTxChAxC);
3469 Cppi_channelEnable (hAif->pktDmaConfig.dioRxChAxC); 3480 Cppi_channelEnable (hAif->pktDmaConfig.dioRxChAxC);
3481#else
3482 // Enable channel 128 for DIO mode
3483 // disable loopback
3484 CSL_FINS (pktDMAGlobalCfg->EMULATION_CONTROL_REG,CPPIDMA_GLOBAL_CONFIG_EMULATION_CONTROL_REG_LOOPBACK_EN, 0);
3485 //set write arbitration FIFO depth to 8
3486 CSL_FINS(pktDMAGlobalCfg->PERF_CONTROL_REG, CPPIDMA_GLOBAL_CONFIG_PERF_CONTROL_REG_WARB_FIFO_DEPTH, 8);
3487 // enable Tx for DIO
3488 CSL_FINS(pktDMATxCfg->TX_CHANNEL_GLOBAL_CONFIG[128].TX_CHANNEL_GLOBAL_CONFIG_REG_A, CPPIDMA_TX_CHANNEL_CONFIG_TX_CHANNEL_GLOBAL_CONFIG_REG_A_TX_ENABLE, (Uint32)1);
3489 // enable Rx for DIO
3490 CSL_FINS(pktDMARxCfg->RX_CHANNEL_GLOBAL_CONFIG[128].RX_CHANNEL_GLOBAL_CONFIG_REG, CPPIDMA_RX_CHANNEL_CONFIG_RX_CHANNEL_GLOBAL_CONFIG_REG_RX_ENABLE, (Uint32)1);
3491#endif
3470 3492
3471 } 3493 }
3472 3494
@@ -3780,14 +3802,14 @@ static void AIF_serdesConfig(
3780) 3802)
3781{ 3803{
3782 Uint32 retval, i; 3804 Uint32 retval, i;
3783 CSL_SERDES_REF_CLOCK refClock; 3805 CSL_SERDES_REF_CLOCK refClock=CSL_SERDES_REF_CLOCK_122p88M;
3784 CSL_SERDES_LINK_RATE serdesRate; 3806 CSL_SERDES_LINK_RATE serdesRate;
3785 CSL_SERDES_LOOPBACK loopback; 3807 CSL_SERDES_LOOPBACK loopback;
3786 3808
3787#ifndef _TMS320C6X 3809#ifndef _TMS320C6X
3788 CSL_AIF2_SERDES_B4_CFG_REGS = hAif->hAif2SerDesBaseAddr->dev->bases[0].serDesB4CfgBase; 3810 CSL_AIF2_SERDES_B4_CFG_REGS = (uint32_t)(hAif->hAif2SerDesBaseAddr->dev.bases[0].serDesB4CfgBase);
3789 CSL_AIF2_SERDES_B8_CFG_REGS = hAif->hAif2SerDesBaseAddr->dev->bases[0].serDesB8CfgBase; 3811 CSL_AIF2_SERDES_B8_CFG_REGS = (uint32_t)(hAif->hAif2SerDesBaseAddr->dev.bases[0].serDesB8CfgBase);
3790 CSL_AIF2_CONTROL_REGS = hAif->hAif2SerDesBaseAddr->dev->bases[0].cfgBase; 3812 CSL_AIF2_CONTROL_REGS = (uint32_t)(hAif->hAif2SerDesBaseAddr->dev.bases[0].cfgBase);
3791#else 3813#else
3792 CSL_AIF2_SERDES_B4_CFG_REGS = (0x02324000); 3814 CSL_AIF2_SERDES_B4_CFG_REGS = (0x02324000);
3793 CSL_AIF2_SERDES_B8_CFG_REGS = (0x02326000); 3815 CSL_AIF2_SERDES_B8_CFG_REGS = (0x02326000);
diff --git a/src/AIF_shutdown.c b/src/AIF_shutdown.c
index b58966b..465cd73 100644
--- a/src/AIF_shutdown.c
+++ b/src/AIF_shutdown.c
@@ -61,6 +61,10 @@
61 61
62static CSL_Aif2Obj Aif2Obj; 62static CSL_Aif2Obj Aif2Obj;
63 63
64#ifndef _TMS320C6X
65extern AIF_InitCfg *pGlobalAif2Cfg;
66#endif
67
64void AIF_cleanMMRs(AIF_ConfigHandle hAif); 68void AIF_cleanMMRs(AIF_ConfigHandle hAif);
65 69
66void 70void
@@ -71,7 +75,7 @@ AIF_resetFsync(
71 CSL_Status status; 75 CSL_Status status;
72 Bool ctrlArg = TRUE; 76 Bool ctrlArg = TRUE;
73 77
74 volatile Uint32 sampelPhyTclockCounter; 78 //volatile Uint32 sampelPhyTclockCounter;
75 79
76 //Int32 i; 80 //Int32 i;
77 if (aifFsyncInitDone == 0) { 81 if (aifFsyncInitDone == 0) {
@@ -140,7 +144,7 @@ void AIF_resetAif(
140 CSL_aif2HwControl(hAif->hCsl, CSL_AIF2_CMD_ENABLE_DISABLE_RX_LINK, (void *)&ctrlArg); 144 CSL_aif2HwControl(hAif->hCsl, CSL_AIF2_CMD_ENABLE_DISABLE_RX_LINK, (void *)&ctrlArg);
141 145
142 } 146 }
143 147#ifdef _TMS320C6X
144 // Disable all channels 148 // Disable all channels
145 for(i=0; i<124; i++) 149 for(i=0; i<124; i++)
146 { 150 {
@@ -159,6 +163,7 @@ void AIF_resetAif(
159 if (hAif->pktDmaConfig.dioRxChAxC) {Cppi_channelDisable (hAif->pktDmaConfig.dioRxChAxC); Cppi_channelClose (hAif->pktDmaConfig.dioRxChAxC); hAif->pktDmaConfig.dioRxChAxC = NULL;} 163 if (hAif->pktDmaConfig.dioRxChAxC) {Cppi_channelDisable (hAif->pktDmaConfig.dioRxChAxC); Cppi_channelClose (hAif->pktDmaConfig.dioRxChAxC); hAif->pktDmaConfig.dioRxChAxC = NULL;}
160 164
161 if (hAif->pktDmaConfig.hCppi) {Cppi_close (hAif->pktDmaConfig.hCppi); hAif->pktDmaConfig.hCppi = NULL;} 165 if (hAif->pktDmaConfig.hCppi) {Cppi_close (hAif->pktDmaConfig.hCppi); hAif->pktDmaConfig.hCppi = NULL;}
166#endif
162 167
163 CSL_aif2Reset(hAif->hCsl); 168 CSL_aif2Reset(hAif->hCsl);
164 169
diff --git a/src/cslfl/csl_aif2Close.c b/src/cslfl/csl_aif2Close.c
index 4808a10..734d141 100644
--- a/src/cslfl/csl_aif2Close.c
+++ b/src/cslfl/csl_aif2Close.c
@@ -77,8 +77,9 @@
77 @endverbatim 77 @endverbatim
78 * ============================================================================= 78 * =============================================================================
79 */ 79 */
80 80#ifdef _TMS320C6X
81#pragma CODE_SECTION (CSL_aif2Close, ".text:csl_section:aif2"); 81#pragma CODE_SECTION (CSL_aif2Close, ".text:csl_section:aif2");
82#endif
82CSL_Status CSL_aif2Close( 83CSL_Status CSL_aif2Close(
83 /** Pointer to the object that holds reference to the 84 /** Pointer to the object that holds reference to the
84 * instance of aif2 link requested after the CSL_aif2Open(...) call 85 * instance of aif2 link requested after the CSL_aif2Open(...) call
diff --git a/src/cslfl/csl_aif2GetBaseAddress.c b/src/cslfl/csl_aif2GetBaseAddress.c
index ba1a2ed..824a918 100644
--- a/src/cslfl/csl_aif2GetBaseAddress.c
+++ b/src/cslfl/csl_aif2GetBaseAddress.c
@@ -100,8 +100,9 @@
100 @endverbatim 100 @endverbatim
101 * =========================================================================== 101 * ===========================================================================
102 */ 102 */
103#ifdef _TMS320C6X
103#pragma CODE_SECTION (CSL_aif2GetBaseAddress, ".text:csl_section:aif2"); 104#pragma CODE_SECTION (CSL_aif2GetBaseAddress, ".text:csl_section:aif2");
104 105#endif
105CSL_Status 106CSL_Status
106CSL_aif2GetBaseAddress ( 107CSL_aif2GetBaseAddress (
107 CSL_InstNum aif2Num, 108 CSL_InstNum aif2Num,
diff --git a/src/cslfl/csl_aif2GetHwStatus.c b/src/cslfl/csl_aif2GetHwStatus.c
index 7ee883a..c83e37c 100644
--- a/src/cslfl/csl_aif2GetHwStatus.c
+++ b/src/cslfl/csl_aif2GetHwStatus.c
@@ -139,7 +139,9 @@
139 @endverbatim 139 @endverbatim
140 * ============================================================================= 140 * =============================================================================
141 */ 141 */
142#ifdef _TMS320C6X
142#pragma CODE_SECTION (CSL_aif2GetHwStatus, ".text:csl_section:aif2"); 143#pragma CODE_SECTION (CSL_aif2GetHwStatus, ".text:csl_section:aif2");
144#endif
143CSL_Status CSL_aif2GetHwStatus( 145CSL_Status CSL_aif2GetHwStatus(
144 CSL_Aif2Handle hAif2, 146 CSL_Aif2Handle hAif2,
145 CSL_Aif2HwStatusQuery Query, 147 CSL_Aif2HwStatusQuery Query,
diff --git a/src/cslfl/csl_aif2HwControl.c b/src/cslfl/csl_aif2HwControl.c
index 350c1f6..b9c2422 100644
--- a/src/cslfl/csl_aif2HwControl.c
+++ b/src/cslfl/csl_aif2HwControl.c
@@ -117,7 +117,9 @@
117 @endverbatim 117 @endverbatim
118 * ============================================================================ 118 * ============================================================================
119 */ 119 */
120#ifdef _TMS320C6X
120#pragma CODE_SECTION (CSL_aif2HwControl, ".text:csl_section:aif2"); 121#pragma CODE_SECTION (CSL_aif2HwControl, ".text:csl_section:aif2");
122#endif
121CSL_Status CSL_aif2HwControl( 123CSL_Status CSL_aif2HwControl(
122 CSL_Aif2Handle hAif2, 124 CSL_Aif2Handle hAif2,
123 CSL_Aif2HwControlCmd cmd, 125 CSL_Aif2HwControlCmd cmd,
diff --git a/src/cslfl/csl_aif2HwSetup.c b/src/cslfl/csl_aif2HwSetup.c
index 2d00015..5d0e549 100644
--- a/src/cslfl/csl_aif2HwSetup.c
+++ b/src/cslfl/csl_aif2HwSetup.c
@@ -94,14 +94,14 @@
94 // CSL status 94 // CSL status
95 CSL_Status status; 95 CSL_Status status;
96 // global config for AIF2 96 // global config for AIF2
97 CSL_Aif2GlobalSetup gblCfg = {}; 97 CSL_Aif2GlobalSetup gblCfg = {�};
98 98
99 // Setup objects for global configuring 99 // Setup objects for global configuring
100 CSL_Aif2GlobalSetup GlobalConfig; 100 CSL_Aif2GlobalSetup GlobalConfig;
101 // Setup for common params 101 // Setup for common params
102 CSL_Aif2CommonSetup commoncfg= {CSL_AIF2_LINK_0}; 102 CSL_Aif2CommonSetup commoncfg= {CSL_AIF2_LINK_0};
103 // Setup for link 103 // Setup for link
104 CSL_Aif2Setup Config = {}; 104 CSL_Aif2Setup Config = {�};
105 105
106 // Open handle - for use 106 // Open handle - for use
107 handleAif2 = CSL_aif2Open(&Aif2Obj, CSL_AIF2, &aif2Param, &status); 107 handleAif2 = CSL_aif2Open(&Aif2Obj, CSL_AIF2, &aif2Param, &status);
@@ -122,7 +122,9 @@
122 @endverbatim 122 @endverbatim
123 * ============================================================================= 123 * =============================================================================
124 */ 124 */
125#ifdef _TMS320C6X
125#pragma CODE_SECTION (CSL_aif2HwSetup, ".text:csl_section:aif2"); 126#pragma CODE_SECTION (CSL_aif2HwSetup, ".text:csl_section:aif2");
127#endif
126CSL_Status CSL_aif2HwSetup( 128CSL_Status CSL_aif2HwSetup(
127 /** Pointer to the object that holds reference to the 129 /** Pointer to the object that holds reference to the
128 * instance of AIF2 link requested after the call 130 * instance of AIF2 link requested after the call
diff --git a/src/cslfl/csl_aif2Init.c b/src/cslfl/csl_aif2Init.c
index 2bb550a..ff9cc56 100644
--- a/src/cslfl/csl_aif2Init.c
+++ b/src/cslfl/csl_aif2Init.c
@@ -97,7 +97,9 @@
97 @endverbatim 97 @endverbatim
98 * ============================================================================= 98 * =============================================================================
99 */ 99 */
100#ifdef _TMS320C6X
100#pragma CODE_SECTION (CSL_aif2Init, ".text:csl_section:aif2"); 101#pragma CODE_SECTION (CSL_aif2Init, ".text:csl_section:aif2");
102#endif
101CSL_Status CSL_aif2Init( 103CSL_Status CSL_aif2Init(
102 CSL_Aif2Context *pContext 104 CSL_Aif2Context *pContext
103) 105)
diff --git a/src/cslfl/csl_aif2Open.c b/src/cslfl/csl_aif2Open.c
index 3c7adcf..0d21ca9 100644
--- a/src/cslfl/csl_aif2Open.c
+++ b/src/cslfl/csl_aif2Open.c
@@ -130,9 +130,10 @@
130 */ 130 */
131 /** Device specific configuration used to pass configuration register base address 131 /** Device specific configuration used to pass configuration register base address
132 */ 132 */
133AIF_InitCfg *pGlobalAif2Cfg; 133AIF_InitCfg *pGlobalAif2Cfg=NULL;
134 134#ifdef _TMS320C6X
135#pragma CODE_SECTION (CSL_aif2Open, ".text:csl_section:aif2"); 135#pragma CODE_SECTION (CSL_aif2Open, ".text:csl_section:aif2");
136#endif
136 137
137CSL_Aif2Handle CSL_aif2Open ( 138CSL_Aif2Handle CSL_aif2Open (
138 /** Pointer to the object that holds reference to the 139 /** Pointer to the object that holds reference to the
@@ -164,7 +165,8 @@ CSL_Aif2Handle CSL_aif2Open (
164 } 165 }
165 166
166 //if (CSL_aif2GetBaseAddress(aif2Num, paif2Param, &baseAddress) == CSL_SOK) { 167 //if (CSL_aif2GetBaseAddress(aif2Num, paif2Param, &baseAddress) == CSL_SOK) {
167 if (pGlobalAif2Cfg->dev.bases[aif2Num].cfgBase != NULL) 168 if ((pGlobalAif2Cfg !=NULL) && (pGlobalAif2Cfg->dev.bases[aif2Num].cfgBase != NULL))
169 {
168 //paif2Obj->regs = baseAddress.regs; 170 //paif2Obj->regs = baseAddress.regs;
169 paif2Obj->regs = pGlobalAif2Cfg->dev.bases[aif2Num].cfgBase; 171 paif2Obj->regs = pGlobalAif2Cfg->dev.bases[aif2Num].cfgBase;
170 paif2Obj->arg_link = (CSL_Aif2LinkIndex)0; 172 paif2Obj->arg_link = (CSL_Aif2LinkIndex)0;
diff --git a/src/cslfl/csl_aif2Reset.c b/src/cslfl/csl_aif2Reset.c
index f36f2d4..64927b4 100644
--- a/src/cslfl/csl_aif2Reset.c
+++ b/src/cslfl/csl_aif2Reset.c
@@ -108,7 +108,9 @@
108 * 108 *
109 * =========================================================================== 109 * ===========================================================================
110 */ 110 */
111#ifdef _TMS320C6X
111#pragma CODE_SECTION (CSL_aif2Reset, ".text:csl_section:aif2"); 112#pragma CODE_SECTION (CSL_aif2Reset, ".text:csl_section:aif2");
113#endif
112CSL_Status CSL_aif2Reset ( 114CSL_Status CSL_aif2Reset (
113 /** Pointer to the object that holds reference to the 115 /** Pointer to the object that holds reference to the
114 * instance of AIF2 requested after the call 116 * instance of AIF2 requested after the call
diff --git a/test/lte/k2hk/armv7/linux/aif2CSLIFace.c b/test/lte/k2hk/armv7/linux/aif2CSLIFace.c
index fdfc3f5..fdd0cf4 100644
--- a/test/lte/k2hk/armv7/linux/aif2CSLIFace.c
+++ b/test/lte/k2hk/armv7/linux/aif2CSLIFace.c
@@ -35,10 +35,13 @@
35#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk153p6MHz_20bit_4p9152Gbps_2l1c_sr1.c> 35#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk153p6MHz_20bit_4p9152Gbps_2l1c_sr1.c>
36#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk122p88MHz_20bit_4p9152Gbps_2l1c.c> 36#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk122p88MHz_20bit_4p9152Gbps_2l1c.c>
37#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk122p88MHz_20bit_6p144Gbps_2l1c.c> 37#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk122p88MHz_20bit_6p144Gbps_2l1c.c>
38#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk122p88MHz_20bit_9p8304Gbps_2l1c_AIF_sr1.c>
39#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk153p6MHz_20bit_6p144Gbps_2l1c.c> 38#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk153p6MHz_20bit_6p144Gbps_2l1c.c>
40#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk122p88MHz_20bit_9p8304Gbps_2l1c_JESD.c> 39#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk153p6MHz_20bit_4p9152Gbps_sr1.c>
41#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk122p88MHz_20bit_7p3728Gbps_2l1c.c> 40#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk122p88MHz_20bit_4p9152Gbps.c>
41#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk122p88MHz_20bit_6p144Gbps.c>
42#include <ti/csl/src/ip/serdes_sb/V0/csl_wiz8_sb_refclk153p6MHz_20bit_6p144Gbps.c>
43
44
42 45
43//////////////////// 46////////////////////
44 47
diff --git a/test/lte/k2hk/armv7/linux/build/makefile_armv7 b/test/lte/k2hk/armv7/linux/build/makefile_armv7
index 1148370..68699aa 100644
--- a/test/lte/k2hk/armv7/linux/build/makefile_armv7
+++ b/test/lte/k2hk/armv7/linux/build/makefile_armv7
@@ -58,18 +58,20 @@ endif
58AIF2_SRC_DIR ?= $(PDK_INSTALL_PATH) 58AIF2_SRC_DIR ?= $(PDK_INSTALL_PATH)
59CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl/ 59CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl/
60PDK_INSTALL_DIR = $(PDK_INSTALL_PATH) 60PDK_INSTALL_DIR = $(PDK_INSTALL_PATH)
61AIF2_TEST_DIR = $(IQN2_SRC_DIR)/ti/drv/aif2/test/lte 61AIF2_TEST_DIR = $(AIF2_SRC_DIR)/ti/drv/aif2/test/lte
62AIF2_ARM_LIN_TEST_DIR = $(IQN2_TEST_DIR)/$(DEVICE)/armv7/linux 62AIF2_ARM_LIN_TEST_DIR = $(AIF2_TEST_DIR)/$(DEVICE)/armv7/linux
63CPPI_LIB_DIR = $(PDK_INSTALL_PATH)/ti/drv/cppi/lib
63 64
64INCDIR := $(AIF2_SRC_DIR);$(CSL_DIR);$(PDK_INSTALL_DIR);$(AIF2_TEST_DIR)/src;$(AIF2_TEST_DIR)/../utils;$(AIF2_ARM_LIN_TEST_DIR);$(AIF2_TEST_DIR)/config 65INCDIR := $(AIF2_SRC_DIR);$(CSL_DIR);$(PDK_INSTALL_DIR);$(AIF2_TEST_DIR)/src;$(AIF2_TEST_DIR)/../utils;$(AIF2_ARM_LIN_TEST_DIR);$(AIF2_TEST_DIR)/config
65 66
66# Libraries 67# Libraries
67AIF2_LIB = -laif2 68AIF2_LIB = -laif2
69CPPI_LIB = -lcppi
68 70
69ifeq ($(USEDYNAMIC_LIB), yes) 71ifeq ($(USEDYNAMIC_LIB), yes)
70#presuming ARM executable would depend on dynamic library dependency 72#presuming ARM executable would depend on dynamic library dependency
71EXE_EXTN = _so 73EXE_EXTN = _so
72LIBS = $(AIF2_LIB) 74LIBS = $(AIF2_LIB)
73else 75else
74#forcing ARM executable to depend on static LLD libraries 76#forcing ARM executable to depend on static LLD libraries
75EXE_EXTN = 77EXE_EXTN =
@@ -80,11 +82,11 @@ endif
80#LIBS += -lm 82#LIBS += -lm
81 83
82# Compiler options 84# Compiler options
83INTERNALDEFS = $(DEBUG_FLAG) -D__ARMv7 -DDEVICE_K2K -DLTE_RATE=20 -DCFG -D_VIRTUAL_ADDR_SUPPORT -D__LINUX_USER_SPACE -D_LITTLE_ENDIAN=1 -DMAKEFILE_BUILD -DINTERNAL_LINKING_RAM 85INTERNALDEFS = $(DEBUG_FLAG) -D__ARMv7 -DDEVICE_K2K -DEVM_TYPE=6 -DLTE_RATE=20 -DCFG -D_VIRTUAL_ADDR_SUPPORT -D__LINUX_USER_SPACE -D_LITTLE_ENDIAN=1 -DMAKEFILE_BUILD -DINTERNAL_LINKING_RAM
84 86
85# Linker options 87# Linker options
86#INTERNALLINKDEFS = -Wl,--start-group -L $(ARMV7LIBDIR) $(LIBS) -lrt -Wl,--end-group -pthread $(LDFLAGS) 88#INTERNALLINKDEFS = -Wl,--start-group -L $(ARMV7LIBDIR) $(LIBS) -lrt -Wl,--end-group -pthread $(LDFLAGS)
87INTERNALLINKDEFS = -Wl,--start-group -L $(ARMV7LIBDIR) -L $(DFE_LIB_DIR) $(LIBS) -Wl,--end-group $(LDFLAGS) 89INTERNALLINKDEFS = -Wl,--start-group -L $(ARMV7LIBDIR) -L $(CPPI_LIB_DIR) $(LIBS) -Wl,--end-group $(LDFLAGS)
88 90
89EXE=aif2Test$(EXE_EXTN).out 91EXE=aif2Test$(EXE_EXTN).out
90OBJEXT = o 92OBJEXT = o
diff --git a/test/lte/src/ltecpri_cfg.c b/test/lte/src/ltecpri_cfg.c
index e2d4b17..489bdab 100644
--- a/test/lte/src/ltecpri_cfg.c
+++ b/test/lte/src/ltecpri_cfg.c
@@ -141,6 +141,10 @@ int32_t main(void)
141 aifObj.mode = AIF_LTE_FDD_MODE; 141 aifObj.mode = AIF_LTE_FDD_MODE;
142 aifObj.superPacket = FALSE; 142 aifObj.superPacket = FALSE;
143 aifObj.aif2TimerSyncSource = CSL_AIF2_SW_SYNC; 143 aifObj.aif2TimerSyncSource = CSL_AIF2_SW_SYNC;
144#ifndef _TMS320C6X
145 aifObj.hAif2SerDesBaseAddr = &aif2InitCfg;
146#endif
147
144 148
145 chan = 0; 149 chan = 0;
146 nblink = 0; 150 nblink = 0;
diff --git a/test/utils/aif2_osal.c b/test/utils/aif2_osal.c
index 6fbf675..791739e 100644
--- a/test/utils/aif2_osal.c
+++ b/test/utils/aif2_osal.c
@@ -91,9 +91,9 @@
91/* Created an array to pad the cache line with SRIO_MAX_CACHE_ALIGN size */ 91/* Created an array to pad the cache line with SRIO_MAX_CACHE_ALIGN size */
92#pragma DATA_ALIGN (aif2BarrierSync, 128) 92#pragma DATA_ALIGN (aif2BarrierSync, 128)
93#pragma DATA_SECTION (aif2BarrierSync, ".appSyncSharedMem"); 93#pragma DATA_SECTION (aif2BarrierSync, ".appSyncSharedMem");
94volatile Uint32 aif2BarrierSync = 0; 94volatile uint32_t aif2BarrierSync = 0;
95 95
96Uint32 numcore2sync = 1; 96uint32_t numcore2sync = 1;
97 97
98/////// SIMPLE OSAL for AIF2 TESTS ////////////// 98/////// SIMPLE OSAL for AIF2 TESTS //////////////
99void* Osal_cppiCsEnter (void) 99void* Osal_cppiCsEnter (void)
@@ -155,7 +155,7 @@ void Osal_qmssEndMemAccess (void *ptr, uint32_t size)
155 return; 155 return;
156} 156}
157 157
158void* Osal_cppiMalloc (Uint32 num_bytes) 158void* Osal_cppiMalloc (uint32_t num_bytes)
159{ 159{
160 void* dataPtr = NULL; 160 void* dataPtr = NULL;
161 161
@@ -232,9 +232,10 @@ void Osal_aif2Log ( char *fmt, ... )
232 232
233} 233}
234 234
235#ifdef _TMS320C6X 235
236void Osal_aif2MulticoreSyncBarrier (void) 236void Osal_aif2MulticoreSyncBarrier (void)
237{ 237{
238#ifdef _TMS320C6X
238 /* The global variable is a shared resource which is being accessed from multiple cores. 239 /* The global variable is a shared resource which is being accessed from multiple cores.
239 * So here we need to protect it and ensure that there is only 1 core which is accessing 240 * So here we need to protect it and ensure that there is only 1 core which is accessing
240 * it at a time. We use a Hardware Semaphore to protect this. */ 241 * it at a time. We use a Hardware Semaphore to protect this. */
@@ -259,8 +260,10 @@ void Osal_aif2MulticoreSyncBarrier (void)
259 while (aif2BarrierSync != numcore2sync) 260 while (aif2BarrierSync != numcore2sync)
260 CACHE_invL1d ((void *) &aif2BarrierSync, 128, CACHE_WAIT); 261 CACHE_invL1d ((void *) &aif2BarrierSync, 128, CACHE_WAIT);
261 return; 262 return;
263#endif
262} 264}
263 265
266#ifdef _TMS320C6X
264void Osal_aif2ResetMulticoreSyncBarrier (void) 267void Osal_aif2ResetMulticoreSyncBarrier (void)
265{ 268{
266 /* The global variable is a shared resource which is being accessed from multiple cores. 269 /* The global variable is a shared resource which is being accessed from multiple cores.
@@ -284,7 +287,7 @@ void Osal_aif2ResetMulticoreSyncBarrier (void)
284} 287}
285#endif 288#endif
286 289
287void* Osal_aif2Malloc (Uint32 num_bytes) 290void* Osal_aif2Malloc (uint32_t num_bytes)
288{ 291{
289 void* dataPtr = NULL; 292 void* dataPtr = NULL;
290 293
diff --git a/test/utils/cslUtils.c b/test/utils/cslUtils.c
index dfaf7d2..3bd58f3 100644
--- a/test/utils/cslUtils.c
+++ b/test/utils/cslUtils.c
@@ -86,8 +86,6 @@
86#include <ti/csl/soc.h> 86#include <ti/csl/soc.h>
87#include <ti/csl/csl_chip.h> 87#include <ti/csl/csl_chip.h>
88#include <ti/csl/csl_semAux.h> 88#include <ti/csl/csl_semAux.h>
89#include <ti/csl/csl_cache.h>
90#include <ti/csl/csl_cacheAux.h>
91#include <ti/csl/csl_aif2.h> 89#include <ti/csl/csl_aif2.h>
92#include <ti/csl/csl_aif2HwControlAux.h> 90#include <ti/csl/csl_aif2HwControlAux.h>
93#include <ti/csl/csl_psc.h> 91#include <ti/csl/csl_psc.h>
@@ -96,6 +94,11 @@
96#include <ti/csl/csl_edma3.h> 94#include <ti/csl/csl_edma3.h>
97#include <ti/csl/csl_bootcfgAux.h> 95#include <ti/csl/csl_bootcfgAux.h>
98 96
97#ifdef _TMS320C6X
98#include <ti/csl/csl_cache.h>
99#include <ti/csl/csl_cacheAux.h>
100#endif
101
99#include <ti/drv/aif2/aif2.h> 102#include <ti/drv/aif2/aif2.h>
100#include <ti/drv/aif2/aif2_osal.h> 103#include <ti/drv/aif2/aif2_osal.h>
101#include <ti/drv/aif2/device/aif2_device.h> 104#include <ti/drv/aif2/device/aif2_device.h>
@@ -286,17 +289,17 @@ AIF_enable(
286#ifdef _VIRTUAL_ADDR_SUPPORT 289#ifdef _VIRTUAL_ADDR_SUPPORT
287 Uint32 mem_base_PSC; 290 Uint32 mem_base_PSC;
288 mem_base_PSC = aif2_mmap(CSL_PSC_REGS, 0x10000); 291 mem_base_PSC = aif2_mmap(CSL_PSC_REGS, 0x10000);
289 if (CSL_FEXT(((CSL_PscRegs *) mem_base_PSC)->PDSTAT[CSL_PSC_PD_AI], PSC_PDSTAT_STATE) != PSC_PDSTATE_ON) 292 if (CSL_FEXT(((CSL_PscRegs *) mem_base_PSC)->PDSTAT[CSL_PSC_PD_AIF], PSC_PDSTAT_STATE) != PSC_PDSTATE_ON)
290 { 293 {
291 /* Enable the domain */ 294 /* Enable the domain */
292 CSL_FINST (((CSL_PscRegs *) mem_base_PSC)->PDCTL[CSL_PSC_PD_AI], PSC_PDCTL_NEXT, ON); 295 CSL_FINST (((CSL_PscRegs *) mem_base_PSC)->PDCTL[CSL_PSC_PD_AIF], PSC_PDCTL_NEXT, ON);
293 } 296 }
294 /* Enable MDCTL */ 297 /* Enable MDCTL */
295 CSL_FINS (((CSL_PscRegs *) mem_base_PSC)->MDCTL[CSL_PSC_LPSC_AI], PSC_MDCTL_NEXT, PSC_MODSTATE_ENABLE); 298 CSL_FINS (((CSL_PscRegs *) mem_base_PSC)->MDCTL[CSL_PSC_LPSC_AIF], PSC_MDCTL_NEXT, PSC_MODSTATE_ENABLE);
296 /* Apply the domain */ 299 /* Apply the domain */
297 ((CSL_PscRegs *) mem_base_PSC)->PTCMD = (1 << CSL_PSC_PD_AI); 300 ((CSL_PscRegs *) mem_base_PSC)->PTCMD = (1 << CSL_PSC_PD_AIF);
298 /* Wait for it to finish */ 301 /* Wait for it to finish */
299 while(CSL_FEXTR (((CSL_PscRegs *) mem_base_PSC)->PTSTAT, CSL_PSC_PD_AI, CSL_PSC_PD_AI) == 1); 302 while(CSL_FEXTR (((CSL_PscRegs *) mem_base_PSC)->PTSTAT, CSL_PSC_PD_AIF, CSL_PSC_PD_AIF) == 1);
300 munmap((void *) mem_base_PSC, 0x10000); 303 munmap((void *) mem_base_PSC, 0x10000);
301#else 304#else
302 if (CSL_PSC_getModuleState (CSL_PSC_LPSC_AI) != PSC_MODSTATE_ENABLE) { 305 if (CSL_PSC_getModuleState (CSL_PSC_LPSC_AI) != PSC_MODSTATE_ENABLE) {
@@ -334,11 +337,11 @@ AIF_disable(
334 Uint32 mem_base_PSC; 337 Uint32 mem_base_PSC;
335 mem_base_PSC = aif2_mmap(CSL_PSC_REGS, 0x10000); 338 mem_base_PSC = aif2_mmap(CSL_PSC_REGS, 0x10000);
336 /* Power Off */ 339 /* Power Off */
337 CSL_FINST (((CSL_PscRegs *) mem_base_PSC)->PDCTL[CSL_PSC_PD_AI], PSC_PDCTL_NEXT, OFF); 340 CSL_FINST (((CSL_PscRegs *) mem_base_PSC)->PDCTL[CSL_PSC_PD_AIF], PSC_PDCTL_NEXT, OFF);
338 /* Apply the domain */ 341 /* Apply the domain */
339 ((CSL_PscRegs *) mem_base_PSC)->PTCMD = (1 << CSL_PSC_PD_AI); 342 ((CSL_PscRegs *) mem_base_PSC)->PTCMD = (1 << CSL_PSC_PD_AIF);
340 /* Wait for it to finish */ 343 /* Wait for it to finish */
341 while(CSL_FEXTR (((CSL_PscRegs *) mem_base_PSC)->PTSTAT, CSL_PSC_PD_AI, CSL_PSC_PD_AI) == 1); 344 while(CSL_FEXTR (((CSL_PscRegs *) mem_base_PSC)->PTSTAT, CSL_PSC_PD_AIF, CSL_PSC_PD_AIF) == 1);
342 munmap((void *) mem_base_PSC, 0x10000); 345 munmap((void *) mem_base_PSC, 0x10000);
343#else 346#else
344 //Wait for any previous transitions to complete 347 //Wait for any previous transitions to complete
@@ -357,9 +360,9 @@ void AIF_pscDisableResetIso(
357{ 360{
358#ifdef _VIRTUAL_ADDR_SUPPORT 361#ifdef _VIRTUAL_ADDR_SUPPORT
359 Uint32 mem_base_PSC; 362 Uint32 mem_base_PSC;
360 mem_base_PSC = iqn2_mmap(CSL_PSC_REGS, 0x10000); 363 mem_base_PSC = aif2_mmap(CSL_PSC_REGS, 0x10000);
361 /* Disable MDCTL */ 364 /* Disable MDCTL */
362 CSL_FINST (((CSL_PscRegs *) mem_base_PSC)->MDCTL[CSL_PSC_LPSC_AI], PSC_MDCTL_RSTISO, DISABLE); 365 CSL_FINST (((CSL_PscRegs *) mem_base_PSC)->MDCTL[CSL_PSC_LPSC_AIF], PSC_MDCTL_RSTISO, DISABLE);
363 munmap((void *) mem_base_PSC, 0x10000); 366 munmap((void *) mem_base_PSC, 0x10000);
364#else 367#else
365 /* Disable reset isolation */ 368 /* Disable reset isolation */
diff --git a/test/utils/cslUtils.h b/test/utils/cslUtils.h
index 23e45c4..272b19d 100644
--- a/test/utils/cslUtils.h
+++ b/test/utils/cslUtils.h
@@ -43,8 +43,10 @@
43#include <ti/csl/csl_aif2.h> 43#include <ti/csl/csl_aif2.h>
44#include <ti/csl/csl_edma3.h> 44#include <ti/csl/csl_edma3.h>
45#include <ti/csl/csl_edma3Aux.h> 45#include <ti/csl/csl_edma3Aux.h>
46#ifdef _TMS320C6X
46#include <ti/csl/csl_cache.h> 47#include <ti/csl/csl_cache.h>
47#include <ti/csl/csl_cacheAux.h> 48#include <ti/csl/csl_cacheAux.h>
49#endif
48#include <ti/csl/src/intc/csl_intc.h> 50#include <ti/csl/src/intc/csl_intc.h>
49#include <ti/csl/csl_cpIntc.h> 51#include <ti/csl/csl_cpIntc.h>
50#include <ti/csl/csl_gpio.h> 52#include <ti/csl/csl_gpio.h>