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authorAravind Batni2015-10-16 11:28:08 -0500
committerAravind Batni2015-10-16 11:28:08 -0500
commitada95caf477f5efaff72bf1c268fa047ee2c13b0 (patch)
tree9c064294589b0ad6564889e615c6603a3199d968
parent1e4fb956de47a1341ba6455aa102764086b01c04 (diff)
downloadcppi-lld-ada95caf477f5efaff72bf1c268fa047ee2c13b0.tar.gz
cppi-lld-ada95caf477f5efaff72bf1c268fa047ee2c13b0.tar.xz
cppi-lld-ada95caf477f5efaff72bf1c268fa047ee2c13b0.zip
ccs project files for c6678 and c6657 added
-rw-r--r--.gitignore3
-rw-r--r--example/sample/c6657/c66/bios/cppi_evmc6657_c66BiosExampleProject.txt2
-rw-r--r--example/sample/c6657/c66/bios/sample.cfg74
-rw-r--r--example/sample/c6657/c66/bios/sample.cmd9
-rw-r--r--example/sample/c6657/c66/bios/sample_osal.c804
-rw-r--r--example/sample/c6678/c66/bios/cppi_evmc6678_c66BiosExampleProject.txt2
-rw-r--r--example/sample/c6678/c66/bios/sample.cfg74
-rw-r--r--example/sample/c6678/c66/bios/sample.cmd9
-rw-r--r--example/sample/c6678/c66/bios/sample_osal.c804
-rw-r--r--test/c6657/c66/bios/cppi_evmc6657_C66BiosTestProject.txt2
-rw-r--r--test/c6657/c66/bios/cppi_linker.cmd9
-rw-r--r--test/c6657/c66/bios/cppi_test.cfg80
-rw-r--r--test/c6657/c66/bios/test_osal.c561
-rw-r--r--test/c6678/c66/bios/cppi_evmc6678_C66BiosTestProject.txt2
-rw-r--r--test/c6678/c66/bios/cppi_linker.cmd9
-rw-r--r--test/c6678/c66/bios/cppi_test.cfg80
-rw-r--r--test/c6678/c66/bios/test_osal.c561
17 files changed, 3084 insertions, 1 deletions
diff --git a/.gitignore b/.gitignore
index 6e9db14..b9f9d46 100644
--- a/.gitignore
+++ b/.gitignore
@@ -22,5 +22,6 @@ package.mak
22package/ 22package/
23packages/ 23packages/
24analysis/ 24analysis/
25test/*/*/bios 25test/*/*/bios/src
26example/*/*/bios/src
26 27
diff --git a/example/sample/c6657/c66/bios/cppi_evmc6657_c66BiosExampleProject.txt b/example/sample/c6657/c66/bios/cppi_evmc6657_c66BiosExampleProject.txt
new file mode 100644
index 0000000..06416ee
--- /dev/null
+++ b/example/sample/c6657/c66/bios/cppi_evmc6657_c66BiosExampleProject.txt
@@ -0,0 +1,2 @@
1-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/example/sample/src/sample.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/device/c6657/src/cppi_device.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/device/c6657/src/qmss_device.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/c6657/global-resource-list.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/c6657/policy_dsp-only.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/test/rm_transport_setup.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/example/sample/c6657/c66/bios/sample_osal.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/example/sample/c6657/c66/bios/sample.cmd" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/example/sample/c6657/c66/bios/sample.cfg" -ccs.setCompilerOptions "-mv64+ -g -DSOC_C6657 -DINTERNAL_LINKING_RAM -UL2_CACHE --diag_warning=225 -I${PDK_INSTALL_PATH}/ti/drv/cppi/example/sample/src" -rtsc.enableRtsc
2
diff --git a/example/sample/c6657/c66/bios/sample.cfg b/example/sample/c6657/c66/bios/sample.cfg
new file mode 100644
index 0000000..757cadc
--- /dev/null
+++ b/example/sample/c6657/c66/bios/sample.cfg
@@ -0,0 +1,74 @@
1/* XDC runtime packages */
2var System = xdc.useModule('xdc.runtime.System');
3var SysStd = xdc.useModule('xdc.runtime.SysStd');
4System.SupportProxy = SysStd;
5var Memory = xdc.useModule('xdc.runtime.Memory');
6var Log = xdc.useModule('xdc.runtime.Log');
7var Diags = xdc.useModule('xdc.runtime.Diags');
8
9/* Load and use the CSL, CPPI and QMSS packages */
10var devType = "c6657"
11var Csl = xdc.useModule('ti.csl.Settings');
12Csl.deviceType = devType;
13
14/* Load the CPPI package */
15var Cppi = xdc.loadPackage('ti.drv.cppi');
16
17/* Load the QMSS package */
18var Qmss = xdc.loadPackage('ti.drv.qmss');
19
20/* Load the RM package */
21var Rm = xdc.loadPackage('ti.drv.rm');
22
23/* sysbios packages */
24var BIOS = xdc.useModule('ti.sysbios.BIOS');
25BIOS.heapSize = 0x8000;
26var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
27var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
28var Task = xdc.useModule('ti.sysbios.knl.Task');
29var Idle = xdc.useModule('ti.sysbios.knl.Idle');
30
31/* IPC packages */
32var Settings = xdc.module('ti.sdo.ipc.family.Settings');
33var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
34var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
35var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
36var HeapBufMP = xdc.useModule('ti.sdo.ipc.heaps.HeapBufMP');
37
38Program.sectMap["systemHeap"] = Program.platform.stackMemory;
39
40SharedRegion.translate = false;
41
42var memmap = Program.cpu.memoryMap;
43
44Startup = xdc.useModule('xdc.runtime.Startup');
45Startup.firstFxns.$add('&myStartupFxn');
46
47MultiProc.setConfig(null, ["CORE0", "CORE1", "CORE2", "CORE3"]);
48
49/* Synchronize all processors (this will be done in Ipc_start) */
50Ipc.procSync = Ipc.ProcSync_ALL;
51
52SharedRegion.setEntryMeta(0,
53 { base: 0x0C000000,
54 len: 0x00008000,
55 ownerProcId: 0,
56 isValid: true,
57 name: "sharemem",
58 createHeap: true
59 });
60
61/* Place user sections */
62/*
63Program.sectMap["systemHeap"] = Program.platform.stackMemory;
64Program.sectMap["task0Heap"] = Program.platform.dataMemory;
65Program.sectMap["task1Heap"] = Program.platform.dataMemory;
66Program.sectMap["task0Stack"] = Program.platform.stackMemory;
67*/
68
69/* Add idle function */
70/*Idle.addFunc('&idl0Fxn');*/
71/*
72 * @(#) ti.sysbios.genx; 2, 0, 0, 0,275; 4-29-2009 15:45:06; /db/vtree/library/trees/avala/avala-k25x/src/
73 */
74
diff --git a/example/sample/c6657/c66/bios/sample.cmd b/example/sample/c6657/c66/bios/sample.cmd
new file mode 100644
index 0000000..9bd3904
--- /dev/null
+++ b/example/sample/c6657/c66/bios/sample.cmd
@@ -0,0 +1,9 @@
1SECTIONS
2{
3 .init_array: load >> L2SRAM
4 .sharedGRL: load >> L2SRAM
5 .sharedPolicy: load >> L2SRAM
6 .qmss: load >> MSMCSRAM
7 .cppi: load >> MSMCSRAM
8 .rm: load >> MSMCSRAM
9}
diff --git a/example/sample/c6657/c66/bios/sample_osal.c b/example/sample/c6657/c66/bios/sample_osal.c
new file mode 100644
index 0000000..652ebb2
--- /dev/null
+++ b/example/sample/c6657/c66/bios/sample_osal.c
@@ -0,0 +1,804 @@
1/**
2 * @file sample_osal.c
3 *
4 * @brief
5 * This is the OS abstraction layer and is used by the CPPI and QMSS
6 * low level drivers for the CPPI sample example.
7 *
8 * \par
9 * ============================================================================
10 * @n (C) Copyright 2009-2014, Texas Instruments, Inc.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 *
19 * Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the
22 * distribution.
23 *
24 * Neither the name of Texas Instruments Incorporated nor the names of
25 * its contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \par
41*/
42#include <stdarg.h>
43
44/* XDC includes */
45#include <xdc/std.h>
46#include <xdc/runtime/IHeap.h>
47#include <xdc/runtime/System.h>
48#include <xdc/runtime/Memory.h>
49#include <xdc/runtime/Error.h>
50#include <xdc/cfg/global.h>
51
52/* sysbios includes */
53#include <ti/sysbios/BIOS.h>
54#include <ti/sysbios/knl/Task.h>
55#include <ti/sysbios/hal/Hwi.h>
56#include <ti/sysbios/knl/Semaphore.h>
57
58/* IPC includes */
59#include <ti/ipc/GateMP.h>
60#include <ti/ipc/Ipc.h>
61#include <ti/ipc/ListMP.h>
62#include <ti/ipc/SharedRegion.h>
63
64/* CSL Semaphore module includes */
65#include <ti/csl/csl_semAux.h>
66/* CSL Cache module includes */
67#include <ti/csl/csl_cacheAux.h>
68/* CSL XMC module includes */
69#include <ti/csl/csl_xmcAux.h>
70
71/**********************************************************************
72 ****************************** Defines *******************************
73 **********************************************************************/
74#define CPPI_HW_SEM 1
75#define QMSS_HW_SEM 2
76
77/**********************************************************************
78 ************************** Global Variables **************************
79 **********************************************************************/
80uint32_t qmssMallocCounter = 0;
81uint32_t qmssFreeCounter = 0;
82uint32_t cppiMallocCounter = 0;
83uint32_t cppiFreeCounter = 0;
84uint32_t rmMallocCounter = 0;
85uint32_t rmFreeCounter = 0;
86
87/**********************************************************************
88 **************************** OSAL Functions **************************
89 **********************************************************************/
90
91/**
92 * @b Description
93 * @n
94 * The function is used to allocate a memory block of the specified size.
95 *
96 * Note: If the LLD is used by applications on multiple core, the "cppiHeap"
97 * should be in shared memory
98 *
99 * @param[in] num_bytes
100 * Number of bytes to be allocated.
101 *
102 * @retval
103 * Allocated block address
104 */
105void* Osal_cppiMalloc (uint32_t num_bytes)
106{
107 Error_Block errorBlock;
108 void *buf;
109
110 /* Increment the allocation counter. */
111 cppiMallocCounter++;
112
113 /* Allocate a buffer from the default HeapMemMp */
114 buf = Memory_alloc (SharedRegion_getHeap(0),
115 num_bytes, 0, &errorBlock);
116// System_printf ("Malloc address : %p\n", buf);
117 return buf;
118}
119
120/**
121 * @b Description
122 * @n
123 * The function is used to free a memory block of the specified size allocated
124 * using Osal_cppiMalloc() API.
125 *
126 * @param[in] ptr
127 * Pointer to the memory block to be cleaned up.
128 *
129 * @param[in] size
130 * Size of the memory block to be cleaned up.
131 *
132 * @retval
133 * Not Applicable
134 */
135void Osal_cppiFree (void *ptr, uint32_t size)
136{
137 /* Increment the free counter. */
138 cppiFreeCounter++;
139// System_printf ("Free address : %p\n", ptr);
140 /* Free buffer to default HeapMemMp */
141 Memory_free (SharedRegion_getHeap(0), ptr, size);
142
143 return;
144}
145
146/**
147 * @b Description
148 * @n
149 * The function is used to enter a critical section.
150 * Function protects against
151 *
152 * access from multiple cores
153 * and
154 * access from multiple threads on single core
155 *
156 * @retval
157 * Handle used to lock critical section
158 */
159void* Osal_cppiCsEnter (void)
160{
161 /* Get the hardware semaphore for protection against multiple core access */
162 while ((CSL_semAcquireDirect (CPPI_HW_SEM)) == 0);
163
164 /* Create Semaphore for protection against access from multiple threads
165 * Not created here becasue application is not multithreaded
166 * */
167 return NULL;
168}
169
170/**
171 * @b Description
172 * @n
173 * The function is used to exit a critical section
174 * protected using Osal_cppiCsEnter() API.
175 *
176 * @param[in] CsHandle
177 * Handle for unlocking critical section.
178 *
179 * @retval
180 * Not Applicable
181 */
182void Osal_cppiCsExit (void *CsHandle)
183{
184 /* Release Semaphore using handle */
185
186 /* Release the hardware semaphore */
187 CSL_semReleaseSemaphore (CPPI_HW_SEM);
188
189 return;
190}
191
192/**
193 * @b Description
194 * @n
195 * The function is the CPPI OSAL Logging API which logs
196 * the messages on the console.
197 *
198 * @param[in] fmt
199 * Formatted String.
200 *
201 * @retval
202 * Not Applicable
203 */
204void Osal_cppiLog ( char *fmt, ... )
205{
206}
207
208/**
209 * @b Description
210 * @n
211 * The function is used to indicate that a block of memory is
212 * about to be accessed. If the memory block is cached then this
213 * indicates that the application would need to ensure that the
214 * cache is updated with the data from the actual memory.
215 *
216 * @param[in] ptr
217 * Address of memory block
218 *
219 * @param[in] size
220 * Size of memory block
221 *
222 * @retval
223 * Not Applicable
224 */
225void Osal_cppiBeginMemAccess (void *ptr, uint32_t size)
226{
227 uint32_t key;
228
229 /* Disable Interrupts */
230 key = Hwi_disable();
231
232 /* Cleanup the prefetch buffer also. */
233 CSL_XMC_invalidatePrefetchBuffer();
234
235#ifdef L2_CACHE
236 /* Invalidate L2 cache. This should invalidate L1D as well.
237 * Wait until operation is complete. */
238 CACHE_invL2 (ptr, size, CACHE_FENCE_WAIT);
239#else
240 /* Invalidate L1D cache and wait until operation is complete.
241 * Use this approach if L2 cache is not enabled */
242 CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT);
243#endif
244
245 /* Reenable Interrupts. */
246 Hwi_restore(key);
247
248 return;
249}
250
251/**
252 * @b Description
253 * @n
254 * The function is used to indicate that the block of memory has
255 * finished being accessed. If the memory block is cached then the
256 * application would need to ensure that the contents of the cache
257 * are updated immediately to the actual memory.
258 *
259 * @param[in] ptr
260 * Address of memory block
261 *
262 * @param[in] size
263 * Size of memory block
264 *
265 * @retval
266 * Not Applicable
267 */
268void Osal_cppiEndMemAccess (void *ptr, uint32_t size)
269{
270 uint32_t key;
271
272 /* Disable Interrupts */
273 key = Hwi_disable();
274
275#ifdef L2_CACHE
276 /* Writeback L2 cache. This should Writeback L1D as well.
277 * Wait until operation is complete. */
278 CACHE_wbL2 (ptr, size, CACHE_FENCE_WAIT);
279
280#else
281 /* Writeback L1D cache and wait until operation is complete.
282 * Use this approach if L2 cache is not enabled */
283 CACHE_wbL1d (ptr, size, CACHE_FENCE_WAIT);
284#endif
285
286 /* Reenable Interrupts. */
287 Hwi_restore(key);
288 return;
289}
290
291/**
292 * @b Description
293 * @n
294 * The function is used to allocate a memory block of the specified size.
295 *
296 * @param[in] num_bytes
297 * Number of bytes to be allocated.
298 *
299 * @retval
300 * Allocated block address
301 */
302void* Osal_qmssMalloc (uint32_t num_bytes)
303{
304 Error_Block errorBlock;
305
306 /* Increment the allocation counter. */
307 qmssMallocCounter++;
308
309 /* Allocate memory. */
310 return Memory_alloc(NULL, num_bytes, 0, &errorBlock);
311}
312
313/**
314 * @b Description
315 * @n
316 * The function is used to free a memory block of the specified size.
317 *
318 * @param[in] ptr
319 * Pointer to the memory block to be cleaned up.
320 *
321 * @param[in] size
322 * Size of the memory block to be cleaned up.
323 *
324 * @retval
325 * Not Applicable
326 */
327void Osal_qmssFree (void *ptr, uint32_t size)
328{
329 /* Increment the free counter. */
330 qmssFreeCounter++;
331 Memory_free(NULL, ptr, size);
332}
333
334/**
335 * @b Description
336 * @n
337 * The function is used to enter a critical section.
338 * Function protects against
339 *
340 * access from multiple cores
341 * and
342 * access from multiple threads on single core
343 *
344 * @retval
345 * Handle used to lock critical section
346 */
347void* Osal_qmssCsEnter (void)
348{
349 /* Get the hardware semaphore for protection against multiple core access */
350 while ((CSL_semAcquireDirect (QMSS_HW_SEM)) == 0);
351
352 /* Create Semaphore for protection against access from multiple threads
353 * Not created here becasue application is not multithreaded
354 * */
355 return NULL;
356}
357
358/**
359 * @b Description
360 * @n
361 * The function is used to exit a critical section
362 * protected using Osal_qmssCsEnter() API.
363 *
364 * @param[in] CsHandle
365 * Handle for unlocking critical section.
366 *
367 * @retval
368 * Not Applicable
369 */
370void Osal_qmssCsExit (void *CsHandle)
371{
372 /* Release Semaphore using handle */
373
374 /* Release the hardware semaphore */
375 CSL_semReleaseSemaphore (QMSS_HW_SEM);
376
377 return;
378}
379
380/**
381 * @b Description
382 * @n
383 * The function is used to enter a critical section.
384 * Function protects against
385 *
386 * access from multiple cores
387 * and
388 * access from multiple threads on single core
389 *
390 * @retval
391 * Handle used to lock critical section
392 */
393void* Osal_qmssAccCsEnter (void)
394{
395 /* This is a suboptimal implementation for this OSAL, please refer to
396 * QMSS examples for optimal implementation of this function
397 */
398 return (Osal_qmssCsEnter());
399}
400
401/**
402 * @b Description
403 * @n
404 * The function is used to exit a critical section
405 * protected using Osal_qmssAccCsEnter() API.
406 *
407 * @param[in] CsHandle
408 * Handle for unlocking critical section.
409 *
410 * @retval
411 * Not Applicable
412 */
413void Osal_qmssAccCsExit (void *CsHandle)
414{
415 /* This is a suboptimal implementation for this OSAL, please refer to
416 * QMSS examples for optimal implementation of this function
417 */
418
419 Osal_qmssCsExit(CsHandle);
420 return;
421}
422
423/**
424 * @b Description
425 * @n
426 * The function is used to enter a critical section.
427 * Function protects against
428 * access from multiple threads on single core
429 *
430 * @retval
431 * Handle used to lock critical section
432 */
433void* Osal_qmssMtCsEnter (void)
434{
435 /* Create Semaphore for protection against access from multiple threads
436 * Not created here becasue application is not multithreaded
437 * */
438
439 return NULL;
440}
441
442/**
443 * @b Description
444 * @n
445 * The function is used to exit a critical section
446 * protected using Osal_qmssMtCsEnter() API.
447 *
448 * @param[in] CsHandle
449 * Handle to unlock critical section.
450 *
451 * @retval
452 * Not Applicable
453 */
454void Osal_qmssMtCsExit (void *CsHandle)
455{
456 /* Release Semaphore using handle */
457
458 return;
459}
460
461/**
462 * @b Description
463 * @n
464 * The function is the QMSS OSAL Logging API which logs
465 * the messages on the console.
466 *
467 * @param[in] fmt
468 * Formatted String.
469 *
470 * @retval
471 * Not Applicable
472 */
473void Osal_qmssLog ( char *fmt, ... )
474{
475}
476
477/**
478 * @b Description
479 * @n
480 * The function is used to indicate that a block of memory is
481 * about to be accessed. If the memory block is cached then this
482 * indicates that the application would need to ensure that the
483 * cache is updated with the data from the actual memory.
484 *
485 * @param[in] ptr
486 * Address of memory block
487 *
488 * @param[in] size
489 * Size of memory block
490 *
491 * @retval
492 * Not Applicable
493 */
494void Osal_qmssBeginMemAccess (void *ptr, uint32_t size)
495{
496 uint32_t key;
497
498 /* Disable Interrupts */
499 key = Hwi_disable();
500
501 /* Cleanup the prefetch buffer also. */
502 CSL_XMC_invalidatePrefetchBuffer();
503
504#ifdef L2_CACHE
505 /* Invalidate L2 cache. This should invalidate L1D as well.
506 * Wait until operation is complete. */
507 CACHE_invL2 (ptr, size, CACHE_FENCE_WAIT);
508#else
509 /* Invalidate L1D cache and wait until operation is complete.
510 * Use this approach if L2 cache is not enabled */
511 CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT);
512#endif
513
514 /* Reenable Interrupts. */
515 Hwi_restore(key);
516
517 return;
518}
519
520/**
521 * @b Description
522 * @n
523 * The function is used to indicate that the block of memory has
524 * finished being accessed. If the memory block is cached then the
525 * application would need to ensure that the contents of the cache
526 * are updated immediately to the actual memory.
527 *
528 * @param[in] ptr
529 * Address of memory block
530 *
531 * @param[in] size
532 * Size of memory block
533 *
534 * @retval
535 * Not Applicable
536 */
537void Osal_qmssEndMemAccess (void *ptr, uint32_t size)
538{
539 uint32_t key;
540
541 /* Disable Interrupts */
542 key = Hwi_disable();
543
544#ifdef L2_CACHE
545 /* Writeback L2 cache. This should Writeback L1D as well.
546 * Wait until operation is complete. */
547 CACHE_wbL2 (ptr, size, CACHE_FENCE_WAIT);
548
549#else
550 /* Writeback L1D cache and wait until operation is complete.
551 * Use this approach if L2 cache is not enabled */
552 CACHE_wbL1d (ptr, size, CACHE_FENCE_WAIT);
553#endif
554
555 /* Reenable Interrupts. */
556 Hwi_restore(key);
557 return;
558}
559
560/**
561 * @b Description
562 * @n
563 * The function is used to allocate a memory block of the specified size.
564 *
565 * @param[in] num_bytes
566 * Number of bytes to be allocated.
567 *
568 * @retval
569 * Allocated block address
570 */
571void *Osal_rmMalloc (uint32_t num_bytes)
572{
573 Error_Block errorBlock;
574
575 /* Increment the allocation counter. */
576 rmMallocCounter++;
577
578 /* Allocate memory. */
579 return Memory_alloc(NULL, num_bytes, 0, &errorBlock);
580}
581
582/**
583 * @b Description
584 * @n
585 * The function is used to free a memory block of the specified size.
586 *
587 * @param[in] ptr
588 * Pointer to the memory block to be cleaned up.
589 *
590 * @param[in] size
591 * Size of the memory block to be cleaned up.
592 *
593 * @retval
594 * Not Applicable
595 */
596void Osal_rmFree (void *ptr, uint32_t size)
597{
598 /* Increment the free counter. */
599 rmFreeCounter++;
600 Memory_free(NULL, ptr, size);
601}
602
603/* FUNCTION PURPOSE: Critical section enter
604 ***********************************************************************
605 * DESCRIPTION: The function is used to enter a critical section.
606 * Function protects against
607 *
608 * access from multiple cores
609 * and
610 * access from multiple threads on single core
611 */
612void *Osal_rmCsEnter(void)
613{
614
615 return NULL;
616}
617
618/* FUNCTION PURPOSE: Critical section exit
619 ***********************************************************************
620 * DESCRIPTION: The function is used to exit a critical section
621 * protected using Osal_cppiCsEnter() API.
622 */
623void Osal_rmCsExit(void *CsHandle)
624{
625
626}
627
628/* FUNCTION PURPOSE: Multi-threaded critical section enter
629***********************************************************************
630* DESCRIPTION: The function is used to enter a multi-threaded critical
631* section. Function protects against
632*
633* access from multiple threads on single core
634*/
635void *Osal_rmMtCsEnter(void *mtSemObj)
636{
637
638 return NULL;
639}
640
641/* FUNCTION PURPOSE: Multi-threaded critical section exit
642***********************************************************************
643* DESCRIPTION: The function is used to exit a multi-threaded critical
644* section protected using Osal_rmMtCsEnter() API.
645*/
646void Osal_rmMtCsExit(void *mtSemObj, void *CsHandle)
647{
648
649}
650
651/* FUNCTION PURPOSE: Critical section exit
652 ***********************************************************************
653 * DESCRIPTION: The function is used to indicate that a block of memory is
654 * about to be accessed. If the memory block is cached then this
655 * indicates that the application would need to ensure that the
656 * cache is updated with the data from the actual memory.
657 */
658void Osal_rmBeginMemAccess(void *ptr, uint32_t size)
659{
660 uint32_t key;
661
662 /* Disable Interrupts */
663 key = Hwi_disable();
664
665 /* Cleanup the prefetch buffer also. */
666 CSL_XMC_invalidatePrefetchBuffer();
667
668#ifdef L2_CACHE
669 /* Invalidate L2 cache. This should invalidate L1D as well.
670 * Wait until operation is complete. */
671 CACHE_invL2 (ptr, size, CACHE_FENCE_WAIT);
672#else
673 /* Invalidate L1D cache and wait until operation is complete.
674 * Use this approach if L2 cache is not enabled */
675 CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT);
676#endif
677
678 /* Reenable Interrupts. */
679 Hwi_restore(key);
680
681 return;
682}
683
684/* FUNCTION PURPOSE: Critical section exit
685 ***********************************************************************
686 * DESCRIPTION: The function is used to indicate that the block of memory has
687 * finished being accessed. If the memory block is cached then the
688 * application would need to ensure that the contents of the cache
689 * are updated immediately to the actual memory.
690 */
691void Osal_rmEndMemAccess(void *ptr, uint32_t size)
692{
693 uint32_t key;
694
695 /* Disable Interrupts */
696 key = Hwi_disable();
697
698#ifdef L2_CACHE
699 /* Writeback L2 cache. This should Writeback L1D as well.
700 * Wait until operation is complete. */
701 CACHE_wbL2 (ptr, size, CACHE_FENCE_WAIT);
702
703#else
704 /* Writeback L1D cache and wait until operation is complete.
705 * Use this approach if L2 cache is not enabled */
706 CACHE_wbL1d (ptr, size, CACHE_FENCE_WAIT);
707#endif
708
709 /* Reenable Interrupts. */
710 Hwi_restore(key);
711
712 return;
713}
714
715/**
716 * @b Description
717 * @n
718 * The function is used to create a task blocking object
719 * capable of blocking the task a RM instance is running
720 * within
721 *
722 * @retval
723 * Allocated task blocking object
724 */
725void *Osal_rmTaskBlockCreate(void)
726{
727 Semaphore_Params semParams;
728
729 Semaphore_Params_init(&semParams);
730 return((void *)Semaphore_create(0, &semParams, NULL));
731}
732
733/**
734 * @b Description
735 * @n
736 * The function is used to block a task whose context a
737 * RM instance is running within.
738 *
739 * @param[in] handle
740 * Task blocking object handle.
741 *
742 * @retval
743 * Not Applicable
744 */
745void Osal_rmTaskBlock(void *handle)
746{
747 Semaphore_pend((Semaphore_Handle)handle, BIOS_WAIT_FOREVER);
748}
749
750/**
751 * @b Description
752 * @n
753 * The function is used to unblock a task whose context a
754 * RM instance is running within.
755 *
756 * @param[in] handle
757 * Task blocking object handle.
758 *
759 * @retval
760 * Not Applicable
761 */
762void Osal_rmTaskUnblock(void *handle)
763{
764 Semaphore_post((Semaphore_Handle)handle);
765}
766
767/**
768 * @b Description
769 * @n
770 * The function is used to delete a task blocking object
771 * provided to a RM instance
772 *
773 * @param[in] handle
774 * Task blocking object handle.
775 *
776 * @retval
777 * Not Applicable
778 */
779void Osal_rmTaskBlockDelete(void *handle)
780{
781 Semaphore_delete((Semaphore_Handle *)&handle);
782}
783
784/**
785 * @b Description
786 * @n
787 * The function is the RM OSAL Logging API which logs
788 * the messages on the console.
789 *
790 * @param[in] fmt
791 * Formatted String.
792 *
793 * @retval
794 * Not Applicable
795 */
796void Osal_rmLog (char *fmt, ... )
797{
798 VaList ap;
799
800 va_start(ap, fmt);
801 System_vprintf(fmt, ap);
802 va_end(ap);
803}
804
diff --git a/example/sample/c6678/c66/bios/cppi_evmc6678_c66BiosExampleProject.txt b/example/sample/c6678/c66/bios/cppi_evmc6678_c66BiosExampleProject.txt
new file mode 100644
index 0000000..413d41d
--- /dev/null
+++ b/example/sample/c6678/c66/bios/cppi_evmc6678_c66BiosExampleProject.txt
@@ -0,0 +1,2 @@
1-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/example/sample/src/sample.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/device/c6678/src/cppi_device.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/device/c6678/src/qmss_device.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/c6678/global-resource-list.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/c6678/policy_dsp-only.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/test/rm_transport_setup.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/example/sample/c6678/c66/bios/sample_osal.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/example/sample/c6678/c66/bios/sample.cmd" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/example/sample/c6678/c66/bios/sample.cfg" -ccs.setCompilerOptions "-mv64+ -g -DSOC_C6678 -DINTERNAL_LINKING_RAM -UL2_CACHE --diag_warning=225 -I${PDK_INSTALL_PATH}/ti/drv/cppi/example/sample/src" -rtsc.enableRtsc
2
diff --git a/example/sample/c6678/c66/bios/sample.cfg b/example/sample/c6678/c66/bios/sample.cfg
new file mode 100644
index 0000000..5c54834
--- /dev/null
+++ b/example/sample/c6678/c66/bios/sample.cfg
@@ -0,0 +1,74 @@
1/* XDC runtime packages */
2var System = xdc.useModule('xdc.runtime.System');
3var SysStd = xdc.useModule('xdc.runtime.SysStd');
4System.SupportProxy = SysStd;
5var Memory = xdc.useModule('xdc.runtime.Memory');
6var Log = xdc.useModule('xdc.runtime.Log');
7var Diags = xdc.useModule('xdc.runtime.Diags');
8
9/* Load and use the CSL, CPPI and QMSS packages */
10var devType = "c6678"
11var Csl = xdc.useModule('ti.csl.Settings');
12Csl.deviceType = devType;
13
14/* Load the CPPI package */
15var Cppi = xdc.loadPackage('ti.drv.cppi');
16
17/* Load the QMSS package */
18var Qmss = xdc.loadPackage('ti.drv.qmss');
19
20/* Load the RM package */
21var Rm = xdc.loadPackage('ti.drv.rm');
22
23/* sysbios packages */
24var BIOS = xdc.useModule('ti.sysbios.BIOS');
25BIOS.heapSize = 0x8000;
26var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
27var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
28var Task = xdc.useModule('ti.sysbios.knl.Task');
29var Idle = xdc.useModule('ti.sysbios.knl.Idle');
30
31/* IPC packages */
32var Settings = xdc.module('ti.sdo.ipc.family.Settings');
33var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
34var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
35var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
36var HeapBufMP = xdc.useModule('ti.sdo.ipc.heaps.HeapBufMP');
37
38Program.sectMap["systemHeap"] = Program.platform.stackMemory;
39
40SharedRegion.translate = false;
41
42var memmap = Program.cpu.memoryMap;
43
44Startup = xdc.useModule('xdc.runtime.Startup');
45Startup.firstFxns.$add('&myStartupFxn');
46
47MultiProc.setConfig(null, ["CORE0", "CORE1", "CORE2", "CORE3"]);
48
49/* Synchronize all processors (this will be done in Ipc_start) */
50Ipc.procSync = Ipc.ProcSync_ALL;
51
52SharedRegion.setEntryMeta(0,
53 { base: 0x0C000000,
54 len: 0x00008000,
55 ownerProcId: 0,
56 isValid: true,
57 name: "sharemem",
58 createHeap: true
59 });
60
61/* Place user sections */
62/*
63Program.sectMap["systemHeap"] = Program.platform.stackMemory;
64Program.sectMap["task0Heap"] = Program.platform.dataMemory;
65Program.sectMap["task1Heap"] = Program.platform.dataMemory;
66Program.sectMap["task0Stack"] = Program.platform.stackMemory;
67*/
68
69/* Add idle function */
70/*Idle.addFunc('&idl0Fxn');*/
71/*
72 * @(#) ti.sysbios.genx; 2, 0, 0, 0,275; 4-29-2009 15:45:06; /db/vtree/library/trees/avala/avala-k25x/src/
73 */
74
diff --git a/example/sample/c6678/c66/bios/sample.cmd b/example/sample/c6678/c66/bios/sample.cmd
new file mode 100644
index 0000000..9bd3904
--- /dev/null
+++ b/example/sample/c6678/c66/bios/sample.cmd
@@ -0,0 +1,9 @@
1SECTIONS
2{
3 .init_array: load >> L2SRAM
4 .sharedGRL: load >> L2SRAM
5 .sharedPolicy: load >> L2SRAM
6 .qmss: load >> MSMCSRAM
7 .cppi: load >> MSMCSRAM
8 .rm: load >> MSMCSRAM
9}
diff --git a/example/sample/c6678/c66/bios/sample_osal.c b/example/sample/c6678/c66/bios/sample_osal.c
new file mode 100644
index 0000000..652ebb2
--- /dev/null
+++ b/example/sample/c6678/c66/bios/sample_osal.c
@@ -0,0 +1,804 @@
1/**
2 * @file sample_osal.c
3 *
4 * @brief
5 * This is the OS abstraction layer and is used by the CPPI and QMSS
6 * low level drivers for the CPPI sample example.
7 *
8 * \par
9 * ============================================================================
10 * @n (C) Copyright 2009-2014, Texas Instruments, Inc.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 *
19 * Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the
22 * distribution.
23 *
24 * Neither the name of Texas Instruments Incorporated nor the names of
25 * its contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \par
41*/
42#include <stdarg.h>
43
44/* XDC includes */
45#include <xdc/std.h>
46#include <xdc/runtime/IHeap.h>
47#include <xdc/runtime/System.h>
48#include <xdc/runtime/Memory.h>
49#include <xdc/runtime/Error.h>
50#include <xdc/cfg/global.h>
51
52/* sysbios includes */
53#include <ti/sysbios/BIOS.h>
54#include <ti/sysbios/knl/Task.h>
55#include <ti/sysbios/hal/Hwi.h>
56#include <ti/sysbios/knl/Semaphore.h>
57
58/* IPC includes */
59#include <ti/ipc/GateMP.h>
60#include <ti/ipc/Ipc.h>
61#include <ti/ipc/ListMP.h>
62#include <ti/ipc/SharedRegion.h>
63
64/* CSL Semaphore module includes */
65#include <ti/csl/csl_semAux.h>
66/* CSL Cache module includes */
67#include <ti/csl/csl_cacheAux.h>
68/* CSL XMC module includes */
69#include <ti/csl/csl_xmcAux.h>
70
71/**********************************************************************
72 ****************************** Defines *******************************
73 **********************************************************************/
74#define CPPI_HW_SEM 1
75#define QMSS_HW_SEM 2
76
77/**********************************************************************
78 ************************** Global Variables **************************
79 **********************************************************************/
80uint32_t qmssMallocCounter = 0;
81uint32_t qmssFreeCounter = 0;
82uint32_t cppiMallocCounter = 0;
83uint32_t cppiFreeCounter = 0;
84uint32_t rmMallocCounter = 0;
85uint32_t rmFreeCounter = 0;
86
87/**********************************************************************
88 **************************** OSAL Functions **************************
89 **********************************************************************/
90
91/**
92 * @b Description
93 * @n
94 * The function is used to allocate a memory block of the specified size.
95 *
96 * Note: If the LLD is used by applications on multiple core, the "cppiHeap"
97 * should be in shared memory
98 *
99 * @param[in] num_bytes
100 * Number of bytes to be allocated.
101 *
102 * @retval
103 * Allocated block address
104 */
105void* Osal_cppiMalloc (uint32_t num_bytes)
106{
107 Error_Block errorBlock;
108 void *buf;
109
110 /* Increment the allocation counter. */
111 cppiMallocCounter++;
112
113 /* Allocate a buffer from the default HeapMemMp */
114 buf = Memory_alloc (SharedRegion_getHeap(0),
115 num_bytes, 0, &errorBlock);
116// System_printf ("Malloc address : %p\n", buf);
117 return buf;
118}
119
120/**
121 * @b Description
122 * @n
123 * The function is used to free a memory block of the specified size allocated
124 * using Osal_cppiMalloc() API.
125 *
126 * @param[in] ptr
127 * Pointer to the memory block to be cleaned up.
128 *
129 * @param[in] size
130 * Size of the memory block to be cleaned up.
131 *
132 * @retval
133 * Not Applicable
134 */
135void Osal_cppiFree (void *ptr, uint32_t size)
136{
137 /* Increment the free counter. */
138 cppiFreeCounter++;
139// System_printf ("Free address : %p\n", ptr);
140 /* Free buffer to default HeapMemMp */
141 Memory_free (SharedRegion_getHeap(0), ptr, size);
142
143 return;
144}
145
146/**
147 * @b Description
148 * @n
149 * The function is used to enter a critical section.
150 * Function protects against
151 *
152 * access from multiple cores
153 * and
154 * access from multiple threads on single core
155 *
156 * @retval
157 * Handle used to lock critical section
158 */
159void* Osal_cppiCsEnter (void)
160{
161 /* Get the hardware semaphore for protection against multiple core access */
162 while ((CSL_semAcquireDirect (CPPI_HW_SEM)) == 0);
163
164 /* Create Semaphore for protection against access from multiple threads
165 * Not created here becasue application is not multithreaded
166 * */
167 return NULL;
168}
169
170/**
171 * @b Description
172 * @n
173 * The function is used to exit a critical section
174 * protected using Osal_cppiCsEnter() API.
175 *
176 * @param[in] CsHandle
177 * Handle for unlocking critical section.
178 *
179 * @retval
180 * Not Applicable
181 */
182void Osal_cppiCsExit (void *CsHandle)
183{
184 /* Release Semaphore using handle */
185
186 /* Release the hardware semaphore */
187 CSL_semReleaseSemaphore (CPPI_HW_SEM);
188
189 return;
190}
191
192/**
193 * @b Description
194 * @n
195 * The function is the CPPI OSAL Logging API which logs
196 * the messages on the console.
197 *
198 * @param[in] fmt
199 * Formatted String.
200 *
201 * @retval
202 * Not Applicable
203 */
204void Osal_cppiLog ( char *fmt, ... )
205{
206}
207
208/**
209 * @b Description
210 * @n
211 * The function is used to indicate that a block of memory is
212 * about to be accessed. If the memory block is cached then this
213 * indicates that the application would need to ensure that the
214 * cache is updated with the data from the actual memory.
215 *
216 * @param[in] ptr
217 * Address of memory block
218 *
219 * @param[in] size
220 * Size of memory block
221 *
222 * @retval
223 * Not Applicable
224 */
225void Osal_cppiBeginMemAccess (void *ptr, uint32_t size)
226{
227 uint32_t key;
228
229 /* Disable Interrupts */
230 key = Hwi_disable();
231
232 /* Cleanup the prefetch buffer also. */
233 CSL_XMC_invalidatePrefetchBuffer();
234
235#ifdef L2_CACHE
236 /* Invalidate L2 cache. This should invalidate L1D as well.
237 * Wait until operation is complete. */
238 CACHE_invL2 (ptr, size, CACHE_FENCE_WAIT);
239#else
240 /* Invalidate L1D cache and wait until operation is complete.
241 * Use this approach if L2 cache is not enabled */
242 CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT);
243#endif
244
245 /* Reenable Interrupts. */
246 Hwi_restore(key);
247
248 return;
249}
250
251/**
252 * @b Description
253 * @n
254 * The function is used to indicate that the block of memory has
255 * finished being accessed. If the memory block is cached then the
256 * application would need to ensure that the contents of the cache
257 * are updated immediately to the actual memory.
258 *
259 * @param[in] ptr
260 * Address of memory block
261 *
262 * @param[in] size
263 * Size of memory block
264 *
265 * @retval
266 * Not Applicable
267 */
268void Osal_cppiEndMemAccess (void *ptr, uint32_t size)
269{
270 uint32_t key;
271
272 /* Disable Interrupts */
273 key = Hwi_disable();
274
275#ifdef L2_CACHE
276 /* Writeback L2 cache. This should Writeback L1D as well.
277 * Wait until operation is complete. */
278 CACHE_wbL2 (ptr, size, CACHE_FENCE_WAIT);
279
280#else
281 /* Writeback L1D cache and wait until operation is complete.
282 * Use this approach if L2 cache is not enabled */
283 CACHE_wbL1d (ptr, size, CACHE_FENCE_WAIT);
284#endif
285
286 /* Reenable Interrupts. */
287 Hwi_restore(key);
288 return;
289}
290
291/**
292 * @b Description
293 * @n
294 * The function is used to allocate a memory block of the specified size.
295 *
296 * @param[in] num_bytes
297 * Number of bytes to be allocated.
298 *
299 * @retval
300 * Allocated block address
301 */
302void* Osal_qmssMalloc (uint32_t num_bytes)
303{
304 Error_Block errorBlock;
305
306 /* Increment the allocation counter. */
307 qmssMallocCounter++;
308
309 /* Allocate memory. */
310 return Memory_alloc(NULL, num_bytes, 0, &errorBlock);
311}
312
313/**
314 * @b Description
315 * @n
316 * The function is used to free a memory block of the specified size.
317 *
318 * @param[in] ptr
319 * Pointer to the memory block to be cleaned up.
320 *
321 * @param[in] size
322 * Size of the memory block to be cleaned up.
323 *
324 * @retval
325 * Not Applicable
326 */
327void Osal_qmssFree (void *ptr, uint32_t size)
328{
329 /* Increment the free counter. */
330 qmssFreeCounter++;
331 Memory_free(NULL, ptr, size);
332}
333
334/**
335 * @b Description
336 * @n
337 * The function is used to enter a critical section.
338 * Function protects against
339 *
340 * access from multiple cores
341 * and
342 * access from multiple threads on single core
343 *
344 * @retval
345 * Handle used to lock critical section
346 */
347void* Osal_qmssCsEnter (void)
348{
349 /* Get the hardware semaphore for protection against multiple core access */
350 while ((CSL_semAcquireDirect (QMSS_HW_SEM)) == 0);
351
352 /* Create Semaphore for protection against access from multiple threads
353 * Not created here becasue application is not multithreaded
354 * */
355 return NULL;
356}
357
358/**
359 * @b Description
360 * @n
361 * The function is used to exit a critical section
362 * protected using Osal_qmssCsEnter() API.
363 *
364 * @param[in] CsHandle
365 * Handle for unlocking critical section.
366 *
367 * @retval
368 * Not Applicable
369 */
370void Osal_qmssCsExit (void *CsHandle)
371{
372 /* Release Semaphore using handle */
373
374 /* Release the hardware semaphore */
375 CSL_semReleaseSemaphore (QMSS_HW_SEM);
376
377 return;
378}
379
380/**
381 * @b Description
382 * @n
383 * The function is used to enter a critical section.
384 * Function protects against
385 *
386 * access from multiple cores
387 * and
388 * access from multiple threads on single core
389 *
390 * @retval
391 * Handle used to lock critical section
392 */
393void* Osal_qmssAccCsEnter (void)
394{
395 /* This is a suboptimal implementation for this OSAL, please refer to
396 * QMSS examples for optimal implementation of this function
397 */
398 return (Osal_qmssCsEnter());
399}
400
401/**
402 * @b Description
403 * @n
404 * The function is used to exit a critical section
405 * protected using Osal_qmssAccCsEnter() API.
406 *
407 * @param[in] CsHandle
408 * Handle for unlocking critical section.
409 *
410 * @retval
411 * Not Applicable
412 */
413void Osal_qmssAccCsExit (void *CsHandle)
414{
415 /* This is a suboptimal implementation for this OSAL, please refer to
416 * QMSS examples for optimal implementation of this function
417 */
418
419 Osal_qmssCsExit(CsHandle);
420 return;
421}
422
423/**
424 * @b Description
425 * @n
426 * The function is used to enter a critical section.
427 * Function protects against
428 * access from multiple threads on single core
429 *
430 * @retval
431 * Handle used to lock critical section
432 */
433void* Osal_qmssMtCsEnter (void)
434{
435 /* Create Semaphore for protection against access from multiple threads
436 * Not created here becasue application is not multithreaded
437 * */
438
439 return NULL;
440}
441
442/**
443 * @b Description
444 * @n
445 * The function is used to exit a critical section
446 * protected using Osal_qmssMtCsEnter() API.
447 *
448 * @param[in] CsHandle
449 * Handle to unlock critical section.
450 *
451 * @retval
452 * Not Applicable
453 */
454void Osal_qmssMtCsExit (void *CsHandle)
455{
456 /* Release Semaphore using handle */
457
458 return;
459}
460
461/**
462 * @b Description
463 * @n
464 * The function is the QMSS OSAL Logging API which logs
465 * the messages on the console.
466 *
467 * @param[in] fmt
468 * Formatted String.
469 *
470 * @retval
471 * Not Applicable
472 */
473void Osal_qmssLog ( char *fmt, ... )
474{
475}
476
477/**
478 * @b Description
479 * @n
480 * The function is used to indicate that a block of memory is
481 * about to be accessed. If the memory block is cached then this
482 * indicates that the application would need to ensure that the
483 * cache is updated with the data from the actual memory.
484 *
485 * @param[in] ptr
486 * Address of memory block
487 *
488 * @param[in] size
489 * Size of memory block
490 *
491 * @retval
492 * Not Applicable
493 */
494void Osal_qmssBeginMemAccess (void *ptr, uint32_t size)
495{
496 uint32_t key;
497
498 /* Disable Interrupts */
499 key = Hwi_disable();
500
501 /* Cleanup the prefetch buffer also. */
502 CSL_XMC_invalidatePrefetchBuffer();
503
504#ifdef L2_CACHE
505 /* Invalidate L2 cache. This should invalidate L1D as well.
506 * Wait until operation is complete. */
507 CACHE_invL2 (ptr, size, CACHE_FENCE_WAIT);
508#else
509 /* Invalidate L1D cache and wait until operation is complete.
510 * Use this approach if L2 cache is not enabled */
511 CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT);
512#endif
513
514 /* Reenable Interrupts. */
515 Hwi_restore(key);
516
517 return;
518}
519
520/**
521 * @b Description
522 * @n
523 * The function is used to indicate that the block of memory has
524 * finished being accessed. If the memory block is cached then the
525 * application would need to ensure that the contents of the cache
526 * are updated immediately to the actual memory.
527 *
528 * @param[in] ptr
529 * Address of memory block
530 *
531 * @param[in] size
532 * Size of memory block
533 *
534 * @retval
535 * Not Applicable
536 */
537void Osal_qmssEndMemAccess (void *ptr, uint32_t size)
538{
539 uint32_t key;
540
541 /* Disable Interrupts */
542 key = Hwi_disable();
543
544#ifdef L2_CACHE
545 /* Writeback L2 cache. This should Writeback L1D as well.
546 * Wait until operation is complete. */
547 CACHE_wbL2 (ptr, size, CACHE_FENCE_WAIT);
548
549#else
550 /* Writeback L1D cache and wait until operation is complete.
551 * Use this approach if L2 cache is not enabled */
552 CACHE_wbL1d (ptr, size, CACHE_FENCE_WAIT);
553#endif
554
555 /* Reenable Interrupts. */
556 Hwi_restore(key);
557 return;
558}
559
560/**
561 * @b Description
562 * @n
563 * The function is used to allocate a memory block of the specified size.
564 *
565 * @param[in] num_bytes
566 * Number of bytes to be allocated.
567 *
568 * @retval
569 * Allocated block address
570 */
571void *Osal_rmMalloc (uint32_t num_bytes)
572{
573 Error_Block errorBlock;
574
575 /* Increment the allocation counter. */
576 rmMallocCounter++;
577
578 /* Allocate memory. */
579 return Memory_alloc(NULL, num_bytes, 0, &errorBlock);
580}
581
582/**
583 * @b Description
584 * @n
585 * The function is used to free a memory block of the specified size.
586 *
587 * @param[in] ptr
588 * Pointer to the memory block to be cleaned up.
589 *
590 * @param[in] size
591 * Size of the memory block to be cleaned up.
592 *
593 * @retval
594 * Not Applicable
595 */
596void Osal_rmFree (void *ptr, uint32_t size)
597{
598 /* Increment the free counter. */
599 rmFreeCounter++;
600 Memory_free(NULL, ptr, size);
601}
602
603/* FUNCTION PURPOSE: Critical section enter
604 ***********************************************************************
605 * DESCRIPTION: The function is used to enter a critical section.
606 * Function protects against
607 *
608 * access from multiple cores
609 * and
610 * access from multiple threads on single core
611 */
612void *Osal_rmCsEnter(void)
613{
614
615 return NULL;
616}
617
618/* FUNCTION PURPOSE: Critical section exit
619 ***********************************************************************
620 * DESCRIPTION: The function is used to exit a critical section
621 * protected using Osal_cppiCsEnter() API.
622 */
623void Osal_rmCsExit(void *CsHandle)
624{
625
626}
627
628/* FUNCTION PURPOSE: Multi-threaded critical section enter
629***********************************************************************
630* DESCRIPTION: The function is used to enter a multi-threaded critical
631* section. Function protects against
632*
633* access from multiple threads on single core
634*/
635void *Osal_rmMtCsEnter(void *mtSemObj)
636{
637
638 return NULL;
639}
640
641/* FUNCTION PURPOSE: Multi-threaded critical section exit
642***********************************************************************
643* DESCRIPTION: The function is used to exit a multi-threaded critical
644* section protected using Osal_rmMtCsEnter() API.
645*/
646void Osal_rmMtCsExit(void *mtSemObj, void *CsHandle)
647{
648
649}
650
651/* FUNCTION PURPOSE: Critical section exit
652 ***********************************************************************
653 * DESCRIPTION: The function is used to indicate that a block of memory is
654 * about to be accessed. If the memory block is cached then this
655 * indicates that the application would need to ensure that the
656 * cache is updated with the data from the actual memory.
657 */
658void Osal_rmBeginMemAccess(void *ptr, uint32_t size)
659{
660 uint32_t key;
661
662 /* Disable Interrupts */
663 key = Hwi_disable();
664
665 /* Cleanup the prefetch buffer also. */
666 CSL_XMC_invalidatePrefetchBuffer();
667
668#ifdef L2_CACHE
669 /* Invalidate L2 cache. This should invalidate L1D as well.
670 * Wait until operation is complete. */
671 CACHE_invL2 (ptr, size, CACHE_FENCE_WAIT);
672#else
673 /* Invalidate L1D cache and wait until operation is complete.
674 * Use this approach if L2 cache is not enabled */
675 CACHE_invL1d (ptr, size, CACHE_FENCE_WAIT);
676#endif
677
678 /* Reenable Interrupts. */
679 Hwi_restore(key);
680
681 return;
682}
683
684/* FUNCTION PURPOSE: Critical section exit
685 ***********************************************************************
686 * DESCRIPTION: The function is used to indicate that the block of memory has
687 * finished being accessed. If the memory block is cached then the
688 * application would need to ensure that the contents of the cache
689 * are updated immediately to the actual memory.
690 */
691void Osal_rmEndMemAccess(void *ptr, uint32_t size)
692{
693 uint32_t key;
694
695 /* Disable Interrupts */
696 key = Hwi_disable();
697
698#ifdef L2_CACHE
699 /* Writeback L2 cache. This should Writeback L1D as well.
700 * Wait until operation is complete. */
701 CACHE_wbL2 (ptr, size, CACHE_FENCE_WAIT);
702
703#else
704 /* Writeback L1D cache and wait until operation is complete.
705 * Use this approach if L2 cache is not enabled */
706 CACHE_wbL1d (ptr, size, CACHE_FENCE_WAIT);
707#endif
708
709 /* Reenable Interrupts. */
710 Hwi_restore(key);
711
712 return;
713}
714
715/**
716 * @b Description
717 * @n
718 * The function is used to create a task blocking object
719 * capable of blocking the task a RM instance is running
720 * within
721 *
722 * @retval
723 * Allocated task blocking object
724 */
725void *Osal_rmTaskBlockCreate(void)
726{
727 Semaphore_Params semParams;
728
729 Semaphore_Params_init(&semParams);
730 return((void *)Semaphore_create(0, &semParams, NULL));
731}
732
733/**
734 * @b Description
735 * @n
736 * The function is used to block a task whose context a
737 * RM instance is running within.
738 *
739 * @param[in] handle
740 * Task blocking object handle.
741 *
742 * @retval
743 * Not Applicable
744 */
745void Osal_rmTaskBlock(void *handle)
746{
747 Semaphore_pend((Semaphore_Handle)handle, BIOS_WAIT_FOREVER);
748}
749
750/**
751 * @b Description
752 * @n
753 * The function is used to unblock a task whose context a
754 * RM instance is running within.
755 *
756 * @param[in] handle
757 * Task blocking object handle.
758 *
759 * @retval
760 * Not Applicable
761 */
762void Osal_rmTaskUnblock(void *handle)
763{
764 Semaphore_post((Semaphore_Handle)handle);
765}
766
767/**
768 * @b Description
769 * @n
770 * The function is used to delete a task blocking object
771 * provided to a RM instance
772 *
773 * @param[in] handle
774 * Task blocking object handle.
775 *
776 * @retval
777 * Not Applicable
778 */
779void Osal_rmTaskBlockDelete(void *handle)
780{
781 Semaphore_delete((Semaphore_Handle *)&handle);
782}
783
784/**
785 * @b Description
786 * @n
787 * The function is the RM OSAL Logging API which logs
788 * the messages on the console.
789 *
790 * @param[in] fmt
791 * Formatted String.
792 *
793 * @retval
794 * Not Applicable
795 */
796void Osal_rmLog (char *fmt, ... )
797{
798 VaList ap;
799
800 va_start(ap, fmt);
801 System_vprintf(fmt, ap);
802 va_end(ap);
803}
804
diff --git a/test/c6657/c66/bios/cppi_evmc6657_C66BiosTestProject.txt b/test/c6657/c66/bios/cppi_evmc6657_C66BiosTestProject.txt
new file mode 100644
index 0000000..e85016b
--- /dev/null
+++ b/test/c6657/c66/bios/cppi_evmc6657_C66BiosTestProject.txt
@@ -0,0 +1,2 @@
1-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/src/cppi_test.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/src/test_host_mode.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/src/test_mono_mode.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/src/cppi_drv.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/src/cppi_desc.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/device/c6657/src/cppi_device.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/src/qmss_drv.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/src/qmss_acc.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/device/c6657/src/qmss_device.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/c6657/global-resource-list.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/c6657/policy_dsp-only.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/c6657/c66/bios/test_osal.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/src/cppi_listlib.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/src/cppi_heap.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/c6657/c66/bios/cppi_linker.cmd" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/c6657/c66/bios/cppi_test.cfg" -ccs.setCompilerOptions "-mv64+ -g -DSOC_C6657 -DINTERNAL_LINKING_RAM -DCONFIG_ACC -UTX_CH_ALLOCATION -URX_CH_ALLOCATION -URX_FLOW_ALLOCATION --diag_warning=225 -I${PDK_INSTALL_PATH}/ti/drv/cppi/test/src" -rtsc.enableRtsc
2
diff --git a/test/c6657/c66/bios/cppi_linker.cmd b/test/c6657/c66/bios/cppi_linker.cmd
new file mode 100644
index 0000000..451b741
--- /dev/null
+++ b/test/c6657/c66/bios/cppi_linker.cmd
@@ -0,0 +1,9 @@
1SECTIONS
2{
3 .init_array: load >> L2SRAM
4 .sharedGRL: load >> L2SRAM
5 .sharedPolicy: load >> L2SRAM
6 .qmss: load >> L2SRAM
7 .cppi: load >> L2SRAM
8 cppiLocalHeap: load >> L2SRAM
9}
diff --git a/test/c6657/c66/bios/cppi_test.cfg b/test/c6657/c66/bios/cppi_test.cfg
new file mode 100644
index 0000000..011c8fe
--- /dev/null
+++ b/test/c6657/c66/bios/cppi_test.cfg
@@ -0,0 +1,80 @@
1/*
2 * Copyright 2011-2013 by Texas Instruments Incorporated.
3 *
4 * All rights reserved. Property of Texas Instruments Incorporated.
5 * Restricted rights to use, duplicate or disclose this code are
6 * granted through contract.
7 *
8 */
9
10/* THIS FILE WAS GENERATED BY ti.sysbios.genx */
11
12/*
13 * ======== memory.cfg ========
14 *
15 */
16
17Program.stack = 8192;
18var Memory = xdc.useModule('xdc.runtime.Memory');
19var BIOS = xdc.useModule('ti.sysbios.BIOS');
20var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
21var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
22var Task = xdc.useModule('ti.sysbios.knl.Task');
23var Idle = xdc.useModule('ti.sysbios.knl.Idle');
24var Log = xdc.useModule('xdc.runtime.Log');
25var Diags = xdc.useModule('xdc.runtime.Diags');
26
27/* Load and use the CSL package */
28var devType = "c6657"
29var Csl = xdc.useModule('ti.csl.Settings');
30Csl.deviceType = devType;
31
32/* Load and use RM */
33var Rm = xdc.loadPackage('ti.drv.rm');
34
35var System = xdc.useModule('xdc.runtime.System');
36var SysStd = xdc.useModule('xdc.runtime.SysStd');
37System.SupportProxy = SysStd;
38
39/* Create a default system heap using ti.bios.HeapMem. */
40var heapMemParams1 = new HeapMem.Params;
41heapMemParams1.size = 32768;
42heapMemParams1.sectionName = "systemHeap";
43Program.global.heap0 = HeapMem.create(heapMemParams1);
44
45/* This is the default memory heap. */
46Memory.defaultHeapInstance = Program.global.heap0;
47
48Program.sectMap["systemHeap"] = Program.platform.stackMemory;
49
50/* Create a default system heap using ti.bios.HeapMem. */
51/*
52var heapMemParams1 = new HeapMem.Params;
53if (prog.build.target.name == "C28_large" ||
54 prog.build.target.name == "C28_float" ) {
55 heapMemParams1.size = 2048;
56}
57else {
58 heapMemParams1.size = 8192;
59}
60heapMemParams1.sectionName = "systemHeap";
61Program.global.heap0 = HeapMem.create(heapMemParams1);
62*/
63
64/* Plug in systemheap as default heap to be used by Memory */
65/* Memory.defaultHeapInstance = Program.global.heap0; */
66
67var heapMemParams2 = new HeapMem.Params;
68heapMemParams2.size = 16384;
69heapMemParams2.align = 8;
70heapMemParams2.sectionName = "cppiLocalHeap";
71Program.global.cppiLocalHeap = HeapMem.create(heapMemParams2);
72
73/* Place user sections */
74
75/* Add idle function */
76/*Idle.addFunc('&idl0Fxn');*/
77/*
78 * @(#) ti.sysbios.genx; 2, 0, 0, 0,275; 4-29-2009 15:45:06; /db/vtree/library/trees/avala/avala-k25x/src/
79 */
80
diff --git a/test/c6657/c66/bios/test_osal.c b/test/c6657/c66/bios/test_osal.c
new file mode 100644
index 0000000..a3a4241
--- /dev/null
+++ b/test/c6657/c66/bios/test_osal.c
@@ -0,0 +1,561 @@
1/**
2 * @file test_osal.c
3 *
4 * @brief
5 * This is the OS abstraction layer and is used by the CPPI and QMSS
6 * low level drivers for the CPPI tests.
7 *
8 * \par
9 * ============================================================================
10 * @n (C) Copyright 2009-2014, Texas Instruments, Inc.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 *
19 * Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the
22 * distribution.
23 *
24 * Neither the name of Texas Instruments Incorporated nor the names of
25 * its contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \par
41*/
42#include <stdarg.h>
43
44#include <xdc/std.h>
45#include <xdc/runtime/IHeap.h>
46#include <xdc/runtime/System.h>
47#include <xdc/runtime/Memory.h>
48#include <xdc/runtime/Error.h>
49
50#include <ti/sysbios/BIOS.h>
51#include <ti/sysbios/knl/Task.h>
52#include <ti/sysbios/heaps/HeapBuf.h>
53#include <ti/sysbios/heaps/HeapMem.h>
54#include <ti/sysbios/hal/Hwi.h>
55
56#include <xdc/cfg/global.h>
57
58/* CSL Semaphore module includes */
59#include <ti/csl/csl_semAux.h>
60
61/* CSL Cache module includes */
62#include <ti/csl/csl_cacheAux.h>
63
64/**********************************************************************
65 ****************************** Defines *******************************
66 **********************************************************************/
67
68#define CPPI_HW_SEM 1
69#define QMSS_HW_SEM 2
70
71/**********************************************************************
72 ************************** Global Variables **************************
73 **********************************************************************/
74uint32_t cppiMallocCounter = 0;
75uint32_t cppiFreeCounter = 0;
76uint32_t qmssMallocCounter = 0;
77uint32_t qmssFreeCounter = 0;
78uint32_t rmMallocCounter = 0;
79uint32_t rmFreeCounter = 0;
80
81/**********************************************************************
82 ************************** Extern Variables **************************
83 **********************************************************************/
84extern IHeap_Handle cppiHeap;
85
86/**********************************************************************
87 *************************** OSAL Functions **************************
88 **********************************************************************/
89
90/**
91 * @b Description
92 * @n
93 * The function is used to allocate a memory block of the specified size.
94 *
95 * Note: If the LLD is used by applications on multiple core, the "cppiHeap"
96 * should be in shared memory
97 *
98 * @param[in] num_bytes
99 * Number of bytes to be allocated.
100 *
101 * @retval
102 * Allocated block address
103 */
104void* Osal_biosMalloc (uint32_t num_bytes)
105{
106 Error_Block errorBlock;
107
108 /* Increment the allocation counter. */
109 cppiMallocCounter++;
110
111 /* Allocate memory. */
112 return Memory_alloc (cppiHeap, num_bytes, 0, &errorBlock);
113}
114
115/**
116 * @b Description
117 * @n
118 * The function is used to free a memory block of the specified size allocated
119 * using Osal_cppiMalloc() API.
120 *
121 * @param[in] ptr
122 * Pointer to the memory block to be cleaned up.
123 *
124 * @param[in] size
125 * Size of the memory block to be cleaned up.
126 *
127 * @retval
128 * Not Applicable
129 */
130void Osal_biosFree (void* ptr, uint32_t size)
131{
132 /* Increment the free counter. */
133 cppiFreeCounter++;
134 Memory_free (cppiHeap, ptr, size);
135}
136
137/**
138 * @b Description
139 * @n
140 * The function is used to enter a critical section.
141 * Function protects against
142 *
143 * access from multiple cores
144 * and
145 * access from multiple threads on single core
146 *
147 * @retval
148 * Handle used to lock critical section
149 */
150void* Osal_cppiCsEnter (void)
151{
152 /* Get the hardware semaphore for protection against multiple core access */
153 while ((CSL_semAcquireDirect (CPPI_HW_SEM)) == 0);
154
155 /* Create Semaphore for protection against access from multiple threads
156 * Not created here becasue application is not multithreaded
157 * */
158
159 return NULL;
160}
161
162/**
163 * @b Description
164 * @n
165 * The function is used to exit a critical section
166 * protected using Osal_cppiCsEnter() API.
167 *
168 * @param[in] CsHandle
169 * Handle for unlocking critical section.
170 *
171 * @retval
172 * Not Applicable
173 */
174void Osal_cppiCsExit (void *CsHandle)
175{
176 /* Release Semaphore using handle */
177
178 /* Release the hardware semaphore */
179 CSL_semReleaseSemaphore (CPPI_HW_SEM);
180
181 return;
182}
183
184/**
185 * @b Description
186 * @n
187 * The function is used to indicate that a block of memory is
188 * about to be accessed. If the memory block is cached then this
189 * indicates that the application would need to ensure that the
190 * cache is updated with the data from the actual memory.
191 *
192 * @param[in] ptr
193 * Address of memory block
194 *
195 * @param[in] size
196 * Size of memory block
197 *
198 * @retval
199 * Not Applicable
200 */
201void Osal_cppiBeginMemAccess (void *ptr, uint32_t size)
202{
203 /* CPPI data is located in L2 memory.
204 * No update is required */
205 return;
206}
207
208/**
209 * @b Description
210 * @n
211 * The function is used to indicate that the block of memory has
212 * finished being accessed. If the memory block is cached then the
213 * application would need to ensure that the contents of the cache
214 * are updated immediately to the actual memory.
215 *
216 * @param[in] ptr
217 * Address of memory block
218 *
219 * @param[in] size
220 * Size of memory block
221 *
222 * @retval
223 * Not Applicable
224 */
225void Osal_cppiEndMemAccess (void *ptr, uint32_t size)
226{
227 /* CPPI data is located in L2 memory.
228 * No update is required */
229 return;
230}
231
232/**
233 * @b Description
234 * @n
235 * The function is used to enter a critical section.
236 * Function protects against
237 *
238 * access from multiple cores
239 * and
240 * access from multiple threads on single core
241 *
242 * @retval
243 * Handle used to lock critical section
244 */
245void* Osal_qmssCsEnter (void)
246{
247 /* Get the hardware semaphore */
248 while ((CSL_semAcquireDirect (QMSS_HW_SEM)) == 0);
249
250 /* Create Semaphore for protection against access from multiple threads
251 * Not created here becasue application is not multithreaded
252 * */
253 return NULL;
254}
255
256/**
257 * @b Description
258 * @n
259 * The function is used to exit a critical section
260 * protected using Osal_qmssCsEnter() API.
261 *
262 * @param[in] CsHandle
263 * Handle for unlocking critical section.
264 *
265 * @retval
266 * Not Applicable
267 */
268void Osal_qmssCsExit (void *CsHandle)
269{
270 /* Release Semaphore using handle */
271
272 /* Release the hardware semaphore */
273 CSL_semReleaseSemaphore (QMSS_HW_SEM);
274
275 return;
276}
277
278/**
279 * @b Description
280 * @n
281 * The function is used to enter a critical section.
282 * Function protects against
283 *
284 * access from multiple cores
285 * and
286 * access from multiple threads on single core
287 *
288 * @retval
289 * Handle used to lock critical section
290 */
291void* Osal_qmssAccCsEnter (void)
292{
293 /* This is a suboptimal implementation for this OSAL, please refer to
294 * QMSS examples for optimal implementation of this function
295 */
296 return (Osal_qmssCsEnter());
297}
298
299/**
300 * @b Description
301 * @n
302 * The function is used to exit a critical section
303 * protected using Osal_qmssAccCsEnter() API.
304 *
305 * @param[in] CsHandle
306 * Handle for unlocking critical section.
307 *
308 * @retval
309 * Not Applicable
310 */
311void Osal_qmssAccCsExit (void *CsHandle)
312{
313 /* This is a suboptimal implementation for this OSAL, please refer to
314 * QMSS examples for optimal implementation of this function
315 */
316
317 Osal_qmssCsExit(CsHandle);
318 return;
319}
320
321/**
322 * @b Description
323 * @n
324 * The function is used to enter a critical section.
325 * Function protects against
326 * access from multiple threads on single core
327 *
328 * @retval
329 * Handle used to lock critical section
330 */
331void* Osal_qmssMtCsEnter (void)
332{
333 /* Create Semaphore for protection against access from multiple threads
334 * Not created here becasue application is not multithreaded
335 * */
336
337 return NULL;
338}
339
340/**
341 * @b Description
342 * @n
343 * The function is used to exit a critical section
344 * protected using Osal_qmssMtCsEnter() API.
345 *
346 * @param[in] CsHandle
347 * Handle to unlock critical section.
348 *
349 * @retval
350 * Not Applicable
351 */
352void Osal_qmssMtCsExit (void *CsHandle)
353{
354 /* Release Semaphore using handle */
355
356 return;
357}
358
359/**
360 * @b Description
361 * @n
362 * The function is used to indicate that a block of memory is
363 * about to be accessed. If the memory block is cached then this
364 * indicates that the application would need to ensure that the
365 * cache is updated with the data from the actual memory.
366 *
367 * @param[in] ptr
368 * Address of memory block
369 *
370 * @param[in] size
371 * Size of memory block
372 *
373 * @retval
374 * Not Applicable
375 */
376void Osal_qmssBeginMemAccess (void *ptr, uint32_t size)
377{
378 /* QMSS data is located in L2 memory.
379 * No update is required */
380 return;
381}
382
383/**
384 * @b Description
385 * @n
386 * The function is used to indicate that the block of memory has
387 * finished being accessed. If the memory block is cached then the
388 * application would need to ensure that the contents of the cache
389 * are updated immediately to the actual memory.
390 *
391 * @param[in] ptr
392 * Address of memory block
393 *
394 * @param[in] size
395 * Size of memory block
396 *
397 * @retval
398 * Not Applicable
399 */
400void Osal_qmssEndMemAccess (void *ptr, uint32_t size)
401{
402 /* QMSS data is located in L2 memory.
403 * No update is required */
404 return;
405}
406
407/* FUNCTION PURPOSE: Allocates memory
408 ***********************************************************************
409 * DESCRIPTION: The function is used to allocate a memory block of the
410 * specified size.
411 */
412void *Osal_rmMalloc (uint32_t num_bytes)
413{
414 Error_Block errorBlock;
415
416 /* Increment the allocation counter. */
417 rmMallocCounter++;
418
419 /* Allocate memory. */
420 return Memory_alloc(NULL, num_bytes, 0, &errorBlock);
421}
422
423/* FUNCTION PURPOSE: Frees memory
424 ***********************************************************************
425 * DESCRIPTION: The function is used to free a memory block of the
426 * specified size.
427 */
428void Osal_rmFree (void *ptr, uint32_t size)
429{
430 /* Increment the free counter. */
431 rmFreeCounter++;
432 Memory_free(NULL, ptr, size);
433}
434
435/* FUNCTION PURPOSE: Critical section enter
436 ***********************************************************************
437 * DESCRIPTION: The function is used to enter a critical section.
438 * Function protects against
439 *
440 * access from multiple cores
441 * and
442 * access from multiple threads on single core
443 */
444void *Osal_rmCsEnter(void)
445{
446
447 return NULL;
448}
449
450/* FUNCTION PURPOSE: Critical section exit
451 ***********************************************************************
452 * DESCRIPTION: The function is used to exit a critical section
453 * protected using Osal_cppiCsEnter() API.
454 */
455void Osal_rmCsExit(void *CsHandle)
456{
457
458}
459
460/* FUNCTION PURPOSE: Multi-threaded critical section enter
461***********************************************************************
462* DESCRIPTION: The function is used to enter a multi-threaded critical
463* section. Function protects against
464*
465* access from multiple threads on single core
466*/
467void *Osal_rmMtCsEnter(void *mtSemObj)
468{
469
470 return NULL;
471}
472
473/* FUNCTION PURPOSE: Multi-threaded critical section exit
474***********************************************************************
475* DESCRIPTION: The function is used to exit a multi-threaded critical
476* section protected using Osal_rmMtCsEnter() API.
477*/
478void Osal_rmMtCsExit(void *mtSemObj, void *CsHandle)
479{
480
481}
482
483/* FUNCTION PURPOSE: Critical section exit
484 ***********************************************************************
485 * DESCRIPTION: The function is used to indicate that a block of memory is
486 * about to be accessed. If the memory block is cached then this
487 * indicates that the application would need to ensure that the
488 * cache is updated with the data from the actual memory.
489 */
490void Osal_rmBeginMemAccess(void *ptr, uint32_t size)
491{
492
493}
494
495/* FUNCTION PURPOSE: Critical section exit
496 ***********************************************************************
497 * DESCRIPTION: The function is used to indicate that the block of memory has
498 * finished being accessed. If the memory block is cached then the
499 * application would need to ensure that the contents of the cache
500 * are updated immediately to the actual memory.
501 */
502void Osal_rmEndMemAccess(void *ptr, uint32_t size)
503{
504
505}
506
507/* FUNCTION PURPOSE: Creates a task blocking object
508 ***********************************************************************
509 * DESCRIPTION: The function is used to create a task blocking object
510 * capable of blocking the task a RM instance is running
511 * within
512 */
513void *Osal_rmTaskBlockCreate(void)
514{
515 /* No task blocking needed since there is only a RM Server */
516 return(NULL);
517}
518
519/* FUNCTION PURPOSE: Blocks a RM instance
520 ***********************************************************************
521 * DESCRIPTION: The function is used to block a task whose context a
522 * RM instance is running within.
523 */
524void Osal_rmTaskBlock(void *handle)
525{
526 /* No task blocking needed since there is only a RM Server */
527}
528
529/* FUNCTION PURPOSE: unBlocks a RM instance
530 ***********************************************************************
531 * DESCRIPTION: The function is used to unblock a task whose context a
532 * RM instance is running within.
533 */
534void Osal_rmTaskUnblock(void *handle)
535{
536 /* No task blocking needed since there is only a RM Server */
537}
538
539/* FUNCTION PURPOSE: Deletes a task blocking object
540 ***********************************************************************
541 * DESCRIPTION: The function is used to delete a task blocking object
542 * provided to a RM instance
543 */
544void Osal_rmTaskBlockDelete(void *handle)
545{
546 /* No task blocking needed since there is only a RM Server */
547}
548
549/* FUNCTION PURPOSE: Prints a variable list
550 ***********************************************************************
551 * DESCRIPTION: The function is used to print a string to the console
552 */
553void Osal_rmLog (char *fmt, ... )
554{
555 VaList ap;
556
557 va_start(ap, fmt);
558 System_vprintf(fmt, ap);
559 va_end(ap);
560}
561
diff --git a/test/c6678/c66/bios/cppi_evmc6678_C66BiosTestProject.txt b/test/c6678/c66/bios/cppi_evmc6678_C66BiosTestProject.txt
new file mode 100644
index 0000000..c993f61
--- /dev/null
+++ b/test/c6678/c66/bios/cppi_evmc6678_C66BiosTestProject.txt
@@ -0,0 +1,2 @@
1-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/src/cppi_test.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/src/test_host_mode.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/src/test_mono_mode.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/src/cppi_drv.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/src/cppi_desc.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/device/c6678/src/cppi_device.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/src/qmss_drv.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/src/qmss_acc.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/device/c6678/src/qmss_device.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/c6678/global-resource-list.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/c6678/policy_dsp-only.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/c6678/c66/bios/test_osal.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/src/cppi_listlib.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/src/cppi_heap.c" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/c6678/c66/bios/cppi_linker.cmd" -ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/test/c6678/c66/bios/cppi_test.cfg" -ccs.setCompilerOptions "-mv64+ -g -DSOC_C6678 -DINTERNAL_LINKING_RAM -DCONFIG_ACC -UTX_CH_ALLOCATION -URX_CH_ALLOCATION -URX_FLOW_ALLOCATION --diag_warning=225 -I${PDK_INSTALL_PATH}/ti/drv/cppi/test/src" -rtsc.enableRtsc
2
diff --git a/test/c6678/c66/bios/cppi_linker.cmd b/test/c6678/c66/bios/cppi_linker.cmd
new file mode 100644
index 0000000..451b741
--- /dev/null
+++ b/test/c6678/c66/bios/cppi_linker.cmd
@@ -0,0 +1,9 @@
1SECTIONS
2{
3 .init_array: load >> L2SRAM
4 .sharedGRL: load >> L2SRAM
5 .sharedPolicy: load >> L2SRAM
6 .qmss: load >> L2SRAM
7 .cppi: load >> L2SRAM
8 cppiLocalHeap: load >> L2SRAM
9}
diff --git a/test/c6678/c66/bios/cppi_test.cfg b/test/c6678/c66/bios/cppi_test.cfg
new file mode 100644
index 0000000..2d47620
--- /dev/null
+++ b/test/c6678/c66/bios/cppi_test.cfg
@@ -0,0 +1,80 @@
1/*
2 * Copyright 2011-2013 by Texas Instruments Incorporated.
3 *
4 * All rights reserved. Property of Texas Instruments Incorporated.
5 * Restricted rights to use, duplicate or disclose this code are
6 * granted through contract.
7 *
8 */
9
10/* THIS FILE WAS GENERATED BY ti.sysbios.genx */
11
12/*
13 * ======== memory.cfg ========
14 *
15 */
16
17Program.stack = 8192;
18var Memory = xdc.useModule('xdc.runtime.Memory');
19var BIOS = xdc.useModule('ti.sysbios.BIOS');
20var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
21var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
22var Task = xdc.useModule('ti.sysbios.knl.Task');
23var Idle = xdc.useModule('ti.sysbios.knl.Idle');
24var Log = xdc.useModule('xdc.runtime.Log');
25var Diags = xdc.useModule('xdc.runtime.Diags');
26
27/* Load and use the CSL package */
28var devType = "c6678"
29var Csl = xdc.useModule('ti.csl.Settings');
30Csl.deviceType = devType;
31
32/* Load and use RM */
33var Rm = xdc.loadPackage('ti.drv.rm');
34
35var System = xdc.useModule('xdc.runtime.System');
36var SysStd = xdc.useModule('xdc.runtime.SysStd');
37System.SupportProxy = SysStd;
38
39/* Create a default system heap using ti.bios.HeapMem. */
40var heapMemParams1 = new HeapMem.Params;
41heapMemParams1.size = 32768;
42heapMemParams1.sectionName = "systemHeap";
43Program.global.heap0 = HeapMem.create(heapMemParams1);
44
45/* This is the default memory heap. */
46Memory.defaultHeapInstance = Program.global.heap0;
47
48Program.sectMap["systemHeap"] = Program.platform.stackMemory;
49
50/* Create a default system heap using ti.bios.HeapMem. */
51/*
52var heapMemParams1 = new HeapMem.Params;
53if (prog.build.target.name == "C28_large" ||
54 prog.build.target.name == "C28_float" ) {
55 heapMemParams1.size = 2048;
56}
57else {
58 heapMemParams1.size = 8192;
59}
60heapMemParams1.sectionName = "systemHeap";
61Program.global.heap0 = HeapMem.create(heapMemParams1);
62*/
63
64/* Plug in systemheap as default heap to be used by Memory */
65/* Memory.defaultHeapInstance = Program.global.heap0; */
66
67var heapMemParams2 = new HeapMem.Params;
68heapMemParams2.size = 16384;
69heapMemParams2.align = 8;
70heapMemParams2.sectionName = "cppiLocalHeap";
71Program.global.cppiLocalHeap = HeapMem.create(heapMemParams2);
72
73/* Place user sections */
74
75/* Add idle function */
76/*Idle.addFunc('&idl0Fxn');*/
77/*
78 * @(#) ti.sysbios.genx; 2, 0, 0, 0,275; 4-29-2009 15:45:06; /db/vtree/library/trees/avala/avala-k25x/src/
79 */
80
diff --git a/test/c6678/c66/bios/test_osal.c b/test/c6678/c66/bios/test_osal.c
new file mode 100644
index 0000000..a3a4241
--- /dev/null
+++ b/test/c6678/c66/bios/test_osal.c
@@ -0,0 +1,561 @@
1/**
2 * @file test_osal.c
3 *
4 * @brief
5 * This is the OS abstraction layer and is used by the CPPI and QMSS
6 * low level drivers for the CPPI tests.
7 *
8 * \par
9 * ============================================================================
10 * @n (C) Copyright 2009-2014, Texas Instruments, Inc.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 *
16 * Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 *
19 * Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the
22 * distribution.
23 *
24 * Neither the name of Texas Instruments Incorporated nor the names of
25 * its contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * \par
41*/
42#include <stdarg.h>
43
44#include <xdc/std.h>
45#include <xdc/runtime/IHeap.h>
46#include <xdc/runtime/System.h>
47#include <xdc/runtime/Memory.h>
48#include <xdc/runtime/Error.h>
49
50#include <ti/sysbios/BIOS.h>
51#include <ti/sysbios/knl/Task.h>
52#include <ti/sysbios/heaps/HeapBuf.h>
53#include <ti/sysbios/heaps/HeapMem.h>
54#include <ti/sysbios/hal/Hwi.h>
55
56#include <xdc/cfg/global.h>
57
58/* CSL Semaphore module includes */
59#include <ti/csl/csl_semAux.h>
60
61/* CSL Cache module includes */
62#include <ti/csl/csl_cacheAux.h>
63
64/**********************************************************************
65 ****************************** Defines *******************************
66 **********************************************************************/
67
68#define CPPI_HW_SEM 1
69#define QMSS_HW_SEM 2
70
71/**********************************************************************
72 ************************** Global Variables **************************
73 **********************************************************************/
74uint32_t cppiMallocCounter = 0;
75uint32_t cppiFreeCounter = 0;
76uint32_t qmssMallocCounter = 0;
77uint32_t qmssFreeCounter = 0;
78uint32_t rmMallocCounter = 0;
79uint32_t rmFreeCounter = 0;
80
81/**********************************************************************
82 ************************** Extern Variables **************************
83 **********************************************************************/
84extern IHeap_Handle cppiHeap;
85
86/**********************************************************************
87 *************************** OSAL Functions **************************
88 **********************************************************************/
89
90/**
91 * @b Description
92 * @n
93 * The function is used to allocate a memory block of the specified size.
94 *
95 * Note: If the LLD is used by applications on multiple core, the "cppiHeap"
96 * should be in shared memory
97 *
98 * @param[in] num_bytes
99 * Number of bytes to be allocated.
100 *
101 * @retval
102 * Allocated block address
103 */
104void* Osal_biosMalloc (uint32_t num_bytes)
105{
106 Error_Block errorBlock;
107
108 /* Increment the allocation counter. */
109 cppiMallocCounter++;
110
111 /* Allocate memory. */
112 return Memory_alloc (cppiHeap, num_bytes, 0, &errorBlock);
113}
114
115/**
116 * @b Description
117 * @n
118 * The function is used to free a memory block of the specified size allocated
119 * using Osal_cppiMalloc() API.
120 *
121 * @param[in] ptr
122 * Pointer to the memory block to be cleaned up.
123 *
124 * @param[in] size
125 * Size of the memory block to be cleaned up.
126 *
127 * @retval
128 * Not Applicable
129 */
130void Osal_biosFree (void* ptr, uint32_t size)
131{
132 /* Increment the free counter. */
133 cppiFreeCounter++;
134 Memory_free (cppiHeap, ptr, size);
135}
136
137/**
138 * @b Description
139 * @n
140 * The function is used to enter a critical section.
141 * Function protects against
142 *
143 * access from multiple cores
144 * and
145 * access from multiple threads on single core
146 *
147 * @retval
148 * Handle used to lock critical section
149 */
150void* Osal_cppiCsEnter (void)
151{
152 /* Get the hardware semaphore for protection against multiple core access */
153 while ((CSL_semAcquireDirect (CPPI_HW_SEM)) == 0);
154
155 /* Create Semaphore for protection against access from multiple threads
156 * Not created here becasue application is not multithreaded
157 * */
158
159 return NULL;
160}
161
162/**
163 * @b Description
164 * @n
165 * The function is used to exit a critical section
166 * protected using Osal_cppiCsEnter() API.
167 *
168 * @param[in] CsHandle
169 * Handle for unlocking critical section.
170 *
171 * @retval
172 * Not Applicable
173 */
174void Osal_cppiCsExit (void *CsHandle)
175{
176 /* Release Semaphore using handle */
177
178 /* Release the hardware semaphore */
179 CSL_semReleaseSemaphore (CPPI_HW_SEM);
180
181 return;
182}
183
184/**
185 * @b Description
186 * @n
187 * The function is used to indicate that a block of memory is
188 * about to be accessed. If the memory block is cached then this
189 * indicates that the application would need to ensure that the
190 * cache is updated with the data from the actual memory.
191 *
192 * @param[in] ptr
193 * Address of memory block
194 *
195 * @param[in] size
196 * Size of memory block
197 *
198 * @retval
199 * Not Applicable
200 */
201void Osal_cppiBeginMemAccess (void *ptr, uint32_t size)
202{
203 /* CPPI data is located in L2 memory.
204 * No update is required */
205 return;
206}
207
208/**
209 * @b Description
210 * @n
211 * The function is used to indicate that the block of memory has
212 * finished being accessed. If the memory block is cached then the
213 * application would need to ensure that the contents of the cache
214 * are updated immediately to the actual memory.
215 *
216 * @param[in] ptr
217 * Address of memory block
218 *
219 * @param[in] size
220 * Size of memory block
221 *
222 * @retval
223 * Not Applicable
224 */
225void Osal_cppiEndMemAccess (void *ptr, uint32_t size)
226{
227 /* CPPI data is located in L2 memory.
228 * No update is required */
229 return;
230}
231
232/**
233 * @b Description
234 * @n
235 * The function is used to enter a critical section.
236 * Function protects against
237 *
238 * access from multiple cores
239 * and
240 * access from multiple threads on single core
241 *
242 * @retval
243 * Handle used to lock critical section
244 */
245void* Osal_qmssCsEnter (void)
246{
247 /* Get the hardware semaphore */
248 while ((CSL_semAcquireDirect (QMSS_HW_SEM)) == 0);
249
250 /* Create Semaphore for protection against access from multiple threads
251 * Not created here becasue application is not multithreaded
252 * */
253 return NULL;
254}
255
256/**
257 * @b Description
258 * @n
259 * The function is used to exit a critical section
260 * protected using Osal_qmssCsEnter() API.
261 *
262 * @param[in] CsHandle
263 * Handle for unlocking critical section.
264 *
265 * @retval
266 * Not Applicable
267 */
268void Osal_qmssCsExit (void *CsHandle)
269{
270 /* Release Semaphore using handle */
271
272 /* Release the hardware semaphore */
273 CSL_semReleaseSemaphore (QMSS_HW_SEM);
274
275 return;
276}
277
278/**
279 * @b Description
280 * @n
281 * The function is used to enter a critical section.
282 * Function protects against
283 *
284 * access from multiple cores
285 * and
286 * access from multiple threads on single core
287 *
288 * @retval
289 * Handle used to lock critical section
290 */
291void* Osal_qmssAccCsEnter (void)
292{
293 /* This is a suboptimal implementation for this OSAL, please refer to
294 * QMSS examples for optimal implementation of this function
295 */
296 return (Osal_qmssCsEnter());
297}
298
299/**
300 * @b Description
301 * @n
302 * The function is used to exit a critical section
303 * protected using Osal_qmssAccCsEnter() API.
304 *
305 * @param[in] CsHandle
306 * Handle for unlocking critical section.
307 *
308 * @retval
309 * Not Applicable
310 */
311void Osal_qmssAccCsExit (void *CsHandle)
312{
313 /* This is a suboptimal implementation for this OSAL, please refer to
314 * QMSS examples for optimal implementation of this function
315 */
316
317 Osal_qmssCsExit(CsHandle);
318 return;
319}
320
321/**
322 * @b Description
323 * @n
324 * The function is used to enter a critical section.
325 * Function protects against
326 * access from multiple threads on single core
327 *
328 * @retval
329 * Handle used to lock critical section
330 */
331void* Osal_qmssMtCsEnter (void)
332{
333 /* Create Semaphore for protection against access from multiple threads
334 * Not created here becasue application is not multithreaded
335 * */
336
337 return NULL;
338}
339
340/**
341 * @b Description
342 * @n
343 * The function is used to exit a critical section
344 * protected using Osal_qmssMtCsEnter() API.
345 *
346 * @param[in] CsHandle
347 * Handle to unlock critical section.
348 *
349 * @retval
350 * Not Applicable
351 */
352void Osal_qmssMtCsExit (void *CsHandle)
353{
354 /* Release Semaphore using handle */
355
356 return;
357}
358
359/**
360 * @b Description
361 * @n
362 * The function is used to indicate that a block of memory is
363 * about to be accessed. If the memory block is cached then this
364 * indicates that the application would need to ensure that the
365 * cache is updated with the data from the actual memory.
366 *
367 * @param[in] ptr
368 * Address of memory block
369 *
370 * @param[in] size
371 * Size of memory block
372 *
373 * @retval
374 * Not Applicable
375 */
376void Osal_qmssBeginMemAccess (void *ptr, uint32_t size)
377{
378 /* QMSS data is located in L2 memory.
379 * No update is required */
380 return;
381}
382
383/**
384 * @b Description
385 * @n
386 * The function is used to indicate that the block of memory has
387 * finished being accessed. If the memory block is cached then the
388 * application would need to ensure that the contents of the cache
389 * are updated immediately to the actual memory.
390 *
391 * @param[in] ptr
392 * Address of memory block
393 *
394 * @param[in] size
395 * Size of memory block
396 *
397 * @retval
398 * Not Applicable
399 */
400void Osal_qmssEndMemAccess (void *ptr, uint32_t size)
401{
402 /* QMSS data is located in L2 memory.
403 * No update is required */
404 return;
405}
406
407/* FUNCTION PURPOSE: Allocates memory
408 ***********************************************************************
409 * DESCRIPTION: The function is used to allocate a memory block of the
410 * specified size.
411 */
412void *Osal_rmMalloc (uint32_t num_bytes)
413{
414 Error_Block errorBlock;
415
416 /* Increment the allocation counter. */
417 rmMallocCounter++;
418
419 /* Allocate memory. */
420 return Memory_alloc(NULL, num_bytes, 0, &errorBlock);
421}
422
423/* FUNCTION PURPOSE: Frees memory
424 ***********************************************************************
425 * DESCRIPTION: The function is used to free a memory block of the
426 * specified size.
427 */
428void Osal_rmFree (void *ptr, uint32_t size)
429{
430 /* Increment the free counter. */
431 rmFreeCounter++;
432 Memory_free(NULL, ptr, size);
433}
434
435/* FUNCTION PURPOSE: Critical section enter
436 ***********************************************************************
437 * DESCRIPTION: The function is used to enter a critical section.
438 * Function protects against
439 *
440 * access from multiple cores
441 * and
442 * access from multiple threads on single core
443 */
444void *Osal_rmCsEnter(void)
445{
446
447 return NULL;
448}
449
450/* FUNCTION PURPOSE: Critical section exit
451 ***********************************************************************
452 * DESCRIPTION: The function is used to exit a critical section
453 * protected using Osal_cppiCsEnter() API.
454 */
455void Osal_rmCsExit(void *CsHandle)
456{
457
458}
459
460/* FUNCTION PURPOSE: Multi-threaded critical section enter
461***********************************************************************
462* DESCRIPTION: The function is used to enter a multi-threaded critical
463* section. Function protects against
464*
465* access from multiple threads on single core
466*/
467void *Osal_rmMtCsEnter(void *mtSemObj)
468{
469
470 return NULL;
471}
472
473/* FUNCTION PURPOSE: Multi-threaded critical section exit
474***********************************************************************
475* DESCRIPTION: The function is used to exit a multi-threaded critical
476* section protected using Osal_rmMtCsEnter() API.
477*/
478void Osal_rmMtCsExit(void *mtSemObj, void *CsHandle)
479{
480
481}
482
483/* FUNCTION PURPOSE: Critical section exit
484 ***********************************************************************
485 * DESCRIPTION: The function is used to indicate that a block of memory is
486 * about to be accessed. If the memory block is cached then this
487 * indicates that the application would need to ensure that the
488 * cache is updated with the data from the actual memory.
489 */
490void Osal_rmBeginMemAccess(void *ptr, uint32_t size)
491{
492
493}
494
495/* FUNCTION PURPOSE: Critical section exit
496 ***********************************************************************
497 * DESCRIPTION: The function is used to indicate that the block of memory has
498 * finished being accessed. If the memory block is cached then the
499 * application would need to ensure that the contents of the cache
500 * are updated immediately to the actual memory.
501 */
502void Osal_rmEndMemAccess(void *ptr, uint32_t size)
503{
504
505}
506
507/* FUNCTION PURPOSE: Creates a task blocking object
508 ***********************************************************************
509 * DESCRIPTION: The function is used to create a task blocking object
510 * capable of blocking the task a RM instance is running
511 * within
512 */
513void *Osal_rmTaskBlockCreate(void)
514{
515 /* No task blocking needed since there is only a RM Server */
516 return(NULL);
517}
518
519/* FUNCTION PURPOSE: Blocks a RM instance
520 ***********************************************************************
521 * DESCRIPTION: The function is used to block a task whose context a
522 * RM instance is running within.
523 */
524void Osal_rmTaskBlock(void *handle)
525{
526 /* No task blocking needed since there is only a RM Server */
527}
528
529/* FUNCTION PURPOSE: unBlocks a RM instance
530 ***********************************************************************
531 * DESCRIPTION: The function is used to unblock a task whose context a
532 * RM instance is running within.
533 */
534void Osal_rmTaskUnblock(void *handle)
535{
536 /* No task blocking needed since there is only a RM Server */
537}
538
539/* FUNCTION PURPOSE: Deletes a task blocking object
540 ***********************************************************************
541 * DESCRIPTION: The function is used to delete a task blocking object
542 * provided to a RM instance
543 */
544void Osal_rmTaskBlockDelete(void *handle)
545{
546 /* No task blocking needed since there is only a RM Server */
547}
548
549/* FUNCTION PURPOSE: Prints a variable list
550 ***********************************************************************
551 * DESCRIPTION: The function is used to print a string to the console
552 */
553void Osal_rmLog (char *fmt, ... )
554{
555 VaList ap;
556
557 va_start(ap, fmt);
558 System_vprintf(fmt, ap);
559 va_end(ap);
560}
561