summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSebastien Tomas2015-02-25 07:40:47 -0600
committerSebastien Tomas2015-02-25 07:40:47 -0600
commitcb0cc332d9d1b4d9a52f92a1973f1938a63b17e6 (patch)
treea7587e4dca13d9679cb3a18dca22dc73915a9e70
parent7aa7cec3c72026063692fa440b103af9b85aa287 (diff)
downloaddfe-lld-cb0cc332d9d1b4d9a52f92a1973f1938a63b17e6.tar.gz
dfe-lld-cb0cc332d9d1b4d9a52f92a1973f1938a63b17e6.tar.xz
dfe-lld-cb0cc332d9d1b4d9a52f92a1973f1938a63b17e6.zip
adding exception and interrupt reporting for capture buffer done and cpp dma transfer done
-rw-r--r--dfe_drv.h20
-rw-r--r--src/dfelld/DFE_excep.c246
2 files changed, 265 insertions, 1 deletions
diff --git a/dfe_drv.h b/dfe_drv.h
index 80ec276..89b68ca 100644
--- a/dfe_drv.h
+++ b/dfe_drv.h
@@ -637,6 +637,8 @@ typedef struct _DFE_EeCountObj {
637 DfeFl_DpdaIntrStatus dpdaErr; 637 DfeFl_DpdaIntrStatus dpdaErr;
638 /** Holds counters for dfe Rx Ibpm error interrupts */ 638 /** Holds counters for dfe Rx Ibpm error interrupts */
639 uint32_t rxIbpmInt[4]; 639 uint32_t rxIbpmInt[4];
640 /** Holds counters for dfe capture buffer done interrupts */
641 uint32_t cbDoneInterrupt;
640 /** Holds counters for dfe Misc error interrupts */ 642 /** Holds counters for dfe Misc error interrupts */
641 DFE_EeMiscCppIntStatus miscErr; 643 DFE_EeMiscCppIntStatus miscErr;
642 /** Holds counters for dfe Misc error interrupts */ 644 /** Holds counters for dfe Misc error interrupts */
@@ -1831,6 +1833,24 @@ void Dfe_printException(
1831 DFE_Handle hDfe 1833 DFE_Handle hDfe
1832); 1834);
1833 1835
1836DFE_Err Dfe_enableCbException(
1837 DFE_Handle hDfe
1838);
1839
1840DFE_Err Dfe_disableCbException(
1841 DFE_Handle hDfe
1842);
1843
1844DFE_Err Dfe_enableCppDmaDoneException(
1845 DFE_Handle hDfe,
1846 uint32_t cppDmaChannelNum
1847);
1848
1849DFE_Err Dfe_disableCppDmaDoneException(
1850 DFE_Handle hDfe,
1851 uint32_t cppDmaChannelNum
1852);
1853
1834#ifdef __cplusplus 1854#ifdef __cplusplus
1835} 1855}
1836#endif 1856#endif
diff --git a/src/dfelld/DFE_excep.c b/src/dfelld/DFE_excep.c
index 06292f9..e4b75b4 100644
--- a/src/dfelld/DFE_excep.c
+++ b/src/dfelld/DFE_excep.c
@@ -1893,6 +1893,152 @@ DFE_Err Dfe_getRxException(
1893} 1893}
1894 1894
1895/** ============================================================================ 1895/** ============================================================================
1896 * @n@b Dfe_enableCbException
1897 *
1898 * @b Description
1899 * @n [add content]
1900 *
1901 * @b Arguments
1902 * @verbatim
1903 hDfe [add content]
1904
1905 @endverbatim
1906 *
1907 * <b> Return Value </b> [add content]
1908 *
1909 * <b> Pre Condition </b>
1910 * @n [add content]
1911 *
1912 * <b> Post Condition </b>
1913 * @n [add content]
1914 *
1915 * @b Reads
1916 * @n None
1917 *
1918 * @b Writes
1919 * @n None
1920 *
1921 * @b Example
1922 * @verbatim
1923 [add content]
1924 @endverbatim
1925 * ===========================================================================
1926 */
1927/* Enable DFE Cb Errors and Alarms */
1928DFE_Err Dfe_enableCbException(
1929 DFE_Handle hDfe
1930)
1931{
1932 DfeFl_Status status;
1933 DfeFl_MiscMasterLowPriIntr masterLowPrioErr;
1934
1935 masterLowPrioErr = DFE_FL_MISC_MASTER_LOWPRI_CB;
1936
1937 CSL_HW_CTRL( dfeFl_MiscHwControl(hDfe->hDfeMisc[0], DFE_FL_MISC_CMD_CLR_MASTER_LOWPRI_INTR_STATUS, &masterLowPrioErr) );
1938 CSL_HW_CTRL( dfeFl_MiscHwControl(hDfe->hDfeMisc[0], DFE_FL_MISC_CMD_ENB_MASTER_LOWPRI_INTR, &masterLowPrioErr) );
1939
1940 return DFE_ERR_NONE;
1941}
1942
1943/** ============================================================================
1944 * @n@b Dfe_disableCbException
1945 *
1946 * @b Description
1947 * @n [add content]
1948 *
1949 * @b Arguments
1950 * @verbatim
1951 hDfe [add content]
1952
1953 @endverbatim
1954 *
1955 * <b> Return Value </b> [add content]
1956 *
1957 * <b> Pre Condition </b>
1958 * @n [add content]
1959 *
1960 * <b> Post Condition </b>
1961 * @n [add content]
1962 *
1963 * @b Reads
1964 * @n None
1965 *
1966 * @b Writes
1967 * @n None
1968 *
1969 * @b Example
1970 * @verbatim
1971 [add content]
1972 @endverbatim
1973 * ===========================================================================
1974 */
1975/* Enable DFE Cb Errors and Alarms */
1976DFE_Err Dfe_disableCbException(
1977 DFE_Handle hDfe
1978)
1979{
1980 DfeFl_Status status;
1981 DfeFl_MiscMasterLowPriIntr masterLowPrioErr;
1982
1983 masterLowPrioErr = DFE_FL_MISC_MASTER_LOWPRI_CB;
1984
1985 CSL_HW_CTRL( dfeFl_MiscHwControl(hDfe->hDfeMisc[0], DFE_FL_MISC_CMD_DIS_MASTER_LOWPRI_INTR, &masterLowPrioErr) );
1986
1987 return DFE_ERR_NONE;
1988}
1989
1990/** ============================================================================
1991 * @n@b Dfe_getCbException
1992 *
1993 * @b Description
1994 * @n [add content]
1995 *
1996 * @b Arguments
1997 * @verbatim
1998 hDfe [add content]
1999
2000 @endverbatim
2001 *
2002 * <b> Return Value </b> [add content]
2003 *
2004 * <b> Pre Condition </b>
2005 * @n [add content]
2006 *
2007 * <b> Post Condition </b>
2008 * @n [add content]
2009 *
2010 * @b Reads
2011 * @n None
2012 *
2013 * @b Writes
2014 * @n None
2015 *
2016 * @b Example
2017 * @verbatim
2018 [add content]
2019 @endverbatim
2020 * ===========================================================================
2021 */
2022/* Get DFE Rx Errors and Alarms status and clear */
2023DFE_Err Dfe_getCbException(
2024 DFE_Handle hDfe
2025)
2026{
2027 DfeFl_Status status;
2028 DfeFl_MiscMasterLowPriIntr masterLowPrioErr;
2029
2030 masterLowPrioErr = DFE_FL_MISC_MASTER_LOWPRI_CB;
2031
2032 hDfe->dfeEeCount.eeFlag = 1;
2033
2034 hDfe->dfeEeCount.cbDoneInterrupt += 1;
2035
2036 CSL_HW_CTRL( dfeFl_MiscHwControl(hDfe->hDfeMisc[0], DFE_FL_MISC_CMD_CLR_MASTER_LOWPRI_INTR_STATUS, &masterLowPrioErr) );
2037
2038 return DFE_ERR_NONE;
2039}
2040
2041/** ============================================================================
1896 * @n@b Dfe_enableMiscException 2042 * @n@b Dfe_enableMiscException
1897 * 2043 *
1898 * @b Description 2044 * @b Description
@@ -2055,6 +2201,97 @@ DFE_Err Dfe_getMiscException(
2055} 2201}
2056 2202
2057/** ============================================================================ 2203/** ============================================================================
2204 * @n@b Dfe_enableCppDmaDoneException
2205 *
2206 * @b Description
2207 * @n [add content]
2208 *
2209 * @b Arguments
2210 * @verbatim
2211 hDfe [add content]
2212
2213 @endverbatim
2214 *
2215 * <b> Return Value </b> [add content]
2216 *
2217 * <b> Pre Condition </b>
2218 * @n [add content]
2219 *
2220 * <b> Post Condition </b>
2221 * @n [add content]
2222 *
2223 * @b Reads
2224 * @n None
2225 *
2226 * @b Writes
2227 * @n None
2228 *
2229 * @b Example
2230 * @verbatim
2231 [add content]
2232 @endverbatim
2233 * ===========================================================================
2234 */
2235/* Enable DFE Cpp Dma Done Errors and Alarms */
2236DFE_Err Dfe_enableCppDmaDoneException(
2237 DFE_Handle hDfe,
2238 uint32_t cppDmaChannelNum
2239)
2240{
2241 DfeFl_Status status;
2242 // One interrupt per CPP DMA (up to 32) - INFO
2243 CSL_HW_CTRL( dfeFl_MiscHwControl(hDfe->hDfeMisc[0], DFE_FL_MISC_CMD_CLR_CPP_DMA_DONE_INTR_STATUS, &(cppDmaChannelNum)) );
2244 CSL_HW_CTRL( dfeFl_MiscHwControl(hDfe->hDfeMisc[0], DFE_FL_MISC_CMD_ENB_CPP_DMA_DONE_INTR, &(cppDmaChannelNum)) );
2245
2246 return DFE_ERR_NONE;
2247}
2248
2249/** ============================================================================
2250 * @n@b Dfe_disableCppDmaDoneException
2251 *
2252 * @b Description
2253 * @n [add content]
2254 *
2255 * @b Arguments
2256 * @verbatim
2257 hDfe [add content]
2258
2259 @endverbatim
2260 *
2261 * <b> Return Value </b> [add content]
2262 *
2263 * <b> Pre Condition </b>
2264 * @n [add content]
2265 *
2266 * <b> Post Condition </b>
2267 * @n [add content]
2268 *
2269 * @b Reads
2270 * @n None
2271 *
2272 * @b Writes
2273 * @n None
2274 *
2275 * @b Example
2276 * @verbatim
2277 [add content]
2278 @endverbatim
2279 * ===========================================================================
2280 */
2281/* Disable DFE Cpp Dma Done Errors and Alarms */
2282DFE_Err Dfe_disableCppDmaDoneException(
2283 DFE_Handle hDfe,
2284 uint32_t cppDmaChannelNum
2285)
2286{
2287 DfeFl_Status status;
2288 // One interrupt per CPP DMA (up to 32) - INFO
2289 CSL_HW_CTRL( dfeFl_MiscHwControl(hDfe->hDfeMisc[0], DFE_FL_MISC_CMD_DIS_CPP_DMA_DONE_INTR, &(cppDmaChannelNum)) );
2290
2291 return DFE_ERR_NONE;
2292}
2293
2294/** ============================================================================
2058 * @n@b Dfe_enableHiMiscException 2295 * @n@b Dfe_enableHiMiscException
2059 * 2296 *
2060 * @b Description 2297 * @b Description
@@ -2295,7 +2532,7 @@ DFE_Err Dfe_getException(
2295 2532
2296 /* DPDA errors */ 2533 /* DPDA errors */
2297 if (eeMasterLowOrigin.dpda) { 2534 if (eeMasterLowOrigin.dpda) {
2298 Dfe_getJesdException(hDfe); 2535 Dfe_getDpdaException(hDfe);
2299 } 2536 }
2300 2537
2301 /* RXIBPM errors */ 2538 /* RXIBPM errors */
@@ -2307,6 +2544,11 @@ DFE_Err Dfe_getException(
2307 } 2544 }
2308 } 2545 }
2309 2546
2547 /* CB done interrupts */
2548 if (eeMasterLowOrigin.cb) {
2549 Dfe_getCbException(hDfe);
2550 }
2551
2310 /* MISC errors */ 2552 /* MISC errors */
2311 if (eeMasterLowOrigin.misc) { 2553 if (eeMasterLowOrigin.misc) {
2312 Dfe_getMiscException(hDfe); 2554 Dfe_getMiscException(hDfe);
@@ -2386,6 +2628,8 @@ uint32_t gie;
2386 Dfe_enableDpdaException(hDfe); 2628 Dfe_enableDpdaException(hDfe);
2387 /* RX IBPM errors */ 2629 /* RX IBPM errors */
2388 Dfe_enableRxException(hDfe); 2630 Dfe_enableRxException(hDfe);
2631 /* CB capture done interrupts */
2632 Dfe_enableCbException(hDfe);
2389 /* Misc errors */ 2633 /* Misc errors */
2390 Dfe_enableMiscException(hDfe); 2634 Dfe_enableMiscException(hDfe);
2391 /* High Misc errors */ 2635 /* High Misc errors */